radeon_test.c 6.4 KB

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  1. /*
  2. * Copyright 2009 VMware, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Michel Dänzer
  23. */
  24. #include <drm/drmP.h>
  25. #include <drm/radeon_drm.h>
  26. #include "radeon_reg.h"
  27. #include "radeon.h"
  28. /* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */
  29. void radeon_test_moves(struct radeon_device *rdev)
  30. {
  31. struct radeon_bo *vram_obj = NULL;
  32. struct radeon_bo **gtt_obj = NULL;
  33. struct radeon_fence *fence = NULL;
  34. uint64_t gtt_addr, vram_addr;
  35. unsigned i, n, size;
  36. int r;
  37. size = 1024 * 1024;
  38. /* Number of tests =
  39. * (Total GTT - IB pool - writeback page - ring buffers) / test size
  40. */
  41. n = rdev->mc.gtt_size - RADEON_IB_POOL_SIZE*64*1024;
  42. n -= rdev->cp.ring_size;
  43. if (rdev->wb.wb_obj)
  44. n -= RADEON_GPU_PAGE_SIZE;
  45. if (rdev->ih.ring_obj)
  46. n -= rdev->ih.ring_size;
  47. n /= size;
  48. gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL);
  49. if (!gtt_obj) {
  50. DRM_ERROR("Failed to allocate %d pointers\n", n);
  51. r = 1;
  52. goto out_cleanup;
  53. }
  54. r = radeon_bo_create(rdev, size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,
  55. &vram_obj);
  56. if (r) {
  57. DRM_ERROR("Failed to create VRAM object\n");
  58. goto out_cleanup;
  59. }
  60. r = radeon_bo_reserve(vram_obj, false);
  61. if (unlikely(r != 0))
  62. goto out_cleanup;
  63. r = radeon_bo_pin(vram_obj, RADEON_GEM_DOMAIN_VRAM, &vram_addr);
  64. if (r) {
  65. DRM_ERROR("Failed to pin VRAM object\n");
  66. goto out_cleanup;
  67. }
  68. for (i = 0; i < n; i++) {
  69. void *gtt_map, *vram_map;
  70. void **gtt_start, **gtt_end;
  71. void **vram_start, **vram_end;
  72. r = radeon_bo_create(rdev, size, PAGE_SIZE, true,
  73. RADEON_GEM_DOMAIN_GTT, gtt_obj + i);
  74. if (r) {
  75. DRM_ERROR("Failed to create GTT object %d\n", i);
  76. goto out_cleanup;
  77. }
  78. r = radeon_bo_reserve(gtt_obj[i], false);
  79. if (unlikely(r != 0))
  80. goto out_cleanup;
  81. r = radeon_bo_pin(gtt_obj[i], RADEON_GEM_DOMAIN_GTT, &gtt_addr);
  82. if (r) {
  83. DRM_ERROR("Failed to pin GTT object %d\n", i);
  84. goto out_cleanup;
  85. }
  86. r = radeon_bo_kmap(gtt_obj[i], &gtt_map);
  87. if (r) {
  88. DRM_ERROR("Failed to map GTT object %d\n", i);
  89. goto out_cleanup;
  90. }
  91. for (gtt_start = gtt_map, gtt_end = gtt_map + size;
  92. gtt_start < gtt_end;
  93. gtt_start++)
  94. *gtt_start = gtt_start;
  95. radeon_bo_kunmap(gtt_obj[i]);
  96. r = radeon_fence_create(rdev, &fence, RADEON_RING_TYPE_GFX_INDEX);
  97. if (r) {
  98. DRM_ERROR("Failed to create GTT->VRAM fence %d\n", i);
  99. goto out_cleanup;
  100. }
  101. r = radeon_copy(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, fence);
  102. if (r) {
  103. DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
  104. goto out_cleanup;
  105. }
  106. r = radeon_fence_wait(fence, false);
  107. if (r) {
  108. DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i);
  109. goto out_cleanup;
  110. }
  111. radeon_fence_unref(&fence);
  112. r = radeon_bo_kmap(vram_obj, &vram_map);
  113. if (r) {
  114. DRM_ERROR("Failed to map VRAM object after copy %d\n", i);
  115. goto out_cleanup;
  116. }
  117. for (gtt_start = gtt_map, gtt_end = gtt_map + size,
  118. vram_start = vram_map, vram_end = vram_map + size;
  119. vram_start < vram_end;
  120. gtt_start++, vram_start++) {
  121. if (*vram_start != gtt_start) {
  122. DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, "
  123. "expected 0x%p (GTT/VRAM offset "
  124. "0x%16llx/0x%16llx)\n",
  125. i, *vram_start, gtt_start,
  126. (unsigned long long)
  127. (gtt_addr - rdev->mc.gtt_start +
  128. (void*)gtt_start - gtt_map),
  129. (unsigned long long)
  130. (vram_addr - rdev->mc.vram_start +
  131. (void*)gtt_start - gtt_map));
  132. radeon_bo_kunmap(vram_obj);
  133. goto out_cleanup;
  134. }
  135. *vram_start = vram_start;
  136. }
  137. radeon_bo_kunmap(vram_obj);
  138. r = radeon_fence_create(rdev, &fence, RADEON_RING_TYPE_GFX_INDEX);
  139. if (r) {
  140. DRM_ERROR("Failed to create VRAM->GTT fence %d\n", i);
  141. goto out_cleanup;
  142. }
  143. r = radeon_copy(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, fence);
  144. if (r) {
  145. DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
  146. goto out_cleanup;
  147. }
  148. r = radeon_fence_wait(fence, false);
  149. if (r) {
  150. DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i);
  151. goto out_cleanup;
  152. }
  153. radeon_fence_unref(&fence);
  154. r = radeon_bo_kmap(gtt_obj[i], &gtt_map);
  155. if (r) {
  156. DRM_ERROR("Failed to map GTT object after copy %d\n", i);
  157. goto out_cleanup;
  158. }
  159. for (gtt_start = gtt_map, gtt_end = gtt_map + size,
  160. vram_start = vram_map, vram_end = vram_map + size;
  161. gtt_start < gtt_end;
  162. gtt_start++, vram_start++) {
  163. if (*gtt_start != vram_start) {
  164. DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, "
  165. "expected 0x%p (VRAM/GTT offset "
  166. "0x%16llx/0x%16llx)\n",
  167. i, *gtt_start, vram_start,
  168. (unsigned long long)
  169. (vram_addr - rdev->mc.vram_start +
  170. (void*)vram_start - vram_map),
  171. (unsigned long long)
  172. (gtt_addr - rdev->mc.gtt_start +
  173. (void*)vram_start - vram_map));
  174. radeon_bo_kunmap(gtt_obj[i]);
  175. goto out_cleanup;
  176. }
  177. }
  178. radeon_bo_kunmap(gtt_obj[i]);
  179. DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n",
  180. gtt_addr - rdev->mc.gtt_start);
  181. }
  182. out_cleanup:
  183. if (vram_obj) {
  184. if (radeon_bo_is_reserved(vram_obj)) {
  185. radeon_bo_unpin(vram_obj);
  186. radeon_bo_unreserve(vram_obj);
  187. }
  188. radeon_bo_unref(&vram_obj);
  189. }
  190. if (gtt_obj) {
  191. for (i = 0; i < n; i++) {
  192. if (gtt_obj[i]) {
  193. if (radeon_bo_is_reserved(gtt_obj[i])) {
  194. radeon_bo_unpin(gtt_obj[i]);
  195. radeon_bo_unreserve(gtt_obj[i]);
  196. }
  197. radeon_bo_unref(&gtt_obj[i]);
  198. }
  199. }
  200. kfree(gtt_obj);
  201. }
  202. if (fence) {
  203. radeon_fence_unref(&fence);
  204. }
  205. if (r) {
  206. printk(KERN_WARNING "Error while testing BO move.\n");
  207. }
  208. }