board-overo.c 17 KB

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  1. /*
  2. * board-overo.c (Gumstix Overo)
  3. *
  4. * Initial code: Steve Sakoman <steve@sakoman.com>
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * version 2 as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13. * General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  18. * 02110-1301 USA
  19. *
  20. */
  21. #include <linux/clk.h>
  22. #include <linux/delay.h>
  23. #include <linux/err.h>
  24. #include <linux/init.h>
  25. #include <linux/io.h>
  26. #include <linux/kernel.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/i2c/twl.h>
  29. #include <linux/regulator/machine.h>
  30. #include <linux/spi/spi.h>
  31. #include <linux/mtd/mtd.h>
  32. #include <linux/mtd/nand.h>
  33. #include <linux/mtd/partitions.h>
  34. #include <linux/mmc/host.h>
  35. #include <asm/mach-types.h>
  36. #include <asm/mach/arch.h>
  37. #include <asm/mach/flash.h>
  38. #include <asm/mach/map.h>
  39. #include <plat/board.h>
  40. #include <plat/common.h>
  41. #include <plat/display.h>
  42. #include <plat/panel-generic-dpi.h>
  43. #include <mach/gpio.h>
  44. #include <plat/gpmc.h>
  45. #include <mach/hardware.h>
  46. #include <plat/nand.h>
  47. #include <plat/mcspi.h>
  48. #include <plat/mux.h>
  49. #include <plat/usb.h>
  50. #include "mux.h"
  51. #include "sdram-micron-mt46h32m32lf-6.h"
  52. #include "hsmmc.h"
  53. #define OVERO_GPIO_BT_XGATE 15
  54. #define OVERO_GPIO_W2W_NRESET 16
  55. #define OVERO_GPIO_PENDOWN 114
  56. #define OVERO_GPIO_BT_NRESET 164
  57. #define OVERO_GPIO_USBH_CPEN 168
  58. #define OVERO_GPIO_USBH_NRESET 183
  59. #define NAND_BLOCK_SIZE SZ_128K
  60. #define OVERO_SMSC911X_CS 5
  61. #define OVERO_SMSC911X_GPIO 176
  62. #define OVERO_SMSC911X2_CS 4
  63. #define OVERO_SMSC911X2_GPIO 65
  64. #if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
  65. defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
  66. #include <linux/spi/ads7846.h>
  67. static struct omap2_mcspi_device_config ads7846_mcspi_config = {
  68. .turbo_mode = 0,
  69. .single_channel = 1, /* 0: slave, 1: master */
  70. };
  71. static int ads7846_get_pendown_state(void)
  72. {
  73. return !gpio_get_value(OVERO_GPIO_PENDOWN);
  74. }
  75. static struct ads7846_platform_data ads7846_config = {
  76. .x_max = 0x0fff,
  77. .y_max = 0x0fff,
  78. .x_plate_ohms = 180,
  79. .pressure_max = 255,
  80. .debounce_max = 10,
  81. .debounce_tol = 3,
  82. .debounce_rep = 1,
  83. .get_pendown_state = ads7846_get_pendown_state,
  84. .keep_vref_on = 1,
  85. };
  86. static void __init overo_ads7846_init(void)
  87. {
  88. if ((gpio_request(OVERO_GPIO_PENDOWN, "ADS7846_PENDOWN") == 0) &&
  89. (gpio_direction_input(OVERO_GPIO_PENDOWN) == 0)) {
  90. gpio_export(OVERO_GPIO_PENDOWN, 0);
  91. } else {
  92. printk(KERN_ERR "could not obtain gpio for ADS7846_PENDOWN\n");
  93. return;
  94. }
  95. }
  96. #else
  97. static inline void __init overo_ads7846_init(void) { return; }
  98. #endif
  99. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  100. #include <linux/smsc911x.h>
  101. static struct resource overo_smsc911x_resources[] = {
  102. {
  103. .name = "smsc911x-memory",
  104. .flags = IORESOURCE_MEM,
  105. },
  106. {
  107. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  108. },
  109. };
  110. static struct resource overo_smsc911x2_resources[] = {
  111. {
  112. .name = "smsc911x2-memory",
  113. .flags = IORESOURCE_MEM,
  114. },
  115. {
  116. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  117. },
  118. };
  119. static struct smsc911x_platform_config overo_smsc911x_config = {
  120. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  121. .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  122. .flags = SMSC911X_USE_32BIT ,
  123. .phy_interface = PHY_INTERFACE_MODE_MII,
  124. };
  125. static struct platform_device overo_smsc911x_device = {
  126. .name = "smsc911x",
  127. .id = 0,
  128. .num_resources = ARRAY_SIZE(overo_smsc911x_resources),
  129. .resource = overo_smsc911x_resources,
  130. .dev = {
  131. .platform_data = &overo_smsc911x_config,
  132. },
  133. };
  134. static struct platform_device overo_smsc911x2_device = {
  135. .name = "smsc911x",
  136. .id = 1,
  137. .num_resources = ARRAY_SIZE(overo_smsc911x2_resources),
  138. .resource = overo_smsc911x2_resources,
  139. .dev = {
  140. .platform_data = &overo_smsc911x_config,
  141. },
  142. };
  143. static struct platform_device *smsc911x_devices[] = {
  144. &overo_smsc911x_device,
  145. &overo_smsc911x2_device,
  146. };
  147. static inline void __init overo_init_smsc911x(void)
  148. {
  149. unsigned long cs_mem_base, cs_mem_base2;
  150. /* set up first smsc911x chip */
  151. if (gpmc_cs_request(OVERO_SMSC911X_CS, SZ_16M, &cs_mem_base) < 0) {
  152. printk(KERN_ERR "Failed request for GPMC mem for smsc911x\n");
  153. return;
  154. }
  155. overo_smsc911x_resources[0].start = cs_mem_base + 0x0;
  156. overo_smsc911x_resources[0].end = cs_mem_base + 0xff;
  157. if ((gpio_request(OVERO_SMSC911X_GPIO, "SMSC911X IRQ") == 0) &&
  158. (gpio_direction_input(OVERO_SMSC911X_GPIO) == 0)) {
  159. gpio_export(OVERO_SMSC911X_GPIO, 0);
  160. } else {
  161. printk(KERN_ERR "could not obtain gpio for SMSC911X IRQ\n");
  162. return;
  163. }
  164. overo_smsc911x_resources[1].start = OMAP_GPIO_IRQ(OVERO_SMSC911X_GPIO);
  165. overo_smsc911x_resources[1].end = 0;
  166. /* set up second smsc911x chip */
  167. if (gpmc_cs_request(OVERO_SMSC911X2_CS, SZ_16M, &cs_mem_base2) < 0) {
  168. printk(KERN_ERR "Failed request for GPMC mem for smsc911x2\n");
  169. return;
  170. }
  171. overo_smsc911x2_resources[0].start = cs_mem_base2 + 0x0;
  172. overo_smsc911x2_resources[0].end = cs_mem_base2 + 0xff;
  173. if ((gpio_request(OVERO_SMSC911X2_GPIO, "SMSC911X2 IRQ") == 0) &&
  174. (gpio_direction_input(OVERO_SMSC911X2_GPIO) == 0)) {
  175. gpio_export(OVERO_SMSC911X2_GPIO, 0);
  176. } else {
  177. printk(KERN_ERR "could not obtain gpio for SMSC911X2 IRQ\n");
  178. return;
  179. }
  180. overo_smsc911x2_resources[1].start = OMAP_GPIO_IRQ(OVERO_SMSC911X2_GPIO);
  181. overo_smsc911x2_resources[1].end = 0;
  182. platform_add_devices(smsc911x_devices, ARRAY_SIZE(smsc911x_devices));
  183. }
  184. #else
  185. static inline void __init overo_init_smsc911x(void) { return; }
  186. #endif
  187. /* DSS */
  188. static int lcd_enabled;
  189. static int dvi_enabled;
  190. #define OVERO_GPIO_LCD_EN 144
  191. #define OVERO_GPIO_LCD_BL 145
  192. static void __init overo_display_init(void)
  193. {
  194. if ((gpio_request(OVERO_GPIO_LCD_EN, "OVERO_GPIO_LCD_EN") == 0) &&
  195. (gpio_direction_output(OVERO_GPIO_LCD_EN, 1) == 0))
  196. gpio_export(OVERO_GPIO_LCD_EN, 0);
  197. else
  198. printk(KERN_ERR "could not obtain gpio for "
  199. "OVERO_GPIO_LCD_EN\n");
  200. if ((gpio_request(OVERO_GPIO_LCD_BL, "OVERO_GPIO_LCD_BL") == 0) &&
  201. (gpio_direction_output(OVERO_GPIO_LCD_BL, 1) == 0))
  202. gpio_export(OVERO_GPIO_LCD_BL, 0);
  203. else
  204. printk(KERN_ERR "could not obtain gpio for "
  205. "OVERO_GPIO_LCD_BL\n");
  206. }
  207. static int overo_panel_enable_dvi(struct omap_dss_device *dssdev)
  208. {
  209. if (lcd_enabled) {
  210. printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
  211. return -EINVAL;
  212. }
  213. dvi_enabled = 1;
  214. return 0;
  215. }
  216. static void overo_panel_disable_dvi(struct omap_dss_device *dssdev)
  217. {
  218. dvi_enabled = 0;
  219. }
  220. static struct panel_generic_dpi_data dvi_panel = {
  221. .name = "generic",
  222. .platform_enable = overo_panel_enable_dvi,
  223. .platform_disable = overo_panel_disable_dvi,
  224. };
  225. static struct omap_dss_device overo_dvi_device = {
  226. .name = "dvi",
  227. .type = OMAP_DISPLAY_TYPE_DPI,
  228. .driver_name = "generic_dpi_panel",
  229. .data = &dvi_panel,
  230. .phy.dpi.data_lines = 24,
  231. };
  232. static struct omap_dss_device overo_tv_device = {
  233. .name = "tv",
  234. .driver_name = "venc",
  235. .type = OMAP_DISPLAY_TYPE_VENC,
  236. .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
  237. };
  238. static int overo_panel_enable_lcd(struct omap_dss_device *dssdev)
  239. {
  240. if (dvi_enabled) {
  241. printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
  242. return -EINVAL;
  243. }
  244. gpio_set_value(OVERO_GPIO_LCD_EN, 1);
  245. gpio_set_value(OVERO_GPIO_LCD_BL, 1);
  246. lcd_enabled = 1;
  247. return 0;
  248. }
  249. static void overo_panel_disable_lcd(struct omap_dss_device *dssdev)
  250. {
  251. gpio_set_value(OVERO_GPIO_LCD_EN, 0);
  252. gpio_set_value(OVERO_GPIO_LCD_BL, 0);
  253. lcd_enabled = 0;
  254. }
  255. static struct panel_generic_dpi_data lcd43_panel = {
  256. .name = "samsung_lte430wq_f0c",
  257. .platform_enable = overo_panel_enable_lcd,
  258. .platform_disable = overo_panel_disable_lcd,
  259. };
  260. static struct omap_dss_device overo_lcd43_device = {
  261. .name = "lcd43",
  262. .type = OMAP_DISPLAY_TYPE_DPI,
  263. .driver_name = "generic_dpi_panel",
  264. .data = &lcd43_panel,
  265. .phy.dpi.data_lines = 24,
  266. };
  267. #if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \
  268. defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE)
  269. static struct omap_dss_device overo_lcd35_device = {
  270. .type = OMAP_DISPLAY_TYPE_DPI,
  271. .name = "lcd35",
  272. .driver_name = "lgphilips_lb035q02_panel",
  273. .phy.dpi.data_lines = 24,
  274. .platform_enable = overo_panel_enable_lcd,
  275. .platform_disable = overo_panel_disable_lcd,
  276. };
  277. #endif
  278. static struct omap_dss_device *overo_dss_devices[] = {
  279. &overo_dvi_device,
  280. &overo_tv_device,
  281. #if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \
  282. defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE)
  283. &overo_lcd35_device,
  284. #endif
  285. &overo_lcd43_device,
  286. };
  287. static struct omap_dss_board_info overo_dss_data = {
  288. .num_devices = ARRAY_SIZE(overo_dss_devices),
  289. .devices = overo_dss_devices,
  290. .default_device = &overo_dvi_device,
  291. };
  292. static struct regulator_consumer_supply overo_vdda_dac_supply =
  293. REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
  294. static struct regulator_consumer_supply overo_vdds_dsi_supply[] = {
  295. REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
  296. REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
  297. };
  298. static struct mtd_partition overo_nand_partitions[] = {
  299. {
  300. .name = "xloader",
  301. .offset = 0, /* Offset = 0x00000 */
  302. .size = 4 * NAND_BLOCK_SIZE,
  303. .mask_flags = MTD_WRITEABLE
  304. },
  305. {
  306. .name = "uboot",
  307. .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
  308. .size = 14 * NAND_BLOCK_SIZE,
  309. },
  310. {
  311. .name = "uboot environment",
  312. .offset = MTDPART_OFS_APPEND, /* Offset = 0x240000 */
  313. .size = 2 * NAND_BLOCK_SIZE,
  314. },
  315. {
  316. .name = "linux",
  317. .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
  318. .size = 32 * NAND_BLOCK_SIZE,
  319. },
  320. {
  321. .name = "rootfs",
  322. .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */
  323. .size = MTDPART_SIZ_FULL,
  324. },
  325. };
  326. static struct omap_nand_platform_data overo_nand_data = {
  327. .parts = overo_nand_partitions,
  328. .nr_parts = ARRAY_SIZE(overo_nand_partitions),
  329. .dma_channel = -1, /* disable DMA in OMAP NAND driver */
  330. };
  331. static void __init overo_flash_init(void)
  332. {
  333. u8 cs = 0;
  334. u8 nandcs = GPMC_CS_NUM + 1;
  335. /* find out the chip-select on which NAND exists */
  336. while (cs < GPMC_CS_NUM) {
  337. u32 ret = 0;
  338. ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
  339. if ((ret & 0xC00) == 0x800) {
  340. printk(KERN_INFO "Found NAND on CS%d\n", cs);
  341. if (nandcs > GPMC_CS_NUM)
  342. nandcs = cs;
  343. }
  344. cs++;
  345. }
  346. if (nandcs > GPMC_CS_NUM) {
  347. printk(KERN_INFO "NAND: Unable to find configuration "
  348. "in GPMC\n ");
  349. return;
  350. }
  351. if (nandcs < GPMC_CS_NUM) {
  352. overo_nand_data.cs = nandcs;
  353. printk(KERN_INFO "Registering NAND on CS%d\n", nandcs);
  354. if (gpmc_nand_init(&overo_nand_data) < 0)
  355. printk(KERN_ERR "Unable to register NAND device\n");
  356. }
  357. }
  358. static struct omap2_hsmmc_info mmc[] = {
  359. {
  360. .mmc = 1,
  361. .caps = MMC_CAP_4_BIT_DATA,
  362. .gpio_cd = -EINVAL,
  363. .gpio_wp = -EINVAL,
  364. },
  365. {
  366. .mmc = 2,
  367. .caps = MMC_CAP_4_BIT_DATA,
  368. .gpio_cd = -EINVAL,
  369. .gpio_wp = -EINVAL,
  370. .transceiver = true,
  371. .ocr_mask = 0x00100000, /* 3.3V */
  372. },
  373. {} /* Terminator */
  374. };
  375. static struct regulator_consumer_supply overo_vmmc1_supply = {
  376. .supply = "vmmc",
  377. };
  378. static int overo_twl_gpio_setup(struct device *dev,
  379. unsigned gpio, unsigned ngpio)
  380. {
  381. omap2_hsmmc_init(mmc);
  382. overo_vmmc1_supply.dev = mmc[0].dev;
  383. return 0;
  384. }
  385. static struct twl4030_gpio_platform_data overo_gpio_data = {
  386. .gpio_base = OMAP_MAX_GPIO_LINES,
  387. .irq_base = TWL4030_GPIO_IRQ_BASE,
  388. .irq_end = TWL4030_GPIO_IRQ_END,
  389. .setup = overo_twl_gpio_setup,
  390. };
  391. static struct twl4030_usb_data overo_usb_data = {
  392. .usb_mode = T2_USB_MODE_ULPI,
  393. };
  394. static struct regulator_init_data overo_vmmc1 = {
  395. .constraints = {
  396. .min_uV = 1850000,
  397. .max_uV = 3150000,
  398. .valid_modes_mask = REGULATOR_MODE_NORMAL
  399. | REGULATOR_MODE_STANDBY,
  400. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  401. | REGULATOR_CHANGE_MODE
  402. | REGULATOR_CHANGE_STATUS,
  403. },
  404. .num_consumer_supplies = 1,
  405. .consumer_supplies = &overo_vmmc1_supply,
  406. };
  407. /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
  408. static struct regulator_init_data overo_vdac = {
  409. .constraints = {
  410. .min_uV = 1800000,
  411. .max_uV = 1800000,
  412. .valid_modes_mask = REGULATOR_MODE_NORMAL
  413. | REGULATOR_MODE_STANDBY,
  414. .valid_ops_mask = REGULATOR_CHANGE_MODE
  415. | REGULATOR_CHANGE_STATUS,
  416. },
  417. .num_consumer_supplies = 1,
  418. .consumer_supplies = &overo_vdda_dac_supply,
  419. };
  420. /* VPLL2 for digital video outputs */
  421. static struct regulator_init_data overo_vpll2 = {
  422. .constraints = {
  423. .name = "VDVI",
  424. .min_uV = 1800000,
  425. .max_uV = 1800000,
  426. .valid_modes_mask = REGULATOR_MODE_NORMAL
  427. | REGULATOR_MODE_STANDBY,
  428. .valid_ops_mask = REGULATOR_CHANGE_MODE
  429. | REGULATOR_CHANGE_STATUS,
  430. },
  431. .num_consumer_supplies = ARRAY_SIZE(overo_vdds_dsi_supply),
  432. .consumer_supplies = overo_vdds_dsi_supply,
  433. };
  434. static struct twl4030_codec_audio_data overo_audio_data;
  435. static struct twl4030_codec_data overo_codec_data = {
  436. .audio_mclk = 26000000,
  437. .audio = &overo_audio_data,
  438. };
  439. static struct twl4030_platform_data overo_twldata = {
  440. .irq_base = TWL4030_IRQ_BASE,
  441. .irq_end = TWL4030_IRQ_END,
  442. .gpio = &overo_gpio_data,
  443. .usb = &overo_usb_data,
  444. .codec = &overo_codec_data,
  445. .vmmc1 = &overo_vmmc1,
  446. .vdac = &overo_vdac,
  447. .vpll2 = &overo_vpll2,
  448. };
  449. static struct i2c_board_info __initdata overo_i2c_boardinfo[] = {
  450. {
  451. I2C_BOARD_INFO("tps65950", 0x48),
  452. .flags = I2C_CLIENT_WAKE,
  453. .irq = INT_34XX_SYS_NIRQ,
  454. .platform_data = &overo_twldata,
  455. },
  456. };
  457. static int __init overo_i2c_init(void)
  458. {
  459. omap_register_i2c_bus(1, 2600, overo_i2c_boardinfo,
  460. ARRAY_SIZE(overo_i2c_boardinfo));
  461. /* i2c2 pins are used for gpio */
  462. omap_register_i2c_bus(3, 400, NULL, 0);
  463. return 0;
  464. }
  465. static struct spi_board_info overo_spi_board_info[] __initdata = {
  466. #if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
  467. defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
  468. {
  469. .modalias = "ads7846",
  470. .bus_num = 1,
  471. .chip_select = 0,
  472. .max_speed_hz = 1500000,
  473. .controller_data = &ads7846_mcspi_config,
  474. .irq = OMAP_GPIO_IRQ(OVERO_GPIO_PENDOWN),
  475. .platform_data = &ads7846_config,
  476. },
  477. #endif
  478. #if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \
  479. defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE)
  480. {
  481. .modalias = "lgphilips_lb035q02_panel-spi",
  482. .bus_num = 1,
  483. .chip_select = 1,
  484. .max_speed_hz = 500000,
  485. .mode = SPI_MODE_3,
  486. },
  487. #endif
  488. };
  489. static int __init overo_spi_init(void)
  490. {
  491. overo_ads7846_init();
  492. spi_register_board_info(overo_spi_board_info,
  493. ARRAY_SIZE(overo_spi_board_info));
  494. return 0;
  495. }
  496. static void __init overo_init_early(void)
  497. {
  498. omap2_init_common_infrastructure();
  499. omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
  500. mt46h32m32lf6_sdrc_params);
  501. }
  502. static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
  503. .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN,
  504. .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
  505. .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
  506. .phy_reset = true,
  507. .reset_gpio_port[0] = -EINVAL,
  508. .reset_gpio_port[1] = OVERO_GPIO_USBH_NRESET,
  509. .reset_gpio_port[2] = -EINVAL
  510. };
  511. #ifdef CONFIG_OMAP_MUX
  512. static struct omap_board_mux board_mux[] __initdata = {
  513. { .reg_offset = OMAP_MUX_TERMINATOR },
  514. };
  515. #endif
  516. static struct omap_musb_board_data musb_board_data = {
  517. .interface_type = MUSB_INTERFACE_ULPI,
  518. .mode = MUSB_OTG,
  519. .power = 100,
  520. };
  521. static void __init overo_init(void)
  522. {
  523. omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
  524. overo_i2c_init();
  525. omap_display_init(&overo_dss_data);
  526. omap_serial_init();
  527. overo_flash_init();
  528. usb_musb_init(&musb_board_data);
  529. usb_ehci_init(&ehci_pdata);
  530. overo_spi_init();
  531. overo_init_smsc911x();
  532. overo_display_init();
  533. /* Ensure SDRC pins are mux'd for self-refresh */
  534. omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
  535. omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
  536. if ((gpio_request(OVERO_GPIO_W2W_NRESET,
  537. "OVERO_GPIO_W2W_NRESET") == 0) &&
  538. (gpio_direction_output(OVERO_GPIO_W2W_NRESET, 1) == 0)) {
  539. gpio_export(OVERO_GPIO_W2W_NRESET, 0);
  540. gpio_set_value(OVERO_GPIO_W2W_NRESET, 0);
  541. udelay(10);
  542. gpio_set_value(OVERO_GPIO_W2W_NRESET, 1);
  543. } else {
  544. printk(KERN_ERR "could not obtain gpio for "
  545. "OVERO_GPIO_W2W_NRESET\n");
  546. }
  547. if ((gpio_request(OVERO_GPIO_BT_XGATE, "OVERO_GPIO_BT_XGATE") == 0) &&
  548. (gpio_direction_output(OVERO_GPIO_BT_XGATE, 0) == 0))
  549. gpio_export(OVERO_GPIO_BT_XGATE, 0);
  550. else
  551. printk(KERN_ERR "could not obtain gpio for OVERO_GPIO_BT_XGATE\n");
  552. if ((gpio_request(OVERO_GPIO_BT_NRESET, "OVERO_GPIO_BT_NRESET") == 0) &&
  553. (gpio_direction_output(OVERO_GPIO_BT_NRESET, 1) == 0)) {
  554. gpio_export(OVERO_GPIO_BT_NRESET, 0);
  555. gpio_set_value(OVERO_GPIO_BT_NRESET, 0);
  556. mdelay(6);
  557. gpio_set_value(OVERO_GPIO_BT_NRESET, 1);
  558. } else {
  559. printk(KERN_ERR "could not obtain gpio for "
  560. "OVERO_GPIO_BT_NRESET\n");
  561. }
  562. if ((gpio_request(OVERO_GPIO_USBH_CPEN, "OVERO_GPIO_USBH_CPEN") == 0) &&
  563. (gpio_direction_output(OVERO_GPIO_USBH_CPEN, 1) == 0))
  564. gpio_export(OVERO_GPIO_USBH_CPEN, 0);
  565. else
  566. printk(KERN_ERR "could not obtain gpio for "
  567. "OVERO_GPIO_USBH_CPEN\n");
  568. }
  569. MACHINE_START(OVERO, "Gumstix Overo")
  570. .boot_params = 0x80000100,
  571. .reserve = omap_reserve,
  572. .map_io = omap3_map_io,
  573. .init_early = overo_init_early,
  574. .init_irq = omap_init_irq,
  575. .init_machine = overo_init,
  576. .timer = &omap_timer,
  577. MACHINE_END