main.c 53 KB

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  1. /*
  2. * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
  3. * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include <linux/module.h>
  34. #include <linux/init.h>
  35. #include <linux/slab.h>
  36. #include <linux/errno.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/inetdevice.h>
  39. #include <linux/rtnetlink.h>
  40. #include <linux/if_vlan.h>
  41. #include <rdma/ib_smi.h>
  42. #include <rdma/ib_user_verbs.h>
  43. #include <rdma/ib_addr.h>
  44. #include <linux/mlx4/driver.h>
  45. #include <linux/mlx4/cmd.h>
  46. #include "mlx4_ib.h"
  47. #include "user.h"
  48. #define DRV_NAME MLX4_IB_DRV_NAME
  49. #define DRV_VERSION "1.0"
  50. #define DRV_RELDATE "April 4, 2008"
  51. #define MLX4_IB_FLOW_MAX_PRIO 0xFFF
  52. MODULE_AUTHOR("Roland Dreier");
  53. MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
  54. MODULE_LICENSE("Dual BSD/GPL");
  55. MODULE_VERSION(DRV_VERSION);
  56. int mlx4_ib_sm_guid_assign = 1;
  57. module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444);
  58. MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 1)");
  59. static const char mlx4_ib_version[] =
  60. DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
  61. DRV_VERSION " (" DRV_RELDATE ")\n";
  62. struct update_gid_work {
  63. struct work_struct work;
  64. union ib_gid gids[128];
  65. struct mlx4_ib_dev *dev;
  66. int port;
  67. };
  68. static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init);
  69. static struct workqueue_struct *wq;
  70. static void init_query_mad(struct ib_smp *mad)
  71. {
  72. mad->base_version = 1;
  73. mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  74. mad->class_version = 1;
  75. mad->method = IB_MGMT_METHOD_GET;
  76. }
  77. static union ib_gid zgid;
  78. static int check_flow_steering_support(struct mlx4_dev *dev)
  79. {
  80. int ib_num_ports = 0;
  81. int i;
  82. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
  83. ib_num_ports++;
  84. if (dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED) {
  85. if (ib_num_ports || mlx4_is_mfunc(dev)) {
  86. pr_warn("Device managed flow steering is unavailable "
  87. "for IB ports or in multifunction env.\n");
  88. return 0;
  89. }
  90. return 1;
  91. }
  92. return 0;
  93. }
  94. static int mlx4_ib_query_device(struct ib_device *ibdev,
  95. struct ib_device_attr *props)
  96. {
  97. struct mlx4_ib_dev *dev = to_mdev(ibdev);
  98. struct ib_smp *in_mad = NULL;
  99. struct ib_smp *out_mad = NULL;
  100. int err = -ENOMEM;
  101. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  102. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  103. if (!in_mad || !out_mad)
  104. goto out;
  105. init_query_mad(in_mad);
  106. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  107. err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS,
  108. 1, NULL, NULL, in_mad, out_mad);
  109. if (err)
  110. goto out;
  111. memset(props, 0, sizeof *props);
  112. props->fw_ver = dev->dev->caps.fw_ver;
  113. props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
  114. IB_DEVICE_PORT_ACTIVE_EVENT |
  115. IB_DEVICE_SYS_IMAGE_GUID |
  116. IB_DEVICE_RC_RNR_NAK_GEN |
  117. IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
  118. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR)
  119. props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
  120. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR)
  121. props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
  122. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM)
  123. props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
  124. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT)
  125. props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
  126. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
  127. props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
  128. if (dev->dev->caps.max_gso_sz && dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH)
  129. props->device_cap_flags |= IB_DEVICE_UD_TSO;
  130. if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
  131. props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
  132. if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) &&
  133. (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) &&
  134. (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR))
  135. props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
  136. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)
  137. props->device_cap_flags |= IB_DEVICE_XRC;
  138. if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)
  139. props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
  140. if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
  141. if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B)
  142. props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
  143. else
  144. props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
  145. if (check_flow_steering_support(dev->dev))
  146. props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
  147. }
  148. props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
  149. 0xffffff;
  150. props->vendor_part_id = dev->dev->pdev->device;
  151. props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
  152. memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
  153. props->max_mr_size = ~0ull;
  154. props->page_size_cap = dev->dev->caps.page_size_cap;
  155. props->max_qp = dev->dev->caps.num_qps - dev->dev->caps.reserved_qps;
  156. props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
  157. props->max_sge = min(dev->dev->caps.max_sq_sg,
  158. dev->dev->caps.max_rq_sg);
  159. props->max_cq = dev->dev->caps.num_cqs - dev->dev->caps.reserved_cqs;
  160. props->max_cqe = dev->dev->caps.max_cqes;
  161. props->max_mr = dev->dev->caps.num_mpts - dev->dev->caps.reserved_mrws;
  162. props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
  163. props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma;
  164. props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
  165. props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
  166. props->max_srq = dev->dev->caps.num_srqs - dev->dev->caps.reserved_srqs;
  167. props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
  168. props->max_srq_sge = dev->dev->caps.max_srq_sge;
  169. props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
  170. props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
  171. props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
  172. IB_ATOMIC_HCA : IB_ATOMIC_NONE;
  173. props->masked_atomic_cap = props->atomic_cap;
  174. props->max_pkeys = dev->dev->caps.pkey_table_len[1];
  175. props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
  176. props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
  177. props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
  178. props->max_mcast_grp;
  179. props->max_map_per_fmr = dev->dev->caps.max_fmr_maps;
  180. out:
  181. kfree(in_mad);
  182. kfree(out_mad);
  183. return err;
  184. }
  185. static enum rdma_link_layer
  186. mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num)
  187. {
  188. struct mlx4_dev *dev = to_mdev(device)->dev;
  189. return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
  190. IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET;
  191. }
  192. static int ib_link_query_port(struct ib_device *ibdev, u8 port,
  193. struct ib_port_attr *props, int netw_view)
  194. {
  195. struct ib_smp *in_mad = NULL;
  196. struct ib_smp *out_mad = NULL;
  197. int ext_active_speed;
  198. int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
  199. int err = -ENOMEM;
  200. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  201. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  202. if (!in_mad || !out_mad)
  203. goto out;
  204. init_query_mad(in_mad);
  205. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  206. in_mad->attr_mod = cpu_to_be32(port);
  207. if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
  208. mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
  209. err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
  210. in_mad, out_mad);
  211. if (err)
  212. goto out;
  213. props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
  214. props->lmc = out_mad->data[34] & 0x7;
  215. props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
  216. props->sm_sl = out_mad->data[36] & 0xf;
  217. props->state = out_mad->data[32] & 0xf;
  218. props->phys_state = out_mad->data[33] >> 4;
  219. props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
  220. if (netw_view)
  221. props->gid_tbl_len = out_mad->data[50];
  222. else
  223. props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
  224. props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
  225. props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
  226. props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
  227. props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
  228. props->active_width = out_mad->data[31] & 0xf;
  229. props->active_speed = out_mad->data[35] >> 4;
  230. props->max_mtu = out_mad->data[41] & 0xf;
  231. props->active_mtu = out_mad->data[36] >> 4;
  232. props->subnet_timeout = out_mad->data[51] & 0x1f;
  233. props->max_vl_num = out_mad->data[37] >> 4;
  234. props->init_type_reply = out_mad->data[41] >> 4;
  235. /* Check if extended speeds (EDR/FDR/...) are supported */
  236. if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
  237. ext_active_speed = out_mad->data[62] >> 4;
  238. switch (ext_active_speed) {
  239. case 1:
  240. props->active_speed = IB_SPEED_FDR;
  241. break;
  242. case 2:
  243. props->active_speed = IB_SPEED_EDR;
  244. break;
  245. }
  246. }
  247. /* If reported active speed is QDR, check if is FDR-10 */
  248. if (props->active_speed == IB_SPEED_QDR) {
  249. init_query_mad(in_mad);
  250. in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO;
  251. in_mad->attr_mod = cpu_to_be32(port);
  252. err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port,
  253. NULL, NULL, in_mad, out_mad);
  254. if (err)
  255. goto out;
  256. /* Checking LinkSpeedActive for FDR-10 */
  257. if (out_mad->data[15] & 0x1)
  258. props->active_speed = IB_SPEED_FDR10;
  259. }
  260. /* Avoid wrong speed value returned by FW if the IB link is down. */
  261. if (props->state == IB_PORT_DOWN)
  262. props->active_speed = IB_SPEED_SDR;
  263. out:
  264. kfree(in_mad);
  265. kfree(out_mad);
  266. return err;
  267. }
  268. static u8 state_to_phys_state(enum ib_port_state state)
  269. {
  270. return state == IB_PORT_ACTIVE ? 5 : 3;
  271. }
  272. static int eth_link_query_port(struct ib_device *ibdev, u8 port,
  273. struct ib_port_attr *props, int netw_view)
  274. {
  275. struct mlx4_ib_dev *mdev = to_mdev(ibdev);
  276. struct mlx4_ib_iboe *iboe = &mdev->iboe;
  277. struct net_device *ndev;
  278. enum ib_mtu tmp;
  279. struct mlx4_cmd_mailbox *mailbox;
  280. int err = 0;
  281. mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
  282. if (IS_ERR(mailbox))
  283. return PTR_ERR(mailbox);
  284. err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
  285. MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
  286. MLX4_CMD_WRAPPED);
  287. if (err)
  288. goto out;
  289. props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ?
  290. IB_WIDTH_4X : IB_WIDTH_1X;
  291. props->active_speed = IB_SPEED_QDR;
  292. props->port_cap_flags = IB_PORT_CM_SUP;
  293. props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
  294. props->max_msg_sz = mdev->dev->caps.max_msg_sz;
  295. props->pkey_tbl_len = 1;
  296. props->max_mtu = IB_MTU_4096;
  297. props->max_vl_num = 2;
  298. props->state = IB_PORT_DOWN;
  299. props->phys_state = state_to_phys_state(props->state);
  300. props->active_mtu = IB_MTU_256;
  301. spin_lock(&iboe->lock);
  302. ndev = iboe->netdevs[port - 1];
  303. if (!ndev)
  304. goto out_unlock;
  305. tmp = iboe_get_mtu(ndev->mtu);
  306. props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
  307. props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ?
  308. IB_PORT_ACTIVE : IB_PORT_DOWN;
  309. props->phys_state = state_to_phys_state(props->state);
  310. out_unlock:
  311. spin_unlock(&iboe->lock);
  312. out:
  313. mlx4_free_cmd_mailbox(mdev->dev, mailbox);
  314. return err;
  315. }
  316. int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
  317. struct ib_port_attr *props, int netw_view)
  318. {
  319. int err;
  320. memset(props, 0, sizeof *props);
  321. err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ?
  322. ib_link_query_port(ibdev, port, props, netw_view) :
  323. eth_link_query_port(ibdev, port, props, netw_view);
  324. return err;
  325. }
  326. static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
  327. struct ib_port_attr *props)
  328. {
  329. /* returns host view */
  330. return __mlx4_ib_query_port(ibdev, port, props, 0);
  331. }
  332. int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
  333. union ib_gid *gid, int netw_view)
  334. {
  335. struct ib_smp *in_mad = NULL;
  336. struct ib_smp *out_mad = NULL;
  337. int err = -ENOMEM;
  338. struct mlx4_ib_dev *dev = to_mdev(ibdev);
  339. int clear = 0;
  340. int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
  341. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  342. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  343. if (!in_mad || !out_mad)
  344. goto out;
  345. init_query_mad(in_mad);
  346. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  347. in_mad->attr_mod = cpu_to_be32(port);
  348. if (mlx4_is_mfunc(dev->dev) && netw_view)
  349. mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
  350. err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad);
  351. if (err)
  352. goto out;
  353. memcpy(gid->raw, out_mad->data + 8, 8);
  354. if (mlx4_is_mfunc(dev->dev) && !netw_view) {
  355. if (index) {
  356. /* For any index > 0, return the null guid */
  357. err = 0;
  358. clear = 1;
  359. goto out;
  360. }
  361. }
  362. init_query_mad(in_mad);
  363. in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
  364. in_mad->attr_mod = cpu_to_be32(index / 8);
  365. err = mlx4_MAD_IFC(dev, mad_ifc_flags, port,
  366. NULL, NULL, in_mad, out_mad);
  367. if (err)
  368. goto out;
  369. memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
  370. out:
  371. if (clear)
  372. memset(gid->raw + 8, 0, 8);
  373. kfree(in_mad);
  374. kfree(out_mad);
  375. return err;
  376. }
  377. static int iboe_query_gid(struct ib_device *ibdev, u8 port, int index,
  378. union ib_gid *gid)
  379. {
  380. struct mlx4_ib_dev *dev = to_mdev(ibdev);
  381. *gid = dev->iboe.gid_table[port - 1][index];
  382. return 0;
  383. }
  384. static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
  385. union ib_gid *gid)
  386. {
  387. if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
  388. return __mlx4_ib_query_gid(ibdev, port, index, gid, 0);
  389. else
  390. return iboe_query_gid(ibdev, port, index, gid);
  391. }
  392. int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
  393. u16 *pkey, int netw_view)
  394. {
  395. struct ib_smp *in_mad = NULL;
  396. struct ib_smp *out_mad = NULL;
  397. int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
  398. int err = -ENOMEM;
  399. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  400. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  401. if (!in_mad || !out_mad)
  402. goto out;
  403. init_query_mad(in_mad);
  404. in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
  405. in_mad->attr_mod = cpu_to_be32(index / 32);
  406. if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
  407. mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
  408. err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
  409. in_mad, out_mad);
  410. if (err)
  411. goto out;
  412. *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
  413. out:
  414. kfree(in_mad);
  415. kfree(out_mad);
  416. return err;
  417. }
  418. static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
  419. {
  420. return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0);
  421. }
  422. static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
  423. struct ib_device_modify *props)
  424. {
  425. struct mlx4_cmd_mailbox *mailbox;
  426. unsigned long flags;
  427. if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
  428. return -EOPNOTSUPP;
  429. if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
  430. return 0;
  431. if (mlx4_is_slave(to_mdev(ibdev)->dev))
  432. return -EOPNOTSUPP;
  433. spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags);
  434. memcpy(ibdev->node_desc, props->node_desc, 64);
  435. spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags);
  436. /*
  437. * If possible, pass node desc to FW, so it can generate
  438. * a 144 trap. If cmd fails, just ignore.
  439. */
  440. mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev);
  441. if (IS_ERR(mailbox))
  442. return 0;
  443. memset(mailbox->buf, 0, 256);
  444. memcpy(mailbox->buf, props->node_desc, 64);
  445. mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
  446. MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
  447. mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox);
  448. return 0;
  449. }
  450. static int mlx4_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols,
  451. u32 cap_mask)
  452. {
  453. struct mlx4_cmd_mailbox *mailbox;
  454. int err;
  455. u8 is_eth = dev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
  456. mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
  457. if (IS_ERR(mailbox))
  458. return PTR_ERR(mailbox);
  459. memset(mailbox->buf, 0, 256);
  460. if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
  461. *(u8 *) mailbox->buf = !!reset_qkey_viols << 6;
  462. ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
  463. } else {
  464. ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols;
  465. ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
  466. }
  467. err = mlx4_cmd(dev->dev, mailbox->dma, port, is_eth, MLX4_CMD_SET_PORT,
  468. MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
  469. mlx4_free_cmd_mailbox(dev->dev, mailbox);
  470. return err;
  471. }
  472. static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
  473. struct ib_port_modify *props)
  474. {
  475. struct ib_port_attr attr;
  476. u32 cap_mask;
  477. int err;
  478. mutex_lock(&to_mdev(ibdev)->cap_mask_mutex);
  479. err = mlx4_ib_query_port(ibdev, port, &attr);
  480. if (err)
  481. goto out;
  482. cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
  483. ~props->clr_port_cap_mask;
  484. err = mlx4_SET_PORT(to_mdev(ibdev), port,
  485. !!(mask & IB_PORT_RESET_QKEY_CNTR),
  486. cap_mask);
  487. out:
  488. mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
  489. return err;
  490. }
  491. static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev,
  492. struct ib_udata *udata)
  493. {
  494. struct mlx4_ib_dev *dev = to_mdev(ibdev);
  495. struct mlx4_ib_ucontext *context;
  496. struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3;
  497. struct mlx4_ib_alloc_ucontext_resp resp;
  498. int err;
  499. if (!dev->ib_active)
  500. return ERR_PTR(-EAGAIN);
  501. if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) {
  502. resp_v3.qp_tab_size = dev->dev->caps.num_qps;
  503. resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size;
  504. resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
  505. } else {
  506. resp.dev_caps = dev->dev->caps.userspace_caps;
  507. resp.qp_tab_size = dev->dev->caps.num_qps;
  508. resp.bf_reg_size = dev->dev->caps.bf_reg_size;
  509. resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
  510. resp.cqe_size = dev->dev->caps.cqe_size;
  511. }
  512. context = kmalloc(sizeof *context, GFP_KERNEL);
  513. if (!context)
  514. return ERR_PTR(-ENOMEM);
  515. err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar);
  516. if (err) {
  517. kfree(context);
  518. return ERR_PTR(err);
  519. }
  520. INIT_LIST_HEAD(&context->db_page_list);
  521. mutex_init(&context->db_page_mutex);
  522. if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION)
  523. err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3));
  524. else
  525. err = ib_copy_to_udata(udata, &resp, sizeof(resp));
  526. if (err) {
  527. mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar);
  528. kfree(context);
  529. return ERR_PTR(-EFAULT);
  530. }
  531. return &context->ibucontext;
  532. }
  533. static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
  534. {
  535. struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
  536. mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar);
  537. kfree(context);
  538. return 0;
  539. }
  540. static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
  541. {
  542. struct mlx4_ib_dev *dev = to_mdev(context->device);
  543. if (vma->vm_end - vma->vm_start != PAGE_SIZE)
  544. return -EINVAL;
  545. if (vma->vm_pgoff == 0) {
  546. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  547. if (io_remap_pfn_range(vma, vma->vm_start,
  548. to_mucontext(context)->uar.pfn,
  549. PAGE_SIZE, vma->vm_page_prot))
  550. return -EAGAIN;
  551. } else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) {
  552. vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
  553. if (io_remap_pfn_range(vma, vma->vm_start,
  554. to_mucontext(context)->uar.pfn +
  555. dev->dev->caps.num_uars,
  556. PAGE_SIZE, vma->vm_page_prot))
  557. return -EAGAIN;
  558. } else
  559. return -EINVAL;
  560. return 0;
  561. }
  562. static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev,
  563. struct ib_ucontext *context,
  564. struct ib_udata *udata)
  565. {
  566. struct mlx4_ib_pd *pd;
  567. int err;
  568. pd = kmalloc(sizeof *pd, GFP_KERNEL);
  569. if (!pd)
  570. return ERR_PTR(-ENOMEM);
  571. err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn);
  572. if (err) {
  573. kfree(pd);
  574. return ERR_PTR(err);
  575. }
  576. if (context)
  577. if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) {
  578. mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
  579. kfree(pd);
  580. return ERR_PTR(-EFAULT);
  581. }
  582. return &pd->ibpd;
  583. }
  584. static int mlx4_ib_dealloc_pd(struct ib_pd *pd)
  585. {
  586. mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
  587. kfree(pd);
  588. return 0;
  589. }
  590. static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev,
  591. struct ib_ucontext *context,
  592. struct ib_udata *udata)
  593. {
  594. struct mlx4_ib_xrcd *xrcd;
  595. int err;
  596. if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
  597. return ERR_PTR(-ENOSYS);
  598. xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL);
  599. if (!xrcd)
  600. return ERR_PTR(-ENOMEM);
  601. err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn);
  602. if (err)
  603. goto err1;
  604. xrcd->pd = ib_alloc_pd(ibdev);
  605. if (IS_ERR(xrcd->pd)) {
  606. err = PTR_ERR(xrcd->pd);
  607. goto err2;
  608. }
  609. xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, 1, 0);
  610. if (IS_ERR(xrcd->cq)) {
  611. err = PTR_ERR(xrcd->cq);
  612. goto err3;
  613. }
  614. return &xrcd->ibxrcd;
  615. err3:
  616. ib_dealloc_pd(xrcd->pd);
  617. err2:
  618. mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn);
  619. err1:
  620. kfree(xrcd);
  621. return ERR_PTR(err);
  622. }
  623. static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd)
  624. {
  625. ib_destroy_cq(to_mxrcd(xrcd)->cq);
  626. ib_dealloc_pd(to_mxrcd(xrcd)->pd);
  627. mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
  628. kfree(xrcd);
  629. return 0;
  630. }
  631. static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
  632. {
  633. struct mlx4_ib_qp *mqp = to_mqp(ibqp);
  634. struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
  635. struct mlx4_ib_gid_entry *ge;
  636. ge = kzalloc(sizeof *ge, GFP_KERNEL);
  637. if (!ge)
  638. return -ENOMEM;
  639. ge->gid = *gid;
  640. if (mlx4_ib_add_mc(mdev, mqp, gid)) {
  641. ge->port = mqp->port;
  642. ge->added = 1;
  643. }
  644. mutex_lock(&mqp->mutex);
  645. list_add_tail(&ge->list, &mqp->gid_list);
  646. mutex_unlock(&mqp->mutex);
  647. return 0;
  648. }
  649. int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
  650. union ib_gid *gid)
  651. {
  652. u8 mac[6];
  653. struct net_device *ndev;
  654. int ret = 0;
  655. if (!mqp->port)
  656. return 0;
  657. spin_lock(&mdev->iboe.lock);
  658. ndev = mdev->iboe.netdevs[mqp->port - 1];
  659. if (ndev)
  660. dev_hold(ndev);
  661. spin_unlock(&mdev->iboe.lock);
  662. if (ndev) {
  663. rdma_get_mcast_mac((struct in6_addr *)gid, mac);
  664. rtnl_lock();
  665. dev_mc_add(mdev->iboe.netdevs[mqp->port - 1], mac);
  666. ret = 1;
  667. rtnl_unlock();
  668. dev_put(ndev);
  669. }
  670. return ret;
  671. }
  672. struct mlx4_ib_steering {
  673. struct list_head list;
  674. u64 reg_id;
  675. union ib_gid gid;
  676. };
  677. static int parse_flow_attr(struct mlx4_dev *dev,
  678. union ib_flow_spec *ib_spec,
  679. struct _rule_hw *mlx4_spec)
  680. {
  681. enum mlx4_net_trans_rule_id type;
  682. switch (ib_spec->type) {
  683. case IB_FLOW_SPEC_ETH:
  684. type = MLX4_NET_TRANS_RULE_ID_ETH;
  685. memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
  686. ETH_ALEN);
  687. memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
  688. ETH_ALEN);
  689. mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
  690. mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
  691. break;
  692. case IB_FLOW_SPEC_IPV4:
  693. type = MLX4_NET_TRANS_RULE_ID_IPV4;
  694. mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
  695. mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
  696. mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
  697. mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
  698. break;
  699. case IB_FLOW_SPEC_TCP:
  700. case IB_FLOW_SPEC_UDP:
  701. type = ib_spec->type == IB_FLOW_SPEC_TCP ?
  702. MLX4_NET_TRANS_RULE_ID_TCP :
  703. MLX4_NET_TRANS_RULE_ID_UDP;
  704. mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
  705. mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
  706. mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
  707. mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
  708. break;
  709. default:
  710. return -EINVAL;
  711. }
  712. if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
  713. mlx4_hw_rule_sz(dev, type) < 0)
  714. return -EINVAL;
  715. mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
  716. mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
  717. return mlx4_hw_rule_sz(dev, type);
  718. }
  719. static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
  720. int domain,
  721. enum mlx4_net_trans_promisc_mode flow_type,
  722. u64 *reg_id)
  723. {
  724. int ret, i;
  725. int size = 0;
  726. void *ib_flow;
  727. struct mlx4_ib_dev *mdev = to_mdev(qp->device);
  728. struct mlx4_cmd_mailbox *mailbox;
  729. struct mlx4_net_trans_rule_hw_ctrl *ctrl;
  730. size_t rule_size = sizeof(struct mlx4_net_trans_rule_hw_ctrl) +
  731. (sizeof(struct _rule_hw) * flow_attr->num_of_specs);
  732. static const u16 __mlx4_domain[] = {
  733. [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
  734. [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL,
  735. [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS,
  736. [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC,
  737. };
  738. if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
  739. pr_err("Invalid priority value %d\n", flow_attr->priority);
  740. return -EINVAL;
  741. }
  742. if (domain >= IB_FLOW_DOMAIN_NUM) {
  743. pr_err("Invalid domain value %d\n", domain);
  744. return -EINVAL;
  745. }
  746. if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
  747. return -EINVAL;
  748. mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
  749. if (IS_ERR(mailbox))
  750. return PTR_ERR(mailbox);
  751. memset(mailbox->buf, 0, rule_size);
  752. ctrl = mailbox->buf;
  753. ctrl->prio = cpu_to_be16(__mlx4_domain[domain] |
  754. flow_attr->priority);
  755. ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
  756. ctrl->port = flow_attr->port;
  757. ctrl->qpn = cpu_to_be32(qp->qp_num);
  758. ib_flow = flow_attr + 1;
  759. size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
  760. for (i = 0; i < flow_attr->num_of_specs; i++) {
  761. ret = parse_flow_attr(mdev->dev, ib_flow, mailbox->buf + size);
  762. if (ret < 0) {
  763. mlx4_free_cmd_mailbox(mdev->dev, mailbox);
  764. return -EINVAL;
  765. }
  766. ib_flow += ((union ib_flow_spec *) ib_flow)->size;
  767. size += ret;
  768. }
  769. ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
  770. MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
  771. MLX4_CMD_NATIVE);
  772. if (ret == -ENOMEM)
  773. pr_err("mcg table is full. Fail to register network rule.\n");
  774. else if (ret == -ENXIO)
  775. pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
  776. else if (ret)
  777. pr_err("Invalid argumant. Fail to register network rule.\n");
  778. mlx4_free_cmd_mailbox(mdev->dev, mailbox);
  779. return ret;
  780. }
  781. static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
  782. {
  783. int err;
  784. err = mlx4_cmd(dev, reg_id, 0, 0,
  785. MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
  786. MLX4_CMD_NATIVE);
  787. if (err)
  788. pr_err("Fail to detach network rule. registration id = 0x%llx\n",
  789. reg_id);
  790. return err;
  791. }
  792. static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
  793. struct ib_flow_attr *flow_attr,
  794. int domain)
  795. {
  796. int err = 0, i = 0;
  797. struct mlx4_ib_flow *mflow;
  798. enum mlx4_net_trans_promisc_mode type[2];
  799. memset(type, 0, sizeof(type));
  800. mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
  801. if (!mflow) {
  802. err = -ENOMEM;
  803. goto err_free;
  804. }
  805. switch (flow_attr->type) {
  806. case IB_FLOW_ATTR_NORMAL:
  807. type[0] = MLX4_FS_REGULAR;
  808. break;
  809. case IB_FLOW_ATTR_ALL_DEFAULT:
  810. type[0] = MLX4_FS_ALL_DEFAULT;
  811. break;
  812. case IB_FLOW_ATTR_MC_DEFAULT:
  813. type[0] = MLX4_FS_MC_DEFAULT;
  814. break;
  815. case IB_FLOW_ATTR_SNIFFER:
  816. type[0] = MLX4_FS_UC_SNIFFER;
  817. type[1] = MLX4_FS_MC_SNIFFER;
  818. break;
  819. default:
  820. err = -EINVAL;
  821. goto err_free;
  822. }
  823. while (i < ARRAY_SIZE(type) && type[i]) {
  824. err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i],
  825. &mflow->reg_id[i]);
  826. if (err)
  827. goto err_free;
  828. i++;
  829. }
  830. return &mflow->ibflow;
  831. err_free:
  832. kfree(mflow);
  833. return ERR_PTR(err);
  834. }
  835. static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
  836. {
  837. int err, ret = 0;
  838. int i = 0;
  839. struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
  840. struct mlx4_ib_flow *mflow = to_mflow(flow_id);
  841. while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i]) {
  842. err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i]);
  843. if (err)
  844. ret = err;
  845. i++;
  846. }
  847. kfree(mflow);
  848. return ret;
  849. }
  850. static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
  851. {
  852. int err;
  853. struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
  854. struct mlx4_ib_qp *mqp = to_mqp(ibqp);
  855. u64 reg_id;
  856. struct mlx4_ib_steering *ib_steering = NULL;
  857. if (mdev->dev->caps.steering_mode ==
  858. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  859. ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL);
  860. if (!ib_steering)
  861. return -ENOMEM;
  862. }
  863. err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port,
  864. !!(mqp->flags &
  865. MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
  866. MLX4_PROT_IB_IPV6, &reg_id);
  867. if (err)
  868. goto err_malloc;
  869. err = add_gid_entry(ibqp, gid);
  870. if (err)
  871. goto err_add;
  872. if (ib_steering) {
  873. memcpy(ib_steering->gid.raw, gid->raw, 16);
  874. ib_steering->reg_id = reg_id;
  875. mutex_lock(&mqp->mutex);
  876. list_add(&ib_steering->list, &mqp->steering_rules);
  877. mutex_unlock(&mqp->mutex);
  878. }
  879. return 0;
  880. err_add:
  881. mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
  882. MLX4_PROT_IB_IPV6, reg_id);
  883. err_malloc:
  884. kfree(ib_steering);
  885. return err;
  886. }
  887. static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw)
  888. {
  889. struct mlx4_ib_gid_entry *ge;
  890. struct mlx4_ib_gid_entry *tmp;
  891. struct mlx4_ib_gid_entry *ret = NULL;
  892. list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) {
  893. if (!memcmp(raw, ge->gid.raw, 16)) {
  894. ret = ge;
  895. break;
  896. }
  897. }
  898. return ret;
  899. }
  900. static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
  901. {
  902. int err;
  903. struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
  904. struct mlx4_ib_qp *mqp = to_mqp(ibqp);
  905. u8 mac[6];
  906. struct net_device *ndev;
  907. struct mlx4_ib_gid_entry *ge;
  908. u64 reg_id = 0;
  909. if (mdev->dev->caps.steering_mode ==
  910. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  911. struct mlx4_ib_steering *ib_steering;
  912. mutex_lock(&mqp->mutex);
  913. list_for_each_entry(ib_steering, &mqp->steering_rules, list) {
  914. if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) {
  915. list_del(&ib_steering->list);
  916. break;
  917. }
  918. }
  919. mutex_unlock(&mqp->mutex);
  920. if (&ib_steering->list == &mqp->steering_rules) {
  921. pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n");
  922. return -EINVAL;
  923. }
  924. reg_id = ib_steering->reg_id;
  925. kfree(ib_steering);
  926. }
  927. err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
  928. MLX4_PROT_IB_IPV6, reg_id);
  929. if (err)
  930. return err;
  931. mutex_lock(&mqp->mutex);
  932. ge = find_gid_entry(mqp, gid->raw);
  933. if (ge) {
  934. spin_lock(&mdev->iboe.lock);
  935. ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL;
  936. if (ndev)
  937. dev_hold(ndev);
  938. spin_unlock(&mdev->iboe.lock);
  939. rdma_get_mcast_mac((struct in6_addr *)gid, mac);
  940. if (ndev) {
  941. rtnl_lock();
  942. dev_mc_del(mdev->iboe.netdevs[ge->port - 1], mac);
  943. rtnl_unlock();
  944. dev_put(ndev);
  945. }
  946. list_del(&ge->list);
  947. kfree(ge);
  948. } else
  949. pr_warn("could not find mgid entry\n");
  950. mutex_unlock(&mqp->mutex);
  951. return 0;
  952. }
  953. static int init_node_data(struct mlx4_ib_dev *dev)
  954. {
  955. struct ib_smp *in_mad = NULL;
  956. struct ib_smp *out_mad = NULL;
  957. int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
  958. int err = -ENOMEM;
  959. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  960. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  961. if (!in_mad || !out_mad)
  962. goto out;
  963. init_query_mad(in_mad);
  964. in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
  965. if (mlx4_is_master(dev->dev))
  966. mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
  967. err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
  968. if (err)
  969. goto out;
  970. memcpy(dev->ib_dev.node_desc, out_mad->data, 64);
  971. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  972. err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
  973. if (err)
  974. goto out;
  975. dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
  976. memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
  977. out:
  978. kfree(in_mad);
  979. kfree(out_mad);
  980. return err;
  981. }
  982. static ssize_t show_hca(struct device *device, struct device_attribute *attr,
  983. char *buf)
  984. {
  985. struct mlx4_ib_dev *dev =
  986. container_of(device, struct mlx4_ib_dev, ib_dev.dev);
  987. return sprintf(buf, "MT%d\n", dev->dev->pdev->device);
  988. }
  989. static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr,
  990. char *buf)
  991. {
  992. struct mlx4_ib_dev *dev =
  993. container_of(device, struct mlx4_ib_dev, ib_dev.dev);
  994. return sprintf(buf, "%d.%d.%d\n", (int) (dev->dev->caps.fw_ver >> 32),
  995. (int) (dev->dev->caps.fw_ver >> 16) & 0xffff,
  996. (int) dev->dev->caps.fw_ver & 0xffff);
  997. }
  998. static ssize_t show_rev(struct device *device, struct device_attribute *attr,
  999. char *buf)
  1000. {
  1001. struct mlx4_ib_dev *dev =
  1002. container_of(device, struct mlx4_ib_dev, ib_dev.dev);
  1003. return sprintf(buf, "%x\n", dev->dev->rev_id);
  1004. }
  1005. static ssize_t show_board(struct device *device, struct device_attribute *attr,
  1006. char *buf)
  1007. {
  1008. struct mlx4_ib_dev *dev =
  1009. container_of(device, struct mlx4_ib_dev, ib_dev.dev);
  1010. return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN,
  1011. dev->dev->board_id);
  1012. }
  1013. static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
  1014. static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
  1015. static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
  1016. static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
  1017. static struct device_attribute *mlx4_class_attributes[] = {
  1018. &dev_attr_hw_rev,
  1019. &dev_attr_fw_ver,
  1020. &dev_attr_hca_type,
  1021. &dev_attr_board_id
  1022. };
  1023. static void mlx4_addrconf_ifid_eui48(u8 *eui, u16 vlan_id, struct net_device *dev)
  1024. {
  1025. memcpy(eui, dev->dev_addr, 3);
  1026. memcpy(eui + 5, dev->dev_addr + 3, 3);
  1027. if (vlan_id < 0x1000) {
  1028. eui[3] = vlan_id >> 8;
  1029. eui[4] = vlan_id & 0xff;
  1030. } else {
  1031. eui[3] = 0xff;
  1032. eui[4] = 0xfe;
  1033. }
  1034. eui[0] ^= 2;
  1035. }
  1036. static void update_gids_task(struct work_struct *work)
  1037. {
  1038. struct update_gid_work *gw = container_of(work, struct update_gid_work, work);
  1039. struct mlx4_cmd_mailbox *mailbox;
  1040. union ib_gid *gids;
  1041. int err;
  1042. struct mlx4_dev *dev = gw->dev->dev;
  1043. mailbox = mlx4_alloc_cmd_mailbox(dev);
  1044. if (IS_ERR(mailbox)) {
  1045. pr_warn("update gid table failed %ld\n", PTR_ERR(mailbox));
  1046. return;
  1047. }
  1048. gids = mailbox->buf;
  1049. memcpy(gids, gw->gids, sizeof gw->gids);
  1050. err = mlx4_cmd(dev, mailbox->dma, MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
  1051. 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
  1052. MLX4_CMD_WRAPPED);
  1053. if (err)
  1054. pr_warn("set port command failed\n");
  1055. else {
  1056. memcpy(gw->dev->iboe.gid_table[gw->port - 1], gw->gids, sizeof gw->gids);
  1057. mlx4_ib_dispatch_event(gw->dev, gw->port, IB_EVENT_GID_CHANGE);
  1058. }
  1059. mlx4_free_cmd_mailbox(dev, mailbox);
  1060. kfree(gw);
  1061. }
  1062. static int update_ipv6_gids(struct mlx4_ib_dev *dev, int port, int clear)
  1063. {
  1064. struct net_device *ndev = dev->iboe.netdevs[port - 1];
  1065. struct update_gid_work *work;
  1066. struct net_device *tmp;
  1067. int i;
  1068. u8 *hits;
  1069. int ret;
  1070. union ib_gid gid;
  1071. int free;
  1072. int found;
  1073. int need_update = 0;
  1074. u16 vid;
  1075. work = kzalloc(sizeof *work, GFP_ATOMIC);
  1076. if (!work)
  1077. return -ENOMEM;
  1078. hits = kzalloc(128, GFP_ATOMIC);
  1079. if (!hits) {
  1080. ret = -ENOMEM;
  1081. goto out;
  1082. }
  1083. rcu_read_lock();
  1084. for_each_netdev_rcu(&init_net, tmp) {
  1085. if (ndev && (tmp == ndev || rdma_vlan_dev_real_dev(tmp) == ndev)) {
  1086. gid.global.subnet_prefix = cpu_to_be64(0xfe80000000000000LL);
  1087. vid = rdma_vlan_dev_vlan_id(tmp);
  1088. mlx4_addrconf_ifid_eui48(&gid.raw[8], vid, ndev);
  1089. found = 0;
  1090. free = -1;
  1091. for (i = 0; i < 128; ++i) {
  1092. if (free < 0 &&
  1093. !memcmp(&dev->iboe.gid_table[port - 1][i], &zgid, sizeof zgid))
  1094. free = i;
  1095. if (!memcmp(&dev->iboe.gid_table[port - 1][i], &gid, sizeof gid)) {
  1096. hits[i] = 1;
  1097. found = 1;
  1098. break;
  1099. }
  1100. }
  1101. if (!found) {
  1102. if (tmp == ndev &&
  1103. (memcmp(&dev->iboe.gid_table[port - 1][0],
  1104. &gid, sizeof gid) ||
  1105. !memcmp(&dev->iboe.gid_table[port - 1][0],
  1106. &zgid, sizeof gid))) {
  1107. dev->iboe.gid_table[port - 1][0] = gid;
  1108. ++need_update;
  1109. hits[0] = 1;
  1110. } else if (free >= 0) {
  1111. dev->iboe.gid_table[port - 1][free] = gid;
  1112. hits[free] = 1;
  1113. ++need_update;
  1114. }
  1115. }
  1116. }
  1117. }
  1118. rcu_read_unlock();
  1119. for (i = 0; i < 128; ++i)
  1120. if (!hits[i]) {
  1121. if (memcmp(&dev->iboe.gid_table[port - 1][i], &zgid, sizeof zgid))
  1122. ++need_update;
  1123. dev->iboe.gid_table[port - 1][i] = zgid;
  1124. }
  1125. if (need_update) {
  1126. memcpy(work->gids, dev->iboe.gid_table[port - 1], sizeof work->gids);
  1127. INIT_WORK(&work->work, update_gids_task);
  1128. work->port = port;
  1129. work->dev = dev;
  1130. queue_work(wq, &work->work);
  1131. } else
  1132. kfree(work);
  1133. kfree(hits);
  1134. return 0;
  1135. out:
  1136. kfree(work);
  1137. return ret;
  1138. }
  1139. static void handle_en_event(struct mlx4_ib_dev *dev, int port, unsigned long event)
  1140. {
  1141. switch (event) {
  1142. case NETDEV_UP:
  1143. case NETDEV_CHANGEADDR:
  1144. update_ipv6_gids(dev, port, 0);
  1145. break;
  1146. case NETDEV_DOWN:
  1147. update_ipv6_gids(dev, port, 1);
  1148. dev->iboe.netdevs[port - 1] = NULL;
  1149. }
  1150. }
  1151. static void netdev_added(struct mlx4_ib_dev *dev, int port)
  1152. {
  1153. update_ipv6_gids(dev, port, 0);
  1154. }
  1155. static void netdev_removed(struct mlx4_ib_dev *dev, int port)
  1156. {
  1157. update_ipv6_gids(dev, port, 1);
  1158. }
  1159. static int mlx4_ib_netdev_event(struct notifier_block *this, unsigned long event,
  1160. void *ptr)
  1161. {
  1162. struct net_device *dev = netdev_notifier_info_to_dev(ptr);
  1163. struct mlx4_ib_dev *ibdev;
  1164. struct net_device *oldnd;
  1165. struct mlx4_ib_iboe *iboe;
  1166. int port;
  1167. if (!net_eq(dev_net(dev), &init_net))
  1168. return NOTIFY_DONE;
  1169. ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb);
  1170. iboe = &ibdev->iboe;
  1171. spin_lock(&iboe->lock);
  1172. mlx4_foreach_ib_transport_port(port, ibdev->dev) {
  1173. oldnd = iboe->netdevs[port - 1];
  1174. iboe->netdevs[port - 1] =
  1175. mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port);
  1176. if (oldnd != iboe->netdevs[port - 1]) {
  1177. if (iboe->netdevs[port - 1])
  1178. netdev_added(ibdev, port);
  1179. else
  1180. netdev_removed(ibdev, port);
  1181. }
  1182. }
  1183. if (dev == iboe->netdevs[0] ||
  1184. (iboe->netdevs[0] && rdma_vlan_dev_real_dev(dev) == iboe->netdevs[0]))
  1185. handle_en_event(ibdev, 1, event);
  1186. else if (dev == iboe->netdevs[1]
  1187. || (iboe->netdevs[1] && rdma_vlan_dev_real_dev(dev) == iboe->netdevs[1]))
  1188. handle_en_event(ibdev, 2, event);
  1189. spin_unlock(&iboe->lock);
  1190. return NOTIFY_DONE;
  1191. }
  1192. static void init_pkeys(struct mlx4_ib_dev *ibdev)
  1193. {
  1194. int port;
  1195. int slave;
  1196. int i;
  1197. if (mlx4_is_master(ibdev->dev)) {
  1198. for (slave = 0; slave <= ibdev->dev->num_vfs; ++slave) {
  1199. for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
  1200. for (i = 0;
  1201. i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
  1202. ++i) {
  1203. ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] =
  1204. /* master has the identity virt2phys pkey mapping */
  1205. (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i :
  1206. ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1;
  1207. mlx4_sync_pkey_table(ibdev->dev, slave, port, i,
  1208. ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]);
  1209. }
  1210. }
  1211. }
  1212. /* initialize pkey cache */
  1213. for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
  1214. for (i = 0;
  1215. i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
  1216. ++i)
  1217. ibdev->pkeys.phys_pkey_cache[port-1][i] =
  1218. (i) ? 0 : 0xFFFF;
  1219. }
  1220. }
  1221. }
  1222. static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
  1223. {
  1224. char name[32];
  1225. int eq_per_port = 0;
  1226. int added_eqs = 0;
  1227. int total_eqs = 0;
  1228. int i, j, eq;
  1229. /* Legacy mode or comp_pool is not large enough */
  1230. if (dev->caps.comp_pool == 0 ||
  1231. dev->caps.num_ports > dev->caps.comp_pool)
  1232. return;
  1233. eq_per_port = rounddown_pow_of_two(dev->caps.comp_pool/
  1234. dev->caps.num_ports);
  1235. /* Init eq table */
  1236. added_eqs = 0;
  1237. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
  1238. added_eqs += eq_per_port;
  1239. total_eqs = dev->caps.num_comp_vectors + added_eqs;
  1240. ibdev->eq_table = kzalloc(total_eqs * sizeof(int), GFP_KERNEL);
  1241. if (!ibdev->eq_table)
  1242. return;
  1243. ibdev->eq_added = added_eqs;
  1244. eq = 0;
  1245. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) {
  1246. for (j = 0; j < eq_per_port; j++) {
  1247. sprintf(name, "mlx4-ib-%d-%d@%s",
  1248. i, j, dev->pdev->bus->name);
  1249. /* Set IRQ for specific name (per ring) */
  1250. if (mlx4_assign_eq(dev, name, NULL,
  1251. &ibdev->eq_table[eq])) {
  1252. /* Use legacy (same as mlx4_en driver) */
  1253. pr_warn("Can't allocate EQ %d; reverting to legacy\n", eq);
  1254. ibdev->eq_table[eq] =
  1255. (eq % dev->caps.num_comp_vectors);
  1256. }
  1257. eq++;
  1258. }
  1259. }
  1260. /* Fill the reset of the vector with legacy EQ */
  1261. for (i = 0, eq = added_eqs; i < dev->caps.num_comp_vectors; i++)
  1262. ibdev->eq_table[eq++] = i;
  1263. /* Advertise the new number of EQs to clients */
  1264. ibdev->ib_dev.num_comp_vectors = total_eqs;
  1265. }
  1266. static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
  1267. {
  1268. int i;
  1269. /* no additional eqs were added */
  1270. if (!ibdev->eq_table)
  1271. return;
  1272. /* Reset the advertised EQ number */
  1273. ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
  1274. /* Free only the added eqs */
  1275. for (i = 0; i < ibdev->eq_added; i++) {
  1276. /* Don't free legacy eqs if used */
  1277. if (ibdev->eq_table[i] <= dev->caps.num_comp_vectors)
  1278. continue;
  1279. mlx4_release_eq(dev, ibdev->eq_table[i]);
  1280. }
  1281. kfree(ibdev->eq_table);
  1282. }
  1283. static void *mlx4_ib_add(struct mlx4_dev *dev)
  1284. {
  1285. struct mlx4_ib_dev *ibdev;
  1286. int num_ports = 0;
  1287. int i, j;
  1288. int err;
  1289. struct mlx4_ib_iboe *iboe;
  1290. pr_info_once("%s", mlx4_ib_version);
  1291. mlx4_foreach_non_ib_transport_port(i, dev)
  1292. num_ports++;
  1293. if (mlx4_is_mfunc(dev) && num_ports) {
  1294. dev_err(&dev->pdev->dev, "RoCE is not supported over SRIOV as yet\n");
  1295. return NULL;
  1296. }
  1297. num_ports = 0;
  1298. mlx4_foreach_ib_transport_port(i, dev)
  1299. num_ports++;
  1300. /* No point in registering a device with no ports... */
  1301. if (num_ports == 0)
  1302. return NULL;
  1303. ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev);
  1304. if (!ibdev) {
  1305. dev_err(&dev->pdev->dev, "Device struct alloc failed\n");
  1306. return NULL;
  1307. }
  1308. iboe = &ibdev->iboe;
  1309. if (mlx4_pd_alloc(dev, &ibdev->priv_pdn))
  1310. goto err_dealloc;
  1311. if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
  1312. goto err_pd;
  1313. ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
  1314. PAGE_SIZE);
  1315. if (!ibdev->uar_map)
  1316. goto err_uar;
  1317. MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
  1318. ibdev->dev = dev;
  1319. strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX);
  1320. ibdev->ib_dev.owner = THIS_MODULE;
  1321. ibdev->ib_dev.node_type = RDMA_NODE_IB_CA;
  1322. ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey;
  1323. ibdev->num_ports = num_ports;
  1324. ibdev->ib_dev.phys_port_cnt = ibdev->num_ports;
  1325. ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
  1326. ibdev->ib_dev.dma_device = &dev->pdev->dev;
  1327. if (dev->caps.userspace_caps)
  1328. ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION;
  1329. else
  1330. ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION;
  1331. ibdev->ib_dev.uverbs_cmd_mask =
  1332. (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
  1333. (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
  1334. (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
  1335. (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
  1336. (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
  1337. (1ull << IB_USER_VERBS_CMD_REG_MR) |
  1338. (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
  1339. (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
  1340. (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
  1341. (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
  1342. (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
  1343. (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
  1344. (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
  1345. (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
  1346. (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
  1347. (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
  1348. (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
  1349. (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
  1350. (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
  1351. (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
  1352. (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
  1353. (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
  1354. (1ull << IB_USER_VERBS_CMD_OPEN_QP);
  1355. ibdev->ib_dev.query_device = mlx4_ib_query_device;
  1356. ibdev->ib_dev.query_port = mlx4_ib_query_port;
  1357. ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer;
  1358. ibdev->ib_dev.query_gid = mlx4_ib_query_gid;
  1359. ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey;
  1360. ibdev->ib_dev.modify_device = mlx4_ib_modify_device;
  1361. ibdev->ib_dev.modify_port = mlx4_ib_modify_port;
  1362. ibdev->ib_dev.alloc_ucontext = mlx4_ib_alloc_ucontext;
  1363. ibdev->ib_dev.dealloc_ucontext = mlx4_ib_dealloc_ucontext;
  1364. ibdev->ib_dev.mmap = mlx4_ib_mmap;
  1365. ibdev->ib_dev.alloc_pd = mlx4_ib_alloc_pd;
  1366. ibdev->ib_dev.dealloc_pd = mlx4_ib_dealloc_pd;
  1367. ibdev->ib_dev.create_ah = mlx4_ib_create_ah;
  1368. ibdev->ib_dev.query_ah = mlx4_ib_query_ah;
  1369. ibdev->ib_dev.destroy_ah = mlx4_ib_destroy_ah;
  1370. ibdev->ib_dev.create_srq = mlx4_ib_create_srq;
  1371. ibdev->ib_dev.modify_srq = mlx4_ib_modify_srq;
  1372. ibdev->ib_dev.query_srq = mlx4_ib_query_srq;
  1373. ibdev->ib_dev.destroy_srq = mlx4_ib_destroy_srq;
  1374. ibdev->ib_dev.post_srq_recv = mlx4_ib_post_srq_recv;
  1375. ibdev->ib_dev.create_qp = mlx4_ib_create_qp;
  1376. ibdev->ib_dev.modify_qp = mlx4_ib_modify_qp;
  1377. ibdev->ib_dev.query_qp = mlx4_ib_query_qp;
  1378. ibdev->ib_dev.destroy_qp = mlx4_ib_destroy_qp;
  1379. ibdev->ib_dev.post_send = mlx4_ib_post_send;
  1380. ibdev->ib_dev.post_recv = mlx4_ib_post_recv;
  1381. ibdev->ib_dev.create_cq = mlx4_ib_create_cq;
  1382. ibdev->ib_dev.modify_cq = mlx4_ib_modify_cq;
  1383. ibdev->ib_dev.resize_cq = mlx4_ib_resize_cq;
  1384. ibdev->ib_dev.destroy_cq = mlx4_ib_destroy_cq;
  1385. ibdev->ib_dev.poll_cq = mlx4_ib_poll_cq;
  1386. ibdev->ib_dev.req_notify_cq = mlx4_ib_arm_cq;
  1387. ibdev->ib_dev.get_dma_mr = mlx4_ib_get_dma_mr;
  1388. ibdev->ib_dev.reg_user_mr = mlx4_ib_reg_user_mr;
  1389. ibdev->ib_dev.dereg_mr = mlx4_ib_dereg_mr;
  1390. ibdev->ib_dev.alloc_fast_reg_mr = mlx4_ib_alloc_fast_reg_mr;
  1391. ibdev->ib_dev.alloc_fast_reg_page_list = mlx4_ib_alloc_fast_reg_page_list;
  1392. ibdev->ib_dev.free_fast_reg_page_list = mlx4_ib_free_fast_reg_page_list;
  1393. ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach;
  1394. ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach;
  1395. ibdev->ib_dev.process_mad = mlx4_ib_process_mad;
  1396. if (!mlx4_is_slave(ibdev->dev)) {
  1397. ibdev->ib_dev.alloc_fmr = mlx4_ib_fmr_alloc;
  1398. ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr;
  1399. ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr;
  1400. ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc;
  1401. }
  1402. if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
  1403. dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
  1404. ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw;
  1405. ibdev->ib_dev.bind_mw = mlx4_ib_bind_mw;
  1406. ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw;
  1407. ibdev->ib_dev.uverbs_cmd_mask |=
  1408. (1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
  1409. (1ull << IB_USER_VERBS_CMD_DEALLOC_MW);
  1410. }
  1411. if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
  1412. ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd;
  1413. ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd;
  1414. ibdev->ib_dev.uverbs_cmd_mask |=
  1415. (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
  1416. (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
  1417. }
  1418. if (check_flow_steering_support(dev)) {
  1419. ibdev->ib_dev.create_flow = mlx4_ib_create_flow;
  1420. ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow;
  1421. #ifdef CONFIG_INFINIBAND_EXPERIMENTAL_UVERBS_FLOW_STEERING
  1422. ibdev->ib_dev.uverbs_cmd_mask |=
  1423. (1ull << IB_USER_VERBS_CMD_CREATE_FLOW) |
  1424. (1ull << IB_USER_VERBS_CMD_DESTROY_FLOW);
  1425. #endif /* CONFIG_INFINIBAND_EXPERIMENTAL_UVERBS_FLOW_STEERING */
  1426. }
  1427. mlx4_ib_alloc_eqs(dev, ibdev);
  1428. spin_lock_init(&iboe->lock);
  1429. if (init_node_data(ibdev))
  1430. goto err_map;
  1431. for (i = 0; i < ibdev->num_ports; ++i) {
  1432. if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) ==
  1433. IB_LINK_LAYER_ETHERNET) {
  1434. err = mlx4_counter_alloc(ibdev->dev, &ibdev->counters[i]);
  1435. if (err)
  1436. ibdev->counters[i] = -1;
  1437. } else
  1438. ibdev->counters[i] = -1;
  1439. }
  1440. spin_lock_init(&ibdev->sm_lock);
  1441. mutex_init(&ibdev->cap_mask_mutex);
  1442. if (ib_register_device(&ibdev->ib_dev, NULL))
  1443. goto err_counter;
  1444. if (mlx4_ib_mad_init(ibdev))
  1445. goto err_reg;
  1446. if (mlx4_ib_init_sriov(ibdev))
  1447. goto err_mad;
  1448. if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE && !iboe->nb.notifier_call) {
  1449. iboe->nb.notifier_call = mlx4_ib_netdev_event;
  1450. err = register_netdevice_notifier(&iboe->nb);
  1451. if (err)
  1452. goto err_sriov;
  1453. }
  1454. for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) {
  1455. if (device_create_file(&ibdev->ib_dev.dev,
  1456. mlx4_class_attributes[j]))
  1457. goto err_notif;
  1458. }
  1459. ibdev->ib_active = true;
  1460. if (mlx4_is_mfunc(ibdev->dev))
  1461. init_pkeys(ibdev);
  1462. /* create paravirt contexts for any VFs which are active */
  1463. if (mlx4_is_master(ibdev->dev)) {
  1464. for (j = 0; j < MLX4_MFUNC_MAX; j++) {
  1465. if (j == mlx4_master_func_num(ibdev->dev))
  1466. continue;
  1467. if (mlx4_is_slave_active(ibdev->dev, j))
  1468. do_slave_init(ibdev, j, 1);
  1469. }
  1470. }
  1471. return ibdev;
  1472. err_notif:
  1473. if (unregister_netdevice_notifier(&ibdev->iboe.nb))
  1474. pr_warn("failure unregistering notifier\n");
  1475. flush_workqueue(wq);
  1476. err_sriov:
  1477. mlx4_ib_close_sriov(ibdev);
  1478. err_mad:
  1479. mlx4_ib_mad_cleanup(ibdev);
  1480. err_reg:
  1481. ib_unregister_device(&ibdev->ib_dev);
  1482. err_counter:
  1483. for (; i; --i)
  1484. if (ibdev->counters[i - 1] != -1)
  1485. mlx4_counter_free(ibdev->dev, ibdev->counters[i - 1]);
  1486. err_map:
  1487. iounmap(ibdev->uar_map);
  1488. err_uar:
  1489. mlx4_uar_free(dev, &ibdev->priv_uar);
  1490. err_pd:
  1491. mlx4_pd_free(dev, ibdev->priv_pdn);
  1492. err_dealloc:
  1493. ib_dealloc_device(&ibdev->ib_dev);
  1494. return NULL;
  1495. }
  1496. static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
  1497. {
  1498. struct mlx4_ib_dev *ibdev = ibdev_ptr;
  1499. int p;
  1500. mlx4_ib_close_sriov(ibdev);
  1501. mlx4_ib_mad_cleanup(ibdev);
  1502. ib_unregister_device(&ibdev->ib_dev);
  1503. if (ibdev->iboe.nb.notifier_call) {
  1504. if (unregister_netdevice_notifier(&ibdev->iboe.nb))
  1505. pr_warn("failure unregistering notifier\n");
  1506. ibdev->iboe.nb.notifier_call = NULL;
  1507. }
  1508. iounmap(ibdev->uar_map);
  1509. for (p = 0; p < ibdev->num_ports; ++p)
  1510. if (ibdev->counters[p] != -1)
  1511. mlx4_counter_free(ibdev->dev, ibdev->counters[p]);
  1512. mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
  1513. mlx4_CLOSE_PORT(dev, p);
  1514. mlx4_ib_free_eqs(dev, ibdev);
  1515. mlx4_uar_free(dev, &ibdev->priv_uar);
  1516. mlx4_pd_free(dev, ibdev->priv_pdn);
  1517. ib_dealloc_device(&ibdev->ib_dev);
  1518. }
  1519. static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init)
  1520. {
  1521. struct mlx4_ib_demux_work **dm = NULL;
  1522. struct mlx4_dev *dev = ibdev->dev;
  1523. int i;
  1524. unsigned long flags;
  1525. if (!mlx4_is_master(dev))
  1526. return;
  1527. dm = kcalloc(dev->caps.num_ports, sizeof *dm, GFP_ATOMIC);
  1528. if (!dm) {
  1529. pr_err("failed to allocate memory for tunneling qp update\n");
  1530. goto out;
  1531. }
  1532. for (i = 0; i < dev->caps.num_ports; i++) {
  1533. dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC);
  1534. if (!dm[i]) {
  1535. pr_err("failed to allocate memory for tunneling qp update work struct\n");
  1536. for (i = 0; i < dev->caps.num_ports; i++) {
  1537. if (dm[i])
  1538. kfree(dm[i]);
  1539. }
  1540. goto out;
  1541. }
  1542. }
  1543. /* initialize or tear down tunnel QPs for the slave */
  1544. for (i = 0; i < dev->caps.num_ports; i++) {
  1545. INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work);
  1546. dm[i]->port = i + 1;
  1547. dm[i]->slave = slave;
  1548. dm[i]->do_init = do_init;
  1549. dm[i]->dev = ibdev;
  1550. spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags);
  1551. if (!ibdev->sriov.is_going_down)
  1552. queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work);
  1553. spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
  1554. }
  1555. out:
  1556. kfree(dm);
  1557. return;
  1558. }
  1559. static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr,
  1560. enum mlx4_dev_event event, unsigned long param)
  1561. {
  1562. struct ib_event ibev;
  1563. struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr);
  1564. struct mlx4_eqe *eqe = NULL;
  1565. struct ib_event_work *ew;
  1566. int p = 0;
  1567. if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE)
  1568. eqe = (struct mlx4_eqe *)param;
  1569. else
  1570. p = (int) param;
  1571. switch (event) {
  1572. case MLX4_DEV_EVENT_PORT_UP:
  1573. if (p > ibdev->num_ports)
  1574. return;
  1575. if (mlx4_is_master(dev) &&
  1576. rdma_port_get_link_layer(&ibdev->ib_dev, p) ==
  1577. IB_LINK_LAYER_INFINIBAND) {
  1578. mlx4_ib_invalidate_all_guid_record(ibdev, p);
  1579. }
  1580. ibev.event = IB_EVENT_PORT_ACTIVE;
  1581. break;
  1582. case MLX4_DEV_EVENT_PORT_DOWN:
  1583. if (p > ibdev->num_ports)
  1584. return;
  1585. ibev.event = IB_EVENT_PORT_ERR;
  1586. break;
  1587. case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
  1588. ibdev->ib_active = false;
  1589. ibev.event = IB_EVENT_DEVICE_FATAL;
  1590. break;
  1591. case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
  1592. ew = kmalloc(sizeof *ew, GFP_ATOMIC);
  1593. if (!ew) {
  1594. pr_err("failed to allocate memory for events work\n");
  1595. break;
  1596. }
  1597. INIT_WORK(&ew->work, handle_port_mgmt_change_event);
  1598. memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
  1599. ew->ib_dev = ibdev;
  1600. /* need to queue only for port owner, which uses GEN_EQE */
  1601. if (mlx4_is_master(dev))
  1602. queue_work(wq, &ew->work);
  1603. else
  1604. handle_port_mgmt_change_event(&ew->work);
  1605. return;
  1606. case MLX4_DEV_EVENT_SLAVE_INIT:
  1607. /* here, p is the slave id */
  1608. do_slave_init(ibdev, p, 1);
  1609. return;
  1610. case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
  1611. /* here, p is the slave id */
  1612. do_slave_init(ibdev, p, 0);
  1613. return;
  1614. default:
  1615. return;
  1616. }
  1617. ibev.device = ibdev_ptr;
  1618. ibev.element.port_num = (u8) p;
  1619. ib_dispatch_event(&ibev);
  1620. }
  1621. static struct mlx4_interface mlx4_ib_interface = {
  1622. .add = mlx4_ib_add,
  1623. .remove = mlx4_ib_remove,
  1624. .event = mlx4_ib_event,
  1625. .protocol = MLX4_PROT_IB_IPV6
  1626. };
  1627. static int __init mlx4_ib_init(void)
  1628. {
  1629. int err;
  1630. wq = create_singlethread_workqueue("mlx4_ib");
  1631. if (!wq)
  1632. return -ENOMEM;
  1633. err = mlx4_ib_mcg_init();
  1634. if (err)
  1635. goto clean_wq;
  1636. err = mlx4_register_interface(&mlx4_ib_interface);
  1637. if (err)
  1638. goto clean_mcg;
  1639. return 0;
  1640. clean_mcg:
  1641. mlx4_ib_mcg_destroy();
  1642. clean_wq:
  1643. destroy_workqueue(wq);
  1644. return err;
  1645. }
  1646. static void __exit mlx4_ib_cleanup(void)
  1647. {
  1648. mlx4_unregister_interface(&mlx4_ib_interface);
  1649. mlx4_ib_mcg_destroy();
  1650. destroy_workqueue(wq);
  1651. }
  1652. module_init(mlx4_ib_init);
  1653. module_exit(mlx4_ib_cleanup);