oprofile_impl.h 4.0 KB

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  1. /*
  2. * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
  3. *
  4. * Based on alpha version.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. */
  11. #ifndef _ASM_POWERPC_OPROFILE_IMPL_H
  12. #define _ASM_POWERPC_OPROFILE_IMPL_H
  13. #ifdef __KERNEL__
  14. #define OP_MAX_COUNTER 8
  15. /* Per-counter configuration as set via oprofilefs. */
  16. struct op_counter_config {
  17. unsigned long enabled;
  18. unsigned long event;
  19. unsigned long count;
  20. /* Classic doesn't support per-counter user/kernel selection */
  21. unsigned long kernel;
  22. unsigned long user;
  23. unsigned long unit_mask;
  24. };
  25. /* System-wide configuration as set via oprofilefs. */
  26. struct op_system_config {
  27. #ifdef CONFIG_PPC64
  28. unsigned long mmcr0;
  29. unsigned long mmcr1;
  30. unsigned long mmcra;
  31. #endif
  32. unsigned long enable_kernel;
  33. unsigned long enable_user;
  34. };
  35. /* Per-arch configuration */
  36. struct op_powerpc_model {
  37. void (*reg_setup) (struct op_counter_config *,
  38. struct op_system_config *,
  39. int num_counters);
  40. void (*cpu_setup) (struct op_counter_config *);
  41. void (*start) (struct op_counter_config *);
  42. void (*global_start) (struct op_counter_config *);
  43. void (*stop) (void);
  44. void (*global_stop) (void);
  45. void (*handle_interrupt) (struct pt_regs *,
  46. struct op_counter_config *);
  47. int num_counters;
  48. };
  49. extern struct op_powerpc_model op_model_fsl_booke;
  50. extern struct op_powerpc_model op_model_rs64;
  51. extern struct op_powerpc_model op_model_power4;
  52. extern struct op_powerpc_model op_model_7450;
  53. extern struct op_powerpc_model op_model_cell;
  54. #ifndef CONFIG_FSL_BOOKE
  55. /* All the classic PPC parts use these */
  56. static inline unsigned int ctr_read(unsigned int i)
  57. {
  58. switch(i) {
  59. case 0:
  60. return mfspr(SPRN_PMC1);
  61. case 1:
  62. return mfspr(SPRN_PMC2);
  63. case 2:
  64. return mfspr(SPRN_PMC3);
  65. case 3:
  66. return mfspr(SPRN_PMC4);
  67. case 4:
  68. return mfspr(SPRN_PMC5);
  69. case 5:
  70. return mfspr(SPRN_PMC6);
  71. /* No PPC32 chip has more than 6 so far */
  72. #ifdef CONFIG_PPC64
  73. case 6:
  74. return mfspr(SPRN_PMC7);
  75. case 7:
  76. return mfspr(SPRN_PMC8);
  77. #endif
  78. default:
  79. return 0;
  80. }
  81. }
  82. static inline void ctr_write(unsigned int i, unsigned int val)
  83. {
  84. switch(i) {
  85. case 0:
  86. mtspr(SPRN_PMC1, val);
  87. break;
  88. case 1:
  89. mtspr(SPRN_PMC2, val);
  90. break;
  91. case 2:
  92. mtspr(SPRN_PMC3, val);
  93. break;
  94. case 3:
  95. mtspr(SPRN_PMC4, val);
  96. break;
  97. case 4:
  98. mtspr(SPRN_PMC5, val);
  99. break;
  100. case 5:
  101. mtspr(SPRN_PMC6, val);
  102. break;
  103. /* No PPC32 chip has more than 6, yet */
  104. #ifdef CONFIG_PPC64
  105. case 6:
  106. mtspr(SPRN_PMC7, val);
  107. break;
  108. case 7:
  109. mtspr(SPRN_PMC8, val);
  110. break;
  111. #endif
  112. default:
  113. break;
  114. }
  115. }
  116. #else /* CONFIG_FSL_BOOKE */
  117. static inline u32 get_pmlca(int ctr)
  118. {
  119. u32 pmlca;
  120. switch (ctr) {
  121. case 0:
  122. pmlca = mfpmr(PMRN_PMLCA0);
  123. break;
  124. case 1:
  125. pmlca = mfpmr(PMRN_PMLCA1);
  126. break;
  127. case 2:
  128. pmlca = mfpmr(PMRN_PMLCA2);
  129. break;
  130. case 3:
  131. pmlca = mfpmr(PMRN_PMLCA3);
  132. break;
  133. default:
  134. panic("Bad ctr number\n");
  135. }
  136. return pmlca;
  137. }
  138. static inline void set_pmlca(int ctr, u32 pmlca)
  139. {
  140. switch (ctr) {
  141. case 0:
  142. mtpmr(PMRN_PMLCA0, pmlca);
  143. break;
  144. case 1:
  145. mtpmr(PMRN_PMLCA1, pmlca);
  146. break;
  147. case 2:
  148. mtpmr(PMRN_PMLCA2, pmlca);
  149. break;
  150. case 3:
  151. mtpmr(PMRN_PMLCA3, pmlca);
  152. break;
  153. default:
  154. panic("Bad ctr number\n");
  155. }
  156. }
  157. static inline unsigned int ctr_read(unsigned int i)
  158. {
  159. switch(i) {
  160. case 0:
  161. return mfpmr(PMRN_PMC0);
  162. case 1:
  163. return mfpmr(PMRN_PMC1);
  164. case 2:
  165. return mfpmr(PMRN_PMC2);
  166. case 3:
  167. return mfpmr(PMRN_PMC3);
  168. default:
  169. return 0;
  170. }
  171. }
  172. static inline void ctr_write(unsigned int i, unsigned int val)
  173. {
  174. switch(i) {
  175. case 0:
  176. mtpmr(PMRN_PMC0, val);
  177. break;
  178. case 1:
  179. mtpmr(PMRN_PMC1, val);
  180. break;
  181. case 2:
  182. mtpmr(PMRN_PMC2, val);
  183. break;
  184. case 3:
  185. mtpmr(PMRN_PMC3, val);
  186. break;
  187. default:
  188. break;
  189. }
  190. }
  191. #endif /* CONFIG_FSL_BOOKE */
  192. extern void op_powerpc_backtrace(struct pt_regs * const regs, unsigned int depth);
  193. #endif /* __KERNEL__ */
  194. #endif /* _ASM_POWERPC_OPROFILE_IMPL_H */