process.c 21 KB

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  1. /*
  2. * Architecture-specific setup.
  3. *
  4. * Copyright (C) 1998-2003 Hewlett-Packard Co
  5. * David Mosberger-Tang <davidm@hpl.hp.com>
  6. * 04/11/17 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support
  7. *
  8. * 2005-10-07 Keith Owens <kaos@sgi.com>
  9. * Add notify_die() hooks.
  10. */
  11. #include <linux/cpu.h>
  12. #include <linux/pm.h>
  13. #include <linux/elf.h>
  14. #include <linux/errno.h>
  15. #include <linux/kallsyms.h>
  16. #include <linux/kernel.h>
  17. #include <linux/mm.h>
  18. #include <linux/module.h>
  19. #include <linux/notifier.h>
  20. #include <linux/personality.h>
  21. #include <linux/sched.h>
  22. #include <linux/slab.h>
  23. #include <linux/smp_lock.h>
  24. #include <linux/stddef.h>
  25. #include <linux/thread_info.h>
  26. #include <linux/unistd.h>
  27. #include <linux/efi.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/delay.h>
  30. #include <asm/cpu.h>
  31. #include <asm/delay.h>
  32. #include <asm/elf.h>
  33. #include <asm/ia32.h>
  34. #include <asm/irq.h>
  35. #include <asm/kdebug.h>
  36. #include <asm/pgalloc.h>
  37. #include <asm/processor.h>
  38. #include <asm/sal.h>
  39. #include <asm/tlbflush.h>
  40. #include <asm/uaccess.h>
  41. #include <asm/unwind.h>
  42. #include <asm/user.h>
  43. #include "entry.h"
  44. #ifdef CONFIG_PERFMON
  45. # include <asm/perfmon.h>
  46. #endif
  47. #include "sigframe.h"
  48. void (*ia64_mark_idle)(int);
  49. static DEFINE_PER_CPU(unsigned int, cpu_idle_state);
  50. unsigned long boot_option_idle_override = 0;
  51. EXPORT_SYMBOL(boot_option_idle_override);
  52. void
  53. ia64_do_show_stack (struct unw_frame_info *info, void *arg)
  54. {
  55. unsigned long ip, sp, bsp;
  56. char buf[128]; /* don't make it so big that it overflows the stack! */
  57. printk("\nCall Trace:\n");
  58. do {
  59. unw_get_ip(info, &ip);
  60. if (ip == 0)
  61. break;
  62. unw_get_sp(info, &sp);
  63. unw_get_bsp(info, &bsp);
  64. snprintf(buf, sizeof(buf),
  65. " [<%016lx>] %%s\n"
  66. " sp=%016lx bsp=%016lx\n",
  67. ip, sp, bsp);
  68. print_symbol(buf, ip);
  69. } while (unw_unwind(info) >= 0);
  70. }
  71. void
  72. show_stack (struct task_struct *task, unsigned long *sp)
  73. {
  74. if (!task)
  75. unw_init_running(ia64_do_show_stack, NULL);
  76. else {
  77. struct unw_frame_info info;
  78. unw_init_from_blocked_task(&info, task);
  79. ia64_do_show_stack(&info, NULL);
  80. }
  81. }
  82. void
  83. dump_stack (void)
  84. {
  85. show_stack(NULL, NULL);
  86. }
  87. EXPORT_SYMBOL(dump_stack);
  88. void
  89. show_regs (struct pt_regs *regs)
  90. {
  91. unsigned long ip = regs->cr_iip + ia64_psr(regs)->ri;
  92. print_modules();
  93. printk("\nPid: %d, CPU %d, comm: %20s\n", current->pid, smp_processor_id(), current->comm);
  94. printk("psr : %016lx ifs : %016lx ip : [<%016lx>] %s\n",
  95. regs->cr_ipsr, regs->cr_ifs, ip, print_tainted());
  96. print_symbol("ip is at %s\n", ip);
  97. printk("unat: %016lx pfs : %016lx rsc : %016lx\n",
  98. regs->ar_unat, regs->ar_pfs, regs->ar_rsc);
  99. printk("rnat: %016lx bsps: %016lx pr : %016lx\n",
  100. regs->ar_rnat, regs->ar_bspstore, regs->pr);
  101. printk("ldrs: %016lx ccv : %016lx fpsr: %016lx\n",
  102. regs->loadrs, regs->ar_ccv, regs->ar_fpsr);
  103. printk("csd : %016lx ssd : %016lx\n", regs->ar_csd, regs->ar_ssd);
  104. printk("b0 : %016lx b6 : %016lx b7 : %016lx\n", regs->b0, regs->b6, regs->b7);
  105. printk("f6 : %05lx%016lx f7 : %05lx%016lx\n",
  106. regs->f6.u.bits[1], regs->f6.u.bits[0],
  107. regs->f7.u.bits[1], regs->f7.u.bits[0]);
  108. printk("f8 : %05lx%016lx f9 : %05lx%016lx\n",
  109. regs->f8.u.bits[1], regs->f8.u.bits[0],
  110. regs->f9.u.bits[1], regs->f9.u.bits[0]);
  111. printk("f10 : %05lx%016lx f11 : %05lx%016lx\n",
  112. regs->f10.u.bits[1], regs->f10.u.bits[0],
  113. regs->f11.u.bits[1], regs->f11.u.bits[0]);
  114. printk("r1 : %016lx r2 : %016lx r3 : %016lx\n", regs->r1, regs->r2, regs->r3);
  115. printk("r8 : %016lx r9 : %016lx r10 : %016lx\n", regs->r8, regs->r9, regs->r10);
  116. printk("r11 : %016lx r12 : %016lx r13 : %016lx\n", regs->r11, regs->r12, regs->r13);
  117. printk("r14 : %016lx r15 : %016lx r16 : %016lx\n", regs->r14, regs->r15, regs->r16);
  118. printk("r17 : %016lx r18 : %016lx r19 : %016lx\n", regs->r17, regs->r18, regs->r19);
  119. printk("r20 : %016lx r21 : %016lx r22 : %016lx\n", regs->r20, regs->r21, regs->r22);
  120. printk("r23 : %016lx r24 : %016lx r25 : %016lx\n", regs->r23, regs->r24, regs->r25);
  121. printk("r26 : %016lx r27 : %016lx r28 : %016lx\n", regs->r26, regs->r27, regs->r28);
  122. printk("r29 : %016lx r30 : %016lx r31 : %016lx\n", regs->r29, regs->r30, regs->r31);
  123. if (user_mode(regs)) {
  124. /* print the stacked registers */
  125. unsigned long val, *bsp, ndirty;
  126. int i, sof, is_nat = 0;
  127. sof = regs->cr_ifs & 0x7f; /* size of frame */
  128. ndirty = (regs->loadrs >> 19);
  129. bsp = ia64_rse_skip_regs((unsigned long *) regs->ar_bspstore, ndirty);
  130. for (i = 0; i < sof; ++i) {
  131. get_user(val, (unsigned long __user *) ia64_rse_skip_regs(bsp, i));
  132. printk("r%-3u:%c%016lx%s", 32 + i, is_nat ? '*' : ' ', val,
  133. ((i == sof - 1) || (i % 3) == 2) ? "\n" : " ");
  134. }
  135. } else
  136. show_stack(NULL, NULL);
  137. }
  138. void
  139. do_notify_resume_user (sigset_t *oldset, struct sigscratch *scr, long in_syscall)
  140. {
  141. if (fsys_mode(current, &scr->pt)) {
  142. /* defer signal-handling etc. until we return to privilege-level 0. */
  143. if (!ia64_psr(&scr->pt)->lp)
  144. ia64_psr(&scr->pt)->lp = 1;
  145. return;
  146. }
  147. #ifdef CONFIG_PERFMON
  148. if (current->thread.pfm_needs_checking)
  149. pfm_handle_work();
  150. #endif
  151. /* deal with pending signal delivery */
  152. if (test_thread_flag(TIF_SIGPENDING))
  153. ia64_do_signal(oldset, scr, in_syscall);
  154. }
  155. static int pal_halt = 1;
  156. static int can_do_pal_halt = 1;
  157. static int __init nohalt_setup(char * str)
  158. {
  159. pal_halt = can_do_pal_halt = 0;
  160. return 1;
  161. }
  162. __setup("nohalt", nohalt_setup);
  163. void
  164. update_pal_halt_status(int status)
  165. {
  166. can_do_pal_halt = pal_halt && status;
  167. }
  168. /*
  169. * We use this if we don't have any better idle routine..
  170. */
  171. void
  172. default_idle (void)
  173. {
  174. local_irq_enable();
  175. while (!need_resched()) {
  176. if (can_do_pal_halt)
  177. safe_halt();
  178. else
  179. cpu_relax();
  180. }
  181. }
  182. #ifdef CONFIG_HOTPLUG_CPU
  183. /* We don't actually take CPU down, just spin without interrupts. */
  184. static inline void play_dead(void)
  185. {
  186. extern void ia64_cpu_local_tick (void);
  187. unsigned int this_cpu = smp_processor_id();
  188. /* Ack it */
  189. __get_cpu_var(cpu_state) = CPU_DEAD;
  190. max_xtp();
  191. local_irq_disable();
  192. idle_task_exit();
  193. ia64_jump_to_sal(&sal_boot_rendez_state[this_cpu]);
  194. /*
  195. * The above is a point of no-return, the processor is
  196. * expected to be in SAL loop now.
  197. */
  198. BUG();
  199. }
  200. #else
  201. static inline void play_dead(void)
  202. {
  203. BUG();
  204. }
  205. #endif /* CONFIG_HOTPLUG_CPU */
  206. void cpu_idle_wait(void)
  207. {
  208. unsigned int cpu, this_cpu = get_cpu();
  209. cpumask_t map;
  210. set_cpus_allowed(current, cpumask_of_cpu(this_cpu));
  211. put_cpu();
  212. cpus_clear(map);
  213. for_each_online_cpu(cpu) {
  214. per_cpu(cpu_idle_state, cpu) = 1;
  215. cpu_set(cpu, map);
  216. }
  217. __get_cpu_var(cpu_idle_state) = 0;
  218. wmb();
  219. do {
  220. ssleep(1);
  221. for_each_online_cpu(cpu) {
  222. if (cpu_isset(cpu, map) && !per_cpu(cpu_idle_state, cpu))
  223. cpu_clear(cpu, map);
  224. }
  225. cpus_and(map, map, cpu_online_map);
  226. } while (!cpus_empty(map));
  227. }
  228. EXPORT_SYMBOL_GPL(cpu_idle_wait);
  229. void __attribute__((noreturn))
  230. cpu_idle (void)
  231. {
  232. void (*mark_idle)(int) = ia64_mark_idle;
  233. int cpu = smp_processor_id();
  234. /* endless idle loop with no priority at all */
  235. while (1) {
  236. if (can_do_pal_halt) {
  237. current_thread_info()->status &= ~TS_POLLING;
  238. /*
  239. * TS_POLLING-cleared state must be visible before we
  240. * test NEED_RESCHED:
  241. */
  242. smp_mb();
  243. } else {
  244. current_thread_info()->status |= TS_POLLING;
  245. }
  246. if (!need_resched()) {
  247. void (*idle)(void);
  248. #ifdef CONFIG_SMP
  249. min_xtp();
  250. #endif
  251. if (__get_cpu_var(cpu_idle_state))
  252. __get_cpu_var(cpu_idle_state) = 0;
  253. rmb();
  254. if (mark_idle)
  255. (*mark_idle)(1);
  256. idle = pm_idle;
  257. if (!idle)
  258. idle = default_idle;
  259. (*idle)();
  260. if (mark_idle)
  261. (*mark_idle)(0);
  262. #ifdef CONFIG_SMP
  263. normal_xtp();
  264. #endif
  265. }
  266. preempt_enable_no_resched();
  267. schedule();
  268. preempt_disable();
  269. check_pgt_cache();
  270. if (cpu_is_offline(cpu))
  271. play_dead();
  272. }
  273. }
  274. void
  275. ia64_save_extra (struct task_struct *task)
  276. {
  277. #ifdef CONFIG_PERFMON
  278. unsigned long info;
  279. #endif
  280. if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
  281. ia64_save_debug_regs(&task->thread.dbr[0]);
  282. #ifdef CONFIG_PERFMON
  283. if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
  284. pfm_save_regs(task);
  285. info = __get_cpu_var(pfm_syst_info);
  286. if (info & PFM_CPUINFO_SYST_WIDE)
  287. pfm_syst_wide_update_task(task, info, 0);
  288. #endif
  289. #ifdef CONFIG_IA32_SUPPORT
  290. if (IS_IA32_PROCESS(task_pt_regs(task)))
  291. ia32_save_state(task);
  292. #endif
  293. }
  294. void
  295. ia64_load_extra (struct task_struct *task)
  296. {
  297. #ifdef CONFIG_PERFMON
  298. unsigned long info;
  299. #endif
  300. if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
  301. ia64_load_debug_regs(&task->thread.dbr[0]);
  302. #ifdef CONFIG_PERFMON
  303. if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
  304. pfm_load_regs(task);
  305. info = __get_cpu_var(pfm_syst_info);
  306. if (info & PFM_CPUINFO_SYST_WIDE)
  307. pfm_syst_wide_update_task(task, info, 1);
  308. #endif
  309. #ifdef CONFIG_IA32_SUPPORT
  310. if (IS_IA32_PROCESS(task_pt_regs(task)))
  311. ia32_load_state(task);
  312. #endif
  313. }
  314. /*
  315. * Copy the state of an ia-64 thread.
  316. *
  317. * We get here through the following call chain:
  318. *
  319. * from user-level: from kernel:
  320. *
  321. * <clone syscall> <some kernel call frames>
  322. * sys_clone :
  323. * do_fork do_fork
  324. * copy_thread copy_thread
  325. *
  326. * This means that the stack layout is as follows:
  327. *
  328. * +---------------------+ (highest addr)
  329. * | struct pt_regs |
  330. * +---------------------+
  331. * | struct switch_stack |
  332. * +---------------------+
  333. * | |
  334. * | memory stack |
  335. * | | <-- sp (lowest addr)
  336. * +---------------------+
  337. *
  338. * Observe that we copy the unat values that are in pt_regs and switch_stack. Spilling an
  339. * integer to address X causes bit N in ar.unat to be set to the NaT bit of the register,
  340. * with N=(X & 0x1ff)/8. Thus, copying the unat value preserves the NaT bits ONLY if the
  341. * pt_regs structure in the parent is congruent to that of the child, modulo 512. Since
  342. * the stack is page aligned and the page size is at least 4KB, this is always the case,
  343. * so there is nothing to worry about.
  344. */
  345. int
  346. copy_thread (int nr, unsigned long clone_flags,
  347. unsigned long user_stack_base, unsigned long user_stack_size,
  348. struct task_struct *p, struct pt_regs *regs)
  349. {
  350. extern char ia64_ret_from_clone, ia32_ret_from_clone;
  351. struct switch_stack *child_stack, *stack;
  352. unsigned long rbs, child_rbs, rbs_size;
  353. struct pt_regs *child_ptregs;
  354. int retval = 0;
  355. #ifdef CONFIG_SMP
  356. /*
  357. * For SMP idle threads, fork_by_hand() calls do_fork with
  358. * NULL regs.
  359. */
  360. if (!regs)
  361. return 0;
  362. #endif
  363. stack = ((struct switch_stack *) regs) - 1;
  364. child_ptregs = (struct pt_regs *) ((unsigned long) p + IA64_STK_OFFSET) - 1;
  365. child_stack = (struct switch_stack *) child_ptregs - 1;
  366. /* copy parent's switch_stack & pt_regs to child: */
  367. memcpy(child_stack, stack, sizeof(*child_ptregs) + sizeof(*child_stack));
  368. rbs = (unsigned long) current + IA64_RBS_OFFSET;
  369. child_rbs = (unsigned long) p + IA64_RBS_OFFSET;
  370. rbs_size = stack->ar_bspstore - rbs;
  371. /* copy the parent's register backing store to the child: */
  372. memcpy((void *) child_rbs, (void *) rbs, rbs_size);
  373. if (likely(user_mode(child_ptregs))) {
  374. if ((clone_flags & CLONE_SETTLS) && !IS_IA32_PROCESS(regs))
  375. child_ptregs->r13 = regs->r16; /* see sys_clone2() in entry.S */
  376. if (user_stack_base) {
  377. child_ptregs->r12 = user_stack_base + user_stack_size - 16;
  378. child_ptregs->ar_bspstore = user_stack_base;
  379. child_ptregs->ar_rnat = 0;
  380. child_ptregs->loadrs = 0;
  381. }
  382. } else {
  383. /*
  384. * Note: we simply preserve the relative position of
  385. * the stack pointer here. There is no need to
  386. * allocate a scratch area here, since that will have
  387. * been taken care of by the caller of sys_clone()
  388. * already.
  389. */
  390. child_ptregs->r12 = (unsigned long) child_ptregs - 16; /* kernel sp */
  391. child_ptregs->r13 = (unsigned long) p; /* set `current' pointer */
  392. }
  393. child_stack->ar_bspstore = child_rbs + rbs_size;
  394. if (IS_IA32_PROCESS(regs))
  395. child_stack->b0 = (unsigned long) &ia32_ret_from_clone;
  396. else
  397. child_stack->b0 = (unsigned long) &ia64_ret_from_clone;
  398. /* copy parts of thread_struct: */
  399. p->thread.ksp = (unsigned long) child_stack - 16;
  400. /* stop some PSR bits from being inherited.
  401. * the psr.up/psr.pp bits must be cleared on fork but inherited on execve()
  402. * therefore we must specify them explicitly here and not include them in
  403. * IA64_PSR_BITS_TO_CLEAR.
  404. */
  405. child_ptregs->cr_ipsr = ((child_ptregs->cr_ipsr | IA64_PSR_BITS_TO_SET)
  406. & ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_PP | IA64_PSR_UP));
  407. /*
  408. * NOTE: The calling convention considers all floating point
  409. * registers in the high partition (fph) to be scratch. Since
  410. * the only way to get to this point is through a system call,
  411. * we know that the values in fph are all dead. Hence, there
  412. * is no need to inherit the fph state from the parent to the
  413. * child and all we have to do is to make sure that
  414. * IA64_THREAD_FPH_VALID is cleared in the child.
  415. *
  416. * XXX We could push this optimization a bit further by
  417. * clearing IA64_THREAD_FPH_VALID on ANY system call.
  418. * However, it's not clear this is worth doing. Also, it
  419. * would be a slight deviation from the normal Linux system
  420. * call behavior where scratch registers are preserved across
  421. * system calls (unless used by the system call itself).
  422. */
  423. # define THREAD_FLAGS_TO_CLEAR (IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID \
  424. | IA64_THREAD_PM_VALID)
  425. # define THREAD_FLAGS_TO_SET 0
  426. p->thread.flags = ((current->thread.flags & ~THREAD_FLAGS_TO_CLEAR)
  427. | THREAD_FLAGS_TO_SET);
  428. ia64_drop_fpu(p); /* don't pick up stale state from a CPU's fph */
  429. #ifdef CONFIG_IA32_SUPPORT
  430. /*
  431. * If we're cloning an IA32 task then save the IA32 extra
  432. * state from the current task to the new task
  433. */
  434. if (IS_IA32_PROCESS(task_pt_regs(current))) {
  435. ia32_save_state(p);
  436. if (clone_flags & CLONE_SETTLS)
  437. retval = ia32_clone_tls(p, child_ptregs);
  438. /* Copy partially mapped page list */
  439. if (!retval)
  440. retval = ia32_copy_partial_page_list(p, clone_flags);
  441. }
  442. #endif
  443. #ifdef CONFIG_PERFMON
  444. if (current->thread.pfm_context)
  445. pfm_inherit(p, child_ptregs);
  446. #endif
  447. return retval;
  448. }
  449. static void
  450. do_copy_task_regs (struct task_struct *task, struct unw_frame_info *info, void *arg)
  451. {
  452. unsigned long mask, sp, nat_bits = 0, ip, ar_rnat, urbs_end, cfm;
  453. elf_greg_t *dst = arg;
  454. struct pt_regs *pt;
  455. char nat;
  456. int i;
  457. memset(dst, 0, sizeof(elf_gregset_t)); /* don't leak any kernel bits to user-level */
  458. if (unw_unwind_to_user(info) < 0)
  459. return;
  460. unw_get_sp(info, &sp);
  461. pt = (struct pt_regs *) (sp + 16);
  462. urbs_end = ia64_get_user_rbs_end(task, pt, &cfm);
  463. if (ia64_sync_user_rbs(task, info->sw, pt->ar_bspstore, urbs_end) < 0)
  464. return;
  465. ia64_peek(task, info->sw, urbs_end, (long) ia64_rse_rnat_addr((long *) urbs_end),
  466. &ar_rnat);
  467. /*
  468. * coredump format:
  469. * r0-r31
  470. * NaT bits (for r0-r31; bit N == 1 iff rN is a NaT)
  471. * predicate registers (p0-p63)
  472. * b0-b7
  473. * ip cfm user-mask
  474. * ar.rsc ar.bsp ar.bspstore ar.rnat
  475. * ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec
  476. */
  477. /* r0 is zero */
  478. for (i = 1, mask = (1UL << i); i < 32; ++i) {
  479. unw_get_gr(info, i, &dst[i], &nat);
  480. if (nat)
  481. nat_bits |= mask;
  482. mask <<= 1;
  483. }
  484. dst[32] = nat_bits;
  485. unw_get_pr(info, &dst[33]);
  486. for (i = 0; i < 8; ++i)
  487. unw_get_br(info, i, &dst[34 + i]);
  488. unw_get_rp(info, &ip);
  489. dst[42] = ip + ia64_psr(pt)->ri;
  490. dst[43] = cfm;
  491. dst[44] = pt->cr_ipsr & IA64_PSR_UM;
  492. unw_get_ar(info, UNW_AR_RSC, &dst[45]);
  493. /*
  494. * For bsp and bspstore, unw_get_ar() would return the kernel
  495. * addresses, but we need the user-level addresses instead:
  496. */
  497. dst[46] = urbs_end; /* note: by convention PT_AR_BSP points to the end of the urbs! */
  498. dst[47] = pt->ar_bspstore;
  499. dst[48] = ar_rnat;
  500. unw_get_ar(info, UNW_AR_CCV, &dst[49]);
  501. unw_get_ar(info, UNW_AR_UNAT, &dst[50]);
  502. unw_get_ar(info, UNW_AR_FPSR, &dst[51]);
  503. dst[52] = pt->ar_pfs; /* UNW_AR_PFS is == to pt->cr_ifs for interrupt frames */
  504. unw_get_ar(info, UNW_AR_LC, &dst[53]);
  505. unw_get_ar(info, UNW_AR_EC, &dst[54]);
  506. unw_get_ar(info, UNW_AR_CSD, &dst[55]);
  507. unw_get_ar(info, UNW_AR_SSD, &dst[56]);
  508. }
  509. void
  510. do_dump_task_fpu (struct task_struct *task, struct unw_frame_info *info, void *arg)
  511. {
  512. elf_fpreg_t *dst = arg;
  513. int i;
  514. memset(dst, 0, sizeof(elf_fpregset_t)); /* don't leak any "random" bits */
  515. if (unw_unwind_to_user(info) < 0)
  516. return;
  517. /* f0 is 0.0, f1 is 1.0 */
  518. for (i = 2; i < 32; ++i)
  519. unw_get_fr(info, i, dst + i);
  520. ia64_flush_fph(task);
  521. if ((task->thread.flags & IA64_THREAD_FPH_VALID) != 0)
  522. memcpy(dst + 32, task->thread.fph, 96*16);
  523. }
  524. void
  525. do_copy_regs (struct unw_frame_info *info, void *arg)
  526. {
  527. do_copy_task_regs(current, info, arg);
  528. }
  529. void
  530. do_dump_fpu (struct unw_frame_info *info, void *arg)
  531. {
  532. do_dump_task_fpu(current, info, arg);
  533. }
  534. int
  535. dump_task_regs(struct task_struct *task, elf_gregset_t *regs)
  536. {
  537. struct unw_frame_info tcore_info;
  538. if (current == task) {
  539. unw_init_running(do_copy_regs, regs);
  540. } else {
  541. memset(&tcore_info, 0, sizeof(tcore_info));
  542. unw_init_from_blocked_task(&tcore_info, task);
  543. do_copy_task_regs(task, &tcore_info, regs);
  544. }
  545. return 1;
  546. }
  547. void
  548. ia64_elf_core_copy_regs (struct pt_regs *pt, elf_gregset_t dst)
  549. {
  550. unw_init_running(do_copy_regs, dst);
  551. }
  552. int
  553. dump_task_fpu (struct task_struct *task, elf_fpregset_t *dst)
  554. {
  555. struct unw_frame_info tcore_info;
  556. if (current == task) {
  557. unw_init_running(do_dump_fpu, dst);
  558. } else {
  559. memset(&tcore_info, 0, sizeof(tcore_info));
  560. unw_init_from_blocked_task(&tcore_info, task);
  561. do_dump_task_fpu(task, &tcore_info, dst);
  562. }
  563. return 1;
  564. }
  565. int
  566. dump_fpu (struct pt_regs *pt, elf_fpregset_t dst)
  567. {
  568. unw_init_running(do_dump_fpu, dst);
  569. return 1; /* f0-f31 are always valid so we always return 1 */
  570. }
  571. long
  572. sys_execve (char __user *filename, char __user * __user *argv, char __user * __user *envp,
  573. struct pt_regs *regs)
  574. {
  575. char *fname;
  576. int error;
  577. fname = getname(filename);
  578. error = PTR_ERR(fname);
  579. if (IS_ERR(fname))
  580. goto out;
  581. error = do_execve(fname, argv, envp, regs);
  582. putname(fname);
  583. out:
  584. return error;
  585. }
  586. pid_t
  587. kernel_thread (int (*fn)(void *), void *arg, unsigned long flags)
  588. {
  589. extern void start_kernel_thread (void);
  590. unsigned long *helper_fptr = (unsigned long *) &start_kernel_thread;
  591. struct {
  592. struct switch_stack sw;
  593. struct pt_regs pt;
  594. } regs;
  595. memset(&regs, 0, sizeof(regs));
  596. regs.pt.cr_iip = helper_fptr[0]; /* set entry point (IP) */
  597. regs.pt.r1 = helper_fptr[1]; /* set GP */
  598. regs.pt.r9 = (unsigned long) fn; /* 1st argument */
  599. regs.pt.r11 = (unsigned long) arg; /* 2nd argument */
  600. /* Preserve PSR bits, except for bits 32-34 and 37-45, which we can't read. */
  601. regs.pt.cr_ipsr = ia64_getreg(_IA64_REG_PSR) | IA64_PSR_BN;
  602. regs.pt.cr_ifs = 1UL << 63; /* mark as valid, empty frame */
  603. regs.sw.ar_fpsr = regs.pt.ar_fpsr = ia64_getreg(_IA64_REG_AR_FPSR);
  604. regs.sw.ar_bspstore = (unsigned long) current + IA64_RBS_OFFSET;
  605. regs.sw.pr = (1 << PRED_KERNEL_STACK);
  606. return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs.pt, 0, NULL, NULL);
  607. }
  608. EXPORT_SYMBOL(kernel_thread);
  609. /* This gets called from kernel_thread() via ia64_invoke_thread_helper(). */
  610. int
  611. kernel_thread_helper (int (*fn)(void *), void *arg)
  612. {
  613. #ifdef CONFIG_IA32_SUPPORT
  614. if (IS_IA32_PROCESS(task_pt_regs(current))) {
  615. /* A kernel thread is always a 64-bit process. */
  616. current->thread.map_base = DEFAULT_MAP_BASE;
  617. current->thread.task_size = DEFAULT_TASK_SIZE;
  618. ia64_set_kr(IA64_KR_IO_BASE, current->thread.old_iob);
  619. ia64_set_kr(IA64_KR_TSSD, current->thread.old_k1);
  620. }
  621. #endif
  622. return (*fn)(arg);
  623. }
  624. /*
  625. * Flush thread state. This is called when a thread does an execve().
  626. */
  627. void
  628. flush_thread (void)
  629. {
  630. /* drop floating-point and debug-register state if it exists: */
  631. current->thread.flags &= ~(IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID);
  632. ia64_drop_fpu(current);
  633. #ifdef CONFIG_IA32_SUPPORT
  634. if (IS_IA32_PROCESS(task_pt_regs(current))) {
  635. ia32_drop_partial_page_list(current);
  636. current->thread.task_size = IA32_PAGE_OFFSET;
  637. set_fs(USER_DS);
  638. }
  639. #endif
  640. }
  641. /*
  642. * Clean up state associated with current thread. This is called when
  643. * the thread calls exit().
  644. */
  645. void
  646. exit_thread (void)
  647. {
  648. ia64_drop_fpu(current);
  649. #ifdef CONFIG_PERFMON
  650. /* if needed, stop monitoring and flush state to perfmon context */
  651. if (current->thread.pfm_context)
  652. pfm_exit_thread(current);
  653. /* free debug register resources */
  654. if (current->thread.flags & IA64_THREAD_DBG_VALID)
  655. pfm_release_debug_registers(current);
  656. #endif
  657. if (IS_IA32_PROCESS(task_pt_regs(current)))
  658. ia32_drop_partial_page_list(current);
  659. }
  660. unsigned long
  661. get_wchan (struct task_struct *p)
  662. {
  663. struct unw_frame_info info;
  664. unsigned long ip;
  665. int count = 0;
  666. /*
  667. * Note: p may not be a blocked task (it could be current or
  668. * another process running on some other CPU. Rather than
  669. * trying to determine if p is really blocked, we just assume
  670. * it's blocked and rely on the unwind routines to fail
  671. * gracefully if the process wasn't really blocked after all.
  672. * --davidm 99/12/15
  673. */
  674. unw_init_from_blocked_task(&info, p);
  675. do {
  676. if (unw_unwind(&info) < 0)
  677. return 0;
  678. unw_get_ip(&info, &ip);
  679. if (!in_sched_functions(ip))
  680. return ip;
  681. } while (count++ < 16);
  682. return 0;
  683. }
  684. void
  685. cpu_halt (void)
  686. {
  687. pal_power_mgmt_info_u_t power_info[8];
  688. unsigned long min_power;
  689. int i, min_power_state;
  690. if (ia64_pal_halt_info(power_info) != 0)
  691. return;
  692. min_power_state = 0;
  693. min_power = power_info[0].pal_power_mgmt_info_s.power_consumption;
  694. for (i = 1; i < 8; ++i)
  695. if (power_info[i].pal_power_mgmt_info_s.im
  696. && power_info[i].pal_power_mgmt_info_s.power_consumption < min_power) {
  697. min_power = power_info[i].pal_power_mgmt_info_s.power_consumption;
  698. min_power_state = i;
  699. }
  700. while (1)
  701. ia64_pal_halt(min_power_state);
  702. }
  703. void
  704. machine_restart (char *restart_cmd)
  705. {
  706. (void) notify_die(DIE_MACHINE_RESTART, restart_cmd, NULL, 0, 0, 0);
  707. (*efi.reset_system)(EFI_RESET_WARM, 0, 0, NULL);
  708. }
  709. void
  710. machine_halt (void)
  711. {
  712. (void) notify_die(DIE_MACHINE_HALT, "", NULL, 0, 0, 0);
  713. cpu_halt();
  714. }
  715. void
  716. machine_power_off (void)
  717. {
  718. if (pm_power_off)
  719. pm_power_off();
  720. machine_halt();
  721. }