cx23885-cards.c 36 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266
  1. /*
  2. * Driver for the Conexant CX23885 PCIe bridge
  3. *
  4. * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/init.h>
  22. #include <linux/module.h>
  23. #include <linux/pci.h>
  24. #include <linux/delay.h>
  25. #include <media/cx25840.h>
  26. #include "cx23885.h"
  27. #include "tuner-xc2028.h"
  28. #include "netup-init.h"
  29. #include "cx23888-ir.h"
  30. static unsigned int enable_885_ir;
  31. module_param(enable_885_ir, int, 0644);
  32. MODULE_PARM_DESC(enable_885_ir,
  33. "Enable integrated IR controller for supported\n"
  34. "\t\t CX2388[57] boards that are wired for it:\n"
  35. "\t\t\tHVR-1250 (reported safe)\n"
  36. "\t\t\tTeVii S470 (reported unsafe)\n"
  37. "\t\t This can cause an interrupt storm with some cards.\n"
  38. "\t\t Default: 0 [Disabled]");
  39. /* ------------------------------------------------------------------ */
  40. /* board config info */
  41. struct cx23885_board cx23885_boards[] = {
  42. [CX23885_BOARD_UNKNOWN] = {
  43. .name = "UNKNOWN/GENERIC",
  44. /* Ensure safe default for unknown boards */
  45. .clk_freq = 0,
  46. .input = {{
  47. .type = CX23885_VMUX_COMPOSITE1,
  48. .vmux = 0,
  49. }, {
  50. .type = CX23885_VMUX_COMPOSITE2,
  51. .vmux = 1,
  52. }, {
  53. .type = CX23885_VMUX_COMPOSITE3,
  54. .vmux = 2,
  55. }, {
  56. .type = CX23885_VMUX_COMPOSITE4,
  57. .vmux = 3,
  58. } },
  59. },
  60. [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
  61. .name = "Hauppauge WinTV-HVR1800lp",
  62. .portc = CX23885_MPEG_DVB,
  63. .input = {{
  64. .type = CX23885_VMUX_TELEVISION,
  65. .vmux = 0,
  66. .gpio0 = 0xff00,
  67. }, {
  68. .type = CX23885_VMUX_DEBUG,
  69. .vmux = 0,
  70. .gpio0 = 0xff01,
  71. }, {
  72. .type = CX23885_VMUX_COMPOSITE1,
  73. .vmux = 1,
  74. .gpio0 = 0xff02,
  75. }, {
  76. .type = CX23885_VMUX_SVIDEO,
  77. .vmux = 2,
  78. .gpio0 = 0xff02,
  79. } },
  80. },
  81. [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
  82. .name = "Hauppauge WinTV-HVR1800",
  83. .porta = CX23885_ANALOG_VIDEO,
  84. .portb = CX23885_MPEG_ENCODER,
  85. .portc = CX23885_MPEG_DVB,
  86. .tuner_type = TUNER_PHILIPS_TDA8290,
  87. .tuner_addr = 0x42, /* 0x84 >> 1 */
  88. .input = {{
  89. .type = CX23885_VMUX_TELEVISION,
  90. .vmux = CX25840_VIN7_CH3 |
  91. CX25840_VIN5_CH2 |
  92. CX25840_VIN2_CH1,
  93. .gpio0 = 0,
  94. }, {
  95. .type = CX23885_VMUX_COMPOSITE1,
  96. .vmux = CX25840_VIN7_CH3 |
  97. CX25840_VIN4_CH2 |
  98. CX25840_VIN6_CH1,
  99. .gpio0 = 0,
  100. }, {
  101. .type = CX23885_VMUX_SVIDEO,
  102. .vmux = CX25840_VIN7_CH3 |
  103. CX25840_VIN4_CH2 |
  104. CX25840_VIN8_CH1 |
  105. CX25840_SVIDEO_ON,
  106. .gpio0 = 0,
  107. } },
  108. },
  109. [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
  110. .name = "Hauppauge WinTV-HVR1250",
  111. .portc = CX23885_MPEG_DVB,
  112. .input = {{
  113. .type = CX23885_VMUX_TELEVISION,
  114. .vmux = 0,
  115. .gpio0 = 0xff00,
  116. }, {
  117. .type = CX23885_VMUX_DEBUG,
  118. .vmux = 0,
  119. .gpio0 = 0xff01,
  120. }, {
  121. .type = CX23885_VMUX_COMPOSITE1,
  122. .vmux = 1,
  123. .gpio0 = 0xff02,
  124. }, {
  125. .type = CX23885_VMUX_SVIDEO,
  126. .vmux = 2,
  127. .gpio0 = 0xff02,
  128. } },
  129. },
  130. [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
  131. .name = "DViCO FusionHDTV5 Express",
  132. .portb = CX23885_MPEG_DVB,
  133. },
  134. [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
  135. .name = "Hauppauge WinTV-HVR1500Q",
  136. .portc = CX23885_MPEG_DVB,
  137. },
  138. [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
  139. .name = "Hauppauge WinTV-HVR1500",
  140. .portc = CX23885_MPEG_DVB,
  141. },
  142. [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
  143. .name = "Hauppauge WinTV-HVR1200",
  144. .portc = CX23885_MPEG_DVB,
  145. },
  146. [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
  147. .name = "Hauppauge WinTV-HVR1700",
  148. .portc = CX23885_MPEG_DVB,
  149. },
  150. [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
  151. .name = "Hauppauge WinTV-HVR1400",
  152. .portc = CX23885_MPEG_DVB,
  153. },
  154. [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
  155. .name = "DViCO FusionHDTV7 Dual Express",
  156. .portb = CX23885_MPEG_DVB,
  157. .portc = CX23885_MPEG_DVB,
  158. },
  159. [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
  160. .name = "DViCO FusionHDTV DVB-T Dual Express",
  161. .portb = CX23885_MPEG_DVB,
  162. .portc = CX23885_MPEG_DVB,
  163. },
  164. [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
  165. .name = "Leadtek Winfast PxDVR3200 H",
  166. .portc = CX23885_MPEG_DVB,
  167. },
  168. [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
  169. .name = "Compro VideoMate E650F",
  170. .portc = CX23885_MPEG_DVB,
  171. },
  172. [CX23885_BOARD_TBS_6920] = {
  173. .name = "TurboSight TBS 6920",
  174. .portb = CX23885_MPEG_DVB,
  175. },
  176. [CX23885_BOARD_TEVII_S470] = {
  177. .name = "TeVii S470",
  178. .portb = CX23885_MPEG_DVB,
  179. },
  180. [CX23885_BOARD_DVBWORLD_2005] = {
  181. .name = "DVBWorld DVB-S2 2005",
  182. .portb = CX23885_MPEG_DVB,
  183. },
  184. [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
  185. .cimax = 1,
  186. .name = "NetUP Dual DVB-S2 CI",
  187. .portb = CX23885_MPEG_DVB,
  188. .portc = CX23885_MPEG_DVB,
  189. },
  190. [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
  191. .name = "Hauppauge WinTV-HVR1270",
  192. .portc = CX23885_MPEG_DVB,
  193. },
  194. [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
  195. .name = "Hauppauge WinTV-HVR1275",
  196. .portc = CX23885_MPEG_DVB,
  197. },
  198. [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
  199. .name = "Hauppauge WinTV-HVR1255",
  200. .portc = CX23885_MPEG_DVB,
  201. },
  202. [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
  203. .name = "Hauppauge WinTV-HVR1210",
  204. .portc = CX23885_MPEG_DVB,
  205. },
  206. [CX23885_BOARD_MYGICA_X8506] = {
  207. .name = "Mygica X8506 DMB-TH",
  208. .tuner_type = TUNER_XC5000,
  209. .tuner_addr = 0x61,
  210. .porta = CX23885_ANALOG_VIDEO,
  211. .portb = CX23885_MPEG_DVB,
  212. .input = {
  213. {
  214. .type = CX23885_VMUX_TELEVISION,
  215. .vmux = CX25840_COMPOSITE2,
  216. },
  217. {
  218. .type = CX23885_VMUX_COMPOSITE1,
  219. .vmux = CX25840_COMPOSITE8,
  220. },
  221. {
  222. .type = CX23885_VMUX_SVIDEO,
  223. .vmux = CX25840_SVIDEO_LUMA3 |
  224. CX25840_SVIDEO_CHROMA4,
  225. },
  226. {
  227. .type = CX23885_VMUX_COMPONENT,
  228. .vmux = CX25840_COMPONENT_ON |
  229. CX25840_VIN1_CH1 |
  230. CX25840_VIN6_CH2 |
  231. CX25840_VIN7_CH3,
  232. },
  233. },
  234. },
  235. [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
  236. .name = "Magic-Pro ProHDTV Extreme 2",
  237. .tuner_type = TUNER_XC5000,
  238. .tuner_addr = 0x61,
  239. .porta = CX23885_ANALOG_VIDEO,
  240. .portb = CX23885_MPEG_DVB,
  241. .input = {
  242. {
  243. .type = CX23885_VMUX_TELEVISION,
  244. .vmux = CX25840_COMPOSITE2,
  245. },
  246. {
  247. .type = CX23885_VMUX_COMPOSITE1,
  248. .vmux = CX25840_COMPOSITE8,
  249. },
  250. {
  251. .type = CX23885_VMUX_SVIDEO,
  252. .vmux = CX25840_SVIDEO_LUMA3 |
  253. CX25840_SVIDEO_CHROMA4,
  254. },
  255. {
  256. .type = CX23885_VMUX_COMPONENT,
  257. .vmux = CX25840_COMPONENT_ON |
  258. CX25840_VIN1_CH1 |
  259. CX25840_VIN6_CH2 |
  260. CX25840_VIN7_CH3,
  261. },
  262. },
  263. },
  264. [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
  265. .name = "Hauppauge WinTV-HVR1850",
  266. .portb = CX23885_MPEG_ENCODER,
  267. .portc = CX23885_MPEG_DVB,
  268. },
  269. [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
  270. .name = "Compro VideoMate E800",
  271. .portc = CX23885_MPEG_DVB,
  272. },
  273. [CX23885_BOARD_HAUPPAUGE_HVR1290] = {
  274. .name = "Hauppauge WinTV-HVR1290",
  275. .portc = CX23885_MPEG_DVB,
  276. },
  277. [CX23885_BOARD_MYGICA_X8558PRO] = {
  278. .name = "Mygica X8558 PRO DMB-TH",
  279. .portb = CX23885_MPEG_DVB,
  280. .portc = CX23885_MPEG_DVB,
  281. },
  282. [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
  283. .name = "LEADTEK WinFast PxTV1200",
  284. .porta = CX23885_ANALOG_VIDEO,
  285. .tuner_type = TUNER_XC2028,
  286. .tuner_addr = 0x61,
  287. .input = {{
  288. .type = CX23885_VMUX_TELEVISION,
  289. .vmux = CX25840_VIN2_CH1 |
  290. CX25840_VIN5_CH2 |
  291. CX25840_NONE0_CH3,
  292. }, {
  293. .type = CX23885_VMUX_COMPOSITE1,
  294. .vmux = CX25840_COMPOSITE1,
  295. }, {
  296. .type = CX23885_VMUX_SVIDEO,
  297. .vmux = CX25840_SVIDEO_LUMA3 |
  298. CX25840_SVIDEO_CHROMA4,
  299. }, {
  300. .type = CX23885_VMUX_COMPONENT,
  301. .vmux = CX25840_VIN7_CH1 |
  302. CX25840_VIN6_CH2 |
  303. CX25840_VIN8_CH3 |
  304. CX25840_COMPONENT_ON,
  305. } },
  306. },
  307. };
  308. const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
  309. /* ------------------------------------------------------------------ */
  310. /* PCI subsystem IDs */
  311. struct cx23885_subid cx23885_subids[] = {
  312. {
  313. .subvendor = 0x0070,
  314. .subdevice = 0x3400,
  315. .card = CX23885_BOARD_UNKNOWN,
  316. }, {
  317. .subvendor = 0x0070,
  318. .subdevice = 0x7600,
  319. .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
  320. }, {
  321. .subvendor = 0x0070,
  322. .subdevice = 0x7800,
  323. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  324. }, {
  325. .subvendor = 0x0070,
  326. .subdevice = 0x7801,
  327. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  328. }, {
  329. .subvendor = 0x0070,
  330. .subdevice = 0x7809,
  331. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  332. }, {
  333. .subvendor = 0x0070,
  334. .subdevice = 0x7911,
  335. .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
  336. }, {
  337. .subvendor = 0x18ac,
  338. .subdevice = 0xd500,
  339. .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
  340. }, {
  341. .subvendor = 0x0070,
  342. .subdevice = 0x7790,
  343. .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
  344. }, {
  345. .subvendor = 0x0070,
  346. .subdevice = 0x7797,
  347. .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
  348. }, {
  349. .subvendor = 0x0070,
  350. .subdevice = 0x7710,
  351. .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
  352. }, {
  353. .subvendor = 0x0070,
  354. .subdevice = 0x7717,
  355. .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
  356. }, {
  357. .subvendor = 0x0070,
  358. .subdevice = 0x71d1,
  359. .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
  360. }, {
  361. .subvendor = 0x0070,
  362. .subdevice = 0x71d3,
  363. .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
  364. }, {
  365. .subvendor = 0x0070,
  366. .subdevice = 0x8101,
  367. .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
  368. }, {
  369. .subvendor = 0x0070,
  370. .subdevice = 0x8010,
  371. .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
  372. }, {
  373. .subvendor = 0x18ac,
  374. .subdevice = 0xd618,
  375. .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
  376. }, {
  377. .subvendor = 0x18ac,
  378. .subdevice = 0xdb78,
  379. .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
  380. }, {
  381. .subvendor = 0x107d,
  382. .subdevice = 0x6681,
  383. .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
  384. }, {
  385. .subvendor = 0x185b,
  386. .subdevice = 0xe800,
  387. .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
  388. }, {
  389. .subvendor = 0x6920,
  390. .subdevice = 0x8888,
  391. .card = CX23885_BOARD_TBS_6920,
  392. }, {
  393. .subvendor = 0xd470,
  394. .subdevice = 0x9022,
  395. .card = CX23885_BOARD_TEVII_S470,
  396. }, {
  397. .subvendor = 0x0001,
  398. .subdevice = 0x2005,
  399. .card = CX23885_BOARD_DVBWORLD_2005,
  400. }, {
  401. .subvendor = 0x1b55,
  402. .subdevice = 0x2a2c,
  403. .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
  404. }, {
  405. .subvendor = 0x0070,
  406. .subdevice = 0x2211,
  407. .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
  408. }, {
  409. .subvendor = 0x0070,
  410. .subdevice = 0x2215,
  411. .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
  412. }, {
  413. .subvendor = 0x0070,
  414. .subdevice = 0x221d,
  415. .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
  416. }, {
  417. .subvendor = 0x0070,
  418. .subdevice = 0x2251,
  419. .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
  420. }, {
  421. .subvendor = 0x0070,
  422. .subdevice = 0x2259,
  423. .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
  424. }, {
  425. .subvendor = 0x0070,
  426. .subdevice = 0x2291,
  427. .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
  428. }, {
  429. .subvendor = 0x0070,
  430. .subdevice = 0x2295,
  431. .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
  432. }, {
  433. .subvendor = 0x0070,
  434. .subdevice = 0x2299,
  435. .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
  436. }, {
  437. .subvendor = 0x0070,
  438. .subdevice = 0x229d,
  439. .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
  440. }, {
  441. .subvendor = 0x0070,
  442. .subdevice = 0x22f0,
  443. .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
  444. }, {
  445. .subvendor = 0x0070,
  446. .subdevice = 0x22f1,
  447. .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
  448. }, {
  449. .subvendor = 0x0070,
  450. .subdevice = 0x22f2,
  451. .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
  452. }, {
  453. .subvendor = 0x0070,
  454. .subdevice = 0x22f3,
  455. .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
  456. }, {
  457. .subvendor = 0x0070,
  458. .subdevice = 0x22f4,
  459. .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
  460. }, {
  461. .subvendor = 0x0070,
  462. .subdevice = 0x22f5,
  463. .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
  464. }, {
  465. .subvendor = 0x14f1,
  466. .subdevice = 0x8651,
  467. .card = CX23885_BOARD_MYGICA_X8506,
  468. }, {
  469. .subvendor = 0x14f1,
  470. .subdevice = 0x8657,
  471. .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
  472. }, {
  473. .subvendor = 0x0070,
  474. .subdevice = 0x8541,
  475. .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
  476. }, {
  477. .subvendor = 0x1858,
  478. .subdevice = 0xe800,
  479. .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
  480. }, {
  481. .subvendor = 0x0070,
  482. .subdevice = 0x8551,
  483. .card = CX23885_BOARD_HAUPPAUGE_HVR1290,
  484. }, {
  485. .subvendor = 0x14f1,
  486. .subdevice = 0x8578,
  487. .card = CX23885_BOARD_MYGICA_X8558PRO,
  488. }, {
  489. .subvendor = 0x107d,
  490. .subdevice = 0x6f22,
  491. .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
  492. },
  493. };
  494. const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
  495. void cx23885_card_list(struct cx23885_dev *dev)
  496. {
  497. int i;
  498. if (0 == dev->pci->subsystem_vendor &&
  499. 0 == dev->pci->subsystem_device) {
  500. printk(KERN_INFO
  501. "%s: Board has no valid PCIe Subsystem ID and can't\n"
  502. "%s: be autodetected. Pass card=<n> insmod option\n"
  503. "%s: to workaround that. Redirect complaints to the\n"
  504. "%s: vendor of the TV card. Best regards,\n"
  505. "%s: -- tux\n",
  506. dev->name, dev->name, dev->name, dev->name, dev->name);
  507. } else {
  508. printk(KERN_INFO
  509. "%s: Your board isn't known (yet) to the driver.\n"
  510. "%s: Try to pick one of the existing card configs via\n"
  511. "%s: card=<n> insmod option. Updating to the latest\n"
  512. "%s: version might help as well.\n",
  513. dev->name, dev->name, dev->name, dev->name);
  514. }
  515. printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
  516. dev->name);
  517. for (i = 0; i < cx23885_bcount; i++)
  518. printk(KERN_INFO "%s: card=%d -> %s\n",
  519. dev->name, i, cx23885_boards[i].name);
  520. }
  521. static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
  522. {
  523. struct tveeprom tv;
  524. tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
  525. eeprom_data);
  526. /* Make sure we support the board model */
  527. switch (tv.model) {
  528. case 22001:
  529. /* WinTV-HVR1270 (PCIe, Retail, half height)
  530. * ATSC/QAM and basic analog, IR Blast */
  531. case 22009:
  532. /* WinTV-HVR1210 (PCIe, Retail, half height)
  533. * DVB-T and basic analog, IR Blast */
  534. case 22011:
  535. /* WinTV-HVR1270 (PCIe, Retail, half height)
  536. * ATSC/QAM and basic analog, IR Recv */
  537. case 22019:
  538. /* WinTV-HVR1210 (PCIe, Retail, half height)
  539. * DVB-T and basic analog, IR Recv */
  540. case 22021:
  541. /* WinTV-HVR1275 (PCIe, Retail, half height)
  542. * ATSC/QAM and basic analog, IR Recv */
  543. case 22029:
  544. /* WinTV-HVR1210 (PCIe, Retail, half height)
  545. * DVB-T and basic analog, IR Recv */
  546. case 22101:
  547. /* WinTV-HVR1270 (PCIe, Retail, full height)
  548. * ATSC/QAM and basic analog, IR Blast */
  549. case 22109:
  550. /* WinTV-HVR1210 (PCIe, Retail, full height)
  551. * DVB-T and basic analog, IR Blast */
  552. case 22111:
  553. /* WinTV-HVR1270 (PCIe, Retail, full height)
  554. * ATSC/QAM and basic analog, IR Recv */
  555. case 22119:
  556. /* WinTV-HVR1210 (PCIe, Retail, full height)
  557. * DVB-T and basic analog, IR Recv */
  558. case 22121:
  559. /* WinTV-HVR1275 (PCIe, Retail, full height)
  560. * ATSC/QAM and basic analog, IR Recv */
  561. case 22129:
  562. /* WinTV-HVR1210 (PCIe, Retail, full height)
  563. * DVB-T and basic analog, IR Recv */
  564. case 71009:
  565. /* WinTV-HVR1200 (PCIe, Retail, full height)
  566. * DVB-T and basic analog */
  567. case 71359:
  568. /* WinTV-HVR1200 (PCIe, OEM, half height)
  569. * DVB-T and basic analog */
  570. case 71439:
  571. /* WinTV-HVR1200 (PCIe, OEM, half height)
  572. * DVB-T and basic analog */
  573. case 71449:
  574. /* WinTV-HVR1200 (PCIe, OEM, full height)
  575. * DVB-T and basic analog */
  576. case 71939:
  577. /* WinTV-HVR1200 (PCIe, OEM, half height)
  578. * DVB-T and basic analog */
  579. case 71949:
  580. /* WinTV-HVR1200 (PCIe, OEM, full height)
  581. * DVB-T and basic analog */
  582. case 71959:
  583. /* WinTV-HVR1200 (PCIe, OEM, full height)
  584. * DVB-T and basic analog */
  585. case 71979:
  586. /* WinTV-HVR1200 (PCIe, OEM, half height)
  587. * DVB-T and basic analog */
  588. case 71999:
  589. /* WinTV-HVR1200 (PCIe, OEM, full height)
  590. * DVB-T and basic analog */
  591. case 76601:
  592. /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
  593. channel ATSC and MPEG2 HW Encoder */
  594. case 77001:
  595. /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
  596. and Basic analog */
  597. case 77011:
  598. /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
  599. and Basic analog */
  600. case 77041:
  601. /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
  602. and Basic analog */
  603. case 77051:
  604. /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
  605. and Basic analog */
  606. case 78011:
  607. /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
  608. Dual channel ATSC and MPEG2 HW Encoder */
  609. case 78501:
  610. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
  611. Dual channel ATSC and MPEG2 HW Encoder */
  612. case 78521:
  613. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
  614. Dual channel ATSC and MPEG2 HW Encoder */
  615. case 78531:
  616. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
  617. Dual channel ATSC and MPEG2 HW Encoder */
  618. case 78631:
  619. /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
  620. Dual channel ATSC and MPEG2 HW Encoder */
  621. case 79001:
  622. /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
  623. ATSC and Basic analog */
  624. case 79101:
  625. /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
  626. ATSC and Basic analog */
  627. case 79501:
  628. /* WinTV-HVR1250 (PCIe, No IR, half height,
  629. ATSC [at least] and Basic analog) */
  630. case 79561:
  631. /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
  632. ATSC and Basic analog */
  633. case 79571:
  634. /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
  635. ATSC and Basic analog */
  636. case 79671:
  637. /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
  638. ATSC and Basic analog */
  639. case 80019:
  640. /* WinTV-HVR1400 (Express Card, Retail, IR,
  641. * DVB-T and Basic analog */
  642. case 81509:
  643. /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
  644. * DVB-T and MPEG2 HW Encoder */
  645. case 81519:
  646. /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
  647. * DVB-T and MPEG2 HW Encoder */
  648. break;
  649. case 85021:
  650. /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
  651. Dual channel ATSC and MPEG2 HW Encoder */
  652. break;
  653. case 85721:
  654. /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
  655. Dual channel ATSC and Basic analog */
  656. break;
  657. default:
  658. printk(KERN_WARNING "%s: warning: "
  659. "unknown hauppauge model #%d\n",
  660. dev->name, tv.model);
  661. break;
  662. }
  663. printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
  664. dev->name, tv.model);
  665. }
  666. int cx23885_tuner_callback(void *priv, int component, int command, int arg)
  667. {
  668. struct cx23885_tsport *port = priv;
  669. struct cx23885_dev *dev = port->dev;
  670. u32 bitmask = 0;
  671. if (command == XC2028_RESET_CLK)
  672. return 0;
  673. if (command != 0) {
  674. printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
  675. __func__, command);
  676. return -EINVAL;
  677. }
  678. switch (dev->board) {
  679. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  680. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  681. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  682. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  683. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  684. case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
  685. case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
  686. /* Tuner Reset Command */
  687. bitmask = 0x04;
  688. break;
  689. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  690. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  691. /* Two identical tuners on two different i2c buses,
  692. * we need to reset the correct gpio. */
  693. if (port->nr == 1)
  694. bitmask = 0x01;
  695. else if (port->nr == 2)
  696. bitmask = 0x04;
  697. break;
  698. }
  699. if (bitmask) {
  700. /* Drive the tuner into reset and back out */
  701. cx_clear(GP0_IO, bitmask);
  702. mdelay(200);
  703. cx_set(GP0_IO, bitmask);
  704. }
  705. return 0;
  706. }
  707. void cx23885_gpio_setup(struct cx23885_dev *dev)
  708. {
  709. switch (dev->board) {
  710. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  711. /* GPIO-0 cx24227 demodulator reset */
  712. cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
  713. break;
  714. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  715. /* GPIO-0 cx24227 demodulator */
  716. /* GPIO-2 xc3028 tuner */
  717. /* Put the parts into reset */
  718. cx_set(GP0_IO, 0x00050000);
  719. cx_clear(GP0_IO, 0x00000005);
  720. msleep(5);
  721. /* Bring the parts out of reset */
  722. cx_set(GP0_IO, 0x00050005);
  723. break;
  724. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  725. /* GPIO-0 cx24227 demodulator reset */
  726. /* GPIO-2 xc5000 tuner reset */
  727. cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
  728. break;
  729. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  730. /* GPIO-0 656_CLK */
  731. /* GPIO-1 656_D0 */
  732. /* GPIO-2 8295A Reset */
  733. /* GPIO-3-10 cx23417 data0-7 */
  734. /* GPIO-11-14 cx23417 addr0-3 */
  735. /* GPIO-15-18 cx23417 READY, CS, RD, WR */
  736. /* GPIO-19 IR_RX */
  737. /* CX23417 GPIO's */
  738. /* EIO15 Zilog Reset */
  739. /* EIO14 S5H1409/CX24227 Reset */
  740. mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
  741. /* Put the demod into reset and protect the eeprom */
  742. mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
  743. mdelay(100);
  744. /* Bring the demod and blaster out of reset */
  745. mc417_gpio_set(dev, GPIO_15 | GPIO_14);
  746. mdelay(100);
  747. /* Force the TDA8295A into reset and back */
  748. cx23885_gpio_enable(dev, GPIO_2, 1);
  749. cx23885_gpio_set(dev, GPIO_2);
  750. mdelay(20);
  751. cx23885_gpio_clear(dev, GPIO_2);
  752. mdelay(20);
  753. cx23885_gpio_set(dev, GPIO_2);
  754. mdelay(20);
  755. break;
  756. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  757. /* GPIO-0 tda10048 demodulator reset */
  758. /* GPIO-2 tda18271 tuner reset */
  759. /* Put the parts into reset and back */
  760. cx_set(GP0_IO, 0x00050000);
  761. mdelay(20);
  762. cx_clear(GP0_IO, 0x00000005);
  763. mdelay(20);
  764. cx_set(GP0_IO, 0x00050005);
  765. break;
  766. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  767. /* GPIO-0 TDA10048 demodulator reset */
  768. /* GPIO-2 TDA8295A Reset */
  769. /* GPIO-3-10 cx23417 data0-7 */
  770. /* GPIO-11-14 cx23417 addr0-3 */
  771. /* GPIO-15-18 cx23417 READY, CS, RD, WR */
  772. /* The following GPIO's are on the interna AVCore (cx25840) */
  773. /* GPIO-19 IR_RX */
  774. /* GPIO-20 IR_TX 416/DVBT Select */
  775. /* GPIO-21 IIS DAT */
  776. /* GPIO-22 IIS WCLK */
  777. /* GPIO-23 IIS BCLK */
  778. /* Put the parts into reset and back */
  779. cx_set(GP0_IO, 0x00050000);
  780. mdelay(20);
  781. cx_clear(GP0_IO, 0x00000005);
  782. mdelay(20);
  783. cx_set(GP0_IO, 0x00050005);
  784. break;
  785. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  786. /* GPIO-0 Dibcom7000p demodulator reset */
  787. /* GPIO-2 xc3028L tuner reset */
  788. /* GPIO-13 LED */
  789. /* Put the parts into reset and back */
  790. cx_set(GP0_IO, 0x00050000);
  791. mdelay(20);
  792. cx_clear(GP0_IO, 0x00000005);
  793. mdelay(20);
  794. cx_set(GP0_IO, 0x00050005);
  795. break;
  796. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  797. /* GPIO-0 xc5000 tuner reset i2c bus 0 */
  798. /* GPIO-1 s5h1409 demod reset i2c bus 0 */
  799. /* GPIO-2 xc5000 tuner reset i2c bus 1 */
  800. /* GPIO-3 s5h1409 demod reset i2c bus 0 */
  801. /* Put the parts into reset and back */
  802. cx_set(GP0_IO, 0x000f0000);
  803. mdelay(20);
  804. cx_clear(GP0_IO, 0x0000000f);
  805. mdelay(20);
  806. cx_set(GP0_IO, 0x000f000f);
  807. break;
  808. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  809. /* GPIO-0 portb xc3028 reset */
  810. /* GPIO-1 portb zl10353 reset */
  811. /* GPIO-2 portc xc3028 reset */
  812. /* GPIO-3 portc zl10353 reset */
  813. /* Put the parts into reset and back */
  814. cx_set(GP0_IO, 0x000f0000);
  815. mdelay(20);
  816. cx_clear(GP0_IO, 0x0000000f);
  817. mdelay(20);
  818. cx_set(GP0_IO, 0x000f000f);
  819. break;
  820. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  821. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  822. case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
  823. case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
  824. /* GPIO-2 xc3028 tuner reset */
  825. /* The following GPIO's are on the internal AVCore (cx25840) */
  826. /* GPIO-? zl10353 demod reset */
  827. /* Put the parts into reset and back */
  828. cx_set(GP0_IO, 0x00040000);
  829. mdelay(20);
  830. cx_clear(GP0_IO, 0x00000004);
  831. mdelay(20);
  832. cx_set(GP0_IO, 0x00040004);
  833. break;
  834. case CX23885_BOARD_TBS_6920:
  835. cx_write(MC417_CTL, 0x00000036);
  836. cx_write(MC417_OEN, 0x00001000);
  837. cx_set(MC417_RWD, 0x00000002);
  838. mdelay(200);
  839. cx_clear(MC417_RWD, 0x00000800);
  840. mdelay(200);
  841. cx_set(MC417_RWD, 0x00000800);
  842. mdelay(200);
  843. break;
  844. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  845. /* GPIO-0 INTA from CiMax1
  846. GPIO-1 INTB from CiMax2
  847. GPIO-2 reset chips
  848. GPIO-3 to GPIO-10 data/addr for CA
  849. GPIO-11 ~CS0 to CiMax1
  850. GPIO-12 ~CS1 to CiMax2
  851. GPIO-13 ADL0 load LSB addr
  852. GPIO-14 ADL1 load MSB addr
  853. GPIO-15 ~RDY from CiMax
  854. GPIO-17 ~RD to CiMax
  855. GPIO-18 ~WR to CiMax
  856. */
  857. cx_set(GP0_IO, 0x00040000); /* GPIO as out */
  858. /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
  859. cx_clear(GP0_IO, 0x00030004);
  860. mdelay(100);/* reset delay */
  861. cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
  862. cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
  863. /* GPIO-15 IN as ~ACK, rest as OUT */
  864. cx_write(MC417_OEN, 0x00001000);
  865. /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
  866. cx_write(MC417_RWD, 0x0000c300);
  867. /* enable irq */
  868. cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
  869. break;
  870. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  871. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  872. case CX23885_BOARD_HAUPPAUGE_HVR1255:
  873. case CX23885_BOARD_HAUPPAUGE_HVR1210:
  874. /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
  875. /* GPIO-6 I2C Gate which can isolate the demod from the bus */
  876. /* GPIO-9 Demod reset */
  877. /* Put the parts into reset and back */
  878. cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
  879. cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
  880. cx23885_gpio_clear(dev, GPIO_9);
  881. mdelay(20);
  882. cx23885_gpio_set(dev, GPIO_9);
  883. break;
  884. case CX23885_BOARD_MYGICA_X8506:
  885. case CX23885_BOARD_MAGICPRO_PROHDTVE2:
  886. /* GPIO-0 (0)Analog / (1)Digital TV */
  887. /* GPIO-1 reset XC5000 */
  888. /* GPIO-2 reset LGS8GL5 / LGS8G75 */
  889. cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
  890. cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
  891. mdelay(100);
  892. cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
  893. mdelay(100);
  894. break;
  895. case CX23885_BOARD_MYGICA_X8558PRO:
  896. /* GPIO-0 reset first ATBM8830 */
  897. /* GPIO-1 reset second ATBM8830 */
  898. cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
  899. cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
  900. mdelay(100);
  901. cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
  902. mdelay(100);
  903. break;
  904. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  905. case CX23885_BOARD_HAUPPAUGE_HVR1290:
  906. /* GPIO-0 656_CLK */
  907. /* GPIO-1 656_D0 */
  908. /* GPIO-2 Wake# */
  909. /* GPIO-3-10 cx23417 data0-7 */
  910. /* GPIO-11-14 cx23417 addr0-3 */
  911. /* GPIO-15-18 cx23417 READY, CS, RD, WR */
  912. /* GPIO-19 IR_RX */
  913. /* GPIO-20 C_IR_TX */
  914. /* GPIO-21 I2S DAT */
  915. /* GPIO-22 I2S WCLK */
  916. /* GPIO-23 I2S BCLK */
  917. /* ALT GPIO: EXP GPIO LATCH */
  918. /* CX23417 GPIO's */
  919. /* GPIO-14 S5H1411/CX24228 Reset */
  920. /* GPIO-13 EEPROM write protect */
  921. mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
  922. /* Put the demod into reset and protect the eeprom */
  923. mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
  924. mdelay(100);
  925. /* Bring the demod out of reset */
  926. mc417_gpio_set(dev, GPIO_14);
  927. mdelay(100);
  928. /* CX24228 GPIO */
  929. /* Connected to IF / Mux */
  930. break;
  931. }
  932. }
  933. int cx23885_ir_init(struct cx23885_dev *dev)
  934. {
  935. static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
  936. {
  937. .flags = V4L2_SUBDEV_IO_PIN_INPUT,
  938. .pin = CX23885_PIN_IR_RX_GPIO19,
  939. .function = CX23885_PAD_IR_RX,
  940. .value = 0,
  941. .strength = CX25840_PIN_DRIVE_MEDIUM,
  942. }, {
  943. .flags = V4L2_SUBDEV_IO_PIN_OUTPUT,
  944. .pin = CX23885_PIN_IR_TX_GPIO20,
  945. .function = CX23885_PAD_IR_TX,
  946. .value = 0,
  947. .strength = CX25840_PIN_DRIVE_MEDIUM,
  948. }
  949. };
  950. const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg);
  951. static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = {
  952. {
  953. .flags = V4L2_SUBDEV_IO_PIN_INPUT,
  954. .pin = CX23885_PIN_IR_RX_GPIO19,
  955. .function = CX23885_PAD_IR_RX,
  956. .value = 0,
  957. .strength = CX25840_PIN_DRIVE_MEDIUM,
  958. }
  959. };
  960. const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg);
  961. struct v4l2_subdev_ir_parameters params;
  962. int ret = 0;
  963. switch (dev->board) {
  964. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  965. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  966. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  967. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  968. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  969. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  970. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  971. case CX23885_BOARD_HAUPPAUGE_HVR1255:
  972. case CX23885_BOARD_HAUPPAUGE_HVR1210:
  973. /* FIXME: Implement me */
  974. break;
  975. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  976. case CX23885_BOARD_HAUPPAUGE_HVR1290:
  977. ret = cx23888_ir_probe(dev);
  978. if (ret)
  979. break;
  980. dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
  981. v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
  982. ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
  983. /*
  984. * For these boards we need to invert the Tx output via the
  985. * IR controller to have the LED off while idle
  986. */
  987. v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, &params);
  988. params.enable = false;
  989. params.shutdown = false;
  990. params.invert_level = true;
  991. v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
  992. params.shutdown = true;
  993. v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
  994. break;
  995. case CX23885_BOARD_TEVII_S470:
  996. if (!enable_885_ir)
  997. break;
  998. dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
  999. if (dev->sd_ir == NULL) {
  1000. ret = -ENODEV;
  1001. break;
  1002. }
  1003. v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
  1004. ir_rx_pin_cfg_count, ir_rx_pin_cfg);
  1005. break;
  1006. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  1007. if (!enable_885_ir)
  1008. break;
  1009. dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
  1010. if (dev->sd_ir == NULL) {
  1011. ret = -ENODEV;
  1012. break;
  1013. }
  1014. v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
  1015. ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
  1016. break;
  1017. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  1018. request_module("ir-kbd-i2c");
  1019. break;
  1020. }
  1021. return ret;
  1022. }
  1023. void cx23885_ir_fini(struct cx23885_dev *dev)
  1024. {
  1025. switch (dev->board) {
  1026. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  1027. case CX23885_BOARD_HAUPPAUGE_HVR1290:
  1028. cx23885_irq_remove(dev, PCI_MSK_IR);
  1029. cx23888_ir_remove(dev);
  1030. dev->sd_ir = NULL;
  1031. break;
  1032. case CX23885_BOARD_TEVII_S470:
  1033. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  1034. cx23885_irq_remove(dev, PCI_MSK_AV_CORE);
  1035. /* sd_ir is a duplicate pointer to the AV Core, just clear it */
  1036. dev->sd_ir = NULL;
  1037. break;
  1038. }
  1039. }
  1040. void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
  1041. {
  1042. switch (dev->board) {
  1043. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  1044. case CX23885_BOARD_HAUPPAUGE_HVR1290:
  1045. if (dev->sd_ir)
  1046. cx23885_irq_add_enable(dev, PCI_MSK_IR);
  1047. break;
  1048. case CX23885_BOARD_TEVII_S470:
  1049. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  1050. if (dev->sd_ir)
  1051. cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE);
  1052. break;
  1053. }
  1054. }
  1055. void cx23885_card_setup(struct cx23885_dev *dev)
  1056. {
  1057. struct cx23885_tsport *ts1 = &dev->ts1;
  1058. struct cx23885_tsport *ts2 = &dev->ts2;
  1059. static u8 eeprom[256];
  1060. if (dev->i2c_bus[0].i2c_rc == 0) {
  1061. dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
  1062. tveeprom_read(&dev->i2c_bus[0].i2c_client,
  1063. eeprom, sizeof(eeprom));
  1064. }
  1065. switch (dev->board) {
  1066. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  1067. if (dev->i2c_bus[0].i2c_rc == 0) {
  1068. if (eeprom[0x80] != 0x84)
  1069. hauppauge_eeprom(dev, eeprom+0xc0);
  1070. else
  1071. hauppauge_eeprom(dev, eeprom+0x80);
  1072. }
  1073. break;
  1074. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  1075. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  1076. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  1077. if (dev->i2c_bus[0].i2c_rc == 0)
  1078. hauppauge_eeprom(dev, eeprom+0x80);
  1079. break;
  1080. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  1081. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  1082. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  1083. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  1084. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  1085. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  1086. case CX23885_BOARD_HAUPPAUGE_HVR1255:
  1087. case CX23885_BOARD_HAUPPAUGE_HVR1210:
  1088. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  1089. case CX23885_BOARD_HAUPPAUGE_HVR1290:
  1090. if (dev->i2c_bus[0].i2c_rc == 0)
  1091. hauppauge_eeprom(dev, eeprom+0xc0);
  1092. break;
  1093. }
  1094. switch (dev->board) {
  1095. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  1096. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  1097. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  1098. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  1099. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  1100. /* break omitted intentionally */
  1101. case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
  1102. ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  1103. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  1104. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  1105. break;
  1106. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  1107. /* Defaults for VID B - Analog encoder */
  1108. /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
  1109. ts1->gen_ctrl_val = 0x10e;
  1110. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  1111. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  1112. /* APB_TSVALERR_POL (active low)*/
  1113. ts1->vld_misc_val = 0x2000;
  1114. ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
  1115. /* Defaults for VID C */
  1116. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  1117. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  1118. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  1119. break;
  1120. case CX23885_BOARD_TBS_6920:
  1121. ts1->gen_ctrl_val = 0x4; /* Parallel */
  1122. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  1123. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  1124. break;
  1125. case CX23885_BOARD_TEVII_S470:
  1126. case CX23885_BOARD_DVBWORLD_2005:
  1127. ts1->gen_ctrl_val = 0x5; /* Parallel */
  1128. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  1129. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  1130. break;
  1131. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  1132. ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  1133. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  1134. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  1135. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  1136. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  1137. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  1138. break;
  1139. case CX23885_BOARD_MYGICA_X8506:
  1140. case CX23885_BOARD_MAGICPRO_PROHDTVE2:
  1141. ts1->gen_ctrl_val = 0x5; /* Parallel */
  1142. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  1143. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  1144. break;
  1145. case CX23885_BOARD_MYGICA_X8558PRO:
  1146. ts1->gen_ctrl_val = 0x5; /* Parallel */
  1147. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  1148. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  1149. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  1150. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  1151. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  1152. break;
  1153. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  1154. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  1155. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  1156. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  1157. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  1158. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  1159. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  1160. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  1161. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  1162. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  1163. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  1164. case CX23885_BOARD_HAUPPAUGE_HVR1255:
  1165. case CX23885_BOARD_HAUPPAUGE_HVR1210:
  1166. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  1167. case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
  1168. case CX23885_BOARD_HAUPPAUGE_HVR1290:
  1169. default:
  1170. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  1171. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  1172. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  1173. }
  1174. /* Certain boards support analog, or require the avcore to be
  1175. * loaded, ensure this happens.
  1176. */
  1177. switch (dev->board) {
  1178. case CX23885_BOARD_TEVII_S470:
  1179. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  1180. /* Currently only enabled for the integrated IR controller */
  1181. if (!enable_885_ir)
  1182. break;
  1183. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  1184. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  1185. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  1186. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  1187. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  1188. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  1189. case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
  1190. case CX23885_BOARD_HAUPPAUGE_HVR1850:
  1191. case CX23885_BOARD_MYGICA_X8506:
  1192. case CX23885_BOARD_MAGICPRO_PROHDTVE2:
  1193. case CX23885_BOARD_HAUPPAUGE_HVR1290:
  1194. case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
  1195. dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
  1196. &dev->i2c_bus[2].i2c_adap,
  1197. "cx25840", "cx25840", 0x88 >> 1, NULL);
  1198. if (dev->sd_cx25840) {
  1199. dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
  1200. v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
  1201. }
  1202. break;
  1203. }
  1204. /* AUX-PLL 27MHz CLK */
  1205. switch (dev->board) {
  1206. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  1207. netup_initialize(dev);
  1208. break;
  1209. }
  1210. }
  1211. /* ------------------------------------------------------------------ */