core.h 25 KB

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  1. /*
  2. * Copyright (c) 2010-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #ifndef CORE_H
  18. #define CORE_H
  19. #include <linux/etherdevice.h>
  20. #include <linux/rtnetlink.h>
  21. #include <linux/firmware.h>
  22. #include <linux/sched.h>
  23. #include <linux/circ_buf.h>
  24. #include <net/cfg80211.h>
  25. #include "htc.h"
  26. #include "wmi.h"
  27. #include "bmi.h"
  28. #include "target.h"
  29. #define MAX_ATH6KL 1
  30. #define ATH6KL_MAX_RX_BUFFERS 16
  31. #define ATH6KL_BUFFER_SIZE 1664
  32. #define ATH6KL_MAX_AMSDU_RX_BUFFERS 4
  33. #define ATH6KL_AMSDU_REFILL_THRESHOLD 3
  34. #define ATH6KL_AMSDU_BUFFER_SIZE (WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH + 128)
  35. #define MAX_MSDU_SUBFRAME_PAYLOAD_LEN 1508
  36. #define MIN_MSDU_SUBFRAME_PAYLOAD_LEN 46
  37. #define USER_SAVEDKEYS_STAT_INIT 0
  38. #define USER_SAVEDKEYS_STAT_RUN 1
  39. #define ATH6KL_TX_TIMEOUT 10
  40. #define ATH6KL_MAX_ENDPOINTS 4
  41. #define MAX_NODE_NUM 15
  42. #define ATH6KL_APSD_ALL_FRAME 0xFFFF
  43. #define ATH6KL_APSD_NUM_OF_AC 0x4
  44. #define ATH6KL_APSD_FRAME_MASK 0xF
  45. /* Extra bytes for htc header alignment */
  46. #define ATH6KL_HTC_ALIGN_BYTES 3
  47. /* MAX_HI_COOKIE_NUM are reserved for high priority traffic */
  48. #define MAX_DEF_COOKIE_NUM 180
  49. #define MAX_HI_COOKIE_NUM 18 /* 10% of MAX_COOKIE_NUM */
  50. #define MAX_COOKIE_NUM (MAX_DEF_COOKIE_NUM + MAX_HI_COOKIE_NUM)
  51. #define MAX_DEFAULT_SEND_QUEUE_DEPTH (MAX_DEF_COOKIE_NUM / WMM_NUM_AC)
  52. #define DISCON_TIMER_INTVAL 10000 /* in msec */
  53. /* Channel dwell time in fg scan */
  54. #define ATH6KL_FG_SCAN_INTERVAL 50 /* in ms */
  55. /* includes also the null byte */
  56. #define ATH6KL_FIRMWARE_MAGIC "QCA-ATH6KL"
  57. enum ath6kl_fw_ie_type {
  58. ATH6KL_FW_IE_FW_VERSION = 0,
  59. ATH6KL_FW_IE_TIMESTAMP = 1,
  60. ATH6KL_FW_IE_OTP_IMAGE = 2,
  61. ATH6KL_FW_IE_FW_IMAGE = 3,
  62. ATH6KL_FW_IE_PATCH_IMAGE = 4,
  63. ATH6KL_FW_IE_RESERVED_RAM_SIZE = 5,
  64. ATH6KL_FW_IE_CAPABILITIES = 6,
  65. ATH6KL_FW_IE_PATCH_ADDR = 7,
  66. ATH6KL_FW_IE_BOARD_ADDR = 8,
  67. ATH6KL_FW_IE_VIF_MAX = 9,
  68. };
  69. enum ath6kl_fw_capability {
  70. ATH6KL_FW_CAPABILITY_HOST_P2P = 0,
  71. ATH6KL_FW_CAPABILITY_SCHED_SCAN = 1,
  72. /*
  73. * Firmware is capable of supporting P2P mgmt operations on a
  74. * station interface. After group formation, the station
  75. * interface will become a P2P client/GO interface as the case may be
  76. */
  77. ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX,
  78. /*
  79. * Firmware has support to cleanup inactive stations
  80. * in AP mode.
  81. */
  82. ATH6KL_FW_CAPABILITY_INACTIVITY_TIMEOUT,
  83. /* Firmware has support to override rsn cap of rsn ie */
  84. ATH6KL_FW_CAPABILITY_RSN_CAP_OVERRIDE,
  85. /*
  86. * Multicast support in WOW and host awake mode.
  87. * Allow all multicast in host awake mode.
  88. * Apply multicast filter in WOW mode.
  89. */
  90. ATH6KL_FW_CAPABILITY_WOW_MULTICAST_FILTER,
  91. /* Firmware supports enhanced bmiss detection */
  92. ATH6KL_FW_CAPABILITY_BMISS_ENHANCE,
  93. /*
  94. * FW supports matching of ssid in schedule scan
  95. */
  96. ATH6KL_FW_CAPABILITY_SCHED_SCAN_MATCH_LIST,
  97. /* Firmware supports filtering BSS results by RSSI */
  98. ATH6KL_FW_CAPABILITY_RSSI_SCAN_THOLD,
  99. /* FW sets mac_addr[4] ^= 0x80 for newly created interfaces */
  100. ATH6KL_FW_CAPABILITY_CUSTOM_MAC_ADDR,
  101. /* Firmware supports TX error rate notification */
  102. ATH6KL_FW_CAPABILITY_TX_ERR_NOTIFY,
  103. /* supports WMI_SET_REGDOMAIN_CMDID command */
  104. ATH6KL_FW_CAPABILITY_REGDOMAIN,
  105. /* Firmware supports sched scan decoupled from host sleep */
  106. ATH6KL_FW_CAPABILITY_SCHED_SCAN_V2,
  107. /*
  108. * Firmware capability for hang detection through heart beat
  109. * challenge messages.
  110. */
  111. ATH6KL_FW_CAPABILITY_HEART_BEAT_POLL,
  112. /* this needs to be last */
  113. ATH6KL_FW_CAPABILITY_MAX,
  114. };
  115. #define ATH6KL_CAPABILITY_LEN (ALIGN(ATH6KL_FW_CAPABILITY_MAX, 32) / 32)
  116. struct ath6kl_fw_ie {
  117. __le32 id;
  118. __le32 len;
  119. u8 data[0];
  120. };
  121. enum ath6kl_hw_flags {
  122. ATH6KL_HW_64BIT_RATES = BIT(0),
  123. ATH6KL_HW_AP_INACTIVITY_MINS = BIT(1),
  124. };
  125. #define ATH6KL_FW_API2_FILE "fw-2.bin"
  126. #define ATH6KL_FW_API3_FILE "fw-3.bin"
  127. #define ATH6KL_FW_API4_FILE "fw-4.bin"
  128. /* AR6003 1.0 definitions */
  129. #define AR6003_HW_1_0_VERSION 0x300002ba
  130. /* AR6003 2.0 definitions */
  131. #define AR6003_HW_2_0_VERSION 0x30000384
  132. #define AR6003_HW_2_0_PATCH_DOWNLOAD_ADDRESS 0x57e910
  133. #define AR6003_HW_2_0_FW_DIR "ath6k/AR6003/hw2.0"
  134. #define AR6003_HW_2_0_OTP_FILE "otp.bin.z77"
  135. #define AR6003_HW_2_0_FIRMWARE_FILE "athwlan.bin.z77"
  136. #define AR6003_HW_2_0_TCMD_FIRMWARE_FILE "athtcmd_ram.bin"
  137. #define AR6003_HW_2_0_PATCH_FILE "data.patch.bin"
  138. #define AR6003_HW_2_0_BOARD_DATA_FILE AR6003_HW_2_0_FW_DIR "/bdata.bin"
  139. #define AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE \
  140. AR6003_HW_2_0_FW_DIR "/bdata.SD31.bin"
  141. /* AR6003 3.0 definitions */
  142. #define AR6003_HW_2_1_1_VERSION 0x30000582
  143. #define AR6003_HW_2_1_1_FW_DIR "ath6k/AR6003/hw2.1.1"
  144. #define AR6003_HW_2_1_1_OTP_FILE "otp.bin"
  145. #define AR6003_HW_2_1_1_FIRMWARE_FILE "athwlan.bin"
  146. #define AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE "athtcmd_ram.bin"
  147. #define AR6003_HW_2_1_1_UTF_FIRMWARE_FILE "utf.bin"
  148. #define AR6003_HW_2_1_1_TESTSCRIPT_FILE "nullTestFlow.bin"
  149. #define AR6003_HW_2_1_1_PATCH_FILE "data.patch.bin"
  150. #define AR6003_HW_2_1_1_BOARD_DATA_FILE AR6003_HW_2_1_1_FW_DIR "/bdata.bin"
  151. #define AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE \
  152. AR6003_HW_2_1_1_FW_DIR "/bdata.SD31.bin"
  153. /* AR6004 1.0 definitions */
  154. #define AR6004_HW_1_0_VERSION 0x30000623
  155. #define AR6004_HW_1_0_FW_DIR "ath6k/AR6004/hw1.0"
  156. #define AR6004_HW_1_0_FIRMWARE_FILE "fw.ram.bin"
  157. #define AR6004_HW_1_0_BOARD_DATA_FILE AR6004_HW_1_0_FW_DIR "/bdata.bin"
  158. #define AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE \
  159. AR6004_HW_1_0_FW_DIR "/bdata.DB132.bin"
  160. /* AR6004 1.1 definitions */
  161. #define AR6004_HW_1_1_VERSION 0x30000001
  162. #define AR6004_HW_1_1_FW_DIR "ath6k/AR6004/hw1.1"
  163. #define AR6004_HW_1_1_FIRMWARE_FILE "fw.ram.bin"
  164. #define AR6004_HW_1_1_BOARD_DATA_FILE AR6004_HW_1_1_FW_DIR "/bdata.bin"
  165. #define AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE \
  166. AR6004_HW_1_1_FW_DIR "/bdata.DB132.bin"
  167. /* AR6004 1.2 definitions */
  168. #define AR6004_HW_1_2_VERSION 0x300007e8
  169. #define AR6004_HW_1_2_FW_DIR "ath6k/AR6004/hw1.2"
  170. #define AR6004_HW_1_2_FIRMWARE_FILE "fw.ram.bin"
  171. #define AR6004_HW_1_2_BOARD_DATA_FILE AR6004_HW_1_2_FW_DIR "/bdata.bin"
  172. #define AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE \
  173. AR6004_HW_1_2_FW_DIR "/bdata.bin"
  174. /* AR6004 1.3 definitions */
  175. #define AR6004_HW_1_3_VERSION 0x31c8088a
  176. #define AR6004_HW_1_3_FW_DIR "ath6k/AR6004/hw1.3"
  177. #define AR6004_HW_1_3_FIRMWARE_FILE "fw.ram.bin"
  178. #define AR6004_HW_1_3_BOARD_DATA_FILE "ath6k/AR6004/hw1.3/bdata.bin"
  179. #define AR6004_HW_1_3_DEFAULT_BOARD_DATA_FILE "ath6k/AR6004/hw1.3/bdata.bin"
  180. /* Per STA data, used in AP mode */
  181. #define STA_PS_AWAKE BIT(0)
  182. #define STA_PS_SLEEP BIT(1)
  183. #define STA_PS_POLLED BIT(2)
  184. #define STA_PS_APSD_TRIGGER BIT(3)
  185. #define STA_PS_APSD_EOSP BIT(4)
  186. /* HTC TX packet tagging definitions */
  187. #define ATH6KL_CONTROL_PKT_TAG HTC_TX_PACKET_TAG_USER_DEFINED
  188. #define ATH6KL_DATA_PKT_TAG (ATH6KL_CONTROL_PKT_TAG + 1)
  189. #define AR6003_CUST_DATA_SIZE 16
  190. #define AGGR_WIN_IDX(x, y) ((x) % (y))
  191. #define AGGR_INCR_IDX(x, y) AGGR_WIN_IDX(((x) + 1), (y))
  192. #define AGGR_DCRM_IDX(x, y) AGGR_WIN_IDX(((x) - 1), (y))
  193. #define ATH6KL_MAX_SEQ_NO 0xFFF
  194. #define ATH6KL_NEXT_SEQ_NO(x) (((x) + 1) & ATH6KL_MAX_SEQ_NO)
  195. #define NUM_OF_TIDS 8
  196. #define AGGR_SZ_DEFAULT 8
  197. #define AGGR_WIN_SZ_MIN 2
  198. #define AGGR_WIN_SZ_MAX 8
  199. #define TID_WINDOW_SZ(_x) ((_x) << 1)
  200. #define AGGR_NUM_OF_FREE_NETBUFS 16
  201. #define AGGR_RX_TIMEOUT 100 /* in ms */
  202. #define WMI_TIMEOUT (2 * HZ)
  203. #define MBOX_YIELD_LIMIT 99
  204. #define ATH6KL_DEFAULT_LISTEN_INTVAL 100 /* in TUs */
  205. #define ATH6KL_DEFAULT_BMISS_TIME 1500
  206. #define ATH6KL_MAX_WOW_LISTEN_INTL 300 /* in TUs */
  207. #define ATH6KL_MAX_BMISS_TIME 5000
  208. /* configuration lags */
  209. /*
  210. * ATH6KL_CONF_IGNORE_ERP_BARKER: Ignore the barker premable in
  211. * ERP IE of beacon to determine the short premable support when
  212. * sending (Re)Assoc req.
  213. * ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN: Don't send the power
  214. * module state transition failure events which happen during
  215. * scan, to the host.
  216. */
  217. #define ATH6KL_CONF_IGNORE_ERP_BARKER BIT(0)
  218. #define ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN BIT(1)
  219. #define ATH6KL_CONF_ENABLE_11N BIT(2)
  220. #define ATH6KL_CONF_ENABLE_TX_BURST BIT(3)
  221. #define ATH6KL_CONF_UART_DEBUG BIT(4)
  222. #define P2P_WILDCARD_SSID_LEN 7 /* DIRECT- */
  223. enum wlan_low_pwr_state {
  224. WLAN_POWER_STATE_ON,
  225. WLAN_POWER_STATE_CUT_PWR,
  226. WLAN_POWER_STATE_DEEP_SLEEP,
  227. WLAN_POWER_STATE_WOW
  228. };
  229. enum sme_state {
  230. SME_DISCONNECTED,
  231. SME_CONNECTING,
  232. SME_CONNECTED
  233. };
  234. struct skb_hold_q {
  235. struct sk_buff *skb;
  236. bool is_amsdu;
  237. u16 seq_no;
  238. };
  239. struct rxtid {
  240. bool aggr;
  241. bool timer_mon;
  242. u16 win_sz;
  243. u16 seq_next;
  244. u32 hold_q_sz;
  245. struct skb_hold_q *hold_q;
  246. struct sk_buff_head q;
  247. /*
  248. * lock mainly protects seq_next and hold_q. Movement of seq_next
  249. * needs to be protected between aggr_timeout() and
  250. * aggr_process_recv_frm(). hold_q will be holding the pending
  251. * reorder frames and it's access should also be protected.
  252. * Some of the other fields like hold_q_sz, win_sz and aggr are
  253. * initialized/reset when receiving addba/delba req, also while
  254. * deleting aggr state all the pending buffers are flushed before
  255. * resetting these fields, so there should not be any race in accessing
  256. * these fields.
  257. */
  258. spinlock_t lock;
  259. };
  260. struct rxtid_stats {
  261. u32 num_into_aggr;
  262. u32 num_dups;
  263. u32 num_oow;
  264. u32 num_mpdu;
  265. u32 num_amsdu;
  266. u32 num_delivered;
  267. u32 num_timeouts;
  268. u32 num_hole;
  269. u32 num_bar;
  270. };
  271. struct aggr_info_conn {
  272. u8 aggr_sz;
  273. u8 timer_scheduled;
  274. struct timer_list timer;
  275. struct net_device *dev;
  276. struct rxtid rx_tid[NUM_OF_TIDS];
  277. struct rxtid_stats stat[NUM_OF_TIDS];
  278. struct aggr_info *aggr_info;
  279. };
  280. struct aggr_info {
  281. struct aggr_info_conn *aggr_conn;
  282. struct sk_buff_head rx_amsdu_freeq;
  283. };
  284. struct ath6kl_wep_key {
  285. u8 key_index;
  286. u8 key_len;
  287. u8 key[64];
  288. };
  289. #define ATH6KL_KEY_SEQ_LEN 8
  290. struct ath6kl_key {
  291. u8 key[WLAN_MAX_KEY_LEN];
  292. u8 key_len;
  293. u8 seq[ATH6KL_KEY_SEQ_LEN];
  294. u8 seq_len;
  295. u32 cipher;
  296. };
  297. struct ath6kl_node_mapping {
  298. u8 mac_addr[ETH_ALEN];
  299. u8 ep_id;
  300. u8 tx_pend;
  301. };
  302. struct ath6kl_cookie {
  303. struct sk_buff *skb;
  304. u32 map_no;
  305. struct htc_packet htc_pkt;
  306. struct ath6kl_cookie *arc_list_next;
  307. };
  308. struct ath6kl_mgmt_buff {
  309. struct list_head list;
  310. u32 freq;
  311. u32 wait;
  312. u32 id;
  313. bool no_cck;
  314. size_t len;
  315. u8 buf[0];
  316. };
  317. struct ath6kl_sta {
  318. u16 sta_flags;
  319. u8 mac[ETH_ALEN];
  320. u8 aid;
  321. u8 keymgmt;
  322. u8 ucipher;
  323. u8 auth;
  324. u8 wpa_ie[ATH6KL_MAX_IE];
  325. struct sk_buff_head psq;
  326. /* protects psq, mgmt_psq, apsdq, and mgmt_psq_len fields */
  327. spinlock_t psq_lock;
  328. struct list_head mgmt_psq;
  329. size_t mgmt_psq_len;
  330. u8 apsd_info;
  331. struct sk_buff_head apsdq;
  332. struct aggr_info_conn *aggr_conn;
  333. };
  334. struct ath6kl_version {
  335. u32 target_ver;
  336. u32 wlan_ver;
  337. u32 abi_ver;
  338. };
  339. struct ath6kl_bmi {
  340. u32 cmd_credits;
  341. bool done_sent;
  342. u8 *cmd_buf;
  343. u32 max_data_size;
  344. u32 max_cmd_size;
  345. };
  346. struct target_stats {
  347. u64 tx_pkt;
  348. u64 tx_byte;
  349. u64 tx_ucast_pkt;
  350. u64 tx_ucast_byte;
  351. u64 tx_mcast_pkt;
  352. u64 tx_mcast_byte;
  353. u64 tx_bcast_pkt;
  354. u64 tx_bcast_byte;
  355. u64 tx_rts_success_cnt;
  356. u64 tx_pkt_per_ac[4];
  357. u64 tx_err;
  358. u64 tx_fail_cnt;
  359. u64 tx_retry_cnt;
  360. u64 tx_mult_retry_cnt;
  361. u64 tx_rts_fail_cnt;
  362. u64 rx_pkt;
  363. u64 rx_byte;
  364. u64 rx_ucast_pkt;
  365. u64 rx_ucast_byte;
  366. u64 rx_mcast_pkt;
  367. u64 rx_mcast_byte;
  368. u64 rx_bcast_pkt;
  369. u64 rx_bcast_byte;
  370. u64 rx_frgment_pkt;
  371. u64 rx_err;
  372. u64 rx_crc_err;
  373. u64 rx_key_cache_miss;
  374. u64 rx_decrypt_err;
  375. u64 rx_dupl_frame;
  376. u64 tkip_local_mic_fail;
  377. u64 tkip_cnter_measures_invoked;
  378. u64 tkip_replays;
  379. u64 tkip_fmt_err;
  380. u64 ccmp_fmt_err;
  381. u64 ccmp_replays;
  382. u64 pwr_save_fail_cnt;
  383. u64 cs_bmiss_cnt;
  384. u64 cs_low_rssi_cnt;
  385. u64 cs_connect_cnt;
  386. u64 cs_discon_cnt;
  387. s32 tx_ucast_rate;
  388. s32 rx_ucast_rate;
  389. u32 lq_val;
  390. u32 wow_pkt_dropped;
  391. u16 wow_evt_discarded;
  392. s16 noise_floor_calib;
  393. s16 cs_rssi;
  394. s16 cs_ave_beacon_rssi;
  395. u8 cs_ave_beacon_snr;
  396. u8 cs_last_roam_msec;
  397. u8 cs_snr;
  398. u8 wow_host_pkt_wakeups;
  399. u8 wow_host_evt_wakeups;
  400. u32 arp_received;
  401. u32 arp_matched;
  402. u32 arp_replied;
  403. };
  404. struct ath6kl_mbox_info {
  405. u32 htc_addr;
  406. u32 htc_ext_addr;
  407. u32 htc_ext_sz;
  408. u32 block_size;
  409. u32 gmbox_addr;
  410. u32 gmbox_sz;
  411. };
  412. /*
  413. * 802.11i defines an extended IV for use with non-WEP ciphers.
  414. * When the EXTIV bit is set in the key id byte an additional
  415. * 4 bytes immediately follow the IV for TKIP. For CCMP the
  416. * EXTIV bit is likewise set but the 8 bytes represent the
  417. * CCMP header rather than IV+extended-IV.
  418. */
  419. #define ATH6KL_KEYBUF_SIZE 16
  420. #define ATH6KL_MICBUF_SIZE (8+8) /* space for both tx and rx */
  421. #define ATH6KL_KEY_XMIT 0x01
  422. #define ATH6KL_KEY_RECV 0x02
  423. #define ATH6KL_KEY_DEFAULT 0x80 /* default xmit key */
  424. /* Initial group key for AP mode */
  425. struct ath6kl_req_key {
  426. bool valid;
  427. u8 key_index;
  428. int key_type;
  429. u8 key[WLAN_MAX_KEY_LEN];
  430. u8 key_len;
  431. };
  432. enum ath6kl_hif_type {
  433. ATH6KL_HIF_TYPE_SDIO,
  434. ATH6KL_HIF_TYPE_USB,
  435. };
  436. enum ath6kl_htc_type {
  437. ATH6KL_HTC_TYPE_MBOX,
  438. ATH6KL_HTC_TYPE_PIPE,
  439. };
  440. /* Max number of filters that hw supports */
  441. #define ATH6K_MAX_MC_FILTERS_PER_LIST 7
  442. struct ath6kl_mc_filter {
  443. struct list_head list;
  444. char hw_addr[ATH6KL_MCAST_FILTER_MAC_ADDR_SIZE];
  445. };
  446. struct ath6kl_htcap {
  447. bool ht_enable;
  448. u8 ampdu_factor;
  449. unsigned short cap_info;
  450. };
  451. /*
  452. * Driver's maximum limit, note that some firmwares support only one vif
  453. * and the runtime (current) limit must be checked from ar->vif_max.
  454. */
  455. #define ATH6KL_VIF_MAX 3
  456. /* vif flags info */
  457. enum ath6kl_vif_state {
  458. CONNECTED,
  459. CONNECT_PEND,
  460. WMM_ENABLED,
  461. NETQ_STOPPED,
  462. DTIM_EXPIRED,
  463. NETDEV_REGISTERED,
  464. CLEAR_BSSFILTER_ON_BEACON,
  465. DTIM_PERIOD_AVAIL,
  466. WLAN_ENABLED,
  467. STATS_UPDATE_PEND,
  468. HOST_SLEEP_MODE_CMD_PROCESSED,
  469. NETDEV_MCAST_ALL_ON,
  470. NETDEV_MCAST_ALL_OFF,
  471. SCHED_SCANNING,
  472. };
  473. struct ath6kl_vif {
  474. struct list_head list;
  475. struct wireless_dev wdev;
  476. struct net_device *ndev;
  477. struct ath6kl *ar;
  478. /* Lock to protect vif specific net_stats and flags */
  479. spinlock_t if_lock;
  480. u8 fw_vif_idx;
  481. unsigned long flags;
  482. int ssid_len;
  483. u8 ssid[IEEE80211_MAX_SSID_LEN];
  484. u8 dot11_auth_mode;
  485. u8 auth_mode;
  486. u8 prwise_crypto;
  487. u8 prwise_crypto_len;
  488. u8 grp_crypto;
  489. u8 grp_crypto_len;
  490. u8 def_txkey_index;
  491. u8 next_mode;
  492. u8 nw_type;
  493. u8 bssid[ETH_ALEN];
  494. u8 req_bssid[ETH_ALEN];
  495. u16 ch_hint;
  496. u16 bss_ch;
  497. struct ath6kl_wep_key wep_key_list[WMI_MAX_KEY_INDEX + 1];
  498. struct ath6kl_key keys[WMI_MAX_KEY_INDEX + 1];
  499. struct aggr_info *aggr_cntxt;
  500. struct ath6kl_htcap htcap[IEEE80211_NUM_BANDS];
  501. struct timer_list disconnect_timer;
  502. struct timer_list sched_scan_timer;
  503. struct cfg80211_scan_request *scan_req;
  504. enum sme_state sme_state;
  505. int reconnect_flag;
  506. u32 last_roc_id;
  507. u32 last_cancel_roc_id;
  508. u32 send_action_id;
  509. bool probe_req_report;
  510. u16 assoc_bss_beacon_int;
  511. u16 listen_intvl_t;
  512. u16 bmiss_time_t;
  513. u32 txe_intvl;
  514. u16 bg_scan_period;
  515. u8 assoc_bss_dtim_period;
  516. struct net_device_stats net_stats;
  517. struct target_stats target_stats;
  518. struct wmi_connect_cmd profile;
  519. u16 rsn_capab;
  520. struct list_head mc_filter;
  521. };
  522. static inline struct ath6kl_vif *ath6kl_vif_from_wdev(struct wireless_dev *wdev)
  523. {
  524. return container_of(wdev, struct ath6kl_vif, wdev);
  525. }
  526. #define WOW_LIST_ID 0
  527. #define WOW_HOST_REQ_DELAY 500 /* ms */
  528. #define ATH6KL_SCHED_SCAN_RESULT_DELAY 5000 /* ms */
  529. /* Flag info */
  530. enum ath6kl_dev_state {
  531. WMI_ENABLED,
  532. WMI_READY,
  533. WMI_CTRL_EP_FULL,
  534. TESTMODE,
  535. DESTROY_IN_PROGRESS,
  536. SKIP_SCAN,
  537. ROAM_TBL_PEND,
  538. FIRST_BOOT,
  539. RECOVERY_CLEANUP,
  540. };
  541. enum ath6kl_state {
  542. ATH6KL_STATE_OFF,
  543. ATH6KL_STATE_ON,
  544. ATH6KL_STATE_SUSPENDING,
  545. ATH6KL_STATE_RESUMING,
  546. ATH6KL_STATE_DEEPSLEEP,
  547. ATH6KL_STATE_CUTPOWER,
  548. ATH6KL_STATE_WOW,
  549. ATH6KL_STATE_RECOVERY,
  550. };
  551. /* Fw error recovery */
  552. #define ATH6KL_HB_RESP_MISS_THRES 5
  553. enum ath6kl_fw_err {
  554. ATH6KL_FW_ASSERT,
  555. ATH6KL_FW_HB_RESP_FAILURE,
  556. ATH6KL_FW_EP_FULL,
  557. };
  558. struct ath6kl {
  559. struct device *dev;
  560. struct wiphy *wiphy;
  561. enum ath6kl_state state;
  562. unsigned int testmode;
  563. struct ath6kl_bmi bmi;
  564. const struct ath6kl_hif_ops *hif_ops;
  565. const struct ath6kl_htc_ops *htc_ops;
  566. struct wmi *wmi;
  567. int tx_pending[ENDPOINT_MAX];
  568. int total_tx_data_pend;
  569. struct htc_target *htc_target;
  570. enum ath6kl_hif_type hif_type;
  571. void *hif_priv;
  572. struct list_head vif_list;
  573. /* Lock to avoid race in vif_list entries among add/del/traverse */
  574. spinlock_t list_lock;
  575. u8 num_vif;
  576. unsigned int vif_max;
  577. u8 max_norm_iface;
  578. u8 avail_idx_map;
  579. /*
  580. * Protects at least amsdu_rx_buffer_queue, ath6kl_alloc_cookie()
  581. * calls, tx_pending and total_tx_data_pend.
  582. */
  583. spinlock_t lock;
  584. struct semaphore sem;
  585. u8 lrssi_roam_threshold;
  586. struct ath6kl_version version;
  587. u32 target_type;
  588. u8 tx_pwr;
  589. struct ath6kl_node_mapping node_map[MAX_NODE_NUM];
  590. u8 ibss_ps_enable;
  591. bool ibss_if_active;
  592. u8 node_num;
  593. u8 next_ep_id;
  594. struct ath6kl_cookie *cookie_list;
  595. u32 cookie_count;
  596. enum htc_endpoint_id ac2ep_map[WMM_NUM_AC];
  597. bool ac_stream_active[WMM_NUM_AC];
  598. u8 ac_stream_pri_map[WMM_NUM_AC];
  599. u8 hiac_stream_active_pri;
  600. u8 ep2ac_map[ENDPOINT_MAX];
  601. enum htc_endpoint_id ctrl_ep;
  602. struct ath6kl_htc_credit_info credit_state_info;
  603. u32 connect_ctrl_flags;
  604. u32 user_key_ctrl;
  605. u8 usr_bss_filter;
  606. struct ath6kl_sta sta_list[AP_MAX_NUM_STA];
  607. u8 sta_list_index;
  608. struct ath6kl_req_key ap_mode_bkey;
  609. struct sk_buff_head mcastpsq;
  610. u32 want_ch_switch;
  611. u16 last_ch;
  612. /*
  613. * FIXME: protects access to mcastpsq but is actually useless as
  614. * all skbe_queue_*() functions provide serialisation themselves
  615. */
  616. spinlock_t mcastpsq_lock;
  617. u8 intra_bss;
  618. struct wmi_ap_mode_stat ap_stats;
  619. u8 ap_country_code[3];
  620. struct list_head amsdu_rx_buffer_queue;
  621. u8 rx_meta_ver;
  622. enum wlan_low_pwr_state wlan_pwr_state;
  623. u8 mac_addr[ETH_ALEN];
  624. #define AR_MCAST_FILTER_MAC_ADDR_SIZE 4
  625. struct {
  626. void *rx_report;
  627. size_t rx_report_len;
  628. } tm;
  629. struct ath6kl_hw {
  630. u32 id;
  631. const char *name;
  632. u32 dataset_patch_addr;
  633. u32 app_load_addr;
  634. u32 app_start_override_addr;
  635. u32 board_ext_data_addr;
  636. u32 reserved_ram_size;
  637. u32 board_addr;
  638. u32 refclk_hz;
  639. u32 uarttx_pin;
  640. u32 testscript_addr;
  641. enum wmi_phy_cap cap;
  642. u32 flags;
  643. struct ath6kl_hw_fw {
  644. const char *dir;
  645. const char *otp;
  646. const char *fw;
  647. const char *tcmd;
  648. const char *patch;
  649. const char *utf;
  650. const char *testscript;
  651. } fw;
  652. const char *fw_board;
  653. const char *fw_default_board;
  654. } hw;
  655. u16 conf_flags;
  656. u16 suspend_mode;
  657. u16 wow_suspend_mode;
  658. wait_queue_head_t event_wq;
  659. struct ath6kl_mbox_info mbox_info;
  660. struct ath6kl_cookie cookie_mem[MAX_COOKIE_NUM];
  661. unsigned long flag;
  662. u8 *fw_board;
  663. size_t fw_board_len;
  664. u8 *fw_otp;
  665. size_t fw_otp_len;
  666. u8 *fw;
  667. size_t fw_len;
  668. u8 *fw_patch;
  669. size_t fw_patch_len;
  670. u8 *fw_testscript;
  671. size_t fw_testscript_len;
  672. unsigned int fw_api;
  673. unsigned long fw_capabilities[ATH6KL_CAPABILITY_LEN];
  674. struct workqueue_struct *ath6kl_wq;
  675. struct dentry *debugfs_phy;
  676. bool p2p;
  677. bool wiphy_registered;
  678. struct ath6kl_fw_recovery {
  679. struct work_struct recovery_work;
  680. unsigned long err_reason;
  681. unsigned long hb_poll;
  682. struct timer_list hb_timer;
  683. u32 seq_num;
  684. bool hb_pending;
  685. u8 hb_misscnt;
  686. bool enable;
  687. } fw_recovery;
  688. #ifdef CONFIG_ATH6KL_DEBUG
  689. struct {
  690. struct sk_buff_head fwlog_queue;
  691. struct completion fwlog_completion;
  692. bool fwlog_open;
  693. u32 fwlog_mask;
  694. unsigned int dbgfs_diag_reg;
  695. u32 diag_reg_addr_wr;
  696. u32 diag_reg_val_wr;
  697. struct {
  698. unsigned int invalid_rate;
  699. } war_stats;
  700. u8 *roam_tbl;
  701. unsigned int roam_tbl_len;
  702. u8 keepalive;
  703. u8 disc_timeout;
  704. } debug;
  705. #endif /* CONFIG_ATH6KL_DEBUG */
  706. };
  707. static inline struct ath6kl *ath6kl_priv(struct net_device *dev)
  708. {
  709. return ((struct ath6kl_vif *) netdev_priv(dev))->ar;
  710. }
  711. static inline u32 ath6kl_get_hi_item_addr(struct ath6kl *ar,
  712. u32 item_offset)
  713. {
  714. u32 addr = 0;
  715. if (ar->target_type == TARGET_TYPE_AR6003)
  716. addr = ATH6KL_AR6003_HI_START_ADDR + item_offset;
  717. else if (ar->target_type == TARGET_TYPE_AR6004)
  718. addr = ATH6KL_AR6004_HI_START_ADDR + item_offset;
  719. return addr;
  720. }
  721. int ath6kl_configure_target(struct ath6kl *ar);
  722. void ath6kl_detect_error(unsigned long ptr);
  723. void disconnect_timer_handler(unsigned long ptr);
  724. void init_netdev(struct net_device *dev);
  725. void ath6kl_cookie_init(struct ath6kl *ar);
  726. void ath6kl_cookie_cleanup(struct ath6kl *ar);
  727. void ath6kl_rx(struct htc_target *target, struct htc_packet *packet);
  728. void ath6kl_tx_complete(struct htc_target *context,
  729. struct list_head *packet_queue);
  730. enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target,
  731. struct htc_packet *packet);
  732. void ath6kl_stop_txrx(struct ath6kl *ar);
  733. void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar);
  734. int ath6kl_diag_write32(struct ath6kl *ar, u32 address, __le32 value);
  735. int ath6kl_diag_write(struct ath6kl *ar, u32 address, void *data, u32 length);
  736. int ath6kl_diag_read32(struct ath6kl *ar, u32 address, u32 *value);
  737. int ath6kl_diag_read(struct ath6kl *ar, u32 address, void *data, u32 length);
  738. int ath6kl_read_fwlogs(struct ath6kl *ar);
  739. void ath6kl_init_profile_info(struct ath6kl_vif *vif);
  740. void ath6kl_tx_data_cleanup(struct ath6kl *ar);
  741. struct ath6kl_cookie *ath6kl_alloc_cookie(struct ath6kl *ar);
  742. void ath6kl_free_cookie(struct ath6kl *ar, struct ath6kl_cookie *cookie);
  743. int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev);
  744. struct aggr_info *aggr_init(struct ath6kl_vif *vif);
  745. void aggr_conn_init(struct ath6kl_vif *vif, struct aggr_info *aggr_info,
  746. struct aggr_info_conn *aggr_conn);
  747. void ath6kl_rx_refill(struct htc_target *target,
  748. enum htc_endpoint_id endpoint);
  749. void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count);
  750. struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target,
  751. enum htc_endpoint_id endpoint,
  752. int len);
  753. void aggr_module_destroy(struct aggr_info *aggr_info);
  754. void aggr_reset_state(struct aggr_info_conn *aggr_conn);
  755. struct ath6kl_sta *ath6kl_find_sta(struct ath6kl_vif *vif, u8 *node_addr);
  756. struct ath6kl_sta *ath6kl_find_sta_by_aid(struct ath6kl *ar, u8 aid);
  757. void ath6kl_ready_event(void *devt, u8 *datap, u32 sw_ver, u32 abi_ver,
  758. enum wmi_phy_cap cap);
  759. int ath6kl_control_tx(void *devt, struct sk_buff *skb,
  760. enum htc_endpoint_id eid);
  761. void ath6kl_connect_event(struct ath6kl_vif *vif, u16 channel,
  762. u8 *bssid, u16 listen_int,
  763. u16 beacon_int, enum network_type net_type,
  764. u8 beacon_ie_len, u8 assoc_req_len,
  765. u8 assoc_resp_len, u8 *assoc_info);
  766. void ath6kl_connect_ap_mode_bss(struct ath6kl_vif *vif, u16 channel);
  767. void ath6kl_connect_ap_mode_sta(struct ath6kl_vif *vif, u16 aid, u8 *mac_addr,
  768. u8 keymgmt, u8 ucipher, u8 auth,
  769. u8 assoc_req_len, u8 *assoc_info, u8 apsd_info);
  770. void ath6kl_disconnect_event(struct ath6kl_vif *vif, u8 reason,
  771. u8 *bssid, u8 assoc_resp_len,
  772. u8 *assoc_info, u16 prot_reason_status);
  773. void ath6kl_tkip_micerr_event(struct ath6kl_vif *vif, u8 keyid, bool ismcast);
  774. void ath6kl_txpwr_rx_evt(void *devt, u8 tx_pwr);
  775. void ath6kl_scan_complete_evt(struct ath6kl_vif *vif, int status);
  776. void ath6kl_tgt_stats_event(struct ath6kl_vif *vif, u8 *ptr, u32 len);
  777. void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active);
  778. enum htc_endpoint_id ath6kl_ac2_endpoint_id(void *devt, u8 ac);
  779. void ath6kl_pspoll_event(struct ath6kl_vif *vif, u8 aid);
  780. void ath6kl_dtimexpiry_event(struct ath6kl_vif *vif);
  781. void ath6kl_disconnect(struct ath6kl_vif *vif);
  782. void aggr_recv_delba_req_evt(struct ath6kl_vif *vif, u8 tid);
  783. void aggr_recv_addba_req_evt(struct ath6kl_vif *vif, u8 tid, u16 seq_no,
  784. u8 win_sz);
  785. void ath6kl_wakeup_event(void *dev);
  786. void ath6kl_reset_device(struct ath6kl *ar, u32 target_type,
  787. bool wait_fot_compltn, bool cold_reset);
  788. void ath6kl_init_control_info(struct ath6kl_vif *vif);
  789. struct ath6kl_vif *ath6kl_vif_first(struct ath6kl *ar);
  790. void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready);
  791. int ath6kl_init_hw_start(struct ath6kl *ar);
  792. int ath6kl_init_hw_stop(struct ath6kl *ar);
  793. int ath6kl_init_fetch_firmwares(struct ath6kl *ar);
  794. int ath6kl_init_hw_params(struct ath6kl *ar);
  795. void ath6kl_check_wow_status(struct ath6kl *ar);
  796. void ath6kl_core_tx_complete(struct ath6kl *ar, struct sk_buff *skb);
  797. void ath6kl_core_rx_complete(struct ath6kl *ar, struct sk_buff *skb, u8 pipe);
  798. struct ath6kl *ath6kl_core_create(struct device *dev);
  799. int ath6kl_core_init(struct ath6kl *ar, enum ath6kl_htc_type htc_type);
  800. void ath6kl_core_cleanup(struct ath6kl *ar);
  801. void ath6kl_core_destroy(struct ath6kl *ar);
  802. /* Fw error recovery */
  803. void ath6kl_init_hw_restart(struct ath6kl *ar);
  804. void ath6kl_recovery_err_notify(struct ath6kl *ar, enum ath6kl_fw_err reason);
  805. void ath6kl_recovery_hb_event(struct ath6kl *ar, u32 cookie);
  806. void ath6kl_recovery_init(struct ath6kl *ar);
  807. void ath6kl_recovery_cleanup(struct ath6kl *ar);
  808. void ath6kl_recovery_suspend(struct ath6kl *ar);
  809. void ath6kl_recovery_resume(struct ath6kl *ar);
  810. #endif /* CORE_H */