iwl3945-base.c 214 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/delay.h>
  35. #include <linux/skbuff.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/wireless.h>
  38. #include <linux/firmware.h>
  39. #include <linux/etherdevice.h>
  40. #include <linux/if_arp.h>
  41. #include <net/ieee80211_radiotap.h>
  42. #include <net/lib80211.h>
  43. #include <net/mac80211.h>
  44. #include <asm/div64.h>
  45. #define DRV_NAME "iwl3945"
  46. #include "iwl-fh.h"
  47. #include "iwl-3945-fh.h"
  48. #include "iwl-commands.h"
  49. #include "iwl-3945.h"
  50. #include "iwl-helpers.h"
  51. #include "iwl-core.h"
  52. #include "iwl-dev.h"
  53. /*
  54. * module name, copyright, version, etc.
  55. */
  56. #define DRV_DESCRIPTION \
  57. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  58. #ifdef CONFIG_IWL3945_DEBUG
  59. #define VD "d"
  60. #else
  61. #define VD
  62. #endif
  63. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  64. #define VS "s"
  65. #else
  66. #define VS
  67. #endif
  68. #define IWL39_VERSION "1.2.26k" VD VS
  69. #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
  70. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  71. #define DRV_VERSION IWL39_VERSION
  72. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  73. MODULE_VERSION(DRV_VERSION);
  74. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  75. MODULE_LICENSE("GPL");
  76. /* module parameters */
  77. struct iwl_mod_params iwl3945_mod_params = {
  78. .num_of_queues = IWL39_MAX_NUM_QUEUES,
  79. .sw_crypto = 1,
  80. /* the rest are 0 by default */
  81. };
  82. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  83. * DMA services
  84. *
  85. * Theory of operation
  86. *
  87. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  88. * of buffer descriptors, each of which points to one or more data buffers for
  89. * the device to read from or fill. Driver and device exchange status of each
  90. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  91. * entries in each circular buffer, to protect against confusing empty and full
  92. * queue states.
  93. *
  94. * The device reads or writes the data in the queues via the device's several
  95. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  96. *
  97. * For Tx queue, there are low mark and high mark limits. If, after queuing
  98. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  99. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  100. * Tx queue resumed.
  101. *
  102. * The 3945 operates with six queues: One receive queue, one transmit queue
  103. * (#4) for sending commands to the device firmware, and four transmit queues
  104. * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
  105. ***************************************************/
  106. /**
  107. * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
  108. */
  109. static int iwl3945_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
  110. int count, int slots_num, u32 id)
  111. {
  112. q->n_bd = count;
  113. q->n_window = slots_num;
  114. q->id = id;
  115. /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
  116. * and iwl_queue_dec_wrap are broken. */
  117. BUG_ON(!is_power_of_2(count));
  118. /* slots_num must be power-of-two size, otherwise
  119. * get_cmd_index is broken. */
  120. BUG_ON(!is_power_of_2(slots_num));
  121. q->low_mark = q->n_window / 4;
  122. if (q->low_mark < 4)
  123. q->low_mark = 4;
  124. q->high_mark = q->n_window / 8;
  125. if (q->high_mark < 2)
  126. q->high_mark = 2;
  127. q->write_ptr = q->read_ptr = 0;
  128. return 0;
  129. }
  130. /**
  131. * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  132. */
  133. static int iwl3945_tx_queue_alloc(struct iwl_priv *priv,
  134. struct iwl_tx_queue *txq, u32 id)
  135. {
  136. struct pci_dev *dev = priv->pci_dev;
  137. /* Driver private data, only for Tx (not command) queues,
  138. * not shared with device. */
  139. if (id != IWL_CMD_QUEUE_NUM) {
  140. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  141. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  142. if (!txq->txb) {
  143. IWL_ERR(priv, "kmalloc for auxiliary BD "
  144. "structures failed\n");
  145. goto error;
  146. }
  147. } else
  148. txq->txb = NULL;
  149. /* Circular buffer of transmit frame descriptors (TFDs),
  150. * shared with device */
  151. txq->tfds39 = pci_alloc_consistent(dev,
  152. sizeof(txq->tfds39[0]) * TFD_QUEUE_SIZE_MAX,
  153. &txq->q.dma_addr);
  154. if (!txq->tfds39) {
  155. IWL_ERR(priv, "pci_alloc_consistent(%zd) failed\n",
  156. sizeof(txq->tfds39[0]) * TFD_QUEUE_SIZE_MAX);
  157. goto error;
  158. }
  159. txq->q.id = id;
  160. return 0;
  161. error:
  162. kfree(txq->txb);
  163. txq->txb = NULL;
  164. return -ENOMEM;
  165. }
  166. /**
  167. * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
  168. */
  169. int iwl3945_tx_queue_init(struct iwl_priv *priv,
  170. struct iwl_tx_queue *txq, int slots_num, u32 txq_id)
  171. {
  172. int len, i;
  173. int rc = 0;
  174. /*
  175. * Alloc buffer array for commands (Tx or other types of commands).
  176. * For the command queue (#4), allocate command space + one big
  177. * command for scan, since scan command is very huge; the system will
  178. * not have two scans at the same time, so only one is needed.
  179. * For data Tx queues (all other queues), no super-size command
  180. * space is needed.
  181. */
  182. len = sizeof(struct iwl_cmd);
  183. for (i = 0; i <= slots_num; i++) {
  184. if (i == slots_num) {
  185. if (txq_id == IWL_CMD_QUEUE_NUM)
  186. len += IWL_MAX_SCAN_SIZE;
  187. else
  188. continue;
  189. }
  190. txq->cmd[i] = kmalloc(len, GFP_KERNEL);
  191. if (!txq->cmd[i])
  192. goto err;
  193. }
  194. /* Alloc driver data array and TFD circular buffer */
  195. rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
  196. if (rc)
  197. goto err;
  198. txq->need_update = 0;
  199. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  200. * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
  201. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  202. /* Initialize queue high/low-water, head/tail indexes */
  203. iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  204. /* Tell device where to find queue, enable DMA channel. */
  205. iwl3945_hw_tx_queue_init(priv, txq);
  206. return 0;
  207. err:
  208. for (i = 0; i < slots_num; i++) {
  209. kfree(txq->cmd[i]);
  210. txq->cmd[i] = NULL;
  211. }
  212. if (txq_id == IWL_CMD_QUEUE_NUM) {
  213. kfree(txq->cmd[slots_num]);
  214. txq->cmd[slots_num] = NULL;
  215. }
  216. return -ENOMEM;
  217. }
  218. /**
  219. * iwl3945_tx_queue_free - Deallocate DMA queue.
  220. * @txq: Transmit queue to deallocate.
  221. *
  222. * Empty queue by removing and destroying all BD's.
  223. * Free all buffers.
  224. * 0-fill, but do not free "txq" descriptor structure.
  225. */
  226. void iwl3945_tx_queue_free(struct iwl_priv *priv, struct iwl_tx_queue *txq)
  227. {
  228. struct iwl_queue *q = &txq->q;
  229. struct pci_dev *dev = priv->pci_dev;
  230. int len, i;
  231. if (q->n_bd == 0)
  232. return;
  233. /* first, empty all BD's */
  234. for (; q->write_ptr != q->read_ptr;
  235. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
  236. priv->cfg->ops->lib->txq_free_tfd(priv, txq);
  237. len = sizeof(struct iwl_cmd) * q->n_window;
  238. if (q->id == IWL_CMD_QUEUE_NUM)
  239. len += IWL_MAX_SCAN_SIZE;
  240. /* De-alloc array of command/tx buffers */
  241. for (i = 0; i < TFD_TX_CMD_SLOTS; i++)
  242. kfree(txq->cmd[i]);
  243. /* De-alloc circular buffer of TFDs */
  244. if (txq->q.n_bd)
  245. pci_free_consistent(dev, sizeof(struct iwl3945_tfd) *
  246. txq->q.n_bd, txq->tfds39, txq->q.dma_addr);
  247. /* De-alloc array of per-TFD driver data */
  248. kfree(txq->txb);
  249. txq->txb = NULL;
  250. /* 0-fill queue descriptor structure */
  251. memset(txq, 0, sizeof(*txq));
  252. }
  253. /*************** STATION TABLE MANAGEMENT ****
  254. * mac80211 should be examined to determine if sta_info is duplicating
  255. * the functionality provided here
  256. */
  257. /**************************************************************/
  258. #if 0 /* temporary disable till we add real remove station */
  259. /**
  260. * iwl3945_remove_station - Remove driver's knowledge of station.
  261. *
  262. * NOTE: This does not remove station from device's station table.
  263. */
  264. static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  265. {
  266. int index = IWL_INVALID_STATION;
  267. int i;
  268. unsigned long flags;
  269. spin_lock_irqsave(&priv->sta_lock, flags);
  270. if (is_ap)
  271. index = IWL_AP_ID;
  272. else if (is_broadcast_ether_addr(addr))
  273. index = priv->hw_params.bcast_sta_id;
  274. else
  275. for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
  276. if (priv->stations_39[i].used &&
  277. !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
  278. addr)) {
  279. index = i;
  280. break;
  281. }
  282. if (unlikely(index == IWL_INVALID_STATION))
  283. goto out;
  284. if (priv->stations_39[index].used) {
  285. priv->stations_39[index].used = 0;
  286. priv->num_stations--;
  287. }
  288. BUG_ON(priv->num_stations < 0);
  289. out:
  290. spin_unlock_irqrestore(&priv->sta_lock, flags);
  291. return 0;
  292. }
  293. #endif
  294. /**
  295. * iwl3945_clear_stations_table - Clear the driver's station table
  296. *
  297. * NOTE: This does not clear or otherwise alter the device's station table.
  298. */
  299. static void iwl3945_clear_stations_table(struct iwl_priv *priv)
  300. {
  301. unsigned long flags;
  302. spin_lock_irqsave(&priv->sta_lock, flags);
  303. priv->num_stations = 0;
  304. memset(priv->stations_39, 0, sizeof(priv->stations_39));
  305. spin_unlock_irqrestore(&priv->sta_lock, flags);
  306. }
  307. /**
  308. * iwl3945_add_station - Add station to station tables in driver and device
  309. */
  310. u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
  311. {
  312. int i;
  313. int index = IWL_INVALID_STATION;
  314. struct iwl3945_station_entry *station;
  315. unsigned long flags_spin;
  316. u8 rate;
  317. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  318. if (is_ap)
  319. index = IWL_AP_ID;
  320. else if (is_broadcast_ether_addr(addr))
  321. index = priv->hw_params.bcast_sta_id;
  322. else
  323. for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
  324. if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
  325. addr)) {
  326. index = i;
  327. break;
  328. }
  329. if (!priv->stations_39[i].used &&
  330. index == IWL_INVALID_STATION)
  331. index = i;
  332. }
  333. /* These two conditions has the same outcome but keep them separate
  334. since they have different meaning */
  335. if (unlikely(index == IWL_INVALID_STATION)) {
  336. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  337. return index;
  338. }
  339. if (priv->stations_39[index].used &&
  340. !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
  341. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  342. return index;
  343. }
  344. IWL_DEBUG_ASSOC("Add STA ID %d: %pM\n", index, addr);
  345. station = &priv->stations_39[index];
  346. station->used = 1;
  347. priv->num_stations++;
  348. /* Set up the REPLY_ADD_STA command to send to device */
  349. memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
  350. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  351. station->sta.mode = 0;
  352. station->sta.sta.sta_id = index;
  353. station->sta.station_flags = 0;
  354. if (priv->band == IEEE80211_BAND_5GHZ)
  355. rate = IWL_RATE_6M_PLCP;
  356. else
  357. rate = IWL_RATE_1M_PLCP;
  358. /* Turn on both antennas for the station... */
  359. station->sta.rate_n_flags =
  360. iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
  361. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  362. /* Add station to device's station table */
  363. iwl3945_send_add_station(priv, &station->sta, flags);
  364. return index;
  365. }
  366. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  367. #define IWL_CMD(x) case x: return #x
  368. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  369. /**
  370. * iwl3945_enqueue_hcmd - enqueue a uCode command
  371. * @priv: device private data point
  372. * @cmd: a point to the ucode command structure
  373. *
  374. * The function returns < 0 values to indicate the operation is
  375. * failed. On success, it turns the index (> 0) of command in the
  376. * command queue.
  377. */
  378. static int iwl3945_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  379. {
  380. struct iwl_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  381. struct iwl_queue *q = &txq->q;
  382. struct iwl_cmd *out_cmd;
  383. u32 idx;
  384. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  385. dma_addr_t phys_addr;
  386. int ret, len;
  387. unsigned long flags;
  388. /* If any of the command structures end up being larger than
  389. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  390. * we will need to increase the size of the TFD entries */
  391. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  392. !(cmd->meta.flags & CMD_SIZE_HUGE));
  393. if (iwl_is_rfkill(priv)) {
  394. IWL_DEBUG_INFO("Not sending command - RF KILL");
  395. return -EIO;
  396. }
  397. if (iwl_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  398. IWL_ERR(priv, "No space for Tx\n");
  399. return -ENOSPC;
  400. }
  401. spin_lock_irqsave(&priv->hcmd_lock, flags);
  402. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  403. out_cmd = txq->cmd[idx];
  404. out_cmd->hdr.cmd = cmd->id;
  405. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  406. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  407. /* At this point, the out_cmd now has all of the incoming cmd
  408. * information */
  409. out_cmd->hdr.flags = 0;
  410. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  411. INDEX_TO_SEQ(q->write_ptr));
  412. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  413. out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
  414. len = (idx == TFD_CMD_SLOTS) ?
  415. IWL_MAX_SCAN_SIZE : sizeof(struct iwl_cmd);
  416. phys_addr = pci_map_single(priv->pci_dev, out_cmd,
  417. len, PCI_DMA_TODEVICE);
  418. pci_unmap_addr_set(&out_cmd->meta, mapping, phys_addr);
  419. pci_unmap_len_set(&out_cmd->meta, len, len);
  420. phys_addr += offsetof(struct iwl_cmd, hdr);
  421. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  422. phys_addr, fix_size,
  423. 1, U32_PAD(cmd->len));
  424. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  425. "%d bytes at %d[%d]:%d\n",
  426. get_cmd_string(out_cmd->hdr.cmd),
  427. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  428. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  429. txq->need_update = 1;
  430. /* Increment and update queue's write index */
  431. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  432. ret = iwl_txq_update_write_ptr(priv, txq);
  433. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  434. return ret ? ret : idx;
  435. }
  436. static int iwl3945_send_cmd_async(struct iwl_priv *priv,
  437. struct iwl_host_cmd *cmd)
  438. {
  439. int ret;
  440. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  441. /* An asynchronous command can not expect an SKB to be set. */
  442. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  443. /* An asynchronous command MUST have a callback. */
  444. BUG_ON(!cmd->meta.u.callback);
  445. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  446. return -EBUSY;
  447. ret = iwl3945_enqueue_hcmd(priv, cmd);
  448. if (ret < 0) {
  449. IWL_ERR(priv,
  450. "Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
  451. get_cmd_string(cmd->id), ret);
  452. return ret;
  453. }
  454. return 0;
  455. }
  456. static int iwl3945_send_cmd_sync(struct iwl_priv *priv,
  457. struct iwl_host_cmd *cmd)
  458. {
  459. int cmd_idx;
  460. int ret;
  461. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  462. /* A synchronous command can not have a callback set. */
  463. BUG_ON(cmd->meta.u.callback != NULL);
  464. if (test_and_set_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status)) {
  465. IWL_ERR(priv,
  466. "Error sending %s: Already sending a host command\n",
  467. get_cmd_string(cmd->id));
  468. ret = -EBUSY;
  469. goto out;
  470. }
  471. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  472. if (cmd->meta.flags & CMD_WANT_SKB)
  473. cmd->meta.source = &cmd->meta;
  474. cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
  475. if (cmd_idx < 0) {
  476. ret = cmd_idx;
  477. IWL_ERR(priv,
  478. "Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
  479. get_cmd_string(cmd->id), ret);
  480. goto out;
  481. }
  482. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  483. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  484. HOST_COMPLETE_TIMEOUT);
  485. if (!ret) {
  486. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  487. IWL_ERR(priv, "Error sending %s: time out after %dms\n",
  488. get_cmd_string(cmd->id),
  489. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  490. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  491. ret = -ETIMEDOUT;
  492. goto cancel;
  493. }
  494. }
  495. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  496. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  497. get_cmd_string(cmd->id));
  498. ret = -ECANCELED;
  499. goto fail;
  500. }
  501. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  502. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  503. get_cmd_string(cmd->id));
  504. ret = -EIO;
  505. goto fail;
  506. }
  507. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  508. IWL_ERR(priv, "Error: Response NULL in '%s'\n",
  509. get_cmd_string(cmd->id));
  510. ret = -EIO;
  511. goto cancel;
  512. }
  513. ret = 0;
  514. goto out;
  515. cancel:
  516. if (cmd->meta.flags & CMD_WANT_SKB) {
  517. struct iwl_cmd *qcmd;
  518. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  519. * TX cmd queue. Otherwise in case the cmd comes
  520. * in later, it will possibly set an invalid
  521. * address (cmd->meta.source). */
  522. qcmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  523. qcmd->meta.flags &= ~CMD_WANT_SKB;
  524. }
  525. fail:
  526. if (cmd->meta.u.skb) {
  527. dev_kfree_skb_any(cmd->meta.u.skb);
  528. cmd->meta.u.skb = NULL;
  529. }
  530. out:
  531. clear_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status);
  532. return ret;
  533. }
  534. int iwl3945_send_cmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  535. {
  536. if (cmd->meta.flags & CMD_ASYNC)
  537. return iwl3945_send_cmd_async(priv, cmd);
  538. return iwl3945_send_cmd_sync(priv, cmd);
  539. }
  540. int iwl3945_send_cmd_pdu(struct iwl_priv *priv, u8 id, u16 len, const void *data)
  541. {
  542. struct iwl_host_cmd cmd = {
  543. .id = id,
  544. .len = len,
  545. .data = data,
  546. };
  547. return iwl3945_send_cmd_sync(priv, &cmd);
  548. }
  549. static int __must_check iwl3945_send_cmd_u32(struct iwl_priv *priv, u8 id, u32 val)
  550. {
  551. struct iwl_host_cmd cmd = {
  552. .id = id,
  553. .len = sizeof(val),
  554. .data = &val,
  555. };
  556. return iwl3945_send_cmd_sync(priv, &cmd);
  557. }
  558. int iwl3945_send_statistics_request(struct iwl_priv *priv)
  559. {
  560. return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  561. }
  562. /**
  563. * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
  564. * @band: 2.4 or 5 GHz band
  565. * @channel: Any channel valid for the requested band
  566. * In addition to setting the staging RXON, priv->band is also set.
  567. *
  568. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  569. * in the staging RXON flag structure based on the band
  570. */
  571. static int iwl3945_set_rxon_channel(struct iwl_priv *priv,
  572. enum ieee80211_band band,
  573. u16 channel)
  574. {
  575. if (!iwl3945_get_channel_info(priv, band, channel)) {
  576. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  577. channel, band);
  578. return -EINVAL;
  579. }
  580. if ((le16_to_cpu(priv->staging39_rxon.channel) == channel) &&
  581. (priv->band == band))
  582. return 0;
  583. priv->staging39_rxon.channel = cpu_to_le16(channel);
  584. if (band == IEEE80211_BAND_5GHZ)
  585. priv->staging39_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  586. else
  587. priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  588. priv->band = band;
  589. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
  590. return 0;
  591. }
  592. /**
  593. * iwl3945_check_rxon_cmd - validate RXON structure is valid
  594. *
  595. * NOTE: This is really only useful during development and can eventually
  596. * be #ifdef'd out once the driver is stable and folks aren't actively
  597. * making changes
  598. */
  599. static int iwl3945_check_rxon_cmd(struct iwl_priv *priv)
  600. {
  601. int error = 0;
  602. int counter = 1;
  603. struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
  604. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  605. error |= le32_to_cpu(rxon->flags &
  606. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  607. RXON_FLG_RADAR_DETECT_MSK));
  608. if (error)
  609. IWL_WARN(priv, "check 24G fields %d | %d\n",
  610. counter++, error);
  611. } else {
  612. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  613. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  614. if (error)
  615. IWL_WARN(priv, "check 52 fields %d | %d\n",
  616. counter++, error);
  617. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  618. if (error)
  619. IWL_WARN(priv, "check 52 CCK %d | %d\n",
  620. counter++, error);
  621. }
  622. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  623. if (error)
  624. IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
  625. /* make sure basic rates 6Mbps and 1Mbps are supported */
  626. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  627. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  628. if (error)
  629. IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
  630. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  631. if (error)
  632. IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
  633. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  634. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  635. if (error)
  636. IWL_WARN(priv, "check CCK and short slot %d | %d\n",
  637. counter++, error);
  638. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  639. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  640. if (error)
  641. IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
  642. counter++, error);
  643. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  644. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  645. if (error)
  646. IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
  647. counter++, error);
  648. if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
  649. error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
  650. RXON_FLG_ANT_A_MSK)) == 0);
  651. if (error)
  652. IWL_WARN(priv, "check antenna %d %d\n", counter++, error);
  653. if (error)
  654. IWL_WARN(priv, "Tuning to channel %d\n",
  655. le16_to_cpu(rxon->channel));
  656. if (error) {
  657. IWL_ERR(priv, "Not a valid rxon_assoc_cmd field values\n");
  658. return -1;
  659. }
  660. return 0;
  661. }
  662. /**
  663. * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  664. * @priv: staging_rxon is compared to active_rxon
  665. *
  666. * If the RXON structure is changing enough to require a new tune,
  667. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  668. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  669. */
  670. static int iwl3945_full_rxon_required(struct iwl_priv *priv)
  671. {
  672. /* These items are only settable from the full RXON command */
  673. if (!(iwl3945_is_associated(priv)) ||
  674. compare_ether_addr(priv->staging39_rxon.bssid_addr,
  675. priv->active39_rxon.bssid_addr) ||
  676. compare_ether_addr(priv->staging39_rxon.node_addr,
  677. priv->active39_rxon.node_addr) ||
  678. compare_ether_addr(priv->staging39_rxon.wlap_bssid_addr,
  679. priv->active39_rxon.wlap_bssid_addr) ||
  680. (priv->staging39_rxon.dev_type != priv->active39_rxon.dev_type) ||
  681. (priv->staging39_rxon.channel != priv->active39_rxon.channel) ||
  682. (priv->staging39_rxon.air_propagation !=
  683. priv->active39_rxon.air_propagation) ||
  684. (priv->staging39_rxon.assoc_id != priv->active39_rxon.assoc_id))
  685. return 1;
  686. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  687. * be updated with the RXON_ASSOC command -- however only some
  688. * flag transitions are allowed using RXON_ASSOC */
  689. /* Check if we are not switching bands */
  690. if ((priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  691. (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK))
  692. return 1;
  693. /* Check if we are switching association toggle */
  694. if ((priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  695. (priv->active39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  696. return 1;
  697. return 0;
  698. }
  699. static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
  700. {
  701. int rc = 0;
  702. struct iwl_rx_packet *res = NULL;
  703. struct iwl3945_rxon_assoc_cmd rxon_assoc;
  704. struct iwl_host_cmd cmd = {
  705. .id = REPLY_RXON_ASSOC,
  706. .len = sizeof(rxon_assoc),
  707. .meta.flags = CMD_WANT_SKB,
  708. .data = &rxon_assoc,
  709. };
  710. const struct iwl3945_rxon_cmd *rxon1 = &priv->staging39_rxon;
  711. const struct iwl3945_rxon_cmd *rxon2 = &priv->active39_rxon;
  712. if ((rxon1->flags == rxon2->flags) &&
  713. (rxon1->filter_flags == rxon2->filter_flags) &&
  714. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  715. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  716. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  717. return 0;
  718. }
  719. rxon_assoc.flags = priv->staging39_rxon.flags;
  720. rxon_assoc.filter_flags = priv->staging39_rxon.filter_flags;
  721. rxon_assoc.ofdm_basic_rates = priv->staging39_rxon.ofdm_basic_rates;
  722. rxon_assoc.cck_basic_rates = priv->staging39_rxon.cck_basic_rates;
  723. rxon_assoc.reserved = 0;
  724. rc = iwl3945_send_cmd_sync(priv, &cmd);
  725. if (rc)
  726. return rc;
  727. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  728. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  729. IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n");
  730. rc = -EIO;
  731. }
  732. priv->alloc_rxb_skb--;
  733. dev_kfree_skb_any(cmd.meta.u.skb);
  734. return rc;
  735. }
  736. /**
  737. * iwl3945_commit_rxon - commit staging_rxon to hardware
  738. *
  739. * The RXON command in staging_rxon is committed to the hardware and
  740. * the active_rxon structure is updated with the new data. This
  741. * function correctly transitions out of the RXON_ASSOC_MSK state if
  742. * a HW tune is required based on the RXON structure changes.
  743. */
  744. static int iwl3945_commit_rxon(struct iwl_priv *priv)
  745. {
  746. /* cast away the const for active_rxon in this function */
  747. struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active39_rxon;
  748. int rc = 0;
  749. if (!iwl_is_alive(priv))
  750. return -1;
  751. /* always get timestamp with Rx frame */
  752. priv->staging39_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  753. /* select antenna */
  754. priv->staging39_rxon.flags &=
  755. ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
  756. priv->staging39_rxon.flags |= iwl3945_get_antenna_flags(priv);
  757. rc = iwl3945_check_rxon_cmd(priv);
  758. if (rc) {
  759. IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
  760. return -EINVAL;
  761. }
  762. /* If we don't need to send a full RXON, we can use
  763. * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
  764. * and other flags for the current radio configuration. */
  765. if (!iwl3945_full_rxon_required(priv)) {
  766. rc = iwl3945_send_rxon_assoc(priv);
  767. if (rc) {
  768. IWL_ERR(priv, "Error setting RXON_ASSOC "
  769. "configuration (%d).\n", rc);
  770. return rc;
  771. }
  772. memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
  773. return 0;
  774. }
  775. /* If we are currently associated and the new config requires
  776. * an RXON_ASSOC and the new config wants the associated mask enabled,
  777. * we must clear the associated from the active configuration
  778. * before we apply the new config */
  779. if (iwl3945_is_associated(priv) &&
  780. (priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  781. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  782. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  783. rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
  784. sizeof(struct iwl3945_rxon_cmd),
  785. &priv->active39_rxon);
  786. /* If the mask clearing failed then we set
  787. * active_rxon back to what it was previously */
  788. if (rc) {
  789. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  790. IWL_ERR(priv, "Error clearing ASSOC_MSK on current "
  791. "configuration (%d).\n", rc);
  792. return rc;
  793. }
  794. }
  795. IWL_DEBUG_INFO("Sending RXON\n"
  796. "* with%s RXON_FILTER_ASSOC_MSK\n"
  797. "* channel = %d\n"
  798. "* bssid = %pM\n",
  799. ((priv->staging39_rxon.filter_flags &
  800. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  801. le16_to_cpu(priv->staging39_rxon.channel),
  802. priv->staging_rxon.bssid_addr);
  803. /* Apply the new configuration */
  804. rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
  805. sizeof(struct iwl3945_rxon_cmd), &priv->staging39_rxon);
  806. if (rc) {
  807. IWL_ERR(priv, "Error setting new configuration (%d).\n", rc);
  808. return rc;
  809. }
  810. memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
  811. iwl3945_clear_stations_table(priv);
  812. /* If we issue a new RXON command which required a tune then we must
  813. * send a new TXPOWER command or we won't be able to Tx any frames */
  814. rc = iwl3945_hw_reg_send_txpower(priv);
  815. if (rc) {
  816. IWL_ERR(priv, "Error setting Tx power (%d).\n", rc);
  817. return rc;
  818. }
  819. /* Add the broadcast address so we can send broadcast frames */
  820. if (iwl3945_add_station(priv, iwl_bcast_addr, 0, 0) ==
  821. IWL_INVALID_STATION) {
  822. IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
  823. return -EIO;
  824. }
  825. /* If we have set the ASSOC_MSK and we are in BSS mode then
  826. * add the IWL_AP_ID to the station rate table */
  827. if (iwl3945_is_associated(priv) &&
  828. (priv->iw_mode == NL80211_IFTYPE_STATION))
  829. if (iwl3945_add_station(priv, priv->active39_rxon.bssid_addr, 1, 0)
  830. == IWL_INVALID_STATION) {
  831. IWL_ERR(priv, "Error adding AP address for transmit\n");
  832. return -EIO;
  833. }
  834. /* Init the hardware's rate fallback order based on the band */
  835. rc = iwl3945_init_hw_rate_table(priv);
  836. if (rc) {
  837. IWL_ERR(priv, "Error setting HW rate table: %02X\n", rc);
  838. return -EIO;
  839. }
  840. return 0;
  841. }
  842. static int iwl3945_send_bt_config(struct iwl_priv *priv)
  843. {
  844. struct iwl_bt_cmd bt_cmd = {
  845. .flags = 3,
  846. .lead_time = 0xAA,
  847. .max_kill = 1,
  848. .kill_ack_mask = 0,
  849. .kill_cts_mask = 0,
  850. };
  851. return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  852. sizeof(bt_cmd), &bt_cmd);
  853. }
  854. static int iwl3945_send_scan_abort(struct iwl_priv *priv)
  855. {
  856. int rc = 0;
  857. struct iwl_rx_packet *res;
  858. struct iwl_host_cmd cmd = {
  859. .id = REPLY_SCAN_ABORT_CMD,
  860. .meta.flags = CMD_WANT_SKB,
  861. };
  862. /* If there isn't a scan actively going on in the hardware
  863. * then we are in between scan bands and not actually
  864. * actively scanning, so don't send the abort command */
  865. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  866. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  867. return 0;
  868. }
  869. rc = iwl3945_send_cmd_sync(priv, &cmd);
  870. if (rc) {
  871. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  872. return rc;
  873. }
  874. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  875. if (res->u.status != CAN_ABORT_STATUS) {
  876. /* The scan abort will return 1 for success or
  877. * 2 for "failure". A failure condition can be
  878. * due to simply not being in an active scan which
  879. * can occur if we send the scan abort before we
  880. * the microcode has notified us that a scan is
  881. * completed. */
  882. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  883. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  884. clear_bit(STATUS_SCAN_HW, &priv->status);
  885. }
  886. dev_kfree_skb_any(cmd.meta.u.skb);
  887. return rc;
  888. }
  889. static int iwl3945_add_sta_sync_callback(struct iwl_priv *priv,
  890. struct iwl_cmd *cmd, struct sk_buff *skb)
  891. {
  892. struct iwl_rx_packet *res = NULL;
  893. if (!skb) {
  894. IWL_ERR(priv, "Error: Response NULL in REPLY_ADD_STA.\n");
  895. return 1;
  896. }
  897. res = (struct iwl_rx_packet *)skb->data;
  898. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  899. IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
  900. res->hdr.flags);
  901. return 1;
  902. }
  903. switch (res->u.add_sta.status) {
  904. case ADD_STA_SUCCESS_MSK:
  905. break;
  906. default:
  907. break;
  908. }
  909. /* We didn't cache the SKB; let the caller free it */
  910. return 1;
  911. }
  912. int iwl3945_send_add_station(struct iwl_priv *priv,
  913. struct iwl3945_addsta_cmd *sta, u8 flags)
  914. {
  915. struct iwl_rx_packet *res = NULL;
  916. int rc = 0;
  917. struct iwl_host_cmd cmd = {
  918. .id = REPLY_ADD_STA,
  919. .len = sizeof(struct iwl3945_addsta_cmd),
  920. .meta.flags = flags,
  921. .data = sta,
  922. };
  923. if (flags & CMD_ASYNC)
  924. cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
  925. else
  926. cmd.meta.flags |= CMD_WANT_SKB;
  927. rc = iwl3945_send_cmd(priv, &cmd);
  928. if (rc || (flags & CMD_ASYNC))
  929. return rc;
  930. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  931. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  932. IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
  933. res->hdr.flags);
  934. rc = -EIO;
  935. }
  936. if (rc == 0) {
  937. switch (res->u.add_sta.status) {
  938. case ADD_STA_SUCCESS_MSK:
  939. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  940. break;
  941. default:
  942. rc = -EIO;
  943. IWL_WARN(priv, "REPLY_ADD_STA failed\n");
  944. break;
  945. }
  946. }
  947. priv->alloc_rxb_skb--;
  948. dev_kfree_skb_any(cmd.meta.u.skb);
  949. return rc;
  950. }
  951. static int iwl3945_update_sta_key_info(struct iwl_priv *priv,
  952. struct ieee80211_key_conf *keyconf,
  953. u8 sta_id)
  954. {
  955. unsigned long flags;
  956. __le16 key_flags = 0;
  957. switch (keyconf->alg) {
  958. case ALG_CCMP:
  959. key_flags |= STA_KEY_FLG_CCMP;
  960. key_flags |= cpu_to_le16(
  961. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  962. key_flags &= ~STA_KEY_FLG_INVALID;
  963. break;
  964. case ALG_TKIP:
  965. case ALG_WEP:
  966. default:
  967. return -EINVAL;
  968. }
  969. spin_lock_irqsave(&priv->sta_lock, flags);
  970. priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
  971. priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
  972. memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
  973. keyconf->keylen);
  974. memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
  975. keyconf->keylen);
  976. priv->stations_39[sta_id].sta.key.key_flags = key_flags;
  977. priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  978. priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  979. spin_unlock_irqrestore(&priv->sta_lock, flags);
  980. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  981. iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
  982. return 0;
  983. }
  984. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  985. {
  986. unsigned long flags;
  987. spin_lock_irqsave(&priv->sta_lock, flags);
  988. memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
  989. memset(&priv->stations_39[sta_id].sta.key, 0,
  990. sizeof(struct iwl4965_keyinfo));
  991. priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  992. priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  993. priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  994. spin_unlock_irqrestore(&priv->sta_lock, flags);
  995. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  996. iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
  997. return 0;
  998. }
  999. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  1000. {
  1001. struct list_head *element;
  1002. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1003. priv->frames_count);
  1004. while (!list_empty(&priv->free_frames)) {
  1005. element = priv->free_frames.next;
  1006. list_del(element);
  1007. kfree(list_entry(element, struct iwl3945_frame, list));
  1008. priv->frames_count--;
  1009. }
  1010. if (priv->frames_count) {
  1011. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  1012. priv->frames_count);
  1013. priv->frames_count = 0;
  1014. }
  1015. }
  1016. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  1017. {
  1018. struct iwl3945_frame *frame;
  1019. struct list_head *element;
  1020. if (list_empty(&priv->free_frames)) {
  1021. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1022. if (!frame) {
  1023. IWL_ERR(priv, "Could not allocate frame!\n");
  1024. return NULL;
  1025. }
  1026. priv->frames_count++;
  1027. return frame;
  1028. }
  1029. element = priv->free_frames.next;
  1030. list_del(element);
  1031. return list_entry(element, struct iwl3945_frame, list);
  1032. }
  1033. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  1034. {
  1035. memset(frame, 0, sizeof(*frame));
  1036. list_add(&frame->list, &priv->free_frames);
  1037. }
  1038. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  1039. struct ieee80211_hdr *hdr,
  1040. int left)
  1041. {
  1042. if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
  1043. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  1044. (priv->iw_mode != NL80211_IFTYPE_AP)))
  1045. return 0;
  1046. if (priv->ibss_beacon->len > left)
  1047. return 0;
  1048. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1049. return priv->ibss_beacon->len;
  1050. }
  1051. static u8 iwl3945_rate_get_lowest_plcp(struct iwl_priv *priv)
  1052. {
  1053. u8 i;
  1054. int rate_mask;
  1055. /* Set rate mask*/
  1056. if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
  1057. rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
  1058. else
  1059. rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
  1060. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1061. i = iwl3945_rates[i].next_ieee) {
  1062. if (rate_mask & (1 << i))
  1063. return iwl3945_rates[i].plcp;
  1064. }
  1065. /* No valid rate was found. Assign the lowest one */
  1066. if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
  1067. return IWL_RATE_1M_PLCP;
  1068. else
  1069. return IWL_RATE_6M_PLCP;
  1070. }
  1071. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  1072. {
  1073. struct iwl3945_frame *frame;
  1074. unsigned int frame_size;
  1075. int rc;
  1076. u8 rate;
  1077. frame = iwl3945_get_free_frame(priv);
  1078. if (!frame) {
  1079. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  1080. "command.\n");
  1081. return -ENOMEM;
  1082. }
  1083. rate = iwl3945_rate_get_lowest_plcp(priv);
  1084. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  1085. rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1086. &frame->u.cmd[0]);
  1087. iwl3945_free_frame(priv, frame);
  1088. return rc;
  1089. }
  1090. /******************************************************************************
  1091. *
  1092. * EEPROM related functions
  1093. *
  1094. ******************************************************************************/
  1095. static void get_eeprom_mac(struct iwl_priv *priv, u8 *mac)
  1096. {
  1097. memcpy(mac, priv->eeprom39.mac_address, 6);
  1098. }
  1099. /*
  1100. * Clear the OWNER_MSK, to establish driver (instead of uCode running on
  1101. * embedded controller) as EEPROM reader; each read is a series of pulses
  1102. * to/from the EEPROM chip, not a single event, so even reads could conflict
  1103. * if they weren't arbitrated by some ownership mechanism. Here, the driver
  1104. * simply claims ownership, which should be safe when this function is called
  1105. * (i.e. before loading uCode!).
  1106. */
  1107. static inline int iwl3945_eeprom_acquire_semaphore(struct iwl_priv *priv)
  1108. {
  1109. _iwl_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
  1110. return 0;
  1111. }
  1112. /**
  1113. * iwl3945_eeprom_init - read EEPROM contents
  1114. *
  1115. * Load the EEPROM contents from adapter into priv->eeprom39
  1116. *
  1117. * NOTE: This routine uses the non-debug IO access functions.
  1118. */
  1119. int iwl3945_eeprom_init(struct iwl_priv *priv)
  1120. {
  1121. u16 *e = (u16 *)&priv->eeprom39;
  1122. u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
  1123. int sz = sizeof(priv->eeprom39);
  1124. int ret;
  1125. u16 addr;
  1126. /* The EEPROM structure has several padding buffers within it
  1127. * and when adding new EEPROM maps is subject to programmer errors
  1128. * which may be very difficult to identify without explicitly
  1129. * checking the resulting size of the eeprom map. */
  1130. BUILD_BUG_ON(sizeof(priv->eeprom39) != IWL_EEPROM_IMAGE_SIZE);
  1131. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  1132. IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
  1133. return -ENOENT;
  1134. }
  1135. /* Make sure driver (instead of uCode) is allowed to read EEPROM */
  1136. ret = iwl3945_eeprom_acquire_semaphore(priv);
  1137. if (ret < 0) {
  1138. IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
  1139. return -ENOENT;
  1140. }
  1141. /* eeprom is an array of 16bit values */
  1142. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  1143. u32 r;
  1144. _iwl_write32(priv, CSR_EEPROM_REG,
  1145. CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
  1146. _iwl_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
  1147. ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
  1148. CSR_EEPROM_REG_READ_VALID_MSK,
  1149. IWL_EEPROM_ACCESS_TIMEOUT);
  1150. if (ret < 0) {
  1151. IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr);
  1152. return ret;
  1153. }
  1154. r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
  1155. e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
  1156. }
  1157. return 0;
  1158. }
  1159. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  1160. {
  1161. if (priv->shared_virt)
  1162. pci_free_consistent(priv->pci_dev,
  1163. sizeof(struct iwl3945_shared),
  1164. priv->shared_virt,
  1165. priv->shared_phys);
  1166. }
  1167. /**
  1168. * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
  1169. *
  1170. * return : set the bit for each supported rate insert in ie
  1171. */
  1172. static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1173. u16 basic_rate, int *left)
  1174. {
  1175. u16 ret_rates = 0, bit;
  1176. int i;
  1177. u8 *cnt = ie;
  1178. u8 *rates = ie + 1;
  1179. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1180. if (bit & supported_rate) {
  1181. ret_rates |= bit;
  1182. rates[*cnt] = iwl3945_rates[i].ieee |
  1183. ((bit & basic_rate) ? 0x80 : 0x00);
  1184. (*cnt)++;
  1185. (*left)--;
  1186. if ((*left <= 0) ||
  1187. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1188. break;
  1189. }
  1190. }
  1191. return ret_rates;
  1192. }
  1193. /**
  1194. * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
  1195. */
  1196. static u16 iwl3945_fill_probe_req(struct iwl_priv *priv,
  1197. struct ieee80211_mgmt *frame,
  1198. int left)
  1199. {
  1200. int len = 0;
  1201. u8 *pos = NULL;
  1202. u16 active_rates, ret_rates, cck_rates;
  1203. /* Make sure there is enough space for the probe request,
  1204. * two mandatory IEs and the data */
  1205. left -= 24;
  1206. if (left < 0)
  1207. return 0;
  1208. len += 24;
  1209. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1210. memcpy(frame->da, iwl_bcast_addr, ETH_ALEN);
  1211. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1212. memcpy(frame->bssid, iwl_bcast_addr, ETH_ALEN);
  1213. frame->seq_ctrl = 0;
  1214. /* fill in our indirect SSID IE */
  1215. /* ...next IE... */
  1216. left -= 2;
  1217. if (left < 0)
  1218. return 0;
  1219. len += 2;
  1220. pos = &(frame->u.probe_req.variable[0]);
  1221. *pos++ = WLAN_EID_SSID;
  1222. *pos++ = 0;
  1223. /* fill in supported rate */
  1224. /* ...next IE... */
  1225. left -= 2;
  1226. if (left < 0)
  1227. return 0;
  1228. /* ... fill it in... */
  1229. *pos++ = WLAN_EID_SUPP_RATES;
  1230. *pos = 0;
  1231. priv->active_rate = priv->rates_mask;
  1232. active_rates = priv->active_rate;
  1233. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  1234. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1235. ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
  1236. priv->active_rate_basic, &left);
  1237. active_rates &= ~ret_rates;
  1238. ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
  1239. priv->active_rate_basic, &left);
  1240. active_rates &= ~ret_rates;
  1241. len += 2 + *pos;
  1242. pos += (*pos) + 1;
  1243. if (active_rates == 0)
  1244. goto fill_end;
  1245. /* fill in supported extended rate */
  1246. /* ...next IE... */
  1247. left -= 2;
  1248. if (left < 0)
  1249. return 0;
  1250. /* ... fill it in... */
  1251. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1252. *pos = 0;
  1253. iwl3945_supported_rate_to_ie(pos, active_rates,
  1254. priv->active_rate_basic, &left);
  1255. if (*pos > 0)
  1256. len += 2 + *pos;
  1257. fill_end:
  1258. return (u16)len;
  1259. }
  1260. /*
  1261. * QoS support
  1262. */
  1263. static int iwl3945_send_qos_params_command(struct iwl_priv *priv,
  1264. struct iwl_qosparam_cmd *qos)
  1265. {
  1266. return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1267. sizeof(struct iwl_qosparam_cmd), qos);
  1268. }
  1269. static void iwl3945_activate_qos(struct iwl_priv *priv, u8 force)
  1270. {
  1271. unsigned long flags;
  1272. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1273. return;
  1274. spin_lock_irqsave(&priv->lock, flags);
  1275. priv->qos_data.def_qos_parm.qos_flags = 0;
  1276. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1277. !priv->qos_data.qos_cap.q_AP.txop_request)
  1278. priv->qos_data.def_qos_parm.qos_flags |=
  1279. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1280. if (priv->qos_data.qos_active)
  1281. priv->qos_data.def_qos_parm.qos_flags |=
  1282. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1283. spin_unlock_irqrestore(&priv->lock, flags);
  1284. if (force || iwl3945_is_associated(priv)) {
  1285. IWL_DEBUG_QOS("send QoS cmd with QoS active %d \n",
  1286. priv->qos_data.qos_active);
  1287. iwl3945_send_qos_params_command(priv,
  1288. &(priv->qos_data.def_qos_parm));
  1289. }
  1290. }
  1291. /*
  1292. * Power management (not Tx power!) functions
  1293. */
  1294. #define MSEC_TO_USEC 1024
  1295. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1296. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1297. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1298. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1299. __constant_cpu_to_le32(X1), \
  1300. __constant_cpu_to_le32(X2), \
  1301. __constant_cpu_to_le32(X3), \
  1302. __constant_cpu_to_le32(X4)}
  1303. /* default power management (not Tx power) table values */
  1304. /* for TIM 0-10 */
  1305. static struct iwl_power_vec_entry range_0[IWL39_POWER_AC] = {
  1306. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1307. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1308. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1309. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1310. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1311. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1312. };
  1313. /* for TIM > 10 */
  1314. static struct iwl_power_vec_entry range_1[IWL39_POWER_AC] = {
  1315. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1316. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1317. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1318. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1319. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1320. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1321. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1322. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1323. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1324. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1325. };
  1326. int iwl3945_power_init_handle(struct iwl_priv *priv)
  1327. {
  1328. int rc = 0, i;
  1329. struct iwl3945_power_mgr *pow_data;
  1330. int size = sizeof(struct iwl_power_vec_entry) * IWL39_POWER_AC;
  1331. u16 pci_pm;
  1332. IWL_DEBUG_POWER("Initialize power \n");
  1333. pow_data = &(priv->power_data_39);
  1334. memset(pow_data, 0, sizeof(*pow_data));
  1335. pow_data->active_index = IWL_POWER_RANGE_0;
  1336. pow_data->dtim_val = 0xffff;
  1337. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1338. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1339. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1340. if (rc != 0)
  1341. return 0;
  1342. else {
  1343. struct iwl_powertable_cmd *cmd;
  1344. IWL_DEBUG_POWER("adjust power command flags\n");
  1345. for (i = 0; i < IWL39_POWER_AC; i++) {
  1346. cmd = &pow_data->pwr_range_0[i].cmd;
  1347. if (pci_pm & 0x1)
  1348. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1349. else
  1350. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1351. }
  1352. }
  1353. return rc;
  1354. }
  1355. static int iwl3945_update_power_cmd(struct iwl_priv *priv,
  1356. struct iwl_powertable_cmd *cmd, u32 mode)
  1357. {
  1358. int rc = 0, i;
  1359. u8 skip;
  1360. u32 max_sleep = 0;
  1361. struct iwl_power_vec_entry *range;
  1362. u8 period = 0;
  1363. struct iwl3945_power_mgr *pow_data;
  1364. if (mode > IWL_POWER_INDEX_5) {
  1365. IWL_DEBUG_POWER("Error invalid power mode \n");
  1366. return -1;
  1367. }
  1368. pow_data = &(priv->power_data_39);
  1369. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1370. range = &pow_data->pwr_range_0[0];
  1371. else
  1372. range = &pow_data->pwr_range_1[1];
  1373. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
  1374. #ifdef IWL_MAC80211_DISABLE
  1375. if (priv->assoc_network != NULL) {
  1376. unsigned long flags;
  1377. period = priv->assoc_network->tim.tim_period;
  1378. }
  1379. #endif /*IWL_MAC80211_DISABLE */
  1380. skip = range[mode].no_dtim;
  1381. if (period == 0) {
  1382. period = 1;
  1383. skip = 0;
  1384. }
  1385. if (skip == 0) {
  1386. max_sleep = period;
  1387. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1388. } else {
  1389. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1390. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1391. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1392. }
  1393. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1394. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1395. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1396. }
  1397. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1398. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1399. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1400. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1401. le32_to_cpu(cmd->sleep_interval[0]),
  1402. le32_to_cpu(cmd->sleep_interval[1]),
  1403. le32_to_cpu(cmd->sleep_interval[2]),
  1404. le32_to_cpu(cmd->sleep_interval[3]),
  1405. le32_to_cpu(cmd->sleep_interval[4]));
  1406. return rc;
  1407. }
  1408. static int iwl3945_send_power_mode(struct iwl_priv *priv, u32 mode)
  1409. {
  1410. u32 uninitialized_var(final_mode);
  1411. int rc;
  1412. struct iwl_powertable_cmd cmd;
  1413. /* If on battery, set to 3,
  1414. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1415. * else user level */
  1416. switch (mode) {
  1417. case IWL39_POWER_BATTERY:
  1418. final_mode = IWL_POWER_INDEX_3;
  1419. break;
  1420. case IWL39_POWER_AC:
  1421. final_mode = IWL_POWER_MODE_CAM;
  1422. break;
  1423. default:
  1424. final_mode = mode;
  1425. break;
  1426. }
  1427. iwl3945_update_power_cmd(priv, &cmd, final_mode);
  1428. /* FIXME use get_hcmd_size 3945 command is 4 bytes shorter */
  1429. rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD,
  1430. sizeof(struct iwl3945_powertable_cmd), &cmd);
  1431. if (final_mode == IWL_POWER_MODE_CAM)
  1432. clear_bit(STATUS_POWER_PMI, &priv->status);
  1433. else
  1434. set_bit(STATUS_POWER_PMI, &priv->status);
  1435. return rc;
  1436. }
  1437. #define MAX_UCODE_BEACON_INTERVAL 1024
  1438. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1439. static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
  1440. {
  1441. u16 new_val = 0;
  1442. u16 beacon_factor = 0;
  1443. beacon_factor =
  1444. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  1445. / MAX_UCODE_BEACON_INTERVAL;
  1446. new_val = beacon_val / beacon_factor;
  1447. return cpu_to_le16(new_val);
  1448. }
  1449. static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
  1450. {
  1451. u64 interval_tm_unit;
  1452. u64 tsf, result;
  1453. unsigned long flags;
  1454. struct ieee80211_conf *conf = NULL;
  1455. u16 beacon_int = 0;
  1456. conf = ieee80211_get_hw_conf(priv->hw);
  1457. spin_lock_irqsave(&priv->lock, flags);
  1458. priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
  1459. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  1460. tsf = priv->timestamp;
  1461. beacon_int = priv->beacon_int;
  1462. spin_unlock_irqrestore(&priv->lock, flags);
  1463. if (priv->iw_mode == NL80211_IFTYPE_STATION) {
  1464. if (beacon_int == 0) {
  1465. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  1466. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  1467. } else {
  1468. priv->rxon_timing.beacon_interval =
  1469. cpu_to_le16(beacon_int);
  1470. priv->rxon_timing.beacon_interval =
  1471. iwl3945_adjust_beacon_interval(
  1472. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1473. }
  1474. priv->rxon_timing.atim_window = 0;
  1475. } else {
  1476. priv->rxon_timing.beacon_interval =
  1477. iwl3945_adjust_beacon_interval(conf->beacon_int);
  1478. /* TODO: we need to get atim_window from upper stack
  1479. * for now we set to 0 */
  1480. priv->rxon_timing.atim_window = 0;
  1481. }
  1482. interval_tm_unit =
  1483. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  1484. result = do_div(tsf, interval_tm_unit);
  1485. priv->rxon_timing.beacon_init_val =
  1486. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  1487. IWL_DEBUG_ASSOC
  1488. ("beacon interval %d beacon timer %d beacon tim %d\n",
  1489. le16_to_cpu(priv->rxon_timing.beacon_interval),
  1490. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  1491. le16_to_cpu(priv->rxon_timing.atim_window));
  1492. }
  1493. static int iwl3945_scan_initiate(struct iwl_priv *priv)
  1494. {
  1495. if (!iwl_is_ready_rf(priv)) {
  1496. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  1497. return -EIO;
  1498. }
  1499. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1500. IWL_DEBUG_SCAN("Scan already in progress.\n");
  1501. return -EAGAIN;
  1502. }
  1503. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1504. IWL_DEBUG_SCAN("Scan request while abort pending. "
  1505. "Queuing.\n");
  1506. return -EAGAIN;
  1507. }
  1508. IWL_DEBUG_INFO("Starting scan...\n");
  1509. if (priv->cfg->sku & IWL_SKU_G)
  1510. priv->scan_bands |= BIT(IEEE80211_BAND_2GHZ);
  1511. if (priv->cfg->sku & IWL_SKU_A)
  1512. priv->scan_bands |= BIT(IEEE80211_BAND_5GHZ);
  1513. set_bit(STATUS_SCANNING, &priv->status);
  1514. priv->scan_start = jiffies;
  1515. priv->scan_pass_start = priv->scan_start;
  1516. queue_work(priv->workqueue, &priv->request_scan);
  1517. return 0;
  1518. }
  1519. static int iwl3945_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  1520. {
  1521. struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
  1522. if (hw_decrypt)
  1523. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  1524. else
  1525. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  1526. return 0;
  1527. }
  1528. static void iwl3945_set_flags_for_phymode(struct iwl_priv *priv,
  1529. enum ieee80211_band band)
  1530. {
  1531. if (band == IEEE80211_BAND_5GHZ) {
  1532. priv->staging39_rxon.flags &=
  1533. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  1534. | RXON_FLG_CCK_MSK);
  1535. priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1536. } else {
  1537. /* Copied from iwl3945_bg_post_associate() */
  1538. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  1539. priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1540. else
  1541. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1542. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  1543. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1544. priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  1545. priv->staging39_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  1546. priv->staging39_rxon.flags &= ~RXON_FLG_CCK_MSK;
  1547. }
  1548. }
  1549. /*
  1550. * initialize rxon structure with default values from eeprom
  1551. */
  1552. static void iwl3945_connection_init_rx_config(struct iwl_priv *priv,
  1553. int mode)
  1554. {
  1555. const struct iwl_channel_info *ch_info;
  1556. memset(&priv->staging39_rxon, 0, sizeof(priv->staging39_rxon));
  1557. switch (mode) {
  1558. case NL80211_IFTYPE_AP:
  1559. priv->staging39_rxon.dev_type = RXON_DEV_TYPE_AP;
  1560. break;
  1561. case NL80211_IFTYPE_STATION:
  1562. priv->staging39_rxon.dev_type = RXON_DEV_TYPE_ESS;
  1563. priv->staging39_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  1564. break;
  1565. case NL80211_IFTYPE_ADHOC:
  1566. priv->staging39_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  1567. priv->staging39_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  1568. priv->staging39_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  1569. RXON_FILTER_ACCEPT_GRP_MSK;
  1570. break;
  1571. case NL80211_IFTYPE_MONITOR:
  1572. priv->staging39_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  1573. priv->staging39_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  1574. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  1575. break;
  1576. default:
  1577. IWL_ERR(priv, "Unsupported interface type %d\n", mode);
  1578. break;
  1579. }
  1580. #if 0
  1581. /* TODO: Figure out when short_preamble would be set and cache from
  1582. * that */
  1583. if (!hw_to_local(priv->hw)->short_preamble)
  1584. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1585. else
  1586. priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1587. #endif
  1588. ch_info = iwl3945_get_channel_info(priv, priv->band,
  1589. le16_to_cpu(priv->active39_rxon.channel));
  1590. if (!ch_info)
  1591. ch_info = &priv->channel_info[0];
  1592. /*
  1593. * in some case A channels are all non IBSS
  1594. * in this case force B/G channel
  1595. */
  1596. if ((mode == NL80211_IFTYPE_ADHOC) && !(is_channel_ibss(ch_info)))
  1597. ch_info = &priv->channel_info[0];
  1598. priv->staging39_rxon.channel = cpu_to_le16(ch_info->channel);
  1599. if (is_channel_a_band(ch_info))
  1600. priv->band = IEEE80211_BAND_5GHZ;
  1601. else
  1602. priv->band = IEEE80211_BAND_2GHZ;
  1603. iwl3945_set_flags_for_phymode(priv, priv->band);
  1604. priv->staging39_rxon.ofdm_basic_rates =
  1605. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1606. priv->staging39_rxon.cck_basic_rates =
  1607. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1608. }
  1609. static int iwl3945_set_mode(struct iwl_priv *priv, int mode)
  1610. {
  1611. if (mode == NL80211_IFTYPE_ADHOC) {
  1612. const struct iwl_channel_info *ch_info;
  1613. ch_info = iwl3945_get_channel_info(priv,
  1614. priv->band,
  1615. le16_to_cpu(priv->staging39_rxon.channel));
  1616. if (!ch_info || !is_channel_ibss(ch_info)) {
  1617. IWL_ERR(priv, "channel %d not IBSS channel\n",
  1618. le16_to_cpu(priv->staging39_rxon.channel));
  1619. return -EINVAL;
  1620. }
  1621. }
  1622. iwl3945_connection_init_rx_config(priv, mode);
  1623. memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1624. iwl3945_clear_stations_table(priv);
  1625. /* don't commit rxon if rf-kill is on*/
  1626. if (!iwl_is_ready_rf(priv))
  1627. return -EAGAIN;
  1628. cancel_delayed_work(&priv->scan_check);
  1629. if (iwl_scan_cancel_timeout(priv, 100)) {
  1630. IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
  1631. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  1632. return -EAGAIN;
  1633. }
  1634. iwl3945_commit_rxon(priv);
  1635. return 0;
  1636. }
  1637. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  1638. struct ieee80211_tx_info *info,
  1639. struct iwl_cmd *cmd,
  1640. struct sk_buff *skb_frag,
  1641. int last_frag)
  1642. {
  1643. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  1644. struct iwl3945_hw_key *keyinfo =
  1645. &priv->stations_39[info->control.hw_key->hw_key_idx].keyinfo;
  1646. switch (keyinfo->alg) {
  1647. case ALG_CCMP:
  1648. tx->sec_ctl = TX_CMD_SEC_CCM;
  1649. memcpy(tx->key, keyinfo->key, keyinfo->keylen);
  1650. IWL_DEBUG_TX("tx_cmd with AES hwcrypto\n");
  1651. break;
  1652. case ALG_TKIP:
  1653. #if 0
  1654. tx->sec_ctl = TX_CMD_SEC_TKIP;
  1655. if (last_frag)
  1656. memcpy(tx->tkip_mic.byte, skb_frag->tail - 8,
  1657. 8);
  1658. else
  1659. memset(tx->tkip_mic.byte, 0, 8);
  1660. #endif
  1661. break;
  1662. case ALG_WEP:
  1663. tx->sec_ctl = TX_CMD_SEC_WEP |
  1664. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  1665. if (keyinfo->keylen == 13)
  1666. tx->sec_ctl |= TX_CMD_SEC_KEY128;
  1667. memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
  1668. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  1669. "with key %d\n", info->control.hw_key->hw_key_idx);
  1670. break;
  1671. default:
  1672. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  1673. break;
  1674. }
  1675. }
  1676. /*
  1677. * handle build REPLY_TX command notification.
  1678. */
  1679. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  1680. struct iwl_cmd *cmd,
  1681. struct ieee80211_tx_info *info,
  1682. struct ieee80211_hdr *hdr, u8 std_id)
  1683. {
  1684. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  1685. __le32 tx_flags = tx->tx_flags;
  1686. __le16 fc = hdr->frame_control;
  1687. u8 rc_flags = info->control.rates[0].flags;
  1688. tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  1689. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  1690. tx_flags |= TX_CMD_FLG_ACK_MSK;
  1691. if (ieee80211_is_mgmt(fc))
  1692. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1693. if (ieee80211_is_probe_resp(fc) &&
  1694. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  1695. tx_flags |= TX_CMD_FLG_TSF_MSK;
  1696. } else {
  1697. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  1698. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1699. }
  1700. tx->sta_id = std_id;
  1701. if (ieee80211_has_morefrags(fc))
  1702. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  1703. if (ieee80211_is_data_qos(fc)) {
  1704. u8 *qc = ieee80211_get_qos_ctl(hdr);
  1705. tx->tid_tspec = qc[0] & 0xf;
  1706. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  1707. } else {
  1708. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1709. }
  1710. if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  1711. tx_flags |= TX_CMD_FLG_RTS_MSK;
  1712. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  1713. } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  1714. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  1715. tx_flags |= TX_CMD_FLG_CTS_MSK;
  1716. }
  1717. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  1718. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  1719. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  1720. if (ieee80211_is_mgmt(fc)) {
  1721. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  1722. tx->timeout.pm_frame_timeout = cpu_to_le16(3);
  1723. else
  1724. tx->timeout.pm_frame_timeout = cpu_to_le16(2);
  1725. } else {
  1726. tx->timeout.pm_frame_timeout = 0;
  1727. #ifdef CONFIG_IWL3945_LEDS
  1728. priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
  1729. #endif
  1730. }
  1731. tx->driver_txop = 0;
  1732. tx->tx_flags = tx_flags;
  1733. tx->next_frame_len = 0;
  1734. }
  1735. /**
  1736. * iwl3945_get_sta_id - Find station's index within station table
  1737. */
  1738. static int iwl3945_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
  1739. {
  1740. int sta_id;
  1741. u16 fc = le16_to_cpu(hdr->frame_control);
  1742. /* If this frame is broadcast or management, use broadcast station id */
  1743. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  1744. is_multicast_ether_addr(hdr->addr1))
  1745. return priv->hw_params.bcast_sta_id;
  1746. switch (priv->iw_mode) {
  1747. /* If we are a client station in a BSS network, use the special
  1748. * AP station entry (that's the only station we communicate with) */
  1749. case NL80211_IFTYPE_STATION:
  1750. return IWL_AP_ID;
  1751. /* If we are an AP, then find the station, or use BCAST */
  1752. case NL80211_IFTYPE_AP:
  1753. sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
  1754. if (sta_id != IWL_INVALID_STATION)
  1755. return sta_id;
  1756. return priv->hw_params.bcast_sta_id;
  1757. /* If this frame is going out to an IBSS network, find the station,
  1758. * or create a new station table entry */
  1759. case NL80211_IFTYPE_ADHOC: {
  1760. /* Create new station table entry */
  1761. sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
  1762. if (sta_id != IWL_INVALID_STATION)
  1763. return sta_id;
  1764. sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
  1765. if (sta_id != IWL_INVALID_STATION)
  1766. return sta_id;
  1767. IWL_DEBUG_DROP("Station %pM not in station map. "
  1768. "Defaulting to broadcast...\n",
  1769. hdr->addr1);
  1770. iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  1771. return priv->hw_params.bcast_sta_id;
  1772. }
  1773. /* If we are in monitor mode, use BCAST. This is required for
  1774. * packet injection. */
  1775. case NL80211_IFTYPE_MONITOR:
  1776. return priv->hw_params.bcast_sta_id;
  1777. default:
  1778. IWL_WARN(priv, "Unknown mode of operation: %d\n",
  1779. priv->iw_mode);
  1780. return priv->hw_params.bcast_sta_id;
  1781. }
  1782. }
  1783. /*
  1784. * start REPLY_TX command process
  1785. */
  1786. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  1787. {
  1788. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  1789. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  1790. struct iwl3945_tx_cmd *tx;
  1791. struct iwl_tx_queue *txq = NULL;
  1792. struct iwl_queue *q = NULL;
  1793. struct iwl_cmd *out_cmd = NULL;
  1794. dma_addr_t phys_addr;
  1795. dma_addr_t txcmd_phys;
  1796. int txq_id = skb_get_queue_mapping(skb);
  1797. u16 len, idx, len_org, hdr_len;
  1798. u8 id;
  1799. u8 unicast;
  1800. u8 sta_id;
  1801. u8 tid = 0;
  1802. u16 seq_number = 0;
  1803. __le16 fc;
  1804. u8 wait_write_ptr = 0;
  1805. u8 *qc = NULL;
  1806. unsigned long flags;
  1807. int rc;
  1808. spin_lock_irqsave(&priv->lock, flags);
  1809. if (iwl_is_rfkill(priv)) {
  1810. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  1811. goto drop_unlock;
  1812. }
  1813. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  1814. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  1815. goto drop_unlock;
  1816. }
  1817. unicast = !is_multicast_ether_addr(hdr->addr1);
  1818. id = 0;
  1819. fc = hdr->frame_control;
  1820. #ifdef CONFIG_IWL3945_DEBUG
  1821. if (ieee80211_is_auth(fc))
  1822. IWL_DEBUG_TX("Sending AUTH frame\n");
  1823. else if (ieee80211_is_assoc_req(fc))
  1824. IWL_DEBUG_TX("Sending ASSOC frame\n");
  1825. else if (ieee80211_is_reassoc_req(fc))
  1826. IWL_DEBUG_TX("Sending REASSOC frame\n");
  1827. #endif
  1828. /* drop all data frame if we are not associated */
  1829. if (ieee80211_is_data(fc) &&
  1830. (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
  1831. (!iwl3945_is_associated(priv) ||
  1832. ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
  1833. IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
  1834. goto drop_unlock;
  1835. }
  1836. spin_unlock_irqrestore(&priv->lock, flags);
  1837. hdr_len = ieee80211_hdrlen(fc);
  1838. /* Find (or create) index into station table for destination station */
  1839. sta_id = iwl3945_get_sta_id(priv, hdr);
  1840. if (sta_id == IWL_INVALID_STATION) {
  1841. IWL_DEBUG_DROP("Dropping - INVALID STATION: %pM\n",
  1842. hdr->addr1);
  1843. goto drop;
  1844. }
  1845. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  1846. if (ieee80211_is_data_qos(fc)) {
  1847. qc = ieee80211_get_qos_ctl(hdr);
  1848. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  1849. seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
  1850. IEEE80211_SCTL_SEQ;
  1851. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  1852. (hdr->seq_ctrl &
  1853. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  1854. seq_number += 0x10;
  1855. }
  1856. /* Descriptor for chosen Tx queue */
  1857. txq = &priv->txq[txq_id];
  1858. q = &txq->q;
  1859. spin_lock_irqsave(&priv->lock, flags);
  1860. idx = get_cmd_index(q, q->write_ptr, 0);
  1861. /* Set up driver data for this TFD */
  1862. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  1863. txq->txb[q->write_ptr].skb[0] = skb;
  1864. /* Init first empty entry in queue's array of Tx/cmd buffers */
  1865. out_cmd = txq->cmd[idx];
  1866. tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  1867. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  1868. memset(tx, 0, sizeof(*tx));
  1869. /*
  1870. * Set up the Tx-command (not MAC!) header.
  1871. * Store the chosen Tx queue and TFD index within the sequence field;
  1872. * after Tx, uCode's Tx response will return this value so driver can
  1873. * locate the frame within the tx queue and do post-tx processing.
  1874. */
  1875. out_cmd->hdr.cmd = REPLY_TX;
  1876. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  1877. INDEX_TO_SEQ(q->write_ptr)));
  1878. /* Copy MAC header from skb into command buffer */
  1879. memcpy(tx->hdr, hdr, hdr_len);
  1880. /*
  1881. * Use the first empty entry in this queue's command buffer array
  1882. * to contain the Tx command and MAC header concatenated together
  1883. * (payload data will be in another buffer).
  1884. * Size of this varies, due to varying MAC header length.
  1885. * If end is not dword aligned, we'll have 2 extra bytes at the end
  1886. * of the MAC header (device reads on dword boundaries).
  1887. * We'll tell device about this padding later.
  1888. */
  1889. len = sizeof(struct iwl3945_tx_cmd) +
  1890. sizeof(struct iwl_cmd_header) + hdr_len;
  1891. len_org = len;
  1892. len = (len + 3) & ~3;
  1893. if (len_org != len)
  1894. len_org = 1;
  1895. else
  1896. len_org = 0;
  1897. /* Physical address of this Tx command's header (not MAC header!),
  1898. * within command buffer array. */
  1899. txcmd_phys = pci_map_single(priv->pci_dev,
  1900. out_cmd, sizeof(struct iwl_cmd),
  1901. PCI_DMA_TODEVICE);
  1902. pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
  1903. pci_unmap_len_set(&out_cmd->meta, len, sizeof(struct iwl_cmd));
  1904. /* Add buffer containing Tx command and MAC(!) header to TFD's
  1905. * first entry */
  1906. txcmd_phys += offsetof(struct iwl_cmd, hdr);
  1907. /* Add buffer containing Tx command and MAC(!) header to TFD's
  1908. * first entry */
  1909. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  1910. txcmd_phys, len, 1, 0);
  1911. if (info->control.hw_key)
  1912. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0);
  1913. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  1914. * if any (802.11 null frames have no payload). */
  1915. len = skb->len - hdr_len;
  1916. if (len) {
  1917. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  1918. len, PCI_DMA_TODEVICE);
  1919. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  1920. phys_addr, len,
  1921. 0, U32_PAD(len));
  1922. }
  1923. /* Total # bytes to be transmitted */
  1924. len = (u16)skb->len;
  1925. tx->len = cpu_to_le16(len);
  1926. /* TODO need this for burst mode later on */
  1927. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  1928. /* set is_hcca to 0; it probably will never be implemented */
  1929. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  1930. tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  1931. tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  1932. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  1933. txq->need_update = 1;
  1934. if (qc)
  1935. priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
  1936. } else {
  1937. wait_write_ptr = 1;
  1938. txq->need_update = 0;
  1939. }
  1940. iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
  1941. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
  1942. ieee80211_hdrlen(fc));
  1943. /* Tell device the write index *just past* this latest filled TFD */
  1944. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  1945. rc = iwl_txq_update_write_ptr(priv, txq);
  1946. spin_unlock_irqrestore(&priv->lock, flags);
  1947. if (rc)
  1948. return rc;
  1949. if ((iwl_queue_space(q) < q->high_mark)
  1950. && priv->mac80211_registered) {
  1951. if (wait_write_ptr) {
  1952. spin_lock_irqsave(&priv->lock, flags);
  1953. txq->need_update = 1;
  1954. iwl_txq_update_write_ptr(priv, txq);
  1955. spin_unlock_irqrestore(&priv->lock, flags);
  1956. }
  1957. ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb));
  1958. }
  1959. return 0;
  1960. drop_unlock:
  1961. spin_unlock_irqrestore(&priv->lock, flags);
  1962. drop:
  1963. return -1;
  1964. }
  1965. static void iwl3945_set_rate(struct iwl_priv *priv)
  1966. {
  1967. const struct ieee80211_supported_band *sband = NULL;
  1968. struct ieee80211_rate *rate;
  1969. int i;
  1970. sband = iwl_get_hw_mode(priv, priv->band);
  1971. if (!sband) {
  1972. IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
  1973. return;
  1974. }
  1975. priv->active_rate = 0;
  1976. priv->active_rate_basic = 0;
  1977. IWL_DEBUG_RATE("Setting rates for %s GHz\n",
  1978. sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
  1979. for (i = 0; i < sband->n_bitrates; i++) {
  1980. rate = &sband->bitrates[i];
  1981. if ((rate->hw_value < IWL_RATE_COUNT) &&
  1982. !(rate->flags & IEEE80211_CHAN_DISABLED)) {
  1983. IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
  1984. rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
  1985. priv->active_rate |= (1 << rate->hw_value);
  1986. }
  1987. }
  1988. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  1989. priv->active_rate, priv->active_rate_basic);
  1990. /*
  1991. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  1992. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  1993. * OFDM
  1994. */
  1995. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  1996. priv->staging39_rxon.cck_basic_rates =
  1997. ((priv->active_rate_basic &
  1998. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  1999. else
  2000. priv->staging39_rxon.cck_basic_rates =
  2001. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2002. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2003. priv->staging39_rxon.ofdm_basic_rates =
  2004. ((priv->active_rate_basic &
  2005. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2006. IWL_FIRST_OFDM_RATE) & 0xFF;
  2007. else
  2008. priv->staging39_rxon.ofdm_basic_rates =
  2009. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2010. }
  2011. static void iwl3945_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
  2012. {
  2013. unsigned long flags;
  2014. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2015. return;
  2016. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2017. disable_radio ? "OFF" : "ON");
  2018. if (disable_radio) {
  2019. iwl_scan_cancel(priv);
  2020. /* FIXME: This is a workaround for AP */
  2021. if (priv->iw_mode != NL80211_IFTYPE_AP) {
  2022. spin_lock_irqsave(&priv->lock, flags);
  2023. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2024. CSR_UCODE_SW_BIT_RFKILL);
  2025. spin_unlock_irqrestore(&priv->lock, flags);
  2026. iwl_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2027. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2028. }
  2029. return;
  2030. }
  2031. spin_lock_irqsave(&priv->lock, flags);
  2032. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2033. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2034. spin_unlock_irqrestore(&priv->lock, flags);
  2035. /* wake up ucode */
  2036. msleep(10);
  2037. spin_lock_irqsave(&priv->lock, flags);
  2038. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  2039. if (!iwl_grab_nic_access(priv))
  2040. iwl_release_nic_access(priv);
  2041. spin_unlock_irqrestore(&priv->lock, flags);
  2042. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2043. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2044. "disabled by HW switch\n");
  2045. return;
  2046. }
  2047. if (priv->is_open)
  2048. queue_work(priv->workqueue, &priv->restart);
  2049. return;
  2050. }
  2051. void iwl3945_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
  2052. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2053. {
  2054. u16 fc =
  2055. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2056. if (priv->active39_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2057. return;
  2058. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2059. return;
  2060. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2061. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2062. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2063. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2064. RX_RES_STATUS_BAD_ICV_MIC)
  2065. stats->flag |= RX_FLAG_MMIC_ERROR;
  2066. case RX_RES_STATUS_SEC_TYPE_WEP:
  2067. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2068. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2069. RX_RES_STATUS_DECRYPT_OK) {
  2070. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2071. stats->flag |= RX_FLAG_DECRYPTED;
  2072. }
  2073. break;
  2074. default:
  2075. break;
  2076. }
  2077. }
  2078. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  2079. #include "iwl-spectrum.h"
  2080. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2081. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2082. #define TIME_UNIT 1024
  2083. /*
  2084. * extended beacon time format
  2085. * time in usec will be changed into a 32-bit value in 8:24 format
  2086. * the high 1 byte is the beacon counts
  2087. * the lower 3 bytes is the time in usec within one beacon interval
  2088. */
  2089. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2090. {
  2091. u32 quot;
  2092. u32 rem;
  2093. u32 interval = beacon_interval * 1024;
  2094. if (!interval || !usec)
  2095. return 0;
  2096. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2097. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2098. return (quot << 24) + rem;
  2099. }
  2100. /* base is usually what we get from ucode with each received frame,
  2101. * the same as HW timer counter counting down
  2102. */
  2103. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2104. {
  2105. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2106. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2107. u32 interval = beacon_interval * TIME_UNIT;
  2108. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2109. (addon & BEACON_TIME_MASK_HIGH);
  2110. if (base_low > addon_low)
  2111. res += base_low - addon_low;
  2112. else if (base_low < addon_low) {
  2113. res += interval + base_low - addon_low;
  2114. res += (1 << 24);
  2115. } else
  2116. res += (1 << 24);
  2117. return cpu_to_le32(res);
  2118. }
  2119. static int iwl3945_get_measurement(struct iwl_priv *priv,
  2120. struct ieee80211_measurement_params *params,
  2121. u8 type)
  2122. {
  2123. struct iwl_spectrum_cmd spectrum;
  2124. struct iwl_rx_packet *res;
  2125. struct iwl_host_cmd cmd = {
  2126. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2127. .data = (void *)&spectrum,
  2128. .meta.flags = CMD_WANT_SKB,
  2129. };
  2130. u32 add_time = le64_to_cpu(params->start_time);
  2131. int rc;
  2132. int spectrum_resp_status;
  2133. int duration = le16_to_cpu(params->duration);
  2134. if (iwl3945_is_associated(priv))
  2135. add_time =
  2136. iwl3945_usecs_to_beacons(
  2137. le64_to_cpu(params->start_time) - priv->last_tsf,
  2138. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2139. memset(&spectrum, 0, sizeof(spectrum));
  2140. spectrum.channel_count = cpu_to_le16(1);
  2141. spectrum.flags =
  2142. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2143. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2144. cmd.len = sizeof(spectrum);
  2145. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2146. if (iwl3945_is_associated(priv))
  2147. spectrum.start_time =
  2148. iwl3945_add_beacon_time(priv->last_beacon_time,
  2149. add_time,
  2150. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2151. else
  2152. spectrum.start_time = 0;
  2153. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2154. spectrum.channels[0].channel = params->channel;
  2155. spectrum.channels[0].type = type;
  2156. if (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2157. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2158. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2159. rc = iwl3945_send_cmd_sync(priv, &cmd);
  2160. if (rc)
  2161. return rc;
  2162. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  2163. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2164. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  2165. rc = -EIO;
  2166. }
  2167. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2168. switch (spectrum_resp_status) {
  2169. case 0: /* Command will be handled */
  2170. if (res->u.spectrum.id != 0xff) {
  2171. IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
  2172. res->u.spectrum.id);
  2173. priv->measurement_status &= ~MEASUREMENT_READY;
  2174. }
  2175. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2176. rc = 0;
  2177. break;
  2178. case 1: /* Command will not be handled */
  2179. rc = -EAGAIN;
  2180. break;
  2181. }
  2182. dev_kfree_skb_any(cmd.meta.u.skb);
  2183. return rc;
  2184. }
  2185. #endif
  2186. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  2187. struct iwl_rx_mem_buffer *rxb)
  2188. {
  2189. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2190. struct iwl_alive_resp *palive;
  2191. struct delayed_work *pwork;
  2192. palive = &pkt->u.alive_frame;
  2193. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  2194. "0x%01X 0x%01X\n",
  2195. palive->is_valid, palive->ver_type,
  2196. palive->ver_subtype);
  2197. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  2198. IWL_DEBUG_INFO("Initialization Alive received.\n");
  2199. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  2200. sizeof(struct iwl_alive_resp));
  2201. pwork = &priv->init_alive_start;
  2202. } else {
  2203. IWL_DEBUG_INFO("Runtime Alive received.\n");
  2204. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  2205. sizeof(struct iwl_alive_resp));
  2206. pwork = &priv->alive_start;
  2207. iwl3945_disable_events(priv);
  2208. }
  2209. /* We delay the ALIVE response by 5ms to
  2210. * give the HW RF Kill time to activate... */
  2211. if (palive->is_valid == UCODE_VALID_OK)
  2212. queue_delayed_work(priv->workqueue, pwork,
  2213. msecs_to_jiffies(5));
  2214. else
  2215. IWL_WARN(priv, "uCode did not respond OK.\n");
  2216. }
  2217. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  2218. struct iwl_rx_mem_buffer *rxb)
  2219. {
  2220. #ifdef CONFIG_IWLWIFI_DEBUG
  2221. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2222. #endif
  2223. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  2224. return;
  2225. }
  2226. static void iwl3945_rx_reply_error(struct iwl_priv *priv,
  2227. struct iwl_rx_mem_buffer *rxb)
  2228. {
  2229. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2230. IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
  2231. "seq 0x%04X ser 0x%08X\n",
  2232. le32_to_cpu(pkt->u.err_resp.error_type),
  2233. get_cmd_string(pkt->u.err_resp.cmd_id),
  2234. pkt->u.err_resp.cmd_id,
  2235. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  2236. le32_to_cpu(pkt->u.err_resp.error_info));
  2237. }
  2238. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  2239. static void iwl3945_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  2240. {
  2241. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2242. struct iwl3945_rxon_cmd *rxon = (void *)&priv->active39_rxon;
  2243. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  2244. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  2245. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  2246. rxon->channel = csa->channel;
  2247. priv->staging39_rxon.channel = csa->channel;
  2248. }
  2249. static void iwl3945_rx_spectrum_measure_notif(struct iwl_priv *priv,
  2250. struct iwl_rx_mem_buffer *rxb)
  2251. {
  2252. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  2253. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2254. struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
  2255. if (!report->state) {
  2256. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  2257. "Spectrum Measure Notification: Start\n");
  2258. return;
  2259. }
  2260. memcpy(&priv->measure_report, report, sizeof(*report));
  2261. priv->measurement_status |= MEASUREMENT_READY;
  2262. #endif
  2263. }
  2264. static void iwl3945_rx_pm_sleep_notif(struct iwl_priv *priv,
  2265. struct iwl_rx_mem_buffer *rxb)
  2266. {
  2267. #ifdef CONFIG_IWL3945_DEBUG
  2268. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2269. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  2270. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  2271. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  2272. #endif
  2273. }
  2274. static void iwl3945_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  2275. struct iwl_rx_mem_buffer *rxb)
  2276. {
  2277. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2278. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  2279. "notification for %s:\n",
  2280. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  2281. iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw,
  2282. le32_to_cpu(pkt->len));
  2283. }
  2284. static void iwl3945_bg_beacon_update(struct work_struct *work)
  2285. {
  2286. struct iwl_priv *priv =
  2287. container_of(work, struct iwl_priv, beacon_update);
  2288. struct sk_buff *beacon;
  2289. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  2290. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  2291. if (!beacon) {
  2292. IWL_ERR(priv, "update beacon failed\n");
  2293. return;
  2294. }
  2295. mutex_lock(&priv->mutex);
  2296. /* new beacon skb is allocated every time; dispose previous.*/
  2297. if (priv->ibss_beacon)
  2298. dev_kfree_skb(priv->ibss_beacon);
  2299. priv->ibss_beacon = beacon;
  2300. mutex_unlock(&priv->mutex);
  2301. iwl3945_send_beacon_cmd(priv);
  2302. }
  2303. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  2304. struct iwl_rx_mem_buffer *rxb)
  2305. {
  2306. #ifdef CONFIG_IWL3945_DEBUG
  2307. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2308. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  2309. u8 rate = beacon->beacon_notify_hdr.rate;
  2310. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  2311. "tsf %d %d rate %d\n",
  2312. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  2313. beacon->beacon_notify_hdr.failure_frame,
  2314. le32_to_cpu(beacon->ibss_mgr_status),
  2315. le32_to_cpu(beacon->high_tsf),
  2316. le32_to_cpu(beacon->low_tsf), rate);
  2317. #endif
  2318. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  2319. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  2320. queue_work(priv->workqueue, &priv->beacon_update);
  2321. }
  2322. /* Service response to REPLY_SCAN_CMD (0x80) */
  2323. static void iwl3945_rx_reply_scan(struct iwl_priv *priv,
  2324. struct iwl_rx_mem_buffer *rxb)
  2325. {
  2326. #ifdef CONFIG_IWL3945_DEBUG
  2327. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2328. struct iwl_scanreq_notification *notif =
  2329. (struct iwl_scanreq_notification *)pkt->u.raw;
  2330. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  2331. #endif
  2332. }
  2333. /* Service SCAN_START_NOTIFICATION (0x82) */
  2334. static void iwl3945_rx_scan_start_notif(struct iwl_priv *priv,
  2335. struct iwl_rx_mem_buffer *rxb)
  2336. {
  2337. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2338. struct iwl_scanstart_notification *notif =
  2339. (struct iwl_scanstart_notification *)pkt->u.raw;
  2340. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  2341. IWL_DEBUG_SCAN("Scan start: "
  2342. "%d [802.11%s] "
  2343. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  2344. notif->channel,
  2345. notif->band ? "bg" : "a",
  2346. notif->tsf_high,
  2347. notif->tsf_low, notif->status, notif->beacon_timer);
  2348. }
  2349. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  2350. static void iwl3945_rx_scan_results_notif(struct iwl_priv *priv,
  2351. struct iwl_rx_mem_buffer *rxb)
  2352. {
  2353. #ifdef CONFIG_IWLWIFI_DEBUG
  2354. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2355. struct iwl_scanresults_notification *notif =
  2356. (struct iwl_scanresults_notification *)pkt->u.raw;
  2357. #endif
  2358. IWL_DEBUG_SCAN("Scan ch.res: "
  2359. "%d [802.11%s] "
  2360. "(TSF: 0x%08X:%08X) - %d "
  2361. "elapsed=%lu usec (%dms since last)\n",
  2362. notif->channel,
  2363. notif->band ? "bg" : "a",
  2364. le32_to_cpu(notif->tsf_high),
  2365. le32_to_cpu(notif->tsf_low),
  2366. le32_to_cpu(notif->statistics[0]),
  2367. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  2368. jiffies_to_msecs(elapsed_jiffies
  2369. (priv->last_scan_jiffies, jiffies)));
  2370. priv->last_scan_jiffies = jiffies;
  2371. priv->next_scan_jiffies = 0;
  2372. }
  2373. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  2374. static void iwl3945_rx_scan_complete_notif(struct iwl_priv *priv,
  2375. struct iwl_rx_mem_buffer *rxb)
  2376. {
  2377. #ifdef CONFIG_IWLWIFI_DEBUG
  2378. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2379. struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  2380. #endif
  2381. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  2382. scan_notif->scanned_channels,
  2383. scan_notif->tsf_low,
  2384. scan_notif->tsf_high, scan_notif->status);
  2385. /* The HW is no longer scanning */
  2386. clear_bit(STATUS_SCAN_HW, &priv->status);
  2387. /* The scan completion notification came in, so kill that timer... */
  2388. cancel_delayed_work(&priv->scan_check);
  2389. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  2390. (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) ?
  2391. "2.4" : "5.2",
  2392. jiffies_to_msecs(elapsed_jiffies
  2393. (priv->scan_pass_start, jiffies)));
  2394. /* Remove this scanned band from the list of pending
  2395. * bands to scan, band G precedes A in order of scanning
  2396. * as seen in iwl3945_bg_request_scan */
  2397. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ))
  2398. priv->scan_bands &= ~BIT(IEEE80211_BAND_2GHZ);
  2399. else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ))
  2400. priv->scan_bands &= ~BIT(IEEE80211_BAND_5GHZ);
  2401. /* If a request to abort was given, or the scan did not succeed
  2402. * then we reset the scan state machine and terminate,
  2403. * re-queuing another scan if one has been requested */
  2404. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2405. IWL_DEBUG_INFO("Aborted scan completed.\n");
  2406. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  2407. } else {
  2408. /* If there are more bands on this scan pass reschedule */
  2409. if (priv->scan_bands > 0)
  2410. goto reschedule;
  2411. }
  2412. priv->last_scan_jiffies = jiffies;
  2413. priv->next_scan_jiffies = 0;
  2414. IWL_DEBUG_INFO("Setting scan to off\n");
  2415. clear_bit(STATUS_SCANNING, &priv->status);
  2416. IWL_DEBUG_INFO("Scan took %dms\n",
  2417. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  2418. queue_work(priv->workqueue, &priv->scan_completed);
  2419. return;
  2420. reschedule:
  2421. priv->scan_pass_start = jiffies;
  2422. queue_work(priv->workqueue, &priv->request_scan);
  2423. }
  2424. /* Handle notification from uCode that card's power state is changing
  2425. * due to software, hardware, or critical temperature RFKILL */
  2426. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  2427. struct iwl_rx_mem_buffer *rxb)
  2428. {
  2429. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2430. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  2431. unsigned long status = priv->status;
  2432. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  2433. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  2434. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  2435. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2436. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2437. if (flags & HW_CARD_DISABLED)
  2438. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2439. else
  2440. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2441. if (flags & SW_CARD_DISABLED)
  2442. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2443. else
  2444. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2445. iwl_scan_cancel(priv);
  2446. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  2447. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  2448. (test_bit(STATUS_RF_KILL_SW, &status) !=
  2449. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  2450. queue_work(priv->workqueue, &priv->rf_kill);
  2451. else
  2452. wake_up_interruptible(&priv->wait_command_queue);
  2453. }
  2454. /**
  2455. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  2456. *
  2457. * Setup the RX handlers for each of the reply types sent from the uCode
  2458. * to the host.
  2459. *
  2460. * This function chains into the hardware specific files for them to setup
  2461. * any hardware specific handlers as well.
  2462. */
  2463. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  2464. {
  2465. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  2466. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  2467. priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
  2468. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
  2469. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  2470. iwl3945_rx_spectrum_measure_notif;
  2471. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
  2472. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  2473. iwl3945_rx_pm_debug_statistics_notif;
  2474. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  2475. /*
  2476. * The same handler is used for both the REPLY to a discrete
  2477. * statistics request from the host as well as for the periodic
  2478. * statistics notifications (after received beacons) from the uCode.
  2479. */
  2480. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
  2481. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  2482. priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
  2483. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
  2484. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  2485. iwl3945_rx_scan_results_notif;
  2486. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  2487. iwl3945_rx_scan_complete_notif;
  2488. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  2489. /* Set up hardware specific Rx handlers */
  2490. iwl3945_hw_rx_handler_setup(priv);
  2491. }
  2492. /**
  2493. * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
  2494. * When FW advances 'R' index, all entries between old and new 'R' index
  2495. * need to be reclaimed.
  2496. */
  2497. static void iwl3945_cmd_queue_reclaim(struct iwl_priv *priv,
  2498. int txq_id, int index)
  2499. {
  2500. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  2501. struct iwl_queue *q = &txq->q;
  2502. int nfreed = 0;
  2503. if ((index >= q->n_bd) || (iwl_queue_used(q, index) == 0)) {
  2504. IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, "
  2505. "is out of range [0-%d] %d %d.\n", txq_id,
  2506. index, q->n_bd, q->write_ptr, q->read_ptr);
  2507. return;
  2508. }
  2509. for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
  2510. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2511. if (nfreed > 1) {
  2512. IWL_ERR(priv, "HCMD skipped: index (%d) %d %d\n", index,
  2513. q->write_ptr, q->read_ptr);
  2514. queue_work(priv->workqueue, &priv->restart);
  2515. break;
  2516. }
  2517. nfreed++;
  2518. }
  2519. }
  2520. /**
  2521. * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  2522. * @rxb: Rx buffer to reclaim
  2523. *
  2524. * If an Rx buffer has an async callback associated with it the callback
  2525. * will be executed. The attached skb (if present) will only be freed
  2526. * if the callback returns 1
  2527. */
  2528. static void iwl3945_tx_cmd_complete(struct iwl_priv *priv,
  2529. struct iwl_rx_mem_buffer *rxb)
  2530. {
  2531. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  2532. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2533. int txq_id = SEQ_TO_QUEUE(sequence);
  2534. int index = SEQ_TO_INDEX(sequence);
  2535. int huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
  2536. int cmd_index;
  2537. struct iwl_cmd *cmd;
  2538. if (WARN(txq_id != IWL_CMD_QUEUE_NUM,
  2539. "wrong command queue %d, sequence 0x%X readp=%d writep=%d\n",
  2540. txq_id, sequence,
  2541. priv->txq[IWL_CMD_QUEUE_NUM].q.read_ptr,
  2542. priv->txq[IWL_CMD_QUEUE_NUM].q.write_ptr)) {
  2543. iwl_print_hex_dump(priv, IWL_DL_INFO , rxb, 32);
  2544. return;
  2545. }
  2546. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  2547. cmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  2548. /* Input error checking is done when commands are added to queue. */
  2549. if (cmd->meta.flags & CMD_WANT_SKB) {
  2550. cmd->meta.source->u.skb = rxb->skb;
  2551. rxb->skb = NULL;
  2552. } else if (cmd->meta.u.callback &&
  2553. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  2554. rxb->skb = NULL;
  2555. iwl3945_cmd_queue_reclaim(priv, txq_id, index);
  2556. if (!(cmd->meta.flags & CMD_ASYNC)) {
  2557. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  2558. wake_up_interruptible(&priv->wait_command_queue);
  2559. }
  2560. }
  2561. /************************** RX-FUNCTIONS ****************************/
  2562. /*
  2563. * Rx theory of operation
  2564. *
  2565. * The host allocates 32 DMA target addresses and passes the host address
  2566. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  2567. * 0 to 31
  2568. *
  2569. * Rx Queue Indexes
  2570. * The host/firmware share two index registers for managing the Rx buffers.
  2571. *
  2572. * The READ index maps to the first position that the firmware may be writing
  2573. * to -- the driver can read up to (but not including) this position and get
  2574. * good data.
  2575. * The READ index is managed by the firmware once the card is enabled.
  2576. *
  2577. * The WRITE index maps to the last position the driver has read from -- the
  2578. * position preceding WRITE is the last slot the firmware can place a packet.
  2579. *
  2580. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  2581. * WRITE = READ.
  2582. *
  2583. * During initialization, the host sets up the READ queue position to the first
  2584. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  2585. *
  2586. * When the firmware places a packet in a buffer, it will advance the READ index
  2587. * and fire the RX interrupt. The driver can then query the READ index and
  2588. * process as many packets as possible, moving the WRITE index forward as it
  2589. * resets the Rx queue buffers with new memory.
  2590. *
  2591. * The management in the driver is as follows:
  2592. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  2593. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  2594. * to replenish the iwl->rxq->rx_free.
  2595. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  2596. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  2597. * 'processed' and 'read' driver indexes as well)
  2598. * + A received packet is processed and handed to the kernel network stack,
  2599. * detached from the iwl->rxq. The driver 'processed' index is updated.
  2600. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  2601. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  2602. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  2603. * were enough free buffers and RX_STALLED is set it is cleared.
  2604. *
  2605. *
  2606. * Driver sequence:
  2607. *
  2608. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  2609. * iwl3945_rx_queue_restock
  2610. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  2611. * queue, updates firmware pointers, and updates
  2612. * the WRITE index. If insufficient rx_free buffers
  2613. * are available, schedules iwl3945_rx_replenish
  2614. *
  2615. * -- enable interrupts --
  2616. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  2617. * READ INDEX, detaching the SKB from the pool.
  2618. * Moves the packet buffer from queue to rx_used.
  2619. * Calls iwl3945_rx_queue_restock to refill any empty
  2620. * slots.
  2621. * ...
  2622. *
  2623. */
  2624. /**
  2625. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  2626. */
  2627. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  2628. dma_addr_t dma_addr)
  2629. {
  2630. return cpu_to_le32((u32)dma_addr);
  2631. }
  2632. /**
  2633. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  2634. *
  2635. * If there are slots in the RX queue that need to be restocked,
  2636. * and we have free pre-allocated buffers, fill the ranks as much
  2637. * as we can, pulling from rx_free.
  2638. *
  2639. * This moves the 'write' index forward to catch up with 'processed', and
  2640. * also updates the memory address in the firmware to reference the new
  2641. * target buffer.
  2642. */
  2643. static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
  2644. {
  2645. struct iwl_rx_queue *rxq = &priv->rxq;
  2646. struct list_head *element;
  2647. struct iwl_rx_mem_buffer *rxb;
  2648. unsigned long flags;
  2649. int write, rc;
  2650. spin_lock_irqsave(&rxq->lock, flags);
  2651. write = rxq->write & ~0x7;
  2652. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  2653. /* Get next free Rx buffer, remove from free list */
  2654. element = rxq->rx_free.next;
  2655. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  2656. list_del(element);
  2657. /* Point to Rx buffer via next RBD in circular buffer */
  2658. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
  2659. rxq->queue[rxq->write] = rxb;
  2660. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  2661. rxq->free_count--;
  2662. }
  2663. spin_unlock_irqrestore(&rxq->lock, flags);
  2664. /* If the pre-allocated buffer pool is dropping low, schedule to
  2665. * refill it */
  2666. if (rxq->free_count <= RX_LOW_WATERMARK)
  2667. queue_work(priv->workqueue, &priv->rx_replenish);
  2668. /* If we've added more space for the firmware to place data, tell it.
  2669. * Increment device's write pointer in multiples of 8. */
  2670. if ((write != (rxq->write & ~0x7))
  2671. || (abs(rxq->write - rxq->read) > 7)) {
  2672. spin_lock_irqsave(&rxq->lock, flags);
  2673. rxq->need_update = 1;
  2674. spin_unlock_irqrestore(&rxq->lock, flags);
  2675. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  2676. if (rc)
  2677. return rc;
  2678. }
  2679. return 0;
  2680. }
  2681. /**
  2682. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  2683. *
  2684. * When moving to rx_free an SKB is allocated for the slot.
  2685. *
  2686. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  2687. * This is called as a scheduled work item (except for during initialization)
  2688. */
  2689. static void iwl3945_rx_allocate(struct iwl_priv *priv)
  2690. {
  2691. struct iwl_rx_queue *rxq = &priv->rxq;
  2692. struct list_head *element;
  2693. struct iwl_rx_mem_buffer *rxb;
  2694. unsigned long flags;
  2695. spin_lock_irqsave(&rxq->lock, flags);
  2696. while (!list_empty(&rxq->rx_used)) {
  2697. element = rxq->rx_used.next;
  2698. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  2699. /* Alloc a new receive buffer */
  2700. rxb->skb =
  2701. alloc_skb(priv->hw_params.rx_buf_size,
  2702. __GFP_NOWARN | GFP_ATOMIC);
  2703. if (!rxb->skb) {
  2704. if (net_ratelimit())
  2705. IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
  2706. /* We don't reschedule replenish work here -- we will
  2707. * call the restock method and if it still needs
  2708. * more buffers it will schedule replenish */
  2709. break;
  2710. }
  2711. /* If radiotap head is required, reserve some headroom here.
  2712. * The physical head count is a variable rx_stats->phy_count.
  2713. * We reserve 4 bytes here. Plus these extra bytes, the
  2714. * headroom of the physical head should be enough for the
  2715. * radiotap head that iwl3945 supported. See iwl3945_rt.
  2716. */
  2717. skb_reserve(rxb->skb, 4);
  2718. priv->alloc_rxb_skb++;
  2719. list_del(element);
  2720. /* Get physical address of RB/SKB */
  2721. rxb->real_dma_addr = pci_map_single(priv->pci_dev,
  2722. rxb->skb->data,
  2723. priv->hw_params.rx_buf_size,
  2724. PCI_DMA_FROMDEVICE);
  2725. list_add_tail(&rxb->list, &rxq->rx_free);
  2726. rxq->free_count++;
  2727. }
  2728. spin_unlock_irqrestore(&rxq->lock, flags);
  2729. }
  2730. /*
  2731. * this should be called while priv->lock is locked
  2732. */
  2733. static void __iwl3945_rx_replenish(void *data)
  2734. {
  2735. struct iwl_priv *priv = data;
  2736. iwl3945_rx_allocate(priv);
  2737. iwl3945_rx_queue_restock(priv);
  2738. }
  2739. void iwl3945_rx_replenish(void *data)
  2740. {
  2741. struct iwl_priv *priv = data;
  2742. unsigned long flags;
  2743. iwl3945_rx_allocate(priv);
  2744. spin_lock_irqsave(&priv->lock, flags);
  2745. iwl3945_rx_queue_restock(priv);
  2746. spin_unlock_irqrestore(&priv->lock, flags);
  2747. }
  2748. /* Convert linear signal-to-noise ratio into dB */
  2749. static u8 ratio2dB[100] = {
  2750. /* 0 1 2 3 4 5 6 7 8 9 */
  2751. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  2752. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  2753. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  2754. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  2755. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  2756. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  2757. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  2758. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  2759. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  2760. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  2761. };
  2762. /* Calculates a relative dB value from a ratio of linear
  2763. * (i.e. not dB) signal levels.
  2764. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  2765. int iwl3945_calc_db_from_ratio(int sig_ratio)
  2766. {
  2767. /* 1000:1 or higher just report as 60 dB */
  2768. if (sig_ratio >= 1000)
  2769. return 60;
  2770. /* 100:1 or higher, divide by 10 and use table,
  2771. * add 20 dB to make up for divide by 10 */
  2772. if (sig_ratio >= 100)
  2773. return 20 + (int)ratio2dB[sig_ratio/10];
  2774. /* We shouldn't see this */
  2775. if (sig_ratio < 1)
  2776. return 0;
  2777. /* Use table for ratios 1:1 - 99:1 */
  2778. return (int)ratio2dB[sig_ratio];
  2779. }
  2780. #define PERFECT_RSSI (-20) /* dBm */
  2781. #define WORST_RSSI (-95) /* dBm */
  2782. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  2783. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  2784. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  2785. * about formulas used below. */
  2786. int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
  2787. {
  2788. int sig_qual;
  2789. int degradation = PERFECT_RSSI - rssi_dbm;
  2790. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  2791. * as indicator; formula is (signal dbm - noise dbm).
  2792. * SNR at or above 40 is a great signal (100%).
  2793. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  2794. * Weakest usable signal is usually 10 - 15 dB SNR. */
  2795. if (noise_dbm) {
  2796. if (rssi_dbm - noise_dbm >= 40)
  2797. return 100;
  2798. else if (rssi_dbm < noise_dbm)
  2799. return 0;
  2800. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  2801. /* Else use just the signal level.
  2802. * This formula is a least squares fit of data points collected and
  2803. * compared with a reference system that had a percentage (%) display
  2804. * for signal quality. */
  2805. } else
  2806. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  2807. (15 * RSSI_RANGE + 62 * degradation)) /
  2808. (RSSI_RANGE * RSSI_RANGE);
  2809. if (sig_qual > 100)
  2810. sig_qual = 100;
  2811. else if (sig_qual < 1)
  2812. sig_qual = 0;
  2813. return sig_qual;
  2814. }
  2815. /**
  2816. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  2817. *
  2818. * Uses the priv->rx_handlers callback function array to invoke
  2819. * the appropriate handlers, including command responses,
  2820. * frame-received notifications, and other notifications.
  2821. */
  2822. static void iwl3945_rx_handle(struct iwl_priv *priv)
  2823. {
  2824. struct iwl_rx_mem_buffer *rxb;
  2825. struct iwl_rx_packet *pkt;
  2826. struct iwl_rx_queue *rxq = &priv->rxq;
  2827. u32 r, i;
  2828. int reclaim;
  2829. unsigned long flags;
  2830. u8 fill_rx = 0;
  2831. u32 count = 8;
  2832. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  2833. * buffer that the driver may process (last buffer filled by ucode). */
  2834. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  2835. i = rxq->read;
  2836. if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  2837. fill_rx = 1;
  2838. /* Rx interrupt, but nothing sent from uCode */
  2839. if (i == r)
  2840. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  2841. while (i != r) {
  2842. rxb = rxq->queue[i];
  2843. /* If an RXB doesn't have a Rx queue slot associated with it,
  2844. * then a bug has been introduced in the queue refilling
  2845. * routines -- catch it here */
  2846. BUG_ON(rxb == NULL);
  2847. rxq->queue[i] = NULL;
  2848. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->real_dma_addr,
  2849. priv->hw_params.rx_buf_size,
  2850. PCI_DMA_FROMDEVICE);
  2851. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  2852. /* Reclaim a command buffer only if this packet is a response
  2853. * to a (driver-originated) command.
  2854. * If the packet (e.g. Rx frame) originated from uCode,
  2855. * there is no command buffer to reclaim.
  2856. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  2857. * but apparently a few don't get set; catch them here. */
  2858. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  2859. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  2860. (pkt->hdr.cmd != REPLY_TX);
  2861. /* Based on type of command response or notification,
  2862. * handle those that need handling via function in
  2863. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  2864. if (priv->rx_handlers[pkt->hdr.cmd]) {
  2865. IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  2866. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  2867. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  2868. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  2869. } else {
  2870. /* No handling needed */
  2871. IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  2872. "r %d i %d No handler needed for %s, 0x%02x\n",
  2873. r, i, get_cmd_string(pkt->hdr.cmd),
  2874. pkt->hdr.cmd);
  2875. }
  2876. if (reclaim) {
  2877. /* Invoke any callbacks, transfer the skb to caller, and
  2878. * fire off the (possibly) blocking iwl3945_send_cmd()
  2879. * as we reclaim the driver command queue */
  2880. if (rxb && rxb->skb)
  2881. iwl3945_tx_cmd_complete(priv, rxb);
  2882. else
  2883. IWL_WARN(priv, "Claim null rxb?\n");
  2884. }
  2885. /* For now we just don't re-use anything. We can tweak this
  2886. * later to try and re-use notification packets and SKBs that
  2887. * fail to Rx correctly */
  2888. if (rxb->skb != NULL) {
  2889. priv->alloc_rxb_skb--;
  2890. dev_kfree_skb_any(rxb->skb);
  2891. rxb->skb = NULL;
  2892. }
  2893. pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
  2894. priv->hw_params.rx_buf_size,
  2895. PCI_DMA_FROMDEVICE);
  2896. spin_lock_irqsave(&rxq->lock, flags);
  2897. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  2898. spin_unlock_irqrestore(&rxq->lock, flags);
  2899. i = (i + 1) & RX_QUEUE_MASK;
  2900. /* If there are a lot of unused frames,
  2901. * restock the Rx queue so ucode won't assert. */
  2902. if (fill_rx) {
  2903. count++;
  2904. if (count >= 8) {
  2905. priv->rxq.read = i;
  2906. __iwl3945_rx_replenish(priv);
  2907. count = 0;
  2908. }
  2909. }
  2910. }
  2911. /* Backtrack one entry */
  2912. priv->rxq.read = i;
  2913. iwl3945_rx_queue_restock(priv);
  2914. }
  2915. #ifdef CONFIG_IWL3945_DEBUG
  2916. static void iwl3945_print_rx_config_cmd(struct iwl_priv *priv,
  2917. struct iwl3945_rxon_cmd *rxon)
  2918. {
  2919. IWL_DEBUG_RADIO("RX CONFIG:\n");
  2920. iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  2921. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  2922. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  2923. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  2924. le32_to_cpu(rxon->filter_flags));
  2925. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  2926. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  2927. rxon->ofdm_basic_rates);
  2928. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  2929. IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
  2930. IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  2931. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  2932. }
  2933. #endif
  2934. static void iwl3945_enable_interrupts(struct iwl_priv *priv)
  2935. {
  2936. IWL_DEBUG_ISR("Enabling interrupts\n");
  2937. set_bit(STATUS_INT_ENABLED, &priv->status);
  2938. iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  2939. }
  2940. /* call this function to flush any scheduled tasklet */
  2941. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  2942. {
  2943. /* wait to make sure we flush pending tasklet*/
  2944. synchronize_irq(priv->pci_dev->irq);
  2945. tasklet_kill(&priv->irq_tasklet);
  2946. }
  2947. static inline void iwl3945_disable_interrupts(struct iwl_priv *priv)
  2948. {
  2949. clear_bit(STATUS_INT_ENABLED, &priv->status);
  2950. /* disable interrupts from uCode/NIC to host */
  2951. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  2952. /* acknowledge/clear/reset any interrupts still pending
  2953. * from uCode or flow handler (Rx/Tx DMA) */
  2954. iwl_write32(priv, CSR_INT, 0xffffffff);
  2955. iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  2956. IWL_DEBUG_ISR("Disabled interrupts\n");
  2957. }
  2958. static const char *desc_lookup(int i)
  2959. {
  2960. switch (i) {
  2961. case 1:
  2962. return "FAIL";
  2963. case 2:
  2964. return "BAD_PARAM";
  2965. case 3:
  2966. return "BAD_CHECKSUM";
  2967. case 4:
  2968. return "NMI_INTERRUPT";
  2969. case 5:
  2970. return "SYSASSERT";
  2971. case 6:
  2972. return "FATAL_ERROR";
  2973. }
  2974. return "UNKNOWN";
  2975. }
  2976. #define ERROR_START_OFFSET (1 * sizeof(u32))
  2977. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  2978. static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  2979. {
  2980. u32 i;
  2981. u32 desc, time, count, base, data1;
  2982. u32 blink1, blink2, ilink1, ilink2;
  2983. int rc;
  2984. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  2985. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  2986. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  2987. return;
  2988. }
  2989. rc = iwl_grab_nic_access(priv);
  2990. if (rc) {
  2991. IWL_WARN(priv, "Can not read from adapter at this time.\n");
  2992. return;
  2993. }
  2994. count = iwl_read_targ_mem(priv, base);
  2995. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  2996. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  2997. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  2998. priv->status, count);
  2999. }
  3000. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  3001. "ilink1 nmiPC Line\n");
  3002. for (i = ERROR_START_OFFSET;
  3003. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  3004. i += ERROR_ELEM_SIZE) {
  3005. desc = iwl_read_targ_mem(priv, base + i);
  3006. time =
  3007. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  3008. blink1 =
  3009. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  3010. blink2 =
  3011. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  3012. ilink1 =
  3013. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  3014. ilink2 =
  3015. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  3016. data1 =
  3017. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  3018. IWL_ERR(priv,
  3019. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  3020. desc_lookup(desc), desc, time, blink1, blink2,
  3021. ilink1, ilink2, data1);
  3022. }
  3023. iwl_release_nic_access(priv);
  3024. }
  3025. #define EVENT_START_OFFSET (6 * sizeof(u32))
  3026. /**
  3027. * iwl3945_print_event_log - Dump error event log to syslog
  3028. *
  3029. * NOTE: Must be called with iwl_grab_nic_access() already obtained!
  3030. */
  3031. static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  3032. u32 num_events, u32 mode)
  3033. {
  3034. u32 i;
  3035. u32 base; /* SRAM byte address of event log header */
  3036. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  3037. u32 ptr; /* SRAM byte address of log data */
  3038. u32 ev, time, data; /* event log data */
  3039. if (num_events == 0)
  3040. return;
  3041. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3042. if (mode == 0)
  3043. event_size = 2 * sizeof(u32);
  3044. else
  3045. event_size = 3 * sizeof(u32);
  3046. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  3047. /* "time" is actually "data" for mode 0 (no timestamp).
  3048. * place event id # at far right for easier visual parsing. */
  3049. for (i = 0; i < num_events; i++) {
  3050. ev = iwl_read_targ_mem(priv, ptr);
  3051. ptr += sizeof(u32);
  3052. time = iwl_read_targ_mem(priv, ptr);
  3053. ptr += sizeof(u32);
  3054. if (mode == 0) {
  3055. /* data, ev */
  3056. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  3057. } else {
  3058. data = iwl_read_targ_mem(priv, ptr);
  3059. ptr += sizeof(u32);
  3060. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
  3061. }
  3062. }
  3063. }
  3064. static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  3065. {
  3066. int rc;
  3067. u32 base; /* SRAM byte address of event log header */
  3068. u32 capacity; /* event log capacity in # entries */
  3069. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  3070. u32 num_wraps; /* # times uCode wrapped to top of log */
  3071. u32 next_entry; /* index of next entry to be written by uCode */
  3072. u32 size; /* # entries that we'll print */
  3073. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3074. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  3075. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  3076. return;
  3077. }
  3078. rc = iwl_grab_nic_access(priv);
  3079. if (rc) {
  3080. IWL_WARN(priv, "Can not read from adapter at this time.\n");
  3081. return;
  3082. }
  3083. /* event log header */
  3084. capacity = iwl_read_targ_mem(priv, base);
  3085. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  3086. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  3087. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  3088. size = num_wraps ? capacity : next_entry;
  3089. /* bail out if nothing in log */
  3090. if (size == 0) {
  3091. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  3092. iwl_release_nic_access(priv);
  3093. return;
  3094. }
  3095. IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
  3096. size, num_wraps);
  3097. /* if uCode has wrapped back to top of log, start at the oldest entry,
  3098. * i.e the next one that uCode would fill. */
  3099. if (num_wraps)
  3100. iwl3945_print_event_log(priv, next_entry,
  3101. capacity - next_entry, mode);
  3102. /* (then/else) start at top of log */
  3103. iwl3945_print_event_log(priv, 0, next_entry, mode);
  3104. iwl_release_nic_access(priv);
  3105. }
  3106. /**
  3107. * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
  3108. */
  3109. static void iwl3945_irq_handle_error(struct iwl_priv *priv)
  3110. {
  3111. /* Set the FW error flag -- cleared on iwl3945_down */
  3112. set_bit(STATUS_FW_ERROR, &priv->status);
  3113. /* Cancel currently queued command. */
  3114. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3115. #ifdef CONFIG_IWL3945_DEBUG
  3116. if (priv->debug_level & IWL_DL_FW_ERRORS) {
  3117. iwl3945_dump_nic_error_log(priv);
  3118. iwl3945_dump_nic_event_log(priv);
  3119. iwl3945_print_rx_config_cmd(priv, &priv->staging39_rxon);
  3120. }
  3121. #endif
  3122. wake_up_interruptible(&priv->wait_command_queue);
  3123. /* Keep the restart process from trying to send host
  3124. * commands by clearing the INIT status bit */
  3125. clear_bit(STATUS_READY, &priv->status);
  3126. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  3127. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  3128. "Restarting adapter due to uCode error.\n");
  3129. if (iwl3945_is_associated(priv)) {
  3130. memcpy(&priv->recovery39_rxon, &priv->active39_rxon,
  3131. sizeof(priv->recovery39_rxon));
  3132. priv->error_recovering = 1;
  3133. }
  3134. queue_work(priv->workqueue, &priv->restart);
  3135. }
  3136. }
  3137. static void iwl3945_error_recovery(struct iwl_priv *priv)
  3138. {
  3139. unsigned long flags;
  3140. memcpy(&priv->staging39_rxon, &priv->recovery39_rxon,
  3141. sizeof(priv->staging39_rxon));
  3142. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  3143. iwl3945_commit_rxon(priv);
  3144. iwl3945_add_station(priv, priv->bssid, 1, 0);
  3145. spin_lock_irqsave(&priv->lock, flags);
  3146. priv->assoc_id = le16_to_cpu(priv->staging39_rxon.assoc_id);
  3147. priv->error_recovering = 0;
  3148. spin_unlock_irqrestore(&priv->lock, flags);
  3149. }
  3150. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  3151. {
  3152. u32 inta, handled = 0;
  3153. u32 inta_fh;
  3154. unsigned long flags;
  3155. #ifdef CONFIG_IWL3945_DEBUG
  3156. u32 inta_mask;
  3157. #endif
  3158. spin_lock_irqsave(&priv->lock, flags);
  3159. /* Ack/clear/reset pending uCode interrupts.
  3160. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  3161. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  3162. inta = iwl_read32(priv, CSR_INT);
  3163. iwl_write32(priv, CSR_INT, inta);
  3164. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  3165. * Any new interrupts that happen after this, either while we're
  3166. * in this tasklet, or later, will show up in next ISR/tasklet. */
  3167. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3168. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  3169. #ifdef CONFIG_IWL3945_DEBUG
  3170. if (priv->debug_level & IWL_DL_ISR) {
  3171. /* just for debug */
  3172. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  3173. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  3174. inta, inta_mask, inta_fh);
  3175. }
  3176. #endif
  3177. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  3178. * atomic, make sure that inta covers all the interrupts that
  3179. * we've discovered, even if FH interrupt came in just after
  3180. * reading CSR_INT. */
  3181. if (inta_fh & CSR39_FH_INT_RX_MASK)
  3182. inta |= CSR_INT_BIT_FH_RX;
  3183. if (inta_fh & CSR39_FH_INT_TX_MASK)
  3184. inta |= CSR_INT_BIT_FH_TX;
  3185. /* Now service all interrupt bits discovered above. */
  3186. if (inta & CSR_INT_BIT_HW_ERR) {
  3187. IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
  3188. /* Tell the device to stop sending interrupts */
  3189. iwl3945_disable_interrupts(priv);
  3190. iwl3945_irq_handle_error(priv);
  3191. handled |= CSR_INT_BIT_HW_ERR;
  3192. spin_unlock_irqrestore(&priv->lock, flags);
  3193. return;
  3194. }
  3195. #ifdef CONFIG_IWL3945_DEBUG
  3196. if (priv->debug_level & (IWL_DL_ISR)) {
  3197. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  3198. if (inta & CSR_INT_BIT_SCD)
  3199. IWL_DEBUG_ISR("Scheduler finished to transmit "
  3200. "the frame/frames.\n");
  3201. /* Alive notification via Rx interrupt will do the real work */
  3202. if (inta & CSR_INT_BIT_ALIVE)
  3203. IWL_DEBUG_ISR("Alive interrupt\n");
  3204. }
  3205. #endif
  3206. /* Safely ignore these bits for debug checks below */
  3207. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  3208. /* Error detected by uCode */
  3209. if (inta & CSR_INT_BIT_SW_ERR) {
  3210. IWL_ERR(priv, "Microcode SW error detected. "
  3211. "Restarting 0x%X.\n", inta);
  3212. iwl3945_irq_handle_error(priv);
  3213. handled |= CSR_INT_BIT_SW_ERR;
  3214. }
  3215. /* uCode wakes up after power-down sleep */
  3216. if (inta & CSR_INT_BIT_WAKEUP) {
  3217. IWL_DEBUG_ISR("Wakeup interrupt\n");
  3218. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  3219. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  3220. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  3221. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  3222. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  3223. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  3224. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  3225. handled |= CSR_INT_BIT_WAKEUP;
  3226. }
  3227. /* All uCode command responses, including Tx command responses,
  3228. * Rx "responses" (frame-received notification), and other
  3229. * notifications from uCode come through here*/
  3230. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  3231. iwl3945_rx_handle(priv);
  3232. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  3233. }
  3234. if (inta & CSR_INT_BIT_FH_TX) {
  3235. IWL_DEBUG_ISR("Tx interrupt\n");
  3236. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  3237. if (!iwl_grab_nic_access(priv)) {
  3238. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  3239. (FH39_SRVC_CHNL), 0x0);
  3240. iwl_release_nic_access(priv);
  3241. }
  3242. handled |= CSR_INT_BIT_FH_TX;
  3243. }
  3244. if (inta & ~handled)
  3245. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  3246. if (inta & ~CSR_INI_SET_MASK) {
  3247. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  3248. inta & ~CSR_INI_SET_MASK);
  3249. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  3250. }
  3251. /* Re-enable all interrupts */
  3252. /* only Re-enable if disabled by irq */
  3253. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  3254. iwl3945_enable_interrupts(priv);
  3255. #ifdef CONFIG_IWL3945_DEBUG
  3256. if (priv->debug_level & (IWL_DL_ISR)) {
  3257. inta = iwl_read32(priv, CSR_INT);
  3258. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  3259. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3260. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  3261. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  3262. }
  3263. #endif
  3264. spin_unlock_irqrestore(&priv->lock, flags);
  3265. }
  3266. static irqreturn_t iwl3945_isr(int irq, void *data)
  3267. {
  3268. struct iwl_priv *priv = data;
  3269. u32 inta, inta_mask;
  3270. u32 inta_fh;
  3271. if (!priv)
  3272. return IRQ_NONE;
  3273. spin_lock(&priv->lock);
  3274. /* Disable (but don't clear!) interrupts here to avoid
  3275. * back-to-back ISRs and sporadic interrupts from our NIC.
  3276. * If we have something to service, the tasklet will re-enable ints.
  3277. * If we *don't* have something, we'll re-enable before leaving here. */
  3278. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  3279. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  3280. /* Discover which interrupts are active/pending */
  3281. inta = iwl_read32(priv, CSR_INT);
  3282. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3283. /* Ignore interrupt if there's nothing in NIC to service.
  3284. * This may be due to IRQ shared with another device,
  3285. * or due to sporadic interrupts thrown from our NIC. */
  3286. if (!inta && !inta_fh) {
  3287. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  3288. goto none;
  3289. }
  3290. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  3291. /* Hardware disappeared */
  3292. IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
  3293. goto unplugged;
  3294. }
  3295. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  3296. inta, inta_mask, inta_fh);
  3297. inta &= ~CSR_INT_BIT_SCD;
  3298. /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
  3299. if (likely(inta || inta_fh))
  3300. tasklet_schedule(&priv->irq_tasklet);
  3301. unplugged:
  3302. spin_unlock(&priv->lock);
  3303. return IRQ_HANDLED;
  3304. none:
  3305. /* re-enable interrupts here since we don't have anything to service. */
  3306. /* only Re-enable if disabled by irq */
  3307. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  3308. iwl3945_enable_interrupts(priv);
  3309. spin_unlock(&priv->lock);
  3310. return IRQ_NONE;
  3311. }
  3312. /************************** EEPROM BANDS ****************************
  3313. *
  3314. * The iwl3945_eeprom_band definitions below provide the mapping from the
  3315. * EEPROM contents to the specific channel number supported for each
  3316. * band.
  3317. *
  3318. * For example, iwl3945_priv->eeprom39.band_3_channels[4] from the band_3
  3319. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  3320. * The specific geography and calibration information for that channel
  3321. * is contained in the eeprom map itself.
  3322. *
  3323. * During init, we copy the eeprom information and channel map
  3324. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  3325. *
  3326. * channel_map_24/52 provides the index in the channel_info array for a
  3327. * given channel. We have to have two separate maps as there is channel
  3328. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  3329. * band_2
  3330. *
  3331. * A value of 0xff stored in the channel_map indicates that the channel
  3332. * is not supported by the hardware at all.
  3333. *
  3334. * A value of 0xfe in the channel_map indicates that the channel is not
  3335. * valid for Tx with the current hardware. This means that
  3336. * while the system can tune and receive on a given channel, it may not
  3337. * be able to associate or transmit any frames on that
  3338. * channel. There is no corresponding channel information for that
  3339. * entry.
  3340. *
  3341. *********************************************************************/
  3342. /* 2.4 GHz */
  3343. static const u8 iwl3945_eeprom_band_1[14] = {
  3344. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  3345. };
  3346. /* 5.2 GHz bands */
  3347. static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
  3348. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  3349. };
  3350. static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
  3351. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  3352. };
  3353. static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
  3354. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  3355. };
  3356. static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
  3357. 145, 149, 153, 157, 161, 165
  3358. };
  3359. static void iwl3945_init_band_reference(const struct iwl_priv *priv, int band,
  3360. int *eeprom_ch_count,
  3361. const struct iwl_eeprom_channel
  3362. **eeprom_ch_info,
  3363. const u8 **eeprom_ch_index)
  3364. {
  3365. switch (band) {
  3366. case 1: /* 2.4GHz band */
  3367. *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
  3368. *eeprom_ch_info = priv->eeprom39.band_1_channels;
  3369. *eeprom_ch_index = iwl3945_eeprom_band_1;
  3370. break;
  3371. case 2: /* 4.9GHz band */
  3372. *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
  3373. *eeprom_ch_info = priv->eeprom39.band_2_channels;
  3374. *eeprom_ch_index = iwl3945_eeprom_band_2;
  3375. break;
  3376. case 3: /* 5.2GHz band */
  3377. *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
  3378. *eeprom_ch_info = priv->eeprom39.band_3_channels;
  3379. *eeprom_ch_index = iwl3945_eeprom_band_3;
  3380. break;
  3381. case 4: /* 5.5GHz band */
  3382. *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
  3383. *eeprom_ch_info = priv->eeprom39.band_4_channels;
  3384. *eeprom_ch_index = iwl3945_eeprom_band_4;
  3385. break;
  3386. case 5: /* 5.7GHz band */
  3387. *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
  3388. *eeprom_ch_info = priv->eeprom39.band_5_channels;
  3389. *eeprom_ch_index = iwl3945_eeprom_band_5;
  3390. break;
  3391. default:
  3392. BUG();
  3393. return;
  3394. }
  3395. }
  3396. /**
  3397. * iwl3945_get_channel_info - Find driver's private channel info
  3398. *
  3399. * Based on band and channel number.
  3400. */
  3401. const struct iwl_channel_info *
  3402. iwl3945_get_channel_info(const struct iwl_priv *priv,
  3403. enum ieee80211_band band, u16 channel)
  3404. {
  3405. int i;
  3406. switch (band) {
  3407. case IEEE80211_BAND_5GHZ:
  3408. for (i = 14; i < priv->channel_count; i++) {
  3409. if (priv->channel_info[i].channel == channel)
  3410. return &priv->channel_info[i];
  3411. }
  3412. break;
  3413. case IEEE80211_BAND_2GHZ:
  3414. if (channel >= 1 && channel <= 14)
  3415. return &priv->channel_info[channel - 1];
  3416. break;
  3417. case IEEE80211_NUM_BANDS:
  3418. WARN_ON(1);
  3419. }
  3420. return NULL;
  3421. }
  3422. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  3423. ? # x " " : "")
  3424. /**
  3425. * iwl3945_init_channel_map - Set up driver's info for all possible channels
  3426. */
  3427. static int iwl3945_init_channel_map(struct iwl_priv *priv)
  3428. {
  3429. int eeprom_ch_count = 0;
  3430. const u8 *eeprom_ch_index = NULL;
  3431. const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
  3432. int band, ch;
  3433. struct iwl_channel_info *ch_info;
  3434. if (priv->channel_count) {
  3435. IWL_DEBUG_INFO("Channel map already initialized.\n");
  3436. return 0;
  3437. }
  3438. if (priv->eeprom39.version < 0x2f) {
  3439. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  3440. priv->eeprom39.version);
  3441. return -EINVAL;
  3442. }
  3443. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  3444. priv->channel_count =
  3445. ARRAY_SIZE(iwl3945_eeprom_band_1) +
  3446. ARRAY_SIZE(iwl3945_eeprom_band_2) +
  3447. ARRAY_SIZE(iwl3945_eeprom_band_3) +
  3448. ARRAY_SIZE(iwl3945_eeprom_band_4) +
  3449. ARRAY_SIZE(iwl3945_eeprom_band_5);
  3450. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  3451. priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
  3452. priv->channel_count, GFP_KERNEL);
  3453. if (!priv->channel_info) {
  3454. IWL_ERR(priv, "Could not allocate channel_info\n");
  3455. priv->channel_count = 0;
  3456. return -ENOMEM;
  3457. }
  3458. ch_info = priv->channel_info;
  3459. /* Loop through the 5 EEPROM bands adding them in order to the
  3460. * channel map we maintain (that contains additional information than
  3461. * what just in the EEPROM) */
  3462. for (band = 1; band <= 5; band++) {
  3463. iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
  3464. &eeprom_ch_info, &eeprom_ch_index);
  3465. /* Loop through each band adding each of the channels */
  3466. for (ch = 0; ch < eeprom_ch_count; ch++) {
  3467. ch_info->channel = eeprom_ch_index[ch];
  3468. ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
  3469. IEEE80211_BAND_5GHZ;
  3470. /* permanently store EEPROM's channel regulatory flags
  3471. * and max power in channel info database. */
  3472. ch_info->eeprom = eeprom_ch_info[ch];
  3473. /* Copy the run-time flags so they are there even on
  3474. * invalid channels */
  3475. ch_info->flags = eeprom_ch_info[ch].flags;
  3476. if (!(is_channel_valid(ch_info))) {
  3477. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  3478. "No traffic\n",
  3479. ch_info->channel,
  3480. ch_info->flags,
  3481. is_channel_a_band(ch_info) ?
  3482. "5.2" : "2.4");
  3483. ch_info++;
  3484. continue;
  3485. }
  3486. /* Initialize regulatory-based run-time data */
  3487. ch_info->max_power_avg = ch_info->curr_txpow =
  3488. eeprom_ch_info[ch].max_power_avg;
  3489. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  3490. ch_info->min_power = 0;
  3491. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
  3492. " %ddBm): Ad-Hoc %ssupported\n",
  3493. ch_info->channel,
  3494. is_channel_a_band(ch_info) ?
  3495. "5.2" : "2.4",
  3496. CHECK_AND_PRINT(VALID),
  3497. CHECK_AND_PRINT(IBSS),
  3498. CHECK_AND_PRINT(ACTIVE),
  3499. CHECK_AND_PRINT(RADAR),
  3500. CHECK_AND_PRINT(WIDE),
  3501. CHECK_AND_PRINT(DFS),
  3502. eeprom_ch_info[ch].flags,
  3503. eeprom_ch_info[ch].max_power_avg,
  3504. ((eeprom_ch_info[ch].
  3505. flags & EEPROM_CHANNEL_IBSS)
  3506. && !(eeprom_ch_info[ch].
  3507. flags & EEPROM_CHANNEL_RADAR))
  3508. ? "" : "not ");
  3509. /* Set the user_txpower_limit to the highest power
  3510. * supported by any channel */
  3511. if (eeprom_ch_info[ch].max_power_avg >
  3512. priv->user_txpower_limit)
  3513. priv->user_txpower_limit =
  3514. eeprom_ch_info[ch].max_power_avg;
  3515. ch_info++;
  3516. }
  3517. }
  3518. /* Set up txpower settings in driver for all channels */
  3519. if (iwl3945_txpower_set_from_eeprom(priv))
  3520. return -EIO;
  3521. return 0;
  3522. }
  3523. /*
  3524. * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
  3525. */
  3526. static void iwl3945_free_channel_map(struct iwl_priv *priv)
  3527. {
  3528. kfree(priv->channel_info);
  3529. priv->channel_count = 0;
  3530. }
  3531. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  3532. * sending probe req. This should be set long enough to hear probe responses
  3533. * from more than one AP. */
  3534. #define IWL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */
  3535. #define IWL_ACTIVE_DWELL_TIME_52 (20)
  3536. #define IWL_ACTIVE_DWELL_FACTOR_24GHZ (3)
  3537. #define IWL_ACTIVE_DWELL_FACTOR_52GHZ (2)
  3538. /* For faster active scanning, scan will move to the next channel if fewer than
  3539. * PLCP_QUIET_THRESH packets are heard on this channel within
  3540. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  3541. * time if it's a quiet channel (nothing responded to our probe, and there's
  3542. * no other traffic).
  3543. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  3544. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  3545. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(10) /* msec */
  3546. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  3547. * Must be set longer than active dwell time.
  3548. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  3549. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  3550. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  3551. #define IWL_PASSIVE_DWELL_BASE (100)
  3552. #define IWL_CHANNEL_TUNE_TIME 5
  3553. #define IWL_SCAN_PROBE_MASK(n) (BIT(n) | (BIT(n) - BIT(1)))
  3554. static inline u16 iwl3945_get_active_dwell_time(struct iwl_priv *priv,
  3555. enum ieee80211_band band,
  3556. u8 n_probes)
  3557. {
  3558. if (band == IEEE80211_BAND_5GHZ)
  3559. return IWL_ACTIVE_DWELL_TIME_52 +
  3560. IWL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
  3561. else
  3562. return IWL_ACTIVE_DWELL_TIME_24 +
  3563. IWL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
  3564. }
  3565. static u16 iwl3945_get_passive_dwell_time(struct iwl_priv *priv,
  3566. enum ieee80211_band band)
  3567. {
  3568. u16 passive = (band == IEEE80211_BAND_2GHZ) ?
  3569. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  3570. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  3571. if (iwl3945_is_associated(priv)) {
  3572. /* If we're associated, we clamp the maximum passive
  3573. * dwell time to be 98% of the beacon interval (minus
  3574. * 2 * channel tune time) */
  3575. passive = priv->beacon_int;
  3576. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  3577. passive = IWL_PASSIVE_DWELL_BASE;
  3578. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  3579. }
  3580. return passive;
  3581. }
  3582. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  3583. enum ieee80211_band band,
  3584. u8 is_active, u8 n_probes,
  3585. struct iwl3945_scan_channel *scan_ch)
  3586. {
  3587. const struct ieee80211_channel *channels = NULL;
  3588. const struct ieee80211_supported_band *sband;
  3589. const struct iwl_channel_info *ch_info;
  3590. u16 passive_dwell = 0;
  3591. u16 active_dwell = 0;
  3592. int added, i;
  3593. sband = iwl_get_hw_mode(priv, band);
  3594. if (!sband)
  3595. return 0;
  3596. channels = sband->channels;
  3597. active_dwell = iwl3945_get_active_dwell_time(priv, band, n_probes);
  3598. passive_dwell = iwl3945_get_passive_dwell_time(priv, band);
  3599. if (passive_dwell <= active_dwell)
  3600. passive_dwell = active_dwell + 1;
  3601. for (i = 0, added = 0; i < sband->n_channels; i++) {
  3602. if (channels[i].flags & IEEE80211_CHAN_DISABLED)
  3603. continue;
  3604. scan_ch->channel = channels[i].hw_value;
  3605. ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel);
  3606. if (!is_channel_valid(ch_info)) {
  3607. IWL_DEBUG_SCAN("Channel %d is INVALID for this band.\n",
  3608. scan_ch->channel);
  3609. continue;
  3610. }
  3611. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  3612. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  3613. /* If passive , set up for auto-switch
  3614. * and use long active_dwell time.
  3615. */
  3616. if (!is_active || is_channel_passive(ch_info) ||
  3617. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  3618. scan_ch->type = 0; /* passive */
  3619. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  3620. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  3621. } else {
  3622. scan_ch->type = 1; /* active */
  3623. }
  3624. /* Set direct probe bits. These may be used both for active
  3625. * scan channels (probes gets sent right away),
  3626. * or for passive channels (probes get se sent only after
  3627. * hearing clear Rx packet).*/
  3628. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  3629. if (n_probes)
  3630. scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
  3631. } else {
  3632. /* uCode v1 does not allow setting direct probe bits on
  3633. * passive channel. */
  3634. if ((scan_ch->type & 1) && n_probes)
  3635. scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
  3636. }
  3637. /* Set txpower levels to defaults */
  3638. scan_ch->tpc.dsp_atten = 110;
  3639. /* scan_pwr_info->tpc.dsp_atten; */
  3640. /*scan_pwr_info->tpc.tx_gain; */
  3641. if (band == IEEE80211_BAND_5GHZ)
  3642. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  3643. else {
  3644. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  3645. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  3646. * power level:
  3647. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  3648. */
  3649. }
  3650. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  3651. scan_ch->channel,
  3652. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  3653. (scan_ch->type & 1) ?
  3654. active_dwell : passive_dwell);
  3655. scan_ch++;
  3656. added++;
  3657. }
  3658. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  3659. return added;
  3660. }
  3661. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  3662. struct ieee80211_rate *rates)
  3663. {
  3664. int i;
  3665. for (i = 0; i < IWL_RATE_COUNT; i++) {
  3666. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  3667. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  3668. rates[i].hw_value_short = i;
  3669. rates[i].flags = 0;
  3670. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  3671. /*
  3672. * If CCK != 1M then set short preamble rate flag.
  3673. */
  3674. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  3675. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  3676. }
  3677. }
  3678. }
  3679. /**
  3680. * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
  3681. */
  3682. static int iwl3945_init_geos(struct iwl_priv *priv)
  3683. {
  3684. struct iwl_channel_info *ch;
  3685. struct ieee80211_supported_band *sband;
  3686. struct ieee80211_channel *channels;
  3687. struct ieee80211_channel *geo_ch;
  3688. struct ieee80211_rate *rates;
  3689. int i = 0;
  3690. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  3691. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  3692. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  3693. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  3694. return 0;
  3695. }
  3696. channels = kzalloc(sizeof(struct ieee80211_channel) *
  3697. priv->channel_count, GFP_KERNEL);
  3698. if (!channels)
  3699. return -ENOMEM;
  3700. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
  3701. GFP_KERNEL);
  3702. if (!rates) {
  3703. kfree(channels);
  3704. return -ENOMEM;
  3705. }
  3706. /* 5.2GHz channels start after the 2.4GHz channels */
  3707. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  3708. sband->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
  3709. /* just OFDM */
  3710. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  3711. sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
  3712. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  3713. sband->channels = channels;
  3714. /* OFDM & CCK */
  3715. sband->bitrates = rates;
  3716. sband->n_bitrates = IWL_RATE_COUNT;
  3717. priv->ieee_channels = channels;
  3718. priv->ieee_rates = rates;
  3719. iwl3945_init_hw_rates(priv, rates);
  3720. for (i = 0; i < priv->channel_count; i++) {
  3721. ch = &priv->channel_info[i];
  3722. /* FIXME: might be removed if scan is OK*/
  3723. if (!is_channel_valid(ch))
  3724. continue;
  3725. if (is_channel_a_band(ch))
  3726. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  3727. else
  3728. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  3729. geo_ch = &sband->channels[sband->n_channels++];
  3730. geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
  3731. geo_ch->max_power = ch->max_power_avg;
  3732. geo_ch->max_antenna_gain = 0xff;
  3733. geo_ch->hw_value = ch->channel;
  3734. if (is_channel_valid(ch)) {
  3735. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  3736. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  3737. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  3738. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  3739. if (ch->flags & EEPROM_CHANNEL_RADAR)
  3740. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  3741. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  3742. priv->max_channel_txpower_limit =
  3743. ch->max_power_avg;
  3744. } else {
  3745. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  3746. }
  3747. /* Save flags for reg domain usage */
  3748. geo_ch->orig_flags = geo_ch->flags;
  3749. IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
  3750. ch->channel, geo_ch->center_freq,
  3751. is_channel_a_band(ch) ? "5.2" : "2.4",
  3752. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  3753. "restricted" : "valid",
  3754. geo_ch->flags);
  3755. }
  3756. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  3757. priv->cfg->sku & IWL_SKU_A) {
  3758. IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
  3759. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  3760. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  3761. priv->cfg->sku &= ~IWL_SKU_A;
  3762. }
  3763. IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  3764. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  3765. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  3766. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3767. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3768. &priv->bands[IEEE80211_BAND_2GHZ];
  3769. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3770. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3771. &priv->bands[IEEE80211_BAND_5GHZ];
  3772. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  3773. return 0;
  3774. }
  3775. /*
  3776. * iwl3945_free_geos - undo allocations in iwl3945_init_geos
  3777. */
  3778. static void iwl3945_free_geos(struct iwl_priv *priv)
  3779. {
  3780. kfree(priv->ieee_channels);
  3781. kfree(priv->ieee_rates);
  3782. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  3783. }
  3784. /******************************************************************************
  3785. *
  3786. * uCode download functions
  3787. *
  3788. ******************************************************************************/
  3789. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  3790. {
  3791. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  3792. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  3793. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  3794. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  3795. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  3796. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  3797. }
  3798. /**
  3799. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  3800. * looking at all data.
  3801. */
  3802. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  3803. {
  3804. u32 val;
  3805. u32 save_len = len;
  3806. int rc = 0;
  3807. u32 errcnt;
  3808. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  3809. rc = iwl_grab_nic_access(priv);
  3810. if (rc)
  3811. return rc;
  3812. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  3813. IWL39_RTC_INST_LOWER_BOUND);
  3814. errcnt = 0;
  3815. for (; len > 0; len -= sizeof(u32), image++) {
  3816. /* read data comes through single port, auto-incr addr */
  3817. /* NOTE: Use the debugless read so we don't flood kernel log
  3818. * if IWL_DL_IO is set */
  3819. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  3820. if (val != le32_to_cpu(*image)) {
  3821. IWL_ERR(priv, "uCode INST section is invalid at "
  3822. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  3823. save_len - len, val, le32_to_cpu(*image));
  3824. rc = -EIO;
  3825. errcnt++;
  3826. if (errcnt >= 20)
  3827. break;
  3828. }
  3829. }
  3830. iwl_release_nic_access(priv);
  3831. if (!errcnt)
  3832. IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
  3833. return rc;
  3834. }
  3835. /**
  3836. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  3837. * using sample data 100 bytes apart. If these sample points are good,
  3838. * it's a pretty good bet that everything between them is good, too.
  3839. */
  3840. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  3841. {
  3842. u32 val;
  3843. int rc = 0;
  3844. u32 errcnt = 0;
  3845. u32 i;
  3846. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  3847. rc = iwl_grab_nic_access(priv);
  3848. if (rc)
  3849. return rc;
  3850. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  3851. /* read data comes through single port, auto-incr addr */
  3852. /* NOTE: Use the debugless read so we don't flood kernel log
  3853. * if IWL_DL_IO is set */
  3854. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  3855. i + IWL39_RTC_INST_LOWER_BOUND);
  3856. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  3857. if (val != le32_to_cpu(*image)) {
  3858. #if 0 /* Enable this if you want to see details */
  3859. IWL_ERR(priv, "uCode INST section is invalid at "
  3860. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  3861. i, val, *image);
  3862. #endif
  3863. rc = -EIO;
  3864. errcnt++;
  3865. if (errcnt >= 3)
  3866. break;
  3867. }
  3868. }
  3869. iwl_release_nic_access(priv);
  3870. return rc;
  3871. }
  3872. /**
  3873. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  3874. * and verify its contents
  3875. */
  3876. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  3877. {
  3878. __le32 *image;
  3879. u32 len;
  3880. int rc = 0;
  3881. /* Try bootstrap */
  3882. image = (__le32 *)priv->ucode_boot.v_addr;
  3883. len = priv->ucode_boot.len;
  3884. rc = iwl3945_verify_inst_sparse(priv, image, len);
  3885. if (rc == 0) {
  3886. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  3887. return 0;
  3888. }
  3889. /* Try initialize */
  3890. image = (__le32 *)priv->ucode_init.v_addr;
  3891. len = priv->ucode_init.len;
  3892. rc = iwl3945_verify_inst_sparse(priv, image, len);
  3893. if (rc == 0) {
  3894. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  3895. return 0;
  3896. }
  3897. /* Try runtime/protocol */
  3898. image = (__le32 *)priv->ucode_code.v_addr;
  3899. len = priv->ucode_code.len;
  3900. rc = iwl3945_verify_inst_sparse(priv, image, len);
  3901. if (rc == 0) {
  3902. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  3903. return 0;
  3904. }
  3905. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  3906. /* Since nothing seems to match, show first several data entries in
  3907. * instruction SRAM, so maybe visual inspection will give a clue.
  3908. * Selection of bootstrap image (vs. other images) is arbitrary. */
  3909. image = (__le32 *)priv->ucode_boot.v_addr;
  3910. len = priv->ucode_boot.len;
  3911. rc = iwl3945_verify_inst_full(priv, image, len);
  3912. return rc;
  3913. }
  3914. static void iwl3945_nic_start(struct iwl_priv *priv)
  3915. {
  3916. /* Remove all resets to allow NIC to operate */
  3917. iwl_write32(priv, CSR_RESET, 0);
  3918. }
  3919. /**
  3920. * iwl3945_read_ucode - Read uCode images from disk file.
  3921. *
  3922. * Copy into buffers for card to fetch via bus-mastering
  3923. */
  3924. static int iwl3945_read_ucode(struct iwl_priv *priv)
  3925. {
  3926. struct iwl_ucode *ucode;
  3927. int ret = -EINVAL, index;
  3928. const struct firmware *ucode_raw;
  3929. /* firmware file name contains uCode/driver compatibility version */
  3930. const char *name_pre = priv->cfg->fw_name_pre;
  3931. const unsigned int api_max = priv->cfg->ucode_api_max;
  3932. const unsigned int api_min = priv->cfg->ucode_api_min;
  3933. char buf[25];
  3934. u8 *src;
  3935. size_t len;
  3936. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  3937. /* Ask kernel firmware_class module to get the boot firmware off disk.
  3938. * request_firmware() is synchronous, file is in memory on return. */
  3939. for (index = api_max; index >= api_min; index--) {
  3940. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  3941. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  3942. if (ret < 0) {
  3943. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  3944. buf, ret);
  3945. if (ret == -ENOENT)
  3946. continue;
  3947. else
  3948. goto error;
  3949. } else {
  3950. if (index < api_max)
  3951. IWL_ERR(priv, "Loaded firmware %s, "
  3952. "which is deprecated. "
  3953. " Please use API v%u instead.\n",
  3954. buf, api_max);
  3955. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  3956. buf, ucode_raw->size);
  3957. break;
  3958. }
  3959. }
  3960. if (ret < 0)
  3961. goto error;
  3962. /* Make sure that we got at least our header! */
  3963. if (ucode_raw->size < sizeof(*ucode)) {
  3964. IWL_ERR(priv, "File size way too small!\n");
  3965. ret = -EINVAL;
  3966. goto err_release;
  3967. }
  3968. /* Data from ucode file: header followed by uCode images */
  3969. ucode = (void *)ucode_raw->data;
  3970. priv->ucode_ver = le32_to_cpu(ucode->ver);
  3971. api_ver = IWL_UCODE_API(priv->ucode_ver);
  3972. inst_size = le32_to_cpu(ucode->inst_size);
  3973. data_size = le32_to_cpu(ucode->data_size);
  3974. init_size = le32_to_cpu(ucode->init_size);
  3975. init_data_size = le32_to_cpu(ucode->init_data_size);
  3976. boot_size = le32_to_cpu(ucode->boot_size);
  3977. /* api_ver should match the api version forming part of the
  3978. * firmware filename ... but we don't check for that and only rely
  3979. * on the API version read from firware header from here on forward */
  3980. if (api_ver < api_min || api_ver > api_max) {
  3981. IWL_ERR(priv, "Driver unable to support your firmware API. "
  3982. "Driver supports v%u, firmware is v%u.\n",
  3983. api_max, api_ver);
  3984. priv->ucode_ver = 0;
  3985. ret = -EINVAL;
  3986. goto err_release;
  3987. }
  3988. if (api_ver != api_max)
  3989. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  3990. "got %u. New firmware can be obtained "
  3991. "from http://www.intellinuxwireless.org.\n",
  3992. api_max, api_ver);
  3993. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  3994. IWL_UCODE_MAJOR(priv->ucode_ver),
  3995. IWL_UCODE_MINOR(priv->ucode_ver),
  3996. IWL_UCODE_API(priv->ucode_ver),
  3997. IWL_UCODE_SERIAL(priv->ucode_ver));
  3998. IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n",
  3999. priv->ucode_ver);
  4000. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
  4001. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
  4002. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
  4003. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
  4004. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
  4005. /* Verify size of file vs. image size info in file's header */
  4006. if (ucode_raw->size < sizeof(*ucode) +
  4007. inst_size + data_size + init_size +
  4008. init_data_size + boot_size) {
  4009. IWL_DEBUG_INFO("uCode file size %d too small\n",
  4010. (int)ucode_raw->size);
  4011. ret = -EINVAL;
  4012. goto err_release;
  4013. }
  4014. /* Verify that uCode images will fit in card's SRAM */
  4015. if (inst_size > IWL39_MAX_INST_SIZE) {
  4016. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  4017. inst_size);
  4018. ret = -EINVAL;
  4019. goto err_release;
  4020. }
  4021. if (data_size > IWL39_MAX_DATA_SIZE) {
  4022. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  4023. data_size);
  4024. ret = -EINVAL;
  4025. goto err_release;
  4026. }
  4027. if (init_size > IWL39_MAX_INST_SIZE) {
  4028. IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
  4029. init_size);
  4030. ret = -EINVAL;
  4031. goto err_release;
  4032. }
  4033. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  4034. IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
  4035. init_data_size);
  4036. ret = -EINVAL;
  4037. goto err_release;
  4038. }
  4039. if (boot_size > IWL39_MAX_BSM_SIZE) {
  4040. IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
  4041. boot_size);
  4042. ret = -EINVAL;
  4043. goto err_release;
  4044. }
  4045. /* Allocate ucode buffers for card's bus-master loading ... */
  4046. /* Runtime instructions and 2 copies of data:
  4047. * 1) unmodified from disk
  4048. * 2) backup cache for save/restore during power-downs */
  4049. priv->ucode_code.len = inst_size;
  4050. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  4051. priv->ucode_data.len = data_size;
  4052. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  4053. priv->ucode_data_backup.len = data_size;
  4054. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4055. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  4056. !priv->ucode_data_backup.v_addr)
  4057. goto err_pci_alloc;
  4058. /* Initialization instructions and data */
  4059. if (init_size && init_data_size) {
  4060. priv->ucode_init.len = init_size;
  4061. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  4062. priv->ucode_init_data.len = init_data_size;
  4063. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4064. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  4065. goto err_pci_alloc;
  4066. }
  4067. /* Bootstrap (instructions only, no data) */
  4068. if (boot_size) {
  4069. priv->ucode_boot.len = boot_size;
  4070. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4071. if (!priv->ucode_boot.v_addr)
  4072. goto err_pci_alloc;
  4073. }
  4074. /* Copy images into buffers for card's bus-master reads ... */
  4075. /* Runtime instructions (first block of data in file) */
  4076. src = &ucode->data[0];
  4077. len = priv->ucode_code.len;
  4078. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  4079. memcpy(priv->ucode_code.v_addr, src, len);
  4080. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  4081. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  4082. /* Runtime data (2nd block)
  4083. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  4084. src = &ucode->data[inst_size];
  4085. len = priv->ucode_data.len;
  4086. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  4087. memcpy(priv->ucode_data.v_addr, src, len);
  4088. memcpy(priv->ucode_data_backup.v_addr, src, len);
  4089. /* Initialization instructions (3rd block) */
  4090. if (init_size) {
  4091. src = &ucode->data[inst_size + data_size];
  4092. len = priv->ucode_init.len;
  4093. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  4094. len);
  4095. memcpy(priv->ucode_init.v_addr, src, len);
  4096. }
  4097. /* Initialization data (4th block) */
  4098. if (init_data_size) {
  4099. src = &ucode->data[inst_size + data_size + init_size];
  4100. len = priv->ucode_init_data.len;
  4101. IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
  4102. (int)len);
  4103. memcpy(priv->ucode_init_data.v_addr, src, len);
  4104. }
  4105. /* Bootstrap instructions (5th block) */
  4106. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  4107. len = priv->ucode_boot.len;
  4108. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
  4109. (int)len);
  4110. memcpy(priv->ucode_boot.v_addr, src, len);
  4111. /* We have our copies now, allow OS release its copies */
  4112. release_firmware(ucode_raw);
  4113. return 0;
  4114. err_pci_alloc:
  4115. IWL_ERR(priv, "failed to allocate pci memory\n");
  4116. ret = -ENOMEM;
  4117. iwl3945_dealloc_ucode_pci(priv);
  4118. err_release:
  4119. release_firmware(ucode_raw);
  4120. error:
  4121. return ret;
  4122. }
  4123. /**
  4124. * iwl3945_set_ucode_ptrs - Set uCode address location
  4125. *
  4126. * Tell initialization uCode where to find runtime uCode.
  4127. *
  4128. * BSM registers initially contain pointers to initialization uCode.
  4129. * We need to replace them to load runtime uCode inst and data,
  4130. * and to save runtime data when powering down.
  4131. */
  4132. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  4133. {
  4134. dma_addr_t pinst;
  4135. dma_addr_t pdata;
  4136. int rc = 0;
  4137. unsigned long flags;
  4138. /* bits 31:0 for 3945 */
  4139. pinst = priv->ucode_code.p_addr;
  4140. pdata = priv->ucode_data_backup.p_addr;
  4141. spin_lock_irqsave(&priv->lock, flags);
  4142. rc = iwl_grab_nic_access(priv);
  4143. if (rc) {
  4144. spin_unlock_irqrestore(&priv->lock, flags);
  4145. return rc;
  4146. }
  4147. /* Tell bootstrap uCode where to find image to load */
  4148. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  4149. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  4150. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  4151. priv->ucode_data.len);
  4152. /* Inst byte count must be last to set up, bit 31 signals uCode
  4153. * that all new ptr/size info is in place */
  4154. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  4155. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  4156. iwl_release_nic_access(priv);
  4157. spin_unlock_irqrestore(&priv->lock, flags);
  4158. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  4159. return rc;
  4160. }
  4161. /**
  4162. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  4163. *
  4164. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  4165. *
  4166. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  4167. */
  4168. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  4169. {
  4170. /* Check alive response for "valid" sign from uCode */
  4171. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  4172. /* We had an error bringing up the hardware, so take it
  4173. * all the way back down so we can try again */
  4174. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  4175. goto restart;
  4176. }
  4177. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  4178. * This is a paranoid check, because we would not have gotten the
  4179. * "initialize" alive if code weren't properly loaded. */
  4180. if (iwl3945_verify_ucode(priv)) {
  4181. /* Runtime instruction load was bad;
  4182. * take it all the way back down so we can try again */
  4183. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  4184. goto restart;
  4185. }
  4186. /* Send pointers to protocol/runtime uCode image ... init code will
  4187. * load and launch runtime uCode, which will send us another "Alive"
  4188. * notification. */
  4189. IWL_DEBUG_INFO("Initialization Alive received.\n");
  4190. if (iwl3945_set_ucode_ptrs(priv)) {
  4191. /* Runtime instruction load won't happen;
  4192. * take it all the way back down so we can try again */
  4193. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  4194. goto restart;
  4195. }
  4196. return;
  4197. restart:
  4198. queue_work(priv->workqueue, &priv->restart);
  4199. }
  4200. /* temporary */
  4201. static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw,
  4202. struct sk_buff *skb);
  4203. /**
  4204. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  4205. * from protocol/runtime uCode (initialization uCode's
  4206. * Alive gets handled by iwl3945_init_alive_start()).
  4207. */
  4208. static void iwl3945_alive_start(struct iwl_priv *priv)
  4209. {
  4210. int rc = 0;
  4211. int thermal_spin = 0;
  4212. u32 rfkill;
  4213. IWL_DEBUG_INFO("Runtime Alive received.\n");
  4214. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  4215. /* We had an error bringing up the hardware, so take it
  4216. * all the way back down so we can try again */
  4217. IWL_DEBUG_INFO("Alive failed.\n");
  4218. goto restart;
  4219. }
  4220. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  4221. * This is a paranoid check, because we would not have gotten the
  4222. * "runtime" alive if code weren't properly loaded. */
  4223. if (iwl3945_verify_ucode(priv)) {
  4224. /* Runtime instruction load was bad;
  4225. * take it all the way back down so we can try again */
  4226. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  4227. goto restart;
  4228. }
  4229. iwl3945_clear_stations_table(priv);
  4230. rc = iwl_grab_nic_access(priv);
  4231. if (rc) {
  4232. IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
  4233. return;
  4234. }
  4235. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  4236. IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
  4237. iwl_release_nic_access(priv);
  4238. if (rfkill & 0x1) {
  4239. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4240. /* if RFKILL is not on, then wait for thermal
  4241. * sensor in adapter to kick in */
  4242. while (iwl3945_hw_get_temperature(priv) == 0) {
  4243. thermal_spin++;
  4244. udelay(10);
  4245. }
  4246. if (thermal_spin)
  4247. IWL_DEBUG_INFO("Thermal calibration took %dus\n",
  4248. thermal_spin * 10);
  4249. } else
  4250. set_bit(STATUS_RF_KILL_HW, &priv->status);
  4251. /* After the ALIVE response, we can send commands to 3945 uCode */
  4252. set_bit(STATUS_ALIVE, &priv->status);
  4253. /* Clear out the uCode error bit if it is set */
  4254. clear_bit(STATUS_FW_ERROR, &priv->status);
  4255. if (iwl_is_rfkill(priv))
  4256. return;
  4257. ieee80211_wake_queues(priv->hw);
  4258. priv->active_rate = priv->rates_mask;
  4259. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  4260. iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  4261. if (iwl3945_is_associated(priv)) {
  4262. struct iwl3945_rxon_cmd *active_rxon =
  4263. (struct iwl3945_rxon_cmd *)(&priv->active39_rxon);
  4264. memcpy(&priv->staging39_rxon, &priv->active39_rxon,
  4265. sizeof(priv->staging39_rxon));
  4266. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4267. } else {
  4268. /* Initialize our rx_config data */
  4269. iwl3945_connection_init_rx_config(priv, priv->iw_mode);
  4270. memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  4271. }
  4272. /* Configure Bluetooth device coexistence support */
  4273. iwl3945_send_bt_config(priv);
  4274. /* Configure the adapter for unassociated operation */
  4275. iwl3945_commit_rxon(priv);
  4276. iwl3945_reg_txpower_periodic(priv);
  4277. iwl3945_led_register(priv);
  4278. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  4279. set_bit(STATUS_READY, &priv->status);
  4280. wake_up_interruptible(&priv->wait_command_queue);
  4281. if (priv->error_recovering)
  4282. iwl3945_error_recovery(priv);
  4283. /* reassociate for ADHOC mode */
  4284. if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
  4285. struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
  4286. priv->vif);
  4287. if (beacon)
  4288. iwl3945_mac_beacon_update(priv->hw, beacon);
  4289. }
  4290. return;
  4291. restart:
  4292. queue_work(priv->workqueue, &priv->restart);
  4293. }
  4294. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  4295. static void __iwl3945_down(struct iwl_priv *priv)
  4296. {
  4297. unsigned long flags;
  4298. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  4299. struct ieee80211_conf *conf = NULL;
  4300. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  4301. conf = ieee80211_get_hw_conf(priv->hw);
  4302. if (!exit_pending)
  4303. set_bit(STATUS_EXIT_PENDING, &priv->status);
  4304. iwl3945_led_unregister(priv);
  4305. iwl3945_clear_stations_table(priv);
  4306. /* Unblock any waiting calls */
  4307. wake_up_interruptible_all(&priv->wait_command_queue);
  4308. /* Wipe out the EXIT_PENDING status bit if we are not actually
  4309. * exiting the module */
  4310. if (!exit_pending)
  4311. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  4312. /* stop and reset the on-board processor */
  4313. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  4314. /* tell the device to stop sending interrupts */
  4315. spin_lock_irqsave(&priv->lock, flags);
  4316. iwl3945_disable_interrupts(priv);
  4317. spin_unlock_irqrestore(&priv->lock, flags);
  4318. iwl_synchronize_irq(priv);
  4319. if (priv->mac80211_registered)
  4320. ieee80211_stop_queues(priv->hw);
  4321. /* If we have not previously called iwl3945_init() then
  4322. * clear all bits but the RF Kill and SUSPEND bits and return */
  4323. if (!iwl_is_init(priv)) {
  4324. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  4325. STATUS_RF_KILL_HW |
  4326. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  4327. STATUS_RF_KILL_SW |
  4328. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  4329. STATUS_GEO_CONFIGURED |
  4330. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  4331. STATUS_IN_SUSPEND |
  4332. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  4333. STATUS_EXIT_PENDING;
  4334. goto exit;
  4335. }
  4336. /* ...otherwise clear out all the status bits but the RF Kill and
  4337. * SUSPEND bits and continue taking the NIC down. */
  4338. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  4339. STATUS_RF_KILL_HW |
  4340. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  4341. STATUS_RF_KILL_SW |
  4342. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  4343. STATUS_GEO_CONFIGURED |
  4344. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  4345. STATUS_IN_SUSPEND |
  4346. test_bit(STATUS_FW_ERROR, &priv->status) <<
  4347. STATUS_FW_ERROR |
  4348. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  4349. STATUS_EXIT_PENDING;
  4350. spin_lock_irqsave(&priv->lock, flags);
  4351. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  4352. spin_unlock_irqrestore(&priv->lock, flags);
  4353. iwl3945_hw_txq_ctx_stop(priv);
  4354. iwl3945_hw_rxq_stop(priv);
  4355. spin_lock_irqsave(&priv->lock, flags);
  4356. if (!iwl_grab_nic_access(priv)) {
  4357. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  4358. APMG_CLK_VAL_DMA_CLK_RQT);
  4359. iwl_release_nic_access(priv);
  4360. }
  4361. spin_unlock_irqrestore(&priv->lock, flags);
  4362. udelay(5);
  4363. priv->cfg->ops->lib->apm_ops.reset(priv);
  4364. exit:
  4365. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  4366. if (priv->ibss_beacon)
  4367. dev_kfree_skb(priv->ibss_beacon);
  4368. priv->ibss_beacon = NULL;
  4369. /* clear out any free frames */
  4370. iwl3945_clear_free_frames(priv);
  4371. }
  4372. static void iwl3945_down(struct iwl_priv *priv)
  4373. {
  4374. mutex_lock(&priv->mutex);
  4375. __iwl3945_down(priv);
  4376. mutex_unlock(&priv->mutex);
  4377. iwl3945_cancel_deferred_work(priv);
  4378. }
  4379. #define MAX_HW_RESTARTS 5
  4380. static int __iwl3945_up(struct iwl_priv *priv)
  4381. {
  4382. int rc, i;
  4383. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4384. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  4385. return -EIO;
  4386. }
  4387. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  4388. IWL_WARN(priv, "Radio disabled by SW RF kill (module "
  4389. "parameter)\n");
  4390. return -ENODEV;
  4391. }
  4392. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  4393. IWL_ERR(priv, "ucode not available for device bring up\n");
  4394. return -EIO;
  4395. }
  4396. /* If platform's RF_KILL switch is NOT set to KILL */
  4397. if (iwl_read32(priv, CSR_GP_CNTRL) &
  4398. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  4399. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4400. else {
  4401. set_bit(STATUS_RF_KILL_HW, &priv->status);
  4402. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  4403. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  4404. return -ENODEV;
  4405. }
  4406. }
  4407. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  4408. rc = iwl3945_hw_nic_init(priv);
  4409. if (rc) {
  4410. IWL_ERR(priv, "Unable to int nic\n");
  4411. return rc;
  4412. }
  4413. /* make sure rfkill handshake bits are cleared */
  4414. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4415. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  4416. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  4417. /* clear (again), then enable host interrupts */
  4418. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  4419. iwl3945_enable_interrupts(priv);
  4420. /* really make sure rfkill handshake bits are cleared */
  4421. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4422. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4423. /* Copy original ucode data image from disk into backup cache.
  4424. * This will be used to initialize the on-board processor's
  4425. * data SRAM for a clean start when the runtime program first loads. */
  4426. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  4427. priv->ucode_data.len);
  4428. /* We return success when we resume from suspend and rf_kill is on. */
  4429. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  4430. return 0;
  4431. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  4432. iwl3945_clear_stations_table(priv);
  4433. /* load bootstrap state machine,
  4434. * load bootstrap program into processor's memory,
  4435. * prepare to load the "initialize" uCode */
  4436. priv->cfg->ops->lib->load_ucode(priv);
  4437. if (rc) {
  4438. IWL_ERR(priv,
  4439. "Unable to set up bootstrap uCode: %d\n", rc);
  4440. continue;
  4441. }
  4442. /* start card; "initialize" will load runtime ucode */
  4443. iwl3945_nic_start(priv);
  4444. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  4445. return 0;
  4446. }
  4447. set_bit(STATUS_EXIT_PENDING, &priv->status);
  4448. __iwl3945_down(priv);
  4449. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  4450. /* tried to restart and config the device for as long as our
  4451. * patience could withstand */
  4452. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  4453. return -EIO;
  4454. }
  4455. /*****************************************************************************
  4456. *
  4457. * Workqueue callbacks
  4458. *
  4459. *****************************************************************************/
  4460. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  4461. {
  4462. struct iwl_priv *priv =
  4463. container_of(data, struct iwl_priv, init_alive_start.work);
  4464. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4465. return;
  4466. mutex_lock(&priv->mutex);
  4467. iwl3945_init_alive_start(priv);
  4468. mutex_unlock(&priv->mutex);
  4469. }
  4470. static void iwl3945_bg_alive_start(struct work_struct *data)
  4471. {
  4472. struct iwl_priv *priv =
  4473. container_of(data, struct iwl_priv, alive_start.work);
  4474. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4475. return;
  4476. mutex_lock(&priv->mutex);
  4477. iwl3945_alive_start(priv);
  4478. mutex_unlock(&priv->mutex);
  4479. }
  4480. static void iwl3945_bg_rf_kill(struct work_struct *work)
  4481. {
  4482. struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
  4483. wake_up_interruptible(&priv->wait_command_queue);
  4484. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4485. return;
  4486. mutex_lock(&priv->mutex);
  4487. if (!iwl_is_rfkill(priv)) {
  4488. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  4489. "HW and/or SW RF Kill no longer active, restarting "
  4490. "device\n");
  4491. if (!test_bit(STATUS_EXIT_PENDING, &priv->status) &&
  4492. test_bit(STATUS_ALIVE, &priv->status))
  4493. queue_work(priv->workqueue, &priv->restart);
  4494. } else {
  4495. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  4496. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  4497. "disabled by SW switch\n");
  4498. else
  4499. IWL_WARN(priv, "Radio Frequency Kill Switch is On:\n"
  4500. "Kill switch must be turned off for "
  4501. "wireless networking to work.\n");
  4502. }
  4503. mutex_unlock(&priv->mutex);
  4504. iwl3945_rfkill_set_hw_state(priv);
  4505. }
  4506. static void iwl3945_rfkill_poll(struct work_struct *data)
  4507. {
  4508. struct iwl_priv *priv =
  4509. container_of(data, struct iwl_priv, rfkill_poll.work);
  4510. unsigned long status = priv->status;
  4511. if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  4512. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4513. else
  4514. set_bit(STATUS_RF_KILL_HW, &priv->status);
  4515. if (test_bit(STATUS_RF_KILL_HW, &status) != test_bit(STATUS_RF_KILL_HW, &priv->status))
  4516. queue_work(priv->workqueue, &priv->rf_kill);
  4517. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  4518. round_jiffies_relative(2 * HZ));
  4519. }
  4520. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  4521. static void iwl3945_bg_scan_check(struct work_struct *data)
  4522. {
  4523. struct iwl_priv *priv =
  4524. container_of(data, struct iwl_priv, scan_check.work);
  4525. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4526. return;
  4527. mutex_lock(&priv->mutex);
  4528. if (test_bit(STATUS_SCANNING, &priv->status) ||
  4529. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  4530. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  4531. "Scan completion watchdog resetting adapter (%dms)\n",
  4532. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  4533. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  4534. iwl3945_send_scan_abort(priv);
  4535. }
  4536. mutex_unlock(&priv->mutex);
  4537. }
  4538. static void iwl3945_bg_request_scan(struct work_struct *data)
  4539. {
  4540. struct iwl_priv *priv =
  4541. container_of(data, struct iwl_priv, request_scan);
  4542. struct iwl_host_cmd cmd = {
  4543. .id = REPLY_SCAN_CMD,
  4544. .len = sizeof(struct iwl3945_scan_cmd),
  4545. .meta.flags = CMD_SIZE_HUGE,
  4546. };
  4547. int rc = 0;
  4548. struct iwl3945_scan_cmd *scan;
  4549. struct ieee80211_conf *conf = NULL;
  4550. u8 n_probes = 2;
  4551. enum ieee80211_band band;
  4552. DECLARE_SSID_BUF(ssid);
  4553. conf = ieee80211_get_hw_conf(priv->hw);
  4554. mutex_lock(&priv->mutex);
  4555. if (!iwl_is_ready(priv)) {
  4556. IWL_WARN(priv, "request scan called when driver not ready.\n");
  4557. goto done;
  4558. }
  4559. /* Make sure the scan wasn't canceled before this queued work
  4560. * was given the chance to run... */
  4561. if (!test_bit(STATUS_SCANNING, &priv->status))
  4562. goto done;
  4563. /* This should never be called or scheduled if there is currently
  4564. * a scan active in the hardware. */
  4565. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  4566. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  4567. "Ignoring second request.\n");
  4568. rc = -EIO;
  4569. goto done;
  4570. }
  4571. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4572. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  4573. goto done;
  4574. }
  4575. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  4576. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  4577. goto done;
  4578. }
  4579. if (iwl_is_rfkill(priv)) {
  4580. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  4581. goto done;
  4582. }
  4583. if (!test_bit(STATUS_READY, &priv->status)) {
  4584. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  4585. goto done;
  4586. }
  4587. if (!priv->scan_bands) {
  4588. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  4589. goto done;
  4590. }
  4591. if (!priv->scan39) {
  4592. priv->scan39 = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  4593. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  4594. if (!priv->scan39) {
  4595. rc = -ENOMEM;
  4596. goto done;
  4597. }
  4598. }
  4599. scan = priv->scan39;
  4600. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  4601. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  4602. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  4603. if (iwl3945_is_associated(priv)) {
  4604. u16 interval = 0;
  4605. u32 extra;
  4606. u32 suspend_time = 100;
  4607. u32 scan_suspend_time = 100;
  4608. unsigned long flags;
  4609. IWL_DEBUG_INFO("Scanning while associated...\n");
  4610. spin_lock_irqsave(&priv->lock, flags);
  4611. interval = priv->beacon_int;
  4612. spin_unlock_irqrestore(&priv->lock, flags);
  4613. scan->suspend_time = 0;
  4614. scan->max_out_time = cpu_to_le32(200 * 1024);
  4615. if (!interval)
  4616. interval = suspend_time;
  4617. /*
  4618. * suspend time format:
  4619. * 0-19: beacon interval in usec (time before exec.)
  4620. * 20-23: 0
  4621. * 24-31: number of beacons (suspend between channels)
  4622. */
  4623. extra = (suspend_time / interval) << 24;
  4624. scan_suspend_time = 0xFF0FFFFF &
  4625. (extra | ((suspend_time % interval) * 1024));
  4626. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  4627. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  4628. scan_suspend_time, interval);
  4629. }
  4630. /* We should add the ability for user to lock to PASSIVE ONLY */
  4631. if (priv->one_direct_scan) {
  4632. IWL_DEBUG_SCAN
  4633. ("Kicking off one direct scan for '%s'\n",
  4634. print_ssid(ssid, priv->direct_ssid,
  4635. priv->direct_ssid_len));
  4636. scan->direct_scan[0].id = WLAN_EID_SSID;
  4637. scan->direct_scan[0].len = priv->direct_ssid_len;
  4638. memcpy(scan->direct_scan[0].ssid,
  4639. priv->direct_ssid, priv->direct_ssid_len);
  4640. n_probes++;
  4641. } else
  4642. IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
  4643. /* We don't build a direct scan probe request; the uCode will do
  4644. * that based on the direct_mask added to each channel entry */
  4645. scan->tx_cmd.len = cpu_to_le16(
  4646. iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
  4647. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  4648. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  4649. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  4650. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  4651. /* flags + rate selection */
  4652. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
  4653. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  4654. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  4655. scan->good_CRC_th = 0;
  4656. band = IEEE80211_BAND_2GHZ;
  4657. } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
  4658. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  4659. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  4660. band = IEEE80211_BAND_5GHZ;
  4661. } else {
  4662. IWL_WARN(priv, "Invalid scan band count\n");
  4663. goto done;
  4664. }
  4665. /* select Rx antennas */
  4666. scan->flags |= iwl3945_get_antenna_flags(priv);
  4667. if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
  4668. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  4669. scan->channel_count =
  4670. iwl3945_get_channels_for_scan(priv, band, 1, /* active */
  4671. n_probes,
  4672. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  4673. if (scan->channel_count == 0) {
  4674. IWL_DEBUG_SCAN("channel count %d\n", scan->channel_count);
  4675. goto done;
  4676. }
  4677. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  4678. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  4679. cmd.data = scan;
  4680. scan->len = cpu_to_le16(cmd.len);
  4681. set_bit(STATUS_SCAN_HW, &priv->status);
  4682. rc = iwl3945_send_cmd_sync(priv, &cmd);
  4683. if (rc)
  4684. goto done;
  4685. queue_delayed_work(priv->workqueue, &priv->scan_check,
  4686. IWL_SCAN_CHECK_WATCHDOG);
  4687. mutex_unlock(&priv->mutex);
  4688. return;
  4689. done:
  4690. /* can not perform scan make sure we clear scanning
  4691. * bits from status so next scan request can be performed.
  4692. * if we dont clear scanning status bit here all next scan
  4693. * will fail
  4694. */
  4695. clear_bit(STATUS_SCAN_HW, &priv->status);
  4696. clear_bit(STATUS_SCANNING, &priv->status);
  4697. /* inform mac80211 scan aborted */
  4698. queue_work(priv->workqueue, &priv->scan_completed);
  4699. mutex_unlock(&priv->mutex);
  4700. }
  4701. static void iwl3945_bg_up(struct work_struct *data)
  4702. {
  4703. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  4704. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4705. return;
  4706. mutex_lock(&priv->mutex);
  4707. __iwl3945_up(priv);
  4708. mutex_unlock(&priv->mutex);
  4709. iwl3945_rfkill_set_hw_state(priv);
  4710. }
  4711. static void iwl3945_bg_restart(struct work_struct *data)
  4712. {
  4713. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  4714. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4715. return;
  4716. iwl3945_down(priv);
  4717. queue_work(priv->workqueue, &priv->up);
  4718. }
  4719. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  4720. {
  4721. struct iwl_priv *priv =
  4722. container_of(data, struct iwl_priv, rx_replenish);
  4723. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4724. return;
  4725. mutex_lock(&priv->mutex);
  4726. iwl3945_rx_replenish(priv);
  4727. mutex_unlock(&priv->mutex);
  4728. }
  4729. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  4730. static void iwl3945_post_associate(struct iwl_priv *priv)
  4731. {
  4732. int rc = 0;
  4733. struct ieee80211_conf *conf = NULL;
  4734. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  4735. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  4736. return;
  4737. }
  4738. IWL_DEBUG_ASSOC("Associated as %d to: %pM\n",
  4739. priv->assoc_id, priv->active39_rxon.bssid_addr);
  4740. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4741. return;
  4742. if (!priv->vif || !priv->is_open)
  4743. return;
  4744. iwl_scan_cancel_timeout(priv, 200);
  4745. conf = ieee80211_get_hw_conf(priv->hw);
  4746. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4747. iwl3945_commit_rxon(priv);
  4748. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  4749. iwl3945_setup_rxon_timing(priv);
  4750. rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  4751. sizeof(priv->rxon_timing), &priv->rxon_timing);
  4752. if (rc)
  4753. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  4754. "Attempting to continue.\n");
  4755. priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  4756. priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  4757. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  4758. priv->assoc_id, priv->beacon_int);
  4759. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  4760. priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  4761. else
  4762. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  4763. if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  4764. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  4765. priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  4766. else
  4767. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  4768. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  4769. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  4770. }
  4771. iwl3945_commit_rxon(priv);
  4772. switch (priv->iw_mode) {
  4773. case NL80211_IFTYPE_STATION:
  4774. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  4775. break;
  4776. case NL80211_IFTYPE_ADHOC:
  4777. priv->assoc_id = 1;
  4778. iwl3945_add_station(priv, priv->bssid, 0, 0);
  4779. iwl3945_sync_sta(priv, IWL_STA_ID,
  4780. (priv->band == IEEE80211_BAND_5GHZ) ?
  4781. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  4782. CMD_ASYNC);
  4783. iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
  4784. iwl3945_send_beacon_cmd(priv);
  4785. break;
  4786. default:
  4787. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  4788. __func__, priv->iw_mode);
  4789. break;
  4790. }
  4791. iwl3945_activate_qos(priv, 0);
  4792. /* we have just associated, don't start scan too early */
  4793. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  4794. }
  4795. static void iwl3945_bg_abort_scan(struct work_struct *work)
  4796. {
  4797. struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
  4798. if (!iwl_is_ready(priv))
  4799. return;
  4800. mutex_lock(&priv->mutex);
  4801. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  4802. iwl3945_send_scan_abort(priv);
  4803. mutex_unlock(&priv->mutex);
  4804. }
  4805. static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
  4806. static void iwl3945_bg_scan_completed(struct work_struct *work)
  4807. {
  4808. struct iwl_priv *priv =
  4809. container_of(work, struct iwl_priv, scan_completed);
  4810. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  4811. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4812. return;
  4813. if (test_bit(STATUS_CONF_PENDING, &priv->status))
  4814. iwl3945_mac_config(priv->hw, 0);
  4815. ieee80211_scan_completed(priv->hw);
  4816. /* Since setting the TXPOWER may have been deferred while
  4817. * performing the scan, fire one off */
  4818. mutex_lock(&priv->mutex);
  4819. iwl3945_hw_reg_send_txpower(priv);
  4820. mutex_unlock(&priv->mutex);
  4821. }
  4822. /*****************************************************************************
  4823. *
  4824. * mac80211 entry point functions
  4825. *
  4826. *****************************************************************************/
  4827. #define UCODE_READY_TIMEOUT (2 * HZ)
  4828. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  4829. {
  4830. struct iwl_priv *priv = hw->priv;
  4831. int ret;
  4832. IWL_DEBUG_MAC80211("enter\n");
  4833. /* we should be verifying the device is ready to be opened */
  4834. mutex_lock(&priv->mutex);
  4835. memset(&priv->staging39_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
  4836. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  4837. * ucode filename and max sizes are card-specific. */
  4838. if (!priv->ucode_code.len) {
  4839. ret = iwl3945_read_ucode(priv);
  4840. if (ret) {
  4841. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  4842. mutex_unlock(&priv->mutex);
  4843. goto out_release_irq;
  4844. }
  4845. }
  4846. ret = __iwl3945_up(priv);
  4847. mutex_unlock(&priv->mutex);
  4848. iwl3945_rfkill_set_hw_state(priv);
  4849. if (ret)
  4850. goto out_release_irq;
  4851. IWL_DEBUG_INFO("Start UP work.\n");
  4852. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  4853. return 0;
  4854. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  4855. * mac80211 will not be run successfully. */
  4856. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  4857. test_bit(STATUS_READY, &priv->status),
  4858. UCODE_READY_TIMEOUT);
  4859. if (!ret) {
  4860. if (!test_bit(STATUS_READY, &priv->status)) {
  4861. IWL_ERR(priv,
  4862. "Wait for START_ALIVE timeout after %dms.\n",
  4863. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  4864. ret = -ETIMEDOUT;
  4865. goto out_release_irq;
  4866. }
  4867. }
  4868. /* ucode is running and will send rfkill notifications,
  4869. * no need to poll the killswitch state anymore */
  4870. cancel_delayed_work(&priv->rfkill_poll);
  4871. priv->is_open = 1;
  4872. IWL_DEBUG_MAC80211("leave\n");
  4873. return 0;
  4874. out_release_irq:
  4875. priv->is_open = 0;
  4876. IWL_DEBUG_MAC80211("leave - failed\n");
  4877. return ret;
  4878. }
  4879. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  4880. {
  4881. struct iwl_priv *priv = hw->priv;
  4882. IWL_DEBUG_MAC80211("enter\n");
  4883. if (!priv->is_open) {
  4884. IWL_DEBUG_MAC80211("leave - skip\n");
  4885. return;
  4886. }
  4887. priv->is_open = 0;
  4888. if (iwl_is_ready_rf(priv)) {
  4889. /* stop mac, cancel any scan request and clear
  4890. * RXON_FILTER_ASSOC_MSK BIT
  4891. */
  4892. mutex_lock(&priv->mutex);
  4893. iwl_scan_cancel_timeout(priv, 100);
  4894. mutex_unlock(&priv->mutex);
  4895. }
  4896. iwl3945_down(priv);
  4897. flush_workqueue(priv->workqueue);
  4898. /* start polling the killswitch state again */
  4899. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  4900. round_jiffies_relative(2 * HZ));
  4901. IWL_DEBUG_MAC80211("leave\n");
  4902. }
  4903. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  4904. {
  4905. struct iwl_priv *priv = hw->priv;
  4906. IWL_DEBUG_MAC80211("enter\n");
  4907. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  4908. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  4909. if (iwl3945_tx_skb(priv, skb))
  4910. dev_kfree_skb_any(skb);
  4911. IWL_DEBUG_MAC80211("leave\n");
  4912. return NETDEV_TX_OK;
  4913. }
  4914. static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
  4915. struct ieee80211_if_init_conf *conf)
  4916. {
  4917. struct iwl_priv *priv = hw->priv;
  4918. unsigned long flags;
  4919. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  4920. if (priv->vif) {
  4921. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  4922. return -EOPNOTSUPP;
  4923. }
  4924. spin_lock_irqsave(&priv->lock, flags);
  4925. priv->vif = conf->vif;
  4926. priv->iw_mode = conf->type;
  4927. spin_unlock_irqrestore(&priv->lock, flags);
  4928. mutex_lock(&priv->mutex);
  4929. if (conf->mac_addr) {
  4930. IWL_DEBUG_MAC80211("Set: %pM\n", conf->mac_addr);
  4931. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  4932. }
  4933. if (iwl_is_ready(priv))
  4934. iwl3945_set_mode(priv, conf->type);
  4935. mutex_unlock(&priv->mutex);
  4936. IWL_DEBUG_MAC80211("leave\n");
  4937. return 0;
  4938. }
  4939. /**
  4940. * iwl3945_mac_config - mac80211 config callback
  4941. *
  4942. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  4943. * be set inappropriately and the driver currently sets the hardware up to
  4944. * use it whenever needed.
  4945. */
  4946. static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
  4947. {
  4948. struct iwl_priv *priv = hw->priv;
  4949. const struct iwl_channel_info *ch_info;
  4950. struct ieee80211_conf *conf = &hw->conf;
  4951. unsigned long flags;
  4952. int ret = 0;
  4953. mutex_lock(&priv->mutex);
  4954. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
  4955. if (!iwl_is_ready(priv)) {
  4956. IWL_DEBUG_MAC80211("leave - not ready\n");
  4957. ret = -EIO;
  4958. goto out;
  4959. }
  4960. if (unlikely(!iwl3945_mod_params.disable_hw_scan &&
  4961. test_bit(STATUS_SCANNING, &priv->status))) {
  4962. IWL_DEBUG_MAC80211("leave - scanning\n");
  4963. set_bit(STATUS_CONF_PENDING, &priv->status);
  4964. mutex_unlock(&priv->mutex);
  4965. return 0;
  4966. }
  4967. spin_lock_irqsave(&priv->lock, flags);
  4968. ch_info = iwl3945_get_channel_info(priv, conf->channel->band,
  4969. conf->channel->hw_value);
  4970. if (!is_channel_valid(ch_info)) {
  4971. IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this band.\n",
  4972. conf->channel->hw_value, conf->channel->band);
  4973. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  4974. spin_unlock_irqrestore(&priv->lock, flags);
  4975. ret = -EINVAL;
  4976. goto out;
  4977. }
  4978. iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
  4979. iwl3945_set_flags_for_phymode(priv, conf->channel->band);
  4980. /* The list of supported rates and rate mask can be different
  4981. * for each phymode; since the phymode may have changed, reset
  4982. * the rate mask to what mac80211 lists */
  4983. iwl3945_set_rate(priv);
  4984. spin_unlock_irqrestore(&priv->lock, flags);
  4985. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  4986. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  4987. iwl3945_hw_channel_switch(priv, conf->channel);
  4988. goto out;
  4989. }
  4990. #endif
  4991. iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
  4992. if (!conf->radio_enabled) {
  4993. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  4994. goto out;
  4995. }
  4996. if (iwl_is_rfkill(priv)) {
  4997. IWL_DEBUG_MAC80211("leave - RF kill\n");
  4998. ret = -EIO;
  4999. goto out;
  5000. }
  5001. iwl3945_set_rate(priv);
  5002. if (memcmp(&priv->active39_rxon,
  5003. &priv->staging39_rxon, sizeof(priv->staging39_rxon)))
  5004. iwl3945_commit_rxon(priv);
  5005. else
  5006. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  5007. IWL_DEBUG_MAC80211("leave\n");
  5008. out:
  5009. clear_bit(STATUS_CONF_PENDING, &priv->status);
  5010. mutex_unlock(&priv->mutex);
  5011. return ret;
  5012. }
  5013. static void iwl3945_config_ap(struct iwl_priv *priv)
  5014. {
  5015. int rc = 0;
  5016. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5017. return;
  5018. /* The following should be done only at AP bring up */
  5019. if (!(iwl3945_is_associated(priv))) {
  5020. /* RXON - unassoc (to set timing command) */
  5021. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5022. iwl3945_commit_rxon(priv);
  5023. /* RXON Timing */
  5024. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  5025. iwl3945_setup_rxon_timing(priv);
  5026. rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5027. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5028. if (rc)
  5029. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  5030. "Attempting to continue.\n");
  5031. /* FIXME: what should be the assoc_id for AP? */
  5032. priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5033. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5034. priv->staging39_rxon.flags |=
  5035. RXON_FLG_SHORT_PREAMBLE_MSK;
  5036. else
  5037. priv->staging39_rxon.flags &=
  5038. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5039. if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5040. if (priv->assoc_capability &
  5041. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5042. priv->staging39_rxon.flags |=
  5043. RXON_FLG_SHORT_SLOT_MSK;
  5044. else
  5045. priv->staging39_rxon.flags &=
  5046. ~RXON_FLG_SHORT_SLOT_MSK;
  5047. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  5048. priv->staging39_rxon.flags &=
  5049. ~RXON_FLG_SHORT_SLOT_MSK;
  5050. }
  5051. /* restore RXON assoc */
  5052. priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5053. iwl3945_commit_rxon(priv);
  5054. iwl3945_add_station(priv, iwl_bcast_addr, 0, 0);
  5055. }
  5056. iwl3945_send_beacon_cmd(priv);
  5057. /* FIXME - we need to add code here to detect a totally new
  5058. * configuration, reset the AP, unassoc, rxon timing, assoc,
  5059. * clear sta table, add BCAST sta... */
  5060. }
  5061. static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
  5062. struct ieee80211_vif *vif,
  5063. struct ieee80211_if_conf *conf)
  5064. {
  5065. struct iwl_priv *priv = hw->priv;
  5066. int rc;
  5067. if (conf == NULL)
  5068. return -EIO;
  5069. if (priv->vif != vif) {
  5070. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  5071. return 0;
  5072. }
  5073. /* handle this temporarily here */
  5074. if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  5075. conf->changed & IEEE80211_IFCC_BEACON) {
  5076. struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
  5077. if (!beacon)
  5078. return -ENOMEM;
  5079. mutex_lock(&priv->mutex);
  5080. rc = iwl3945_mac_beacon_update(hw, beacon);
  5081. mutex_unlock(&priv->mutex);
  5082. if (rc)
  5083. return rc;
  5084. }
  5085. if (!iwl_is_alive(priv))
  5086. return -EAGAIN;
  5087. mutex_lock(&priv->mutex);
  5088. if (conf->bssid)
  5089. IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid);
  5090. /*
  5091. * very dubious code was here; the probe filtering flag is never set:
  5092. *
  5093. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  5094. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  5095. */
  5096. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  5097. if (!conf->bssid) {
  5098. conf->bssid = priv->mac_addr;
  5099. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  5100. IWL_DEBUG_MAC80211("bssid was set to: %pM\n",
  5101. conf->bssid);
  5102. }
  5103. if (priv->ibss_beacon)
  5104. dev_kfree_skb(priv->ibss_beacon);
  5105. priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
  5106. }
  5107. if (iwl_is_rfkill(priv))
  5108. goto done;
  5109. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  5110. !is_multicast_ether_addr(conf->bssid)) {
  5111. /* If there is currently a HW scan going on in the background
  5112. * then we need to cancel it else the RXON below will fail. */
  5113. if (iwl_scan_cancel_timeout(priv, 100)) {
  5114. IWL_WARN(priv, "Aborted scan still in progress "
  5115. "after 100ms\n");
  5116. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  5117. mutex_unlock(&priv->mutex);
  5118. return -EAGAIN;
  5119. }
  5120. memcpy(priv->staging39_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  5121. /* TODO: Audit driver for usage of these members and see
  5122. * if mac80211 deprecates them (priv->bssid looks like it
  5123. * shouldn't be there, but I haven't scanned the IBSS code
  5124. * to verify) - jpk */
  5125. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  5126. if (priv->iw_mode == NL80211_IFTYPE_AP)
  5127. iwl3945_config_ap(priv);
  5128. else {
  5129. rc = iwl3945_commit_rxon(priv);
  5130. if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
  5131. iwl3945_add_station(priv,
  5132. priv->active39_rxon.bssid_addr, 1, 0);
  5133. }
  5134. } else {
  5135. iwl_scan_cancel_timeout(priv, 100);
  5136. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5137. iwl3945_commit_rxon(priv);
  5138. }
  5139. done:
  5140. IWL_DEBUG_MAC80211("leave\n");
  5141. mutex_unlock(&priv->mutex);
  5142. return 0;
  5143. }
  5144. static void iwl3945_configure_filter(struct ieee80211_hw *hw,
  5145. unsigned int changed_flags,
  5146. unsigned int *total_flags,
  5147. int mc_count, struct dev_addr_list *mc_list)
  5148. {
  5149. struct iwl_priv *priv = hw->priv;
  5150. __le32 *filter_flags = &priv->staging39_rxon.filter_flags;
  5151. IWL_DEBUG_MAC80211("Enter: changed: 0x%x, total: 0x%x\n",
  5152. changed_flags, *total_flags);
  5153. if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
  5154. if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
  5155. *filter_flags |= RXON_FILTER_PROMISC_MSK;
  5156. else
  5157. *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
  5158. }
  5159. if (changed_flags & FIF_ALLMULTI) {
  5160. if (*total_flags & FIF_ALLMULTI)
  5161. *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
  5162. else
  5163. *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
  5164. }
  5165. if (changed_flags & FIF_CONTROL) {
  5166. if (*total_flags & FIF_CONTROL)
  5167. *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
  5168. else
  5169. *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
  5170. }
  5171. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  5172. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  5173. *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
  5174. else
  5175. *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
  5176. }
  5177. /* We avoid iwl_commit_rxon here to commit the new filter flags
  5178. * since mac80211 will call ieee80211_hw_config immediately.
  5179. * (mc_list is not supported at this time). Otherwise, we need to
  5180. * queue a background iwl_commit_rxon work.
  5181. */
  5182. *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  5183. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  5184. }
  5185. static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
  5186. struct ieee80211_if_init_conf *conf)
  5187. {
  5188. struct iwl_priv *priv = hw->priv;
  5189. IWL_DEBUG_MAC80211("enter\n");
  5190. mutex_lock(&priv->mutex);
  5191. if (iwl_is_ready_rf(priv)) {
  5192. iwl_scan_cancel_timeout(priv, 100);
  5193. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5194. iwl3945_commit_rxon(priv);
  5195. }
  5196. if (priv->vif == conf->vif) {
  5197. priv->vif = NULL;
  5198. memset(priv->bssid, 0, ETH_ALEN);
  5199. }
  5200. mutex_unlock(&priv->mutex);
  5201. IWL_DEBUG_MAC80211("leave\n");
  5202. }
  5203. #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
  5204. static void iwl3945_bss_info_changed(struct ieee80211_hw *hw,
  5205. struct ieee80211_vif *vif,
  5206. struct ieee80211_bss_conf *bss_conf,
  5207. u32 changes)
  5208. {
  5209. struct iwl_priv *priv = hw->priv;
  5210. IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
  5211. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  5212. IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
  5213. bss_conf->use_short_preamble);
  5214. if (bss_conf->use_short_preamble)
  5215. priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5216. else
  5217. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5218. }
  5219. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  5220. IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
  5221. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  5222. priv->staging39_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  5223. else
  5224. priv->staging39_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  5225. }
  5226. if (changes & BSS_CHANGED_ASSOC) {
  5227. IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
  5228. /* This should never happen as this function should
  5229. * never be called from interrupt context. */
  5230. if (WARN_ON_ONCE(in_interrupt()))
  5231. return;
  5232. if (bss_conf->assoc) {
  5233. priv->assoc_id = bss_conf->aid;
  5234. priv->beacon_int = bss_conf->beacon_int;
  5235. priv->timestamp = bss_conf->timestamp;
  5236. priv->assoc_capability = bss_conf->assoc_capability;
  5237. priv->next_scan_jiffies = jiffies +
  5238. IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
  5239. mutex_lock(&priv->mutex);
  5240. iwl3945_post_associate(priv);
  5241. mutex_unlock(&priv->mutex);
  5242. } else {
  5243. priv->assoc_id = 0;
  5244. IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
  5245. }
  5246. } else if (changes && iwl3945_is_associated(priv) && priv->assoc_id) {
  5247. IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
  5248. iwl3945_send_rxon_assoc(priv);
  5249. }
  5250. }
  5251. static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  5252. {
  5253. int rc = 0;
  5254. unsigned long flags;
  5255. struct iwl_priv *priv = hw->priv;
  5256. DECLARE_SSID_BUF(ssid_buf);
  5257. IWL_DEBUG_MAC80211("enter\n");
  5258. mutex_lock(&priv->mutex);
  5259. spin_lock_irqsave(&priv->lock, flags);
  5260. if (!iwl_is_ready_rf(priv)) {
  5261. rc = -EIO;
  5262. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  5263. goto out_unlock;
  5264. }
  5265. /* we don't schedule scan within next_scan_jiffies period */
  5266. if (priv->next_scan_jiffies &&
  5267. time_after(priv->next_scan_jiffies, jiffies)) {
  5268. rc = -EAGAIN;
  5269. goto out_unlock;
  5270. }
  5271. /* if we just finished scan ask for delay for a broadcast scan */
  5272. if ((len == 0) && priv->last_scan_jiffies &&
  5273. time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
  5274. jiffies)) {
  5275. rc = -EAGAIN;
  5276. goto out_unlock;
  5277. }
  5278. if (len) {
  5279. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  5280. print_ssid(ssid_buf, ssid, len), (int)len);
  5281. priv->one_direct_scan = 1;
  5282. priv->direct_ssid_len = (u8)
  5283. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  5284. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  5285. } else
  5286. priv->one_direct_scan = 0;
  5287. rc = iwl3945_scan_initiate(priv);
  5288. IWL_DEBUG_MAC80211("leave\n");
  5289. out_unlock:
  5290. spin_unlock_irqrestore(&priv->lock, flags);
  5291. mutex_unlock(&priv->mutex);
  5292. return rc;
  5293. }
  5294. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  5295. struct ieee80211_vif *vif,
  5296. struct ieee80211_sta *sta,
  5297. struct ieee80211_key_conf *key)
  5298. {
  5299. struct iwl_priv *priv = hw->priv;
  5300. const u8 *addr;
  5301. int ret;
  5302. u8 sta_id;
  5303. IWL_DEBUG_MAC80211("enter\n");
  5304. if (iwl3945_mod_params.sw_crypto) {
  5305. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  5306. return -EOPNOTSUPP;
  5307. }
  5308. addr = sta ? sta->addr : iwl_bcast_addr;
  5309. sta_id = iwl3945_hw_find_station(priv, addr);
  5310. if (sta_id == IWL_INVALID_STATION) {
  5311. IWL_DEBUG_MAC80211("leave - %pM not in station map.\n",
  5312. addr);
  5313. return -EINVAL;
  5314. }
  5315. mutex_lock(&priv->mutex);
  5316. iwl_scan_cancel_timeout(priv, 100);
  5317. switch (cmd) {
  5318. case SET_KEY:
  5319. ret = iwl3945_update_sta_key_info(priv, key, sta_id);
  5320. if (!ret) {
  5321. iwl3945_set_rxon_hwcrypto(priv, 1);
  5322. iwl3945_commit_rxon(priv);
  5323. key->hw_key_idx = sta_id;
  5324. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  5325. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  5326. }
  5327. break;
  5328. case DISABLE_KEY:
  5329. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  5330. if (!ret) {
  5331. iwl3945_set_rxon_hwcrypto(priv, 0);
  5332. iwl3945_commit_rxon(priv);
  5333. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  5334. }
  5335. break;
  5336. default:
  5337. ret = -EINVAL;
  5338. }
  5339. IWL_DEBUG_MAC80211("leave\n");
  5340. mutex_unlock(&priv->mutex);
  5341. return ret;
  5342. }
  5343. static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
  5344. const struct ieee80211_tx_queue_params *params)
  5345. {
  5346. struct iwl_priv *priv = hw->priv;
  5347. unsigned long flags;
  5348. int q;
  5349. IWL_DEBUG_MAC80211("enter\n");
  5350. if (!iwl_is_ready_rf(priv)) {
  5351. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5352. return -EIO;
  5353. }
  5354. if (queue >= AC_NUM) {
  5355. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  5356. return 0;
  5357. }
  5358. q = AC_NUM - 1 - queue;
  5359. spin_lock_irqsave(&priv->lock, flags);
  5360. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  5361. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  5362. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  5363. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  5364. cpu_to_le16((params->txop * 32));
  5365. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  5366. priv->qos_data.qos_active = 1;
  5367. spin_unlock_irqrestore(&priv->lock, flags);
  5368. mutex_lock(&priv->mutex);
  5369. if (priv->iw_mode == NL80211_IFTYPE_AP)
  5370. iwl3945_activate_qos(priv, 1);
  5371. else if (priv->assoc_id && iwl3945_is_associated(priv))
  5372. iwl3945_activate_qos(priv, 0);
  5373. mutex_unlock(&priv->mutex);
  5374. IWL_DEBUG_MAC80211("leave\n");
  5375. return 0;
  5376. }
  5377. static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
  5378. struct ieee80211_tx_queue_stats *stats)
  5379. {
  5380. struct iwl_priv *priv = hw->priv;
  5381. int i, avail;
  5382. struct iwl_tx_queue *txq;
  5383. struct iwl_queue *q;
  5384. unsigned long flags;
  5385. IWL_DEBUG_MAC80211("enter\n");
  5386. if (!iwl_is_ready_rf(priv)) {
  5387. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5388. return -EIO;
  5389. }
  5390. spin_lock_irqsave(&priv->lock, flags);
  5391. for (i = 0; i < AC_NUM; i++) {
  5392. txq = &priv->txq[i];
  5393. q = &txq->q;
  5394. avail = iwl_queue_space(q);
  5395. stats[i].len = q->n_window - avail;
  5396. stats[i].limit = q->n_window - q->high_mark;
  5397. stats[i].count = q->n_window;
  5398. }
  5399. spin_unlock_irqrestore(&priv->lock, flags);
  5400. IWL_DEBUG_MAC80211("leave\n");
  5401. return 0;
  5402. }
  5403. static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
  5404. {
  5405. struct iwl_priv *priv = hw->priv;
  5406. unsigned long flags;
  5407. mutex_lock(&priv->mutex);
  5408. IWL_DEBUG_MAC80211("enter\n");
  5409. iwl_reset_qos(priv);
  5410. spin_lock_irqsave(&priv->lock, flags);
  5411. priv->assoc_id = 0;
  5412. priv->assoc_capability = 0;
  5413. priv->call_post_assoc_from_beacon = 0;
  5414. /* new association get rid of ibss beacon skb */
  5415. if (priv->ibss_beacon)
  5416. dev_kfree_skb(priv->ibss_beacon);
  5417. priv->ibss_beacon = NULL;
  5418. priv->beacon_int = priv->hw->conf.beacon_int;
  5419. priv->timestamp = 0;
  5420. if ((priv->iw_mode == NL80211_IFTYPE_STATION))
  5421. priv->beacon_int = 0;
  5422. spin_unlock_irqrestore(&priv->lock, flags);
  5423. if (!iwl_is_ready_rf(priv)) {
  5424. IWL_DEBUG_MAC80211("leave - not ready\n");
  5425. mutex_unlock(&priv->mutex);
  5426. return;
  5427. }
  5428. /* we are restarting association process
  5429. * clear RXON_FILTER_ASSOC_MSK bit
  5430. */
  5431. if (priv->iw_mode != NL80211_IFTYPE_AP) {
  5432. iwl_scan_cancel_timeout(priv, 100);
  5433. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5434. iwl3945_commit_rxon(priv);
  5435. }
  5436. /* Per mac80211.h: This is only used in IBSS mode... */
  5437. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  5438. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  5439. mutex_unlock(&priv->mutex);
  5440. return;
  5441. }
  5442. iwl3945_set_rate(priv);
  5443. mutex_unlock(&priv->mutex);
  5444. IWL_DEBUG_MAC80211("leave\n");
  5445. }
  5446. static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
  5447. {
  5448. struct iwl_priv *priv = hw->priv;
  5449. unsigned long flags;
  5450. IWL_DEBUG_MAC80211("enter\n");
  5451. if (!iwl_is_ready_rf(priv)) {
  5452. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5453. return -EIO;
  5454. }
  5455. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  5456. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  5457. return -EIO;
  5458. }
  5459. spin_lock_irqsave(&priv->lock, flags);
  5460. if (priv->ibss_beacon)
  5461. dev_kfree_skb(priv->ibss_beacon);
  5462. priv->ibss_beacon = skb;
  5463. priv->assoc_id = 0;
  5464. IWL_DEBUG_MAC80211("leave\n");
  5465. spin_unlock_irqrestore(&priv->lock, flags);
  5466. iwl_reset_qos(priv);
  5467. iwl3945_post_associate(priv);
  5468. return 0;
  5469. }
  5470. /*****************************************************************************
  5471. *
  5472. * sysfs attributes
  5473. *
  5474. *****************************************************************************/
  5475. #ifdef CONFIG_IWL3945_DEBUG
  5476. /*
  5477. * The following adds a new attribute to the sysfs representation
  5478. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  5479. * used for controlling the debug level.
  5480. *
  5481. * See the level definitions in iwl for details.
  5482. */
  5483. static ssize_t show_debug_level(struct device *d,
  5484. struct device_attribute *attr, char *buf)
  5485. {
  5486. struct iwl_priv *priv = d->driver_data;
  5487. return sprintf(buf, "0x%08X\n", priv->debug_level);
  5488. }
  5489. static ssize_t store_debug_level(struct device *d,
  5490. struct device_attribute *attr,
  5491. const char *buf, size_t count)
  5492. {
  5493. struct iwl_priv *priv = d->driver_data;
  5494. unsigned long val;
  5495. int ret;
  5496. ret = strict_strtoul(buf, 0, &val);
  5497. if (ret)
  5498. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  5499. else
  5500. priv->debug_level = val;
  5501. return strnlen(buf, count);
  5502. }
  5503. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  5504. show_debug_level, store_debug_level);
  5505. #endif /* CONFIG_IWL3945_DEBUG */
  5506. static ssize_t show_temperature(struct device *d,
  5507. struct device_attribute *attr, char *buf)
  5508. {
  5509. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5510. if (!iwl_is_alive(priv))
  5511. return -EAGAIN;
  5512. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  5513. }
  5514. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  5515. static ssize_t show_tx_power(struct device *d,
  5516. struct device_attribute *attr, char *buf)
  5517. {
  5518. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5519. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  5520. }
  5521. static ssize_t store_tx_power(struct device *d,
  5522. struct device_attribute *attr,
  5523. const char *buf, size_t count)
  5524. {
  5525. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5526. char *p = (char *)buf;
  5527. u32 val;
  5528. val = simple_strtoul(p, &p, 10);
  5529. if (p == buf)
  5530. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  5531. else
  5532. iwl3945_hw_reg_set_txpower(priv, val);
  5533. return count;
  5534. }
  5535. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  5536. static ssize_t show_flags(struct device *d,
  5537. struct device_attribute *attr, char *buf)
  5538. {
  5539. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5540. return sprintf(buf, "0x%04X\n", priv->active39_rxon.flags);
  5541. }
  5542. static ssize_t store_flags(struct device *d,
  5543. struct device_attribute *attr,
  5544. const char *buf, size_t count)
  5545. {
  5546. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5547. u32 flags = simple_strtoul(buf, NULL, 0);
  5548. mutex_lock(&priv->mutex);
  5549. if (le32_to_cpu(priv->staging39_rxon.flags) != flags) {
  5550. /* Cancel any currently running scans... */
  5551. if (iwl_scan_cancel_timeout(priv, 100))
  5552. IWL_WARN(priv, "Could not cancel scan.\n");
  5553. else {
  5554. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  5555. flags);
  5556. priv->staging39_rxon.flags = cpu_to_le32(flags);
  5557. iwl3945_commit_rxon(priv);
  5558. }
  5559. }
  5560. mutex_unlock(&priv->mutex);
  5561. return count;
  5562. }
  5563. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  5564. static ssize_t show_filter_flags(struct device *d,
  5565. struct device_attribute *attr, char *buf)
  5566. {
  5567. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5568. return sprintf(buf, "0x%04X\n",
  5569. le32_to_cpu(priv->active39_rxon.filter_flags));
  5570. }
  5571. static ssize_t store_filter_flags(struct device *d,
  5572. struct device_attribute *attr,
  5573. const char *buf, size_t count)
  5574. {
  5575. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5576. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  5577. mutex_lock(&priv->mutex);
  5578. if (le32_to_cpu(priv->staging39_rxon.filter_flags) != filter_flags) {
  5579. /* Cancel any currently running scans... */
  5580. if (iwl_scan_cancel_timeout(priv, 100))
  5581. IWL_WARN(priv, "Could not cancel scan.\n");
  5582. else {
  5583. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  5584. "0x%04X\n", filter_flags);
  5585. priv->staging39_rxon.filter_flags =
  5586. cpu_to_le32(filter_flags);
  5587. iwl3945_commit_rxon(priv);
  5588. }
  5589. }
  5590. mutex_unlock(&priv->mutex);
  5591. return count;
  5592. }
  5593. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  5594. store_filter_flags);
  5595. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  5596. static ssize_t show_measurement(struct device *d,
  5597. struct device_attribute *attr, char *buf)
  5598. {
  5599. struct iwl_priv *priv = dev_get_drvdata(d);
  5600. struct iwl_spectrum_notification measure_report;
  5601. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  5602. u8 *data = (u8 *)&measure_report;
  5603. unsigned long flags;
  5604. spin_lock_irqsave(&priv->lock, flags);
  5605. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  5606. spin_unlock_irqrestore(&priv->lock, flags);
  5607. return 0;
  5608. }
  5609. memcpy(&measure_report, &priv->measure_report, size);
  5610. priv->measurement_status = 0;
  5611. spin_unlock_irqrestore(&priv->lock, flags);
  5612. while (size && (PAGE_SIZE - len)) {
  5613. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  5614. PAGE_SIZE - len, 1);
  5615. len = strlen(buf);
  5616. if (PAGE_SIZE - len)
  5617. buf[len++] = '\n';
  5618. ofs += 16;
  5619. size -= min(size, 16U);
  5620. }
  5621. return len;
  5622. }
  5623. static ssize_t store_measurement(struct device *d,
  5624. struct device_attribute *attr,
  5625. const char *buf, size_t count)
  5626. {
  5627. struct iwl_priv *priv = dev_get_drvdata(d);
  5628. struct ieee80211_measurement_params params = {
  5629. .channel = le16_to_cpu(priv->active39_rxon.channel),
  5630. .start_time = cpu_to_le64(priv->last_tsf),
  5631. .duration = cpu_to_le16(1),
  5632. };
  5633. u8 type = IWL_MEASURE_BASIC;
  5634. u8 buffer[32];
  5635. u8 channel;
  5636. if (count) {
  5637. char *p = buffer;
  5638. strncpy(buffer, buf, min(sizeof(buffer), count));
  5639. channel = simple_strtoul(p, NULL, 0);
  5640. if (channel)
  5641. params.channel = channel;
  5642. p = buffer;
  5643. while (*p && *p != ' ')
  5644. p++;
  5645. if (*p)
  5646. type = simple_strtoul(p + 1, NULL, 0);
  5647. }
  5648. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  5649. "channel %d (for '%s')\n", type, params.channel, buf);
  5650. iwl3945_get_measurement(priv, &params, type);
  5651. return count;
  5652. }
  5653. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  5654. show_measurement, store_measurement);
  5655. #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
  5656. static ssize_t store_retry_rate(struct device *d,
  5657. struct device_attribute *attr,
  5658. const char *buf, size_t count)
  5659. {
  5660. struct iwl_priv *priv = dev_get_drvdata(d);
  5661. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  5662. if (priv->retry_rate <= 0)
  5663. priv->retry_rate = 1;
  5664. return count;
  5665. }
  5666. static ssize_t show_retry_rate(struct device *d,
  5667. struct device_attribute *attr, char *buf)
  5668. {
  5669. struct iwl_priv *priv = dev_get_drvdata(d);
  5670. return sprintf(buf, "%d", priv->retry_rate);
  5671. }
  5672. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  5673. store_retry_rate);
  5674. static ssize_t store_power_level(struct device *d,
  5675. struct device_attribute *attr,
  5676. const char *buf, size_t count)
  5677. {
  5678. struct iwl_priv *priv = dev_get_drvdata(d);
  5679. int rc;
  5680. int mode;
  5681. mode = simple_strtoul(buf, NULL, 0);
  5682. mutex_lock(&priv->mutex);
  5683. if (!iwl_is_ready(priv)) {
  5684. rc = -EAGAIN;
  5685. goto out;
  5686. }
  5687. if ((mode < 1) || (mode > IWL39_POWER_LIMIT) ||
  5688. (mode == IWL39_POWER_AC))
  5689. mode = IWL39_POWER_AC;
  5690. else
  5691. mode |= IWL_POWER_ENABLED;
  5692. if (mode != priv->power_mode) {
  5693. rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  5694. if (rc) {
  5695. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  5696. goto out;
  5697. }
  5698. priv->power_mode = mode;
  5699. }
  5700. rc = count;
  5701. out:
  5702. mutex_unlock(&priv->mutex);
  5703. return rc;
  5704. }
  5705. #define MAX_WX_STRING 80
  5706. /* Values are in microsecond */
  5707. static const s32 timeout_duration[] = {
  5708. 350000,
  5709. 250000,
  5710. 75000,
  5711. 37000,
  5712. 25000,
  5713. };
  5714. static const s32 period_duration[] = {
  5715. 400000,
  5716. 700000,
  5717. 1000000,
  5718. 1000000,
  5719. 1000000
  5720. };
  5721. static ssize_t show_power_level(struct device *d,
  5722. struct device_attribute *attr, char *buf)
  5723. {
  5724. struct iwl_priv *priv = dev_get_drvdata(d);
  5725. int level = IWL_POWER_LEVEL(priv->power_mode);
  5726. char *p = buf;
  5727. p += sprintf(p, "%d ", level);
  5728. switch (level) {
  5729. case IWL_POWER_MODE_CAM:
  5730. case IWL39_POWER_AC:
  5731. p += sprintf(p, "(AC)");
  5732. break;
  5733. case IWL39_POWER_BATTERY:
  5734. p += sprintf(p, "(BATTERY)");
  5735. break;
  5736. default:
  5737. p += sprintf(p,
  5738. "(Timeout %dms, Period %dms)",
  5739. timeout_duration[level - 1] / 1000,
  5740. period_duration[level - 1] / 1000);
  5741. }
  5742. if (!(priv->power_mode & IWL_POWER_ENABLED))
  5743. p += sprintf(p, " OFF\n");
  5744. else
  5745. p += sprintf(p, " \n");
  5746. return p - buf + 1;
  5747. }
  5748. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  5749. store_power_level);
  5750. static ssize_t show_channels(struct device *d,
  5751. struct device_attribute *attr, char *buf)
  5752. {
  5753. /* all this shit doesn't belong into sysfs anyway */
  5754. return 0;
  5755. }
  5756. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  5757. static ssize_t show_statistics(struct device *d,
  5758. struct device_attribute *attr, char *buf)
  5759. {
  5760. struct iwl_priv *priv = dev_get_drvdata(d);
  5761. u32 size = sizeof(struct iwl3945_notif_statistics);
  5762. u32 len = 0, ofs = 0;
  5763. u8 *data = (u8 *)&priv->statistics_39;
  5764. int rc = 0;
  5765. if (!iwl_is_alive(priv))
  5766. return -EAGAIN;
  5767. mutex_lock(&priv->mutex);
  5768. rc = iwl3945_send_statistics_request(priv);
  5769. mutex_unlock(&priv->mutex);
  5770. if (rc) {
  5771. len = sprintf(buf,
  5772. "Error sending statistics request: 0x%08X\n", rc);
  5773. return len;
  5774. }
  5775. while (size && (PAGE_SIZE - len)) {
  5776. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  5777. PAGE_SIZE - len, 1);
  5778. len = strlen(buf);
  5779. if (PAGE_SIZE - len)
  5780. buf[len++] = '\n';
  5781. ofs += 16;
  5782. size -= min(size, 16U);
  5783. }
  5784. return len;
  5785. }
  5786. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  5787. static ssize_t show_antenna(struct device *d,
  5788. struct device_attribute *attr, char *buf)
  5789. {
  5790. struct iwl_priv *priv = dev_get_drvdata(d);
  5791. if (!iwl_is_alive(priv))
  5792. return -EAGAIN;
  5793. return sprintf(buf, "%d\n", priv->antenna);
  5794. }
  5795. static ssize_t store_antenna(struct device *d,
  5796. struct device_attribute *attr,
  5797. const char *buf, size_t count)
  5798. {
  5799. int ant;
  5800. struct iwl_priv *priv = dev_get_drvdata(d);
  5801. if (count == 0)
  5802. return 0;
  5803. if (sscanf(buf, "%1i", &ant) != 1) {
  5804. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  5805. return count;
  5806. }
  5807. if ((ant >= 0) && (ant <= 2)) {
  5808. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  5809. priv->antenna = (enum iwl3945_antenna)ant;
  5810. } else
  5811. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  5812. return count;
  5813. }
  5814. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  5815. static ssize_t show_status(struct device *d,
  5816. struct device_attribute *attr, char *buf)
  5817. {
  5818. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5819. if (!iwl_is_alive(priv))
  5820. return -EAGAIN;
  5821. return sprintf(buf, "0x%08x\n", (int)priv->status);
  5822. }
  5823. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  5824. static ssize_t dump_error_log(struct device *d,
  5825. struct device_attribute *attr,
  5826. const char *buf, size_t count)
  5827. {
  5828. char *p = (char *)buf;
  5829. if (p[0] == '1')
  5830. iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  5831. return strnlen(buf, count);
  5832. }
  5833. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  5834. static ssize_t dump_event_log(struct device *d,
  5835. struct device_attribute *attr,
  5836. const char *buf, size_t count)
  5837. {
  5838. char *p = (char *)buf;
  5839. if (p[0] == '1')
  5840. iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  5841. return strnlen(buf, count);
  5842. }
  5843. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  5844. /*****************************************************************************
  5845. *
  5846. * driver setup and tear down
  5847. *
  5848. *****************************************************************************/
  5849. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  5850. {
  5851. priv->workqueue = create_workqueue(DRV_NAME);
  5852. init_waitqueue_head(&priv->wait_command_queue);
  5853. INIT_WORK(&priv->up, iwl3945_bg_up);
  5854. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  5855. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  5856. INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
  5857. INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
  5858. INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
  5859. INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
  5860. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  5861. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  5862. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  5863. INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
  5864. INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
  5865. iwl3945_hw_setup_deferred_work(priv);
  5866. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  5867. iwl3945_irq_tasklet, (unsigned long)priv);
  5868. }
  5869. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  5870. {
  5871. iwl3945_hw_cancel_deferred_work(priv);
  5872. cancel_delayed_work_sync(&priv->init_alive_start);
  5873. cancel_delayed_work(&priv->scan_check);
  5874. cancel_delayed_work(&priv->alive_start);
  5875. cancel_work_sync(&priv->beacon_update);
  5876. }
  5877. static struct attribute *iwl3945_sysfs_entries[] = {
  5878. &dev_attr_antenna.attr,
  5879. &dev_attr_channels.attr,
  5880. &dev_attr_dump_errors.attr,
  5881. &dev_attr_dump_events.attr,
  5882. &dev_attr_flags.attr,
  5883. &dev_attr_filter_flags.attr,
  5884. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  5885. &dev_attr_measurement.attr,
  5886. #endif
  5887. &dev_attr_power_level.attr,
  5888. &dev_attr_retry_rate.attr,
  5889. &dev_attr_statistics.attr,
  5890. &dev_attr_status.attr,
  5891. &dev_attr_temperature.attr,
  5892. &dev_attr_tx_power.attr,
  5893. #ifdef CONFIG_IWL3945_DEBUG
  5894. &dev_attr_debug_level.attr,
  5895. #endif
  5896. NULL
  5897. };
  5898. static struct attribute_group iwl3945_attribute_group = {
  5899. .name = NULL, /* put in device directory */
  5900. .attrs = iwl3945_sysfs_entries,
  5901. };
  5902. static struct ieee80211_ops iwl3945_hw_ops = {
  5903. .tx = iwl3945_mac_tx,
  5904. .start = iwl3945_mac_start,
  5905. .stop = iwl3945_mac_stop,
  5906. .add_interface = iwl3945_mac_add_interface,
  5907. .remove_interface = iwl3945_mac_remove_interface,
  5908. .config = iwl3945_mac_config,
  5909. .config_interface = iwl3945_mac_config_interface,
  5910. .configure_filter = iwl3945_configure_filter,
  5911. .set_key = iwl3945_mac_set_key,
  5912. .get_tx_stats = iwl3945_mac_get_tx_stats,
  5913. .conf_tx = iwl3945_mac_conf_tx,
  5914. .reset_tsf = iwl3945_mac_reset_tsf,
  5915. .bss_info_changed = iwl3945_bss_info_changed,
  5916. .hw_scan = iwl3945_mac_hw_scan
  5917. };
  5918. static int iwl3945_init_drv(struct iwl_priv *priv)
  5919. {
  5920. int ret;
  5921. priv->retry_rate = 1;
  5922. priv->ibss_beacon = NULL;
  5923. spin_lock_init(&priv->lock);
  5924. spin_lock_init(&priv->power_data_39.lock);
  5925. spin_lock_init(&priv->sta_lock);
  5926. spin_lock_init(&priv->hcmd_lock);
  5927. INIT_LIST_HEAD(&priv->free_frames);
  5928. mutex_init(&priv->mutex);
  5929. /* Clear the driver's (not device's) station table */
  5930. iwl3945_clear_stations_table(priv);
  5931. priv->data_retry_limit = -1;
  5932. priv->ieee_channels = NULL;
  5933. priv->ieee_rates = NULL;
  5934. priv->band = IEEE80211_BAND_2GHZ;
  5935. priv->iw_mode = NL80211_IFTYPE_STATION;
  5936. iwl_reset_qos(priv);
  5937. priv->qos_data.qos_active = 0;
  5938. priv->qos_data.qos_cap.val = 0;
  5939. priv->rates_mask = IWL_RATES_MASK;
  5940. /* If power management is turned on, default to AC mode */
  5941. priv->power_mode = IWL39_POWER_AC;
  5942. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  5943. ret = iwl3945_init_channel_map(priv);
  5944. if (ret) {
  5945. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  5946. goto err;
  5947. }
  5948. ret = iwl3945_init_geos(priv);
  5949. if (ret) {
  5950. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  5951. goto err_free_channel_map;
  5952. }
  5953. return 0;
  5954. err_free_channel_map:
  5955. iwl3945_free_channel_map(priv);
  5956. err:
  5957. return ret;
  5958. }
  5959. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  5960. {
  5961. int err = 0;
  5962. struct iwl_priv *priv;
  5963. struct ieee80211_hw *hw;
  5964. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  5965. unsigned long flags;
  5966. /***********************
  5967. * 1. Allocating HW data
  5968. * ********************/
  5969. /* mac80211 allocates memory for this device instance, including
  5970. * space for this driver's private structure */
  5971. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  5972. if (hw == NULL) {
  5973. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  5974. err = -ENOMEM;
  5975. goto out;
  5976. }
  5977. priv = hw->priv;
  5978. SET_IEEE80211_DEV(hw, &pdev->dev);
  5979. if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
  5980. (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
  5981. IWL_ERR(priv,
  5982. "invalid queues_num, should be between %d and %d\n",
  5983. IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
  5984. err = -EINVAL;
  5985. goto out;
  5986. }
  5987. /*
  5988. * Disabling hardware scan means that mac80211 will perform scans
  5989. * "the hard way", rather than using device's scan.
  5990. */
  5991. if (iwl3945_mod_params.disable_hw_scan) {
  5992. IWL_DEBUG_INFO("Disabling hw_scan\n");
  5993. iwl3945_hw_ops.hw_scan = NULL;
  5994. }
  5995. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  5996. priv->cfg = cfg;
  5997. priv->pci_dev = pdev;
  5998. #ifdef CONFIG_IWL3945_DEBUG
  5999. priv->debug_level = iwl3945_mod_params.debug;
  6000. atomic_set(&priv->restrict_refcnt, 0);
  6001. #endif
  6002. hw->rate_control_algorithm = "iwl-3945-rs";
  6003. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  6004. /* Select antenna (may be helpful if only one antenna is connected) */
  6005. priv->antenna = (enum iwl3945_antenna)iwl3945_mod_params.antenna;
  6006. /* Tell mac80211 our characteristics */
  6007. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  6008. IEEE80211_HW_NOISE_DBM;
  6009. hw->wiphy->interface_modes =
  6010. BIT(NL80211_IFTYPE_STATION) |
  6011. BIT(NL80211_IFTYPE_ADHOC);
  6012. hw->wiphy->fw_handles_regulatory = true;
  6013. /* 4 EDCA QOS priorities */
  6014. hw->queues = 4;
  6015. /***************************
  6016. * 2. Initializing PCI bus
  6017. * *************************/
  6018. if (pci_enable_device(pdev)) {
  6019. err = -ENODEV;
  6020. goto out_ieee80211_free_hw;
  6021. }
  6022. pci_set_master(pdev);
  6023. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  6024. if (!err)
  6025. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  6026. if (err) {
  6027. IWL_WARN(priv, "No suitable DMA available.\n");
  6028. goto out_pci_disable_device;
  6029. }
  6030. pci_set_drvdata(pdev, priv);
  6031. err = pci_request_regions(pdev, DRV_NAME);
  6032. if (err)
  6033. goto out_pci_disable_device;
  6034. /***********************
  6035. * 3. Read REV Register
  6036. * ********************/
  6037. priv->hw_base = pci_iomap(pdev, 0, 0);
  6038. if (!priv->hw_base) {
  6039. err = -ENODEV;
  6040. goto out_pci_release_regions;
  6041. }
  6042. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  6043. (unsigned long long) pci_resource_len(pdev, 0));
  6044. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  6045. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  6046. * PCI Tx retries from interfering with C3 CPU state */
  6047. pci_write_config_byte(pdev, 0x41, 0x00);
  6048. /* amp init */
  6049. err = priv->cfg->ops->lib->apm_ops.init(priv);
  6050. if (err < 0) {
  6051. IWL_DEBUG_INFO("Failed to init APMG\n");
  6052. goto out_iounmap;
  6053. }
  6054. /***********************
  6055. * 4. Read EEPROM
  6056. * ********************/
  6057. /* Read the EEPROM */
  6058. err = iwl3945_eeprom_init(priv);
  6059. if (err) {
  6060. IWL_ERR(priv, "Unable to init EEPROM\n");
  6061. goto out_remove_sysfs;
  6062. }
  6063. /* MAC Address location in EEPROM same for 3945/4965 */
  6064. get_eeprom_mac(priv, priv->mac_addr);
  6065. IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr);
  6066. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  6067. /***********************
  6068. * 5. Setup HW Constants
  6069. * ********************/
  6070. /* Device-specific setup */
  6071. if (iwl3945_hw_set_hw_params(priv)) {
  6072. IWL_ERR(priv, "failed to set hw settings\n");
  6073. goto out_iounmap;
  6074. }
  6075. /***********************
  6076. * 6. Setup priv
  6077. * ********************/
  6078. err = iwl3945_init_drv(priv);
  6079. if (err) {
  6080. IWL_ERR(priv, "initializing driver failed\n");
  6081. goto out_free_geos;
  6082. }
  6083. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  6084. priv->cfg->name);
  6085. /***********************************
  6086. * 7. Initialize Module Parameters
  6087. * **********************************/
  6088. /* Initialize module parameter values here */
  6089. /* Disable radio (SW RF KILL) via parameter when loading driver */
  6090. if (iwl3945_mod_params.disable) {
  6091. set_bit(STATUS_RF_KILL_SW, &priv->status);
  6092. IWL_DEBUG_INFO("Radio disabled.\n");
  6093. }
  6094. /***********************
  6095. * 8. Setup Services
  6096. * ********************/
  6097. spin_lock_irqsave(&priv->lock, flags);
  6098. iwl3945_disable_interrupts(priv);
  6099. spin_unlock_irqrestore(&priv->lock, flags);
  6100. pci_enable_msi(priv->pci_dev);
  6101. err = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
  6102. DRV_NAME, priv);
  6103. if (err) {
  6104. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  6105. goto out_disable_msi;
  6106. }
  6107. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  6108. if (err) {
  6109. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  6110. goto out_release_irq;
  6111. }
  6112. iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
  6113. iwl3945_setup_deferred_work(priv);
  6114. iwl3945_setup_rx_handlers(priv);
  6115. /*********************************
  6116. * 9. Setup and Register mac80211
  6117. * *******************************/
  6118. err = ieee80211_register_hw(priv->hw);
  6119. if (err) {
  6120. IWL_ERR(priv, "Failed to register network device: %d\n", err);
  6121. goto out_remove_sysfs;
  6122. }
  6123. priv->hw->conf.beacon_int = 100;
  6124. priv->mac80211_registered = 1;
  6125. err = iwl3945_rfkill_init(priv);
  6126. if (err)
  6127. IWL_ERR(priv, "Unable to initialize RFKILL system. "
  6128. "Ignoring error: %d\n", err);
  6129. /* Start monitoring the killswitch */
  6130. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  6131. 2 * HZ);
  6132. return 0;
  6133. out_remove_sysfs:
  6134. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  6135. out_free_geos:
  6136. iwl3945_free_geos(priv);
  6137. out_release_irq:
  6138. free_irq(priv->pci_dev->irq, priv);
  6139. destroy_workqueue(priv->workqueue);
  6140. priv->workqueue = NULL;
  6141. iwl3945_unset_hw_params(priv);
  6142. out_disable_msi:
  6143. pci_disable_msi(priv->pci_dev);
  6144. out_iounmap:
  6145. pci_iounmap(pdev, priv->hw_base);
  6146. out_pci_release_regions:
  6147. pci_release_regions(pdev);
  6148. out_pci_disable_device:
  6149. pci_disable_device(pdev);
  6150. pci_set_drvdata(pdev, NULL);
  6151. out_ieee80211_free_hw:
  6152. ieee80211_free_hw(priv->hw);
  6153. out:
  6154. return err;
  6155. }
  6156. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  6157. {
  6158. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6159. unsigned long flags;
  6160. if (!priv)
  6161. return;
  6162. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  6163. set_bit(STATUS_EXIT_PENDING, &priv->status);
  6164. if (priv->mac80211_registered) {
  6165. ieee80211_unregister_hw(priv->hw);
  6166. priv->mac80211_registered = 0;
  6167. } else {
  6168. iwl3945_down(priv);
  6169. }
  6170. /* make sure we flush any pending irq or
  6171. * tasklet for the driver
  6172. */
  6173. spin_lock_irqsave(&priv->lock, flags);
  6174. iwl3945_disable_interrupts(priv);
  6175. spin_unlock_irqrestore(&priv->lock, flags);
  6176. iwl_synchronize_irq(priv);
  6177. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  6178. iwl3945_rfkill_unregister(priv);
  6179. cancel_delayed_work(&priv->rfkill_poll);
  6180. iwl3945_dealloc_ucode_pci(priv);
  6181. if (priv->rxq.bd)
  6182. iwl_rx_queue_free(priv, &priv->rxq);
  6183. iwl3945_hw_txq_ctx_free(priv);
  6184. iwl3945_unset_hw_params(priv);
  6185. iwl3945_clear_stations_table(priv);
  6186. /*netif_stop_queue(dev); */
  6187. flush_workqueue(priv->workqueue);
  6188. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  6189. * priv->workqueue... so we can't take down the workqueue
  6190. * until now... */
  6191. destroy_workqueue(priv->workqueue);
  6192. priv->workqueue = NULL;
  6193. free_irq(pdev->irq, priv);
  6194. pci_disable_msi(pdev);
  6195. pci_iounmap(pdev, priv->hw_base);
  6196. pci_release_regions(pdev);
  6197. pci_disable_device(pdev);
  6198. pci_set_drvdata(pdev, NULL);
  6199. iwl3945_free_channel_map(priv);
  6200. iwl3945_free_geos(priv);
  6201. kfree(priv->scan39);
  6202. if (priv->ibss_beacon)
  6203. dev_kfree_skb(priv->ibss_beacon);
  6204. ieee80211_free_hw(priv->hw);
  6205. }
  6206. #ifdef CONFIG_PM
  6207. static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  6208. {
  6209. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6210. if (priv->is_open) {
  6211. set_bit(STATUS_IN_SUSPEND, &priv->status);
  6212. iwl3945_mac_stop(priv->hw);
  6213. priv->is_open = 1;
  6214. }
  6215. pci_save_state(pdev);
  6216. pci_disable_device(pdev);
  6217. pci_set_power_state(pdev, PCI_D3hot);
  6218. return 0;
  6219. }
  6220. static int iwl3945_pci_resume(struct pci_dev *pdev)
  6221. {
  6222. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6223. pci_set_power_state(pdev, PCI_D0);
  6224. pci_enable_device(pdev);
  6225. pci_restore_state(pdev);
  6226. if (priv->is_open)
  6227. iwl3945_mac_start(priv->hw);
  6228. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  6229. return 0;
  6230. }
  6231. #endif /* CONFIG_PM */
  6232. /*************** RFKILL FUNCTIONS **********/
  6233. #ifdef CONFIG_IWL3945_RFKILL
  6234. /* software rf-kill from user */
  6235. static int iwl3945_rfkill_soft_rf_kill(void *data, enum rfkill_state state)
  6236. {
  6237. struct iwl_priv *priv = data;
  6238. int err = 0;
  6239. if (!priv->rfkill)
  6240. return 0;
  6241. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6242. return 0;
  6243. IWL_DEBUG_RF_KILL("we received soft RFKILL set to state %d\n", state);
  6244. mutex_lock(&priv->mutex);
  6245. switch (state) {
  6246. case RFKILL_STATE_UNBLOCKED:
  6247. if (iwl_is_rfkill_hw(priv)) {
  6248. err = -EBUSY;
  6249. goto out_unlock;
  6250. }
  6251. iwl3945_radio_kill_sw(priv, 0);
  6252. break;
  6253. case RFKILL_STATE_SOFT_BLOCKED:
  6254. iwl3945_radio_kill_sw(priv, 1);
  6255. break;
  6256. default:
  6257. IWL_WARN(priv, "received unexpected RFKILL state %d\n", state);
  6258. break;
  6259. }
  6260. out_unlock:
  6261. mutex_unlock(&priv->mutex);
  6262. return err;
  6263. }
  6264. int iwl3945_rfkill_init(struct iwl_priv *priv)
  6265. {
  6266. struct device *device = wiphy_dev(priv->hw->wiphy);
  6267. int ret = 0;
  6268. BUG_ON(device == NULL);
  6269. IWL_DEBUG_RF_KILL("Initializing RFKILL.\n");
  6270. priv->rfkill = rfkill_allocate(device, RFKILL_TYPE_WLAN);
  6271. if (!priv->rfkill) {
  6272. IWL_ERR(priv, "Unable to allocate rfkill device.\n");
  6273. ret = -ENOMEM;
  6274. goto error;
  6275. }
  6276. priv->rfkill->name = priv->cfg->name;
  6277. priv->rfkill->data = priv;
  6278. priv->rfkill->state = RFKILL_STATE_UNBLOCKED;
  6279. priv->rfkill->toggle_radio = iwl3945_rfkill_soft_rf_kill;
  6280. priv->rfkill->user_claim_unsupported = 1;
  6281. priv->rfkill->dev.class->suspend = NULL;
  6282. priv->rfkill->dev.class->resume = NULL;
  6283. ret = rfkill_register(priv->rfkill);
  6284. if (ret) {
  6285. IWL_ERR(priv, "Unable to register rfkill: %d\n", ret);
  6286. goto freed_rfkill;
  6287. }
  6288. IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
  6289. return ret;
  6290. freed_rfkill:
  6291. if (priv->rfkill != NULL)
  6292. rfkill_free(priv->rfkill);
  6293. priv->rfkill = NULL;
  6294. error:
  6295. IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
  6296. return ret;
  6297. }
  6298. void iwl3945_rfkill_unregister(struct iwl_priv *priv)
  6299. {
  6300. if (priv->rfkill)
  6301. rfkill_unregister(priv->rfkill);
  6302. priv->rfkill = NULL;
  6303. }
  6304. /* set rf-kill to the right state. */
  6305. void iwl3945_rfkill_set_hw_state(struct iwl_priv *priv)
  6306. {
  6307. if (!priv->rfkill)
  6308. return;
  6309. if (iwl_is_rfkill_hw(priv)) {
  6310. rfkill_force_state(priv->rfkill, RFKILL_STATE_HARD_BLOCKED);
  6311. return;
  6312. }
  6313. if (!iwl_is_rfkill_sw(priv))
  6314. rfkill_force_state(priv->rfkill, RFKILL_STATE_UNBLOCKED);
  6315. else
  6316. rfkill_force_state(priv->rfkill, RFKILL_STATE_SOFT_BLOCKED);
  6317. }
  6318. #endif
  6319. /*****************************************************************************
  6320. *
  6321. * driver and module entry point
  6322. *
  6323. *****************************************************************************/
  6324. static struct pci_driver iwl3945_driver = {
  6325. .name = DRV_NAME,
  6326. .id_table = iwl3945_hw_card_ids,
  6327. .probe = iwl3945_pci_probe,
  6328. .remove = __devexit_p(iwl3945_pci_remove),
  6329. #ifdef CONFIG_PM
  6330. .suspend = iwl3945_pci_suspend,
  6331. .resume = iwl3945_pci_resume,
  6332. #endif
  6333. };
  6334. static int __init iwl3945_init(void)
  6335. {
  6336. int ret;
  6337. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  6338. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  6339. ret = iwl3945_rate_control_register();
  6340. if (ret) {
  6341. printk(KERN_ERR DRV_NAME
  6342. "Unable to register rate control algorithm: %d\n", ret);
  6343. return ret;
  6344. }
  6345. ret = pci_register_driver(&iwl3945_driver);
  6346. if (ret) {
  6347. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  6348. goto error_register;
  6349. }
  6350. return ret;
  6351. error_register:
  6352. iwl3945_rate_control_unregister();
  6353. return ret;
  6354. }
  6355. static void __exit iwl3945_exit(void)
  6356. {
  6357. pci_unregister_driver(&iwl3945_driver);
  6358. iwl3945_rate_control_unregister();
  6359. }
  6360. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  6361. module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
  6362. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  6363. module_param_named(disable, iwl3945_mod_params.disable, int, 0444);
  6364. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  6365. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
  6366. MODULE_PARM_DESC(swcrypto,
  6367. "using software crypto (default 1 [software])\n");
  6368. module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
  6369. MODULE_PARM_DESC(debug, "debug output mask");
  6370. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
  6371. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  6372. module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
  6373. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  6374. module_exit(iwl3945_exit);
  6375. module_init(iwl3945_init);