pmac_cpufreq.c 18 KB

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  1. /*
  2. * arch/ppc/platforms/pmac_cpufreq.c
  3. *
  4. * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
  5. * Copyright (C) 2004 John Steele Scott <toojays@toojays.net>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * TODO: Need a big cleanup here. Basically, we need to have different
  12. * cpufreq_driver structures for the different type of HW instead of the
  13. * current mess. We also need to better deal with the detection of the
  14. * type of machine.
  15. *
  16. */
  17. #include <linux/config.h>
  18. #include <linux/module.h>
  19. #include <linux/types.h>
  20. #include <linux/errno.h>
  21. #include <linux/kernel.h>
  22. #include <linux/delay.h>
  23. #include <linux/sched.h>
  24. #include <linux/adb.h>
  25. #include <linux/pmu.h>
  26. #include <linux/slab.h>
  27. #include <linux/cpufreq.h>
  28. #include <linux/init.h>
  29. #include <linux/sysdev.h>
  30. #include <linux/i2c.h>
  31. #include <linux/hardirq.h>
  32. #include <asm/prom.h>
  33. #include <asm/machdep.h>
  34. #include <asm/irq.h>
  35. #include <asm/pmac_feature.h>
  36. #include <asm/mmu_context.h>
  37. #include <asm/sections.h>
  38. #include <asm/cputable.h>
  39. #include <asm/time.h>
  40. #include <asm/system.h>
  41. #include <asm/open_pic.h>
  42. #include <asm/keylargo.h>
  43. /* WARNING !!! This will cause calibrate_delay() to be called,
  44. * but this is an __init function ! So you MUST go edit
  45. * init/main.c to make it non-init before enabling DEBUG_FREQ
  46. */
  47. #undef DEBUG_FREQ
  48. /*
  49. * There is a problem with the core cpufreq code on SMP kernels,
  50. * it won't recalculate the Bogomips properly
  51. */
  52. #ifdef CONFIG_SMP
  53. #warning "WARNING, CPUFREQ not recommended on SMP kernels"
  54. #endif
  55. extern void low_choose_7447a_dfs(int dfs);
  56. extern void low_choose_750fx_pll(int pll);
  57. extern void low_sleep_handler(void);
  58. /*
  59. * Currently, PowerMac cpufreq supports only high & low frequencies
  60. * that are set by the firmware
  61. */
  62. static unsigned int low_freq;
  63. static unsigned int hi_freq;
  64. static unsigned int cur_freq;
  65. static unsigned int sleep_freq;
  66. /*
  67. * Different models uses different mecanisms to switch the frequency
  68. */
  69. static int (*set_speed_proc)(int low_speed);
  70. static unsigned int (*get_speed_proc)(void);
  71. /*
  72. * Some definitions used by the various speedprocs
  73. */
  74. static u32 voltage_gpio;
  75. static u32 frequency_gpio;
  76. static u32 slew_done_gpio;
  77. static int no_schedule;
  78. static int has_cpu_l2lve;
  79. #define PMAC_CPU_LOW_SPEED 1
  80. #define PMAC_CPU_HIGH_SPEED 0
  81. /* There are only two frequency states for each processor. Values
  82. * are in kHz for the time being.
  83. */
  84. #define CPUFREQ_HIGH PMAC_CPU_HIGH_SPEED
  85. #define CPUFREQ_LOW PMAC_CPU_LOW_SPEED
  86. static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
  87. {CPUFREQ_HIGH, 0},
  88. {CPUFREQ_LOW, 0},
  89. {0, CPUFREQ_TABLE_END},
  90. };
  91. static inline void local_delay(unsigned long ms)
  92. {
  93. if (no_schedule)
  94. mdelay(ms);
  95. else
  96. msleep(ms);
  97. }
  98. static inline void wakeup_decrementer(void)
  99. {
  100. set_dec(tb_ticks_per_jiffy);
  101. /* No currently-supported powerbook has a 601,
  102. * so use get_tbl, not native
  103. */
  104. last_jiffy_stamp(0) = tb_last_stamp = get_tbl();
  105. }
  106. #ifdef DEBUG_FREQ
  107. static inline void debug_calc_bogomips(void)
  108. {
  109. /* This will cause a recalc of bogomips and display the
  110. * result. We backup/restore the value to avoid affecting the
  111. * core cpufreq framework's own calculation.
  112. */
  113. extern void calibrate_delay(void);
  114. unsigned long save_lpj = loops_per_jiffy;
  115. calibrate_delay();
  116. loops_per_jiffy = save_lpj;
  117. }
  118. #endif /* DEBUG_FREQ */
  119. /* Switch CPU speed under 750FX CPU control
  120. */
  121. static int __pmac cpu_750fx_cpu_speed(int low_speed)
  122. {
  123. u32 hid2;
  124. if (low_speed == 0) {
  125. /* ramping up, set voltage first */
  126. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  127. /* Make sure we sleep for at least 1ms */
  128. local_delay(10);
  129. /* tweak L2 for high voltage */
  130. if (has_cpu_l2lve) {
  131. hid2 = mfspr(SPRN_HID2);
  132. hid2 &= ~0x2000;
  133. mtspr(SPRN_HID2, hid2);
  134. }
  135. }
  136. #ifdef CONFIG_6xx
  137. low_choose_750fx_pll(low_speed);
  138. #endif
  139. if (low_speed == 1) {
  140. /* tweak L2 for low voltage */
  141. if (has_cpu_l2lve) {
  142. hid2 = mfspr(SPRN_HID2);
  143. hid2 |= 0x2000;
  144. mtspr(SPRN_HID2, hid2);
  145. }
  146. /* ramping down, set voltage last */
  147. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  148. local_delay(10);
  149. }
  150. return 0;
  151. }
  152. static unsigned int __pmac cpu_750fx_get_cpu_speed(void)
  153. {
  154. if (mfspr(SPRN_HID1) & HID1_PS)
  155. return low_freq;
  156. else
  157. return hi_freq;
  158. }
  159. /* Switch CPU speed using DFS */
  160. static int __pmac dfs_set_cpu_speed(int low_speed)
  161. {
  162. if (low_speed == 0) {
  163. /* ramping up, set voltage first */
  164. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  165. /* Make sure we sleep for at least 1ms */
  166. local_delay(1);
  167. }
  168. /* set frequency */
  169. #ifdef CONFIG_6xx
  170. low_choose_7447a_dfs(low_speed);
  171. #endif
  172. udelay(100);
  173. if (low_speed == 1) {
  174. /* ramping down, set voltage last */
  175. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  176. local_delay(1);
  177. }
  178. return 0;
  179. }
  180. static unsigned int __pmac dfs_get_cpu_speed(void)
  181. {
  182. if (mfspr(SPRN_HID1) & HID1_DFS)
  183. return low_freq;
  184. else
  185. return hi_freq;
  186. }
  187. /* Switch CPU speed using slewing GPIOs
  188. */
  189. static int __pmac gpios_set_cpu_speed(int low_speed)
  190. {
  191. int gpio, timeout = 0;
  192. /* If ramping up, set voltage first */
  193. if (low_speed == 0) {
  194. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  195. /* Delay is way too big but it's ok, we schedule */
  196. local_delay(10);
  197. }
  198. /* Set frequency */
  199. gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
  200. if (low_speed == ((gpio & 0x01) == 0))
  201. goto skip;
  202. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
  203. low_speed ? 0x04 : 0x05);
  204. udelay(200);
  205. do {
  206. if (++timeout > 100)
  207. break;
  208. local_delay(1);
  209. gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
  210. } while((gpio & 0x02) == 0);
  211. skip:
  212. /* If ramping down, set voltage last */
  213. if (low_speed == 1) {
  214. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  215. /* Delay is way too big but it's ok, we schedule */
  216. local_delay(10);
  217. }
  218. #ifdef DEBUG_FREQ
  219. debug_calc_bogomips();
  220. #endif
  221. return 0;
  222. }
  223. /* Switch CPU speed under PMU control
  224. */
  225. static int __pmac pmu_set_cpu_speed(int low_speed)
  226. {
  227. struct adb_request req;
  228. unsigned long save_l2cr;
  229. unsigned long save_l3cr;
  230. unsigned int pic_prio;
  231. unsigned long flags;
  232. preempt_disable();
  233. #ifdef DEBUG_FREQ
  234. printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
  235. #endif
  236. /* Disable all interrupt sources on openpic */
  237. pic_prio = openpic_get_priority();
  238. openpic_set_priority(0xf);
  239. /* Make sure the decrementer won't interrupt us */
  240. asm volatile("mtdec %0" : : "r" (0x7fffffff));
  241. /* Make sure any pending DEC interrupt occuring while we did
  242. * the above didn't re-enable the DEC */
  243. mb();
  244. asm volatile("mtdec %0" : : "r" (0x7fffffff));
  245. /* We can now disable MSR_EE */
  246. local_irq_save(flags);
  247. /* Giveup the FPU & vec */
  248. enable_kernel_fp();
  249. #ifdef CONFIG_ALTIVEC
  250. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  251. enable_kernel_altivec();
  252. #endif /* CONFIG_ALTIVEC */
  253. /* Save & disable L2 and L3 caches */
  254. save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
  255. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  256. /* Send the new speed command. My assumption is that this command
  257. * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
  258. */
  259. pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
  260. while (!req.complete)
  261. pmu_poll();
  262. /* Prepare the northbridge for the speed transition */
  263. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
  264. /* Call low level code to backup CPU state and recover from
  265. * hardware reset
  266. */
  267. low_sleep_handler();
  268. /* Restore the northbridge */
  269. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
  270. /* Restore L2 cache */
  271. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  272. _set_L2CR(save_l2cr);
  273. /* Restore L3 cache */
  274. if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
  275. _set_L3CR(save_l3cr);
  276. /* Restore userland MMU context */
  277. set_context(current->active_mm->context, current->active_mm->pgd);
  278. #ifdef DEBUG_FREQ
  279. printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
  280. #endif
  281. /* Restore low level PMU operations */
  282. pmu_unlock();
  283. /* Restore decrementer */
  284. wakeup_decrementer();
  285. /* Restore interrupts */
  286. openpic_set_priority(pic_prio);
  287. /* Let interrupts flow again ... */
  288. local_irq_restore(flags);
  289. #ifdef DEBUG_FREQ
  290. debug_calc_bogomips();
  291. #endif
  292. preempt_enable();
  293. return 0;
  294. }
  295. static int __pmac do_set_cpu_speed(int speed_mode, int notify)
  296. {
  297. struct cpufreq_freqs freqs;
  298. unsigned long l3cr;
  299. static unsigned long prev_l3cr;
  300. freqs.old = cur_freq;
  301. freqs.new = (speed_mode == PMAC_CPU_HIGH_SPEED) ? hi_freq : low_freq;
  302. freqs.cpu = smp_processor_id();
  303. if (freqs.old == freqs.new)
  304. return 0;
  305. if (notify)
  306. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  307. if (speed_mode == PMAC_CPU_LOW_SPEED &&
  308. cpu_has_feature(CPU_FTR_L3CR)) {
  309. l3cr = _get_L3CR();
  310. if (l3cr & L3CR_L3E) {
  311. prev_l3cr = l3cr;
  312. _set_L3CR(0);
  313. }
  314. }
  315. set_speed_proc(speed_mode == PMAC_CPU_LOW_SPEED);
  316. if (speed_mode == PMAC_CPU_HIGH_SPEED &&
  317. cpu_has_feature(CPU_FTR_L3CR)) {
  318. l3cr = _get_L3CR();
  319. if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
  320. _set_L3CR(prev_l3cr);
  321. }
  322. if (notify)
  323. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  324. cur_freq = (speed_mode == PMAC_CPU_HIGH_SPEED) ? hi_freq : low_freq;
  325. return 0;
  326. }
  327. static unsigned int __pmac pmac_cpufreq_get_speed(unsigned int cpu)
  328. {
  329. return cur_freq;
  330. }
  331. static int __pmac pmac_cpufreq_verify(struct cpufreq_policy *policy)
  332. {
  333. return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs);
  334. }
  335. static int __pmac pmac_cpufreq_target( struct cpufreq_policy *policy,
  336. unsigned int target_freq,
  337. unsigned int relation)
  338. {
  339. unsigned int newstate = 0;
  340. if (cpufreq_frequency_table_target(policy, pmac_cpu_freqs,
  341. target_freq, relation, &newstate))
  342. return -EINVAL;
  343. return do_set_cpu_speed(newstate, 1);
  344. }
  345. unsigned int __pmac pmac_get_one_cpufreq(int i)
  346. {
  347. /* Supports only one CPU for now */
  348. return (i == 0) ? cur_freq : 0;
  349. }
  350. static int __pmac pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
  351. {
  352. if (policy->cpu != 0)
  353. return -ENODEV;
  354. policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
  355. policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
  356. policy->cur = cur_freq;
  357. return cpufreq_frequency_table_cpuinfo(policy, &pmac_cpu_freqs[0]);
  358. }
  359. static u32 __pmac read_gpio(struct device_node *np)
  360. {
  361. u32 *reg = (u32 *)get_property(np, "reg", NULL);
  362. u32 offset;
  363. if (reg == NULL)
  364. return 0;
  365. /* That works for all keylargos but shall be fixed properly
  366. * some day... The problem is that it seems we can't rely
  367. * on the "reg" property of the GPIO nodes, they are either
  368. * relative to the base of KeyLargo or to the base of the
  369. * GPIO space, and the device-tree doesn't help.
  370. */
  371. offset = *reg;
  372. if (offset < KEYLARGO_GPIO_LEVELS0)
  373. offset += KEYLARGO_GPIO_LEVELS0;
  374. return offset;
  375. }
  376. static int __pmac pmac_cpufreq_suspend(struct cpufreq_policy *policy, u32 state)
  377. {
  378. /* Ok, this could be made a bit smarter, but let's be robust for now. We
  379. * always force a speed change to high speed before sleep, to make sure
  380. * we have appropriate voltage and/or bus speed for the wakeup process,
  381. * and to make sure our loops_per_jiffies are "good enough", that is will
  382. * not cause too short delays if we sleep in low speed and wake in high
  383. * speed..
  384. */
  385. no_schedule = 1;
  386. sleep_freq = cur_freq;
  387. if (cur_freq == low_freq)
  388. do_set_cpu_speed(PMAC_CPU_HIGH_SPEED, 0);
  389. return 0;
  390. }
  391. static int __pmac pmac_cpufreq_resume(struct cpufreq_policy *policy)
  392. {
  393. /* If we resume, first check if we have a get() function */
  394. if (get_speed_proc)
  395. cur_freq = get_speed_proc();
  396. else
  397. cur_freq = 0;
  398. /* We don't, hrm... we don't really know our speed here, best
  399. * is that we force a switch to whatever it was, which is
  400. * probably high speed due to our suspend() routine
  401. */
  402. do_set_cpu_speed(sleep_freq == low_freq ? PMAC_CPU_LOW_SPEED
  403. : PMAC_CPU_HIGH_SPEED, 0);
  404. no_schedule = 0;
  405. return 0;
  406. }
  407. static struct cpufreq_driver pmac_cpufreq_driver = {
  408. .verify = pmac_cpufreq_verify,
  409. .target = pmac_cpufreq_target,
  410. .get = pmac_cpufreq_get_speed,
  411. .init = pmac_cpufreq_cpu_init,
  412. .suspend = pmac_cpufreq_suspend,
  413. .resume = pmac_cpufreq_resume,
  414. .flags = CPUFREQ_PM_NO_WARN,
  415. .name = "powermac",
  416. .owner = THIS_MODULE,
  417. };
  418. static int __pmac pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
  419. {
  420. struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
  421. "voltage-gpio");
  422. struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
  423. "frequency-gpio");
  424. struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
  425. "slewing-done");
  426. u32 *value;
  427. /*
  428. * Check to see if it's GPIO driven or PMU only
  429. *
  430. * The way we extract the GPIO address is slightly hackish, but it
  431. * works well enough for now. We need to abstract the whole GPIO
  432. * stuff sooner or later anyway
  433. */
  434. if (volt_gpio_np)
  435. voltage_gpio = read_gpio(volt_gpio_np);
  436. if (freq_gpio_np)
  437. frequency_gpio = read_gpio(freq_gpio_np);
  438. if (slew_done_gpio_np)
  439. slew_done_gpio = read_gpio(slew_done_gpio_np);
  440. /* If we use the frequency GPIOs, calculate the min/max speeds based
  441. * on the bus frequencies
  442. */
  443. if (frequency_gpio && slew_done_gpio) {
  444. int lenp, rc;
  445. u32 *freqs, *ratio;
  446. freqs = (u32 *)get_property(cpunode, "bus-frequencies", &lenp);
  447. lenp /= sizeof(u32);
  448. if (freqs == NULL || lenp != 2) {
  449. printk(KERN_ERR "cpufreq: bus-frequencies incorrect or missing\n");
  450. return 1;
  451. }
  452. ratio = (u32 *)get_property(cpunode, "processor-to-bus-ratio*2", NULL);
  453. if (ratio == NULL) {
  454. printk(KERN_ERR "cpufreq: processor-to-bus-ratio*2 missing\n");
  455. return 1;
  456. }
  457. /* Get the min/max bus frequencies */
  458. low_freq = min(freqs[0], freqs[1]);
  459. hi_freq = max(freqs[0], freqs[1]);
  460. /* Grrrr.. It _seems_ that the device-tree is lying on the low bus
  461. * frequency, it claims it to be around 84Mhz on some models while
  462. * it appears to be approx. 101Mhz on all. Let's hack around here...
  463. * fortunately, we don't need to be too precise
  464. */
  465. if (low_freq < 98000000)
  466. low_freq = 101000000;
  467. /* Convert those to CPU core clocks */
  468. low_freq = (low_freq * (*ratio)) / 2000;
  469. hi_freq = (hi_freq * (*ratio)) / 2000;
  470. /* Now we get the frequencies, we read the GPIO to see what is out current
  471. * speed
  472. */
  473. rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
  474. cur_freq = (rc & 0x01) ? hi_freq : low_freq;
  475. set_speed_proc = gpios_set_cpu_speed;
  476. return 1;
  477. }
  478. /* If we use the PMU, look for the min & max frequencies in the
  479. * device-tree
  480. */
  481. value = (u32 *)get_property(cpunode, "min-clock-frequency", NULL);
  482. if (!value)
  483. return 1;
  484. low_freq = (*value) / 1000;
  485. /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
  486. * here */
  487. if (low_freq < 100000)
  488. low_freq *= 10;
  489. value = (u32 *)get_property(cpunode, "max-clock-frequency", NULL);
  490. if (!value)
  491. return 1;
  492. hi_freq = (*value) / 1000;
  493. set_speed_proc = pmu_set_cpu_speed;
  494. return 0;
  495. }
  496. static int __pmac pmac_cpufreq_init_7447A(struct device_node *cpunode)
  497. {
  498. struct device_node *volt_gpio_np;
  499. if (get_property(cpunode, "dynamic-power-step", NULL) == NULL)
  500. return 1;
  501. volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
  502. if (volt_gpio_np)
  503. voltage_gpio = read_gpio(volt_gpio_np);
  504. if (!voltage_gpio){
  505. printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n");
  506. return 1;
  507. }
  508. /* OF only reports the high frequency */
  509. hi_freq = cur_freq;
  510. low_freq = cur_freq/2;
  511. /* Read actual frequency from CPU */
  512. cur_freq = dfs_get_cpu_speed();
  513. set_speed_proc = dfs_set_cpu_speed;
  514. get_speed_proc = dfs_get_cpu_speed;
  515. return 0;
  516. }
  517. static int __pmac pmac_cpufreq_init_750FX(struct device_node *cpunode)
  518. {
  519. struct device_node *volt_gpio_np;
  520. u32 pvr, *value;
  521. if (get_property(cpunode, "dynamic-power-step", NULL) == NULL)
  522. return 1;
  523. hi_freq = cur_freq;
  524. value = (u32 *)get_property(cpunode, "reduced-clock-frequency", NULL);
  525. if (!value)
  526. return 1;
  527. low_freq = (*value) / 1000;
  528. volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
  529. if (volt_gpio_np)
  530. voltage_gpio = read_gpio(volt_gpio_np);
  531. pvr = mfspr(SPRN_PVR);
  532. has_cpu_l2lve = !((pvr & 0xf00) == 0x100);
  533. set_speed_proc = cpu_750fx_cpu_speed;
  534. get_speed_proc = cpu_750fx_get_cpu_speed;
  535. cur_freq = cpu_750fx_get_cpu_speed();
  536. return 0;
  537. }
  538. /* Currently, we support the following machines:
  539. *
  540. * - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
  541. * - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
  542. * - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
  543. * - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
  544. * - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
  545. * - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
  546. * - Recent MacRISC3 laptops
  547. * - All new machines with 7447A CPUs
  548. */
  549. static int __init pmac_cpufreq_setup(void)
  550. {
  551. struct device_node *cpunode;
  552. u32 *value;
  553. if (strstr(cmd_line, "nocpufreq"))
  554. return 0;
  555. /* Assume only one CPU */
  556. cpunode = find_type_devices("cpu");
  557. if (!cpunode)
  558. goto out;
  559. /* Get current cpu clock freq */
  560. value = (u32 *)get_property(cpunode, "clock-frequency", NULL);
  561. if (!value)
  562. goto out;
  563. cur_freq = (*value) / 1000;
  564. /* Check for 7447A based MacRISC3 */
  565. if (machine_is_compatible("MacRISC3") &&
  566. get_property(cpunode, "dynamic-power-step", NULL) &&
  567. PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
  568. pmac_cpufreq_init_7447A(cpunode);
  569. /* Check for other MacRISC3 machines */
  570. } else if (machine_is_compatible("PowerBook3,4") ||
  571. machine_is_compatible("PowerBook3,5") ||
  572. machine_is_compatible("MacRISC3")) {
  573. pmac_cpufreq_init_MacRISC3(cpunode);
  574. /* Else check for iBook2 500/600 */
  575. } else if (machine_is_compatible("PowerBook4,1")) {
  576. hi_freq = cur_freq;
  577. low_freq = 400000;
  578. set_speed_proc = pmu_set_cpu_speed;
  579. }
  580. /* Else check for TiPb 400 & 500 */
  581. else if (machine_is_compatible("PowerBook3,2")) {
  582. /* We only know about the 400 MHz and the 500Mhz model
  583. * they both have 300 MHz as low frequency
  584. */
  585. if (cur_freq < 350000 || cur_freq > 550000)
  586. goto out;
  587. hi_freq = cur_freq;
  588. low_freq = 300000;
  589. set_speed_proc = pmu_set_cpu_speed;
  590. }
  591. /* Else check for 750FX */
  592. else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
  593. pmac_cpufreq_init_750FX(cpunode);
  594. out:
  595. if (set_speed_proc == NULL)
  596. return -ENODEV;
  597. pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
  598. pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
  599. printk(KERN_INFO "Registering PowerMac CPU frequency driver\n");
  600. printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
  601. low_freq/1000, hi_freq/1000, cur_freq/1000);
  602. return cpufreq_register_driver(&pmac_cpufreq_driver);
  603. }
  604. module_init(pmac_cpufreq_setup);