saa7134-dvb.c 27 KB

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  1. /*
  2. *
  3. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  4. *
  5. * Extended 3 / 2005 by Hartmut Hackmann to support various
  6. * cards with the tda10046 DVB-T channel decoder
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #include <linux/init.h>
  23. #include <linux/list.h>
  24. #include <linux/module.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/delay.h>
  28. #include <linux/kthread.h>
  29. #include <linux/suspend.h>
  30. #include "saa7134-reg.h"
  31. #include "saa7134.h"
  32. #include <media/v4l2-common.h>
  33. #ifdef HAVE_MT352
  34. # include "mt352.h"
  35. # include "mt352_priv.h" /* FIXME */
  36. #endif
  37. #ifdef HAVE_TDA1004X
  38. # include "tda1004x.h"
  39. #endif
  40. #ifdef HAVE_NXT200X
  41. # include "nxt200x.h"
  42. # include "dvb-pll.h"
  43. #endif
  44. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  45. MODULE_LICENSE("GPL");
  46. static unsigned int antenna_pwr = 0;
  47. module_param(antenna_pwr, int, 0444);
  48. MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)");
  49. /* ------------------------------------------------------------------ */
  50. #ifdef HAVE_MT352
  51. static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on)
  52. {
  53. u32 ok;
  54. if (!on) {
  55. saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
  56. saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
  57. return 0;
  58. }
  59. saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
  60. saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
  61. udelay(10);
  62. saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28));
  63. saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
  64. udelay(10);
  65. saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
  66. udelay(10);
  67. ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27);
  68. printk("%s: %s %s\n", dev->name, __FUNCTION__,
  69. ok ? "on" : "off");
  70. if (!ok)
  71. saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
  72. return ok;
  73. }
  74. static int mt352_pinnacle_init(struct dvb_frontend* fe)
  75. {
  76. static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 };
  77. static u8 reset [] = { RESET, 0x80 };
  78. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  79. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
  80. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 };
  81. static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 };
  82. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f };
  83. static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d };
  84. static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 };
  85. struct saa7134_dev *dev= fe->dvb->priv;
  86. printk("%s: %s called\n",dev->name,__FUNCTION__);
  87. mt352_write(fe, clock_config, sizeof(clock_config));
  88. udelay(200);
  89. mt352_write(fe, reset, sizeof(reset));
  90. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  91. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  92. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  93. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  94. mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg));
  95. mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg));
  96. mt352_write(fe, irq_cfg, sizeof(irq_cfg));
  97. return 0;
  98. }
  99. static int mt352_pinnacle_pll_set(struct dvb_frontend* fe,
  100. struct dvb_frontend_parameters* params,
  101. u8* pllbuf)
  102. {
  103. u8 off[] = { 0x00, 0xf1};
  104. u8 on[] = { 0x00, 0x71};
  105. struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)};
  106. struct saa7134_dev *dev = fe->dvb->priv;
  107. struct v4l2_frequency f;
  108. /* set frequency (mt2050) */
  109. f.tuner = 0;
  110. f.type = V4L2_TUNER_DIGITAL_TV;
  111. f.frequency = params->frequency / 1000 * 16 / 1000;
  112. i2c_transfer(&dev->i2c_adap, &msg, 1);
  113. saa7134_i2c_call_clients(dev,VIDIOC_S_FREQUENCY,&f);
  114. msg.buf = on;
  115. i2c_transfer(&dev->i2c_adap, &msg, 1);
  116. pinnacle_antenna_pwr(dev, antenna_pwr);
  117. /* mt352 setup */
  118. mt352_pinnacle_init(fe);
  119. pllbuf[0] = 0xc2;
  120. pllbuf[1] = 0x00;
  121. pllbuf[2] = 0x00;
  122. pllbuf[3] = 0x80;
  123. pllbuf[4] = 0x00;
  124. return 0;
  125. }
  126. static struct mt352_config pinnacle_300i = {
  127. .demod_address = 0x3c >> 1,
  128. .adc_clock = 20333,
  129. .if2 = 36150,
  130. .no_tuner = 1,
  131. .demod_init = mt352_pinnacle_init,
  132. .pll_set = mt352_pinnacle_pll_set,
  133. };
  134. #endif
  135. /* ------------------------------------------------------------------ */
  136. #ifdef HAVE_TDA1004X
  137. static int philips_tda6651_pll_set(u8 addr, struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  138. {
  139. struct saa7134_dev *dev = fe->dvb->priv;
  140. u8 tuner_buf[4];
  141. struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len =
  142. sizeof(tuner_buf) };
  143. int tuner_frequency = 0;
  144. u8 band, cp, filter;
  145. /* determine charge pump */
  146. tuner_frequency = params->frequency + 36166000;
  147. if (tuner_frequency < 87000000)
  148. return -EINVAL;
  149. else if (tuner_frequency < 130000000)
  150. cp = 3;
  151. else if (tuner_frequency < 160000000)
  152. cp = 5;
  153. else if (tuner_frequency < 200000000)
  154. cp = 6;
  155. else if (tuner_frequency < 290000000)
  156. cp = 3;
  157. else if (tuner_frequency < 420000000)
  158. cp = 5;
  159. else if (tuner_frequency < 480000000)
  160. cp = 6;
  161. else if (tuner_frequency < 620000000)
  162. cp = 3;
  163. else if (tuner_frequency < 830000000)
  164. cp = 5;
  165. else if (tuner_frequency < 895000000)
  166. cp = 7;
  167. else
  168. return -EINVAL;
  169. /* determine band */
  170. if (params->frequency < 49000000)
  171. return -EINVAL;
  172. else if (params->frequency < 161000000)
  173. band = 1;
  174. else if (params->frequency < 444000000)
  175. band = 2;
  176. else if (params->frequency < 861000000)
  177. band = 4;
  178. else
  179. return -EINVAL;
  180. /* setup PLL filter */
  181. switch (params->u.ofdm.bandwidth) {
  182. case BANDWIDTH_6_MHZ:
  183. filter = 0;
  184. break;
  185. case BANDWIDTH_7_MHZ:
  186. filter = 0;
  187. break;
  188. case BANDWIDTH_8_MHZ:
  189. filter = 1;
  190. break;
  191. default:
  192. return -EINVAL;
  193. }
  194. /* calculate divisor
  195. * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
  196. */
  197. tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000;
  198. /* setup tuner buffer */
  199. tuner_buf[0] = (tuner_frequency >> 8) & 0x7f;
  200. tuner_buf[1] = tuner_frequency & 0xff;
  201. tuner_buf[2] = 0xca;
  202. tuner_buf[3] = (cp << 5) | (filter << 3) | band;
  203. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  204. return -EIO;
  205. msleep(1);
  206. return 0;
  207. }
  208. static int philips_tda6651_pll_init(u8 addr, struct dvb_frontend *fe)
  209. {
  210. struct saa7134_dev *dev = fe->dvb->priv;
  211. static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab };
  212. struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) };
  213. /* setup PLL configuration */
  214. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  215. return -EIO;
  216. msleep(1);
  217. return 0;
  218. }
  219. /* ------------------------------------------------------------------ */
  220. static int philips_tu1216_pll_60_init(struct dvb_frontend *fe)
  221. {
  222. return philips_tda6651_pll_init(0x60, fe);
  223. }
  224. static int philips_tu1216_pll_60_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  225. {
  226. return philips_tda6651_pll_set(0x60, fe, params);
  227. }
  228. static int philips_tu1216_request_firmware(struct dvb_frontend *fe,
  229. const struct firmware **fw, char *name)
  230. {
  231. struct saa7134_dev *dev = fe->dvb->priv;
  232. return request_firmware(fw, name, &dev->pci->dev);
  233. }
  234. static struct tda1004x_config philips_tu1216_60_config = {
  235. .demod_address = 0x8,
  236. .invert = 1,
  237. .invert_oclk = 0,
  238. .xtal_freq = TDA10046_XTAL_4M,
  239. .agc_config = TDA10046_AGC_DEFAULT,
  240. .if_freq = TDA10046_FREQ_3617,
  241. .pll_init = philips_tu1216_pll_60_init,
  242. .pll_set = philips_tu1216_pll_60_set,
  243. .pll_sleep = NULL,
  244. .request_firmware = philips_tu1216_request_firmware,
  245. };
  246. /* ------------------------------------------------------------------ */
  247. static int philips_tu1216_pll_61_init(struct dvb_frontend *fe)
  248. {
  249. return philips_tda6651_pll_init(0x61, fe);
  250. }
  251. static int philips_tu1216_pll_61_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  252. {
  253. return philips_tda6651_pll_set(0x61, fe, params);
  254. }
  255. static struct tda1004x_config philips_tu1216_61_config = {
  256. .demod_address = 0x8,
  257. .invert = 1,
  258. .invert_oclk = 0,
  259. .xtal_freq = TDA10046_XTAL_4M,
  260. .agc_config = TDA10046_AGC_DEFAULT,
  261. .if_freq = TDA10046_FREQ_3617,
  262. .pll_init = philips_tu1216_pll_61_init,
  263. .pll_set = philips_tu1216_pll_61_set,
  264. .pll_sleep = NULL,
  265. .request_firmware = philips_tu1216_request_firmware,
  266. };
  267. /* ------------------------------------------------------------------ */
  268. static int philips_europa_pll_init(struct dvb_frontend *fe)
  269. {
  270. struct saa7134_dev *dev = fe->dvb->priv;
  271. static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab };
  272. struct i2c_msg init_msg = {.addr = 0x61,.flags = 0,.buf = msg,.len = sizeof(msg) };
  273. /* setup PLL configuration */
  274. if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
  275. return -EIO;
  276. msleep(1);
  277. /* switch the board to dvb mode */
  278. init_msg.addr = 0x43;
  279. init_msg.len = 0x02;
  280. msg[0] = 0x00;
  281. msg[1] = 0x40;
  282. if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
  283. return -EIO;
  284. return 0;
  285. }
  286. static int philips_td1316_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  287. {
  288. return philips_tda6651_pll_set(0x61, fe, params);
  289. }
  290. static void philips_europa_analog(struct dvb_frontend *fe)
  291. {
  292. struct saa7134_dev *dev = fe->dvb->priv;
  293. /* this message actually turns the tuner back to analog mode */
  294. static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 };
  295. struct i2c_msg analog_msg = {.addr = 0x61,.flags = 0,.buf = msg,.len = sizeof(msg) };
  296. i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
  297. msleep(1);
  298. /* switch the board to analog mode */
  299. analog_msg.addr = 0x43;
  300. analog_msg.len = 0x02;
  301. msg[0] = 0x00;
  302. msg[1] = 0x14;
  303. i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
  304. }
  305. static struct tda1004x_config philips_europa_config = {
  306. .demod_address = 0x8,
  307. .invert = 0,
  308. .invert_oclk = 0,
  309. .xtal_freq = TDA10046_XTAL_4M,
  310. .agc_config = TDA10046_AGC_IFO_AUTO_POS,
  311. .if_freq = TDA10046_FREQ_052,
  312. .pll_init = philips_europa_pll_init,
  313. .pll_set = philips_td1316_pll_set,
  314. .pll_sleep = philips_europa_analog,
  315. .request_firmware = NULL,
  316. };
  317. /* ------------------------------------------------------------------ */
  318. static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
  319. {
  320. struct saa7134_dev *dev = fe->dvb->priv;
  321. /* this message is to set up ATC and ALC */
  322. static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
  323. struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) };
  324. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  325. return -EIO;
  326. msleep(1);
  327. return 0;
  328. }
  329. static void philips_fmd1216_analog(struct dvb_frontend *fe)
  330. {
  331. struct saa7134_dev *dev = fe->dvb->priv;
  332. /* this message actually turns the tuner back to analog mode */
  333. static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0x60 };
  334. struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) };
  335. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  336. msleep(1);
  337. fmd1216_init[2] = 0x86;
  338. fmd1216_init[3] = 0x54;
  339. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  340. msleep(1);
  341. }
  342. static int philips_fmd1216_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  343. {
  344. struct saa7134_dev *dev = fe->dvb->priv;
  345. u8 tuner_buf[4];
  346. struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = tuner_buf,.len =
  347. sizeof(tuner_buf) };
  348. int tuner_frequency = 0;
  349. int divider = 0;
  350. u8 band, mode, cp;
  351. /* determine charge pump */
  352. tuner_frequency = params->frequency + 36130000;
  353. if (tuner_frequency < 87000000)
  354. return -EINVAL;
  355. /* low band */
  356. else if (tuner_frequency < 180000000) {
  357. band = 1;
  358. mode = 7;
  359. cp = 0;
  360. } else if (tuner_frequency < 195000000) {
  361. band = 1;
  362. mode = 6;
  363. cp = 1;
  364. /* mid band */
  365. } else if (tuner_frequency < 366000000) {
  366. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  367. band = 10;
  368. } else {
  369. band = 2;
  370. }
  371. mode = 7;
  372. cp = 0;
  373. } else if (tuner_frequency < 478000000) {
  374. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  375. band = 10;
  376. } else {
  377. band = 2;
  378. }
  379. mode = 6;
  380. cp = 1;
  381. /* high band */
  382. } else if (tuner_frequency < 662000000) {
  383. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  384. band = 12;
  385. } else {
  386. band = 4;
  387. }
  388. mode = 7;
  389. cp = 0;
  390. } else if (tuner_frequency < 840000000) {
  391. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  392. band = 12;
  393. } else {
  394. band = 4;
  395. }
  396. mode = 6;
  397. cp = 1;
  398. } else {
  399. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  400. band = 12;
  401. } else {
  402. band = 4;
  403. }
  404. mode = 7;
  405. cp = 1;
  406. }
  407. /* calculate divisor */
  408. /* ((36166000 + Finput) / 166666) rounded! */
  409. divider = (tuner_frequency + 83333) / 166667;
  410. /* setup tuner buffer */
  411. tuner_buf[0] = (divider >> 8) & 0x7f;
  412. tuner_buf[1] = divider & 0xff;
  413. tuner_buf[2] = 0x80 | (cp << 6) | (mode << 3) | 4;
  414. tuner_buf[3] = 0x40 | band;
  415. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  416. return -EIO;
  417. return 0;
  418. }
  419. static struct tda1004x_config medion_cardbus = {
  420. .demod_address = 0x08,
  421. .invert = 1,
  422. .invert_oclk = 0,
  423. .xtal_freq = TDA10046_XTAL_16M,
  424. .agc_config = TDA10046_AGC_IFO_AUTO_NEG,
  425. .if_freq = TDA10046_FREQ_3613,
  426. .pll_init = philips_fmd1216_pll_init,
  427. .pll_set = philips_fmd1216_pll_set,
  428. .pll_sleep = philips_fmd1216_analog,
  429. .request_firmware = NULL,
  430. };
  431. /* ------------------------------------------------------------------ */
  432. struct tda827x_data {
  433. u32 lomax;
  434. u8 spd;
  435. u8 bs;
  436. u8 bp;
  437. u8 cp;
  438. u8 gc3;
  439. u8 div1p5;
  440. };
  441. static struct tda827x_data tda827x_dvbt[] = {
  442. { .lomax = 62000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
  443. { .lomax = 66000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
  444. { .lomax = 76000000, .spd = 3, .bs = 1, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
  445. { .lomax = 84000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
  446. { .lomax = 93000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
  447. { .lomax = 98000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
  448. { .lomax = 109000000, .spd = 3, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
  449. { .lomax = 123000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
  450. { .lomax = 133000000, .spd = 2, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
  451. { .lomax = 151000000, .spd = 2, .bs = 1, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
  452. { .lomax = 154000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
  453. { .lomax = 181000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 0, .div1p5 = 0},
  454. { .lomax = 185000000, .spd = 2, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
  455. { .lomax = 217000000, .spd = 2, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
  456. { .lomax = 244000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
  457. { .lomax = 265000000, .spd = 1, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
  458. { .lomax = 302000000, .spd = 1, .bs = 1, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
  459. { .lomax = 324000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
  460. { .lomax = 370000000, .spd = 1, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
  461. { .lomax = 454000000, .spd = 1, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
  462. { .lomax = 493000000, .spd = 0, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
  463. { .lomax = 530000000, .spd = 0, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
  464. { .lomax = 554000000, .spd = 0, .bs = 1, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
  465. { .lomax = 604000000, .spd = 0, .bs = 1, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
  466. { .lomax = 696000000, .spd = 0, .bs = 2, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
  467. { .lomax = 740000000, .spd = 0, .bs = 2, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
  468. { .lomax = 820000000, .spd = 0, .bs = 3, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
  469. { .lomax = 865000000, .spd = 0, .bs = 3, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
  470. { .lomax = 0, .spd = 0, .bs = 0, .bp = 0, .cp = 0, .gc3 = 0, .div1p5 = 0}
  471. };
  472. static int philips_tda827x_pll_init(struct dvb_frontend *fe)
  473. {
  474. return 0;
  475. }
  476. static int philips_tda827x_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  477. {
  478. struct saa7134_dev *dev = fe->dvb->priv;
  479. u8 tuner_buf[14];
  480. struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tuner_buf,
  481. .len = sizeof(tuner_buf) };
  482. int i, tuner_freq, if_freq;
  483. u32 N;
  484. switch (params->u.ofdm.bandwidth) {
  485. case BANDWIDTH_6_MHZ:
  486. if_freq = 4000000;
  487. break;
  488. case BANDWIDTH_7_MHZ:
  489. if_freq = 4500000;
  490. break;
  491. default: /* 8 MHz or Auto */
  492. if_freq = 5000000;
  493. break;
  494. }
  495. tuner_freq = params->frequency + if_freq;
  496. i = 0;
  497. while (tda827x_dvbt[i].lomax < tuner_freq) {
  498. if(tda827x_dvbt[i + 1].lomax == 0)
  499. break;
  500. i++;
  501. }
  502. N = ((tuner_freq + 125000) / 250000) << (tda827x_dvbt[i].spd + 2);
  503. tuner_buf[0] = 0;
  504. tuner_buf[1] = (N>>8) | 0x40;
  505. tuner_buf[2] = N & 0xff;
  506. tuner_buf[3] = 0;
  507. tuner_buf[4] = 0x52;
  508. tuner_buf[5] = (tda827x_dvbt[i].spd << 6) + (tda827x_dvbt[i].div1p5 << 5) +
  509. (tda827x_dvbt[i].bs << 3) + tda827x_dvbt[i].bp;
  510. tuner_buf[6] = (tda827x_dvbt[i].gc3 << 4) + 0x8f;
  511. tuner_buf[7] = 0xbf;
  512. tuner_buf[8] = 0x2a;
  513. tuner_buf[9] = 0x05;
  514. tuner_buf[10] = 0xff;
  515. tuner_buf[11] = 0x00;
  516. tuner_buf[12] = 0x00;
  517. tuner_buf[13] = 0x40;
  518. tuner_msg.len = 14;
  519. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  520. return -EIO;
  521. msleep(500);
  522. /* correct CP value */
  523. tuner_buf[0] = 0x30;
  524. tuner_buf[1] = 0x50 + tda827x_dvbt[i].cp;
  525. tuner_msg.len = 2;
  526. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  527. return 0;
  528. }
  529. static void philips_tda827x_pll_sleep(struct dvb_frontend *fe)
  530. {
  531. struct saa7134_dev *dev = fe->dvb->priv;
  532. static u8 tda827x_sleep[] = { 0x30, 0xd0};
  533. struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tda827x_sleep,
  534. .len = sizeof(tda827x_sleep) };
  535. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  536. }
  537. static struct tda1004x_config tda827x_lifeview_config = {
  538. .demod_address = 0x08,
  539. .invert = 1,
  540. .invert_oclk = 0,
  541. .xtal_freq = TDA10046_XTAL_16M,
  542. .agc_config = TDA10046_AGC_TDA827X,
  543. .if_freq = TDA10046_FREQ_045,
  544. .pll_init = philips_tda827x_pll_init,
  545. .pll_set = philips_tda827x_pll_set,
  546. .pll_sleep = philips_tda827x_pll_sleep,
  547. .request_firmware = NULL,
  548. };
  549. /* ------------------------------------------------------------------ */
  550. struct tda827xa_data {
  551. u32 lomax;
  552. u8 svco;
  553. u8 spd;
  554. u8 scr;
  555. u8 sbs;
  556. u8 gc3;
  557. };
  558. static struct tda827xa_data tda827xa_dvbt[] = {
  559. { .lomax = 56875000, .svco = 3, .spd = 4, .scr = 0, .sbs = 0, .gc3 = 1},
  560. { .lomax = 67250000, .svco = 0, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
  561. { .lomax = 81250000, .svco = 1, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
  562. { .lomax = 97500000, .svco = 2, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
  563. { .lomax = 113750000, .svco = 3, .spd = 3, .scr = 0, .sbs = 1, .gc3 = 1},
  564. { .lomax = 134500000, .svco = 0, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
  565. { .lomax = 154000000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
  566. { .lomax = 162500000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
  567. { .lomax = 183000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
  568. { .lomax = 195000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
  569. { .lomax = 227500000, .svco = 3, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
  570. { .lomax = 269000000, .svco = 0, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
  571. { .lomax = 290000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
  572. { .lomax = 325000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
  573. { .lomax = 390000000, .svco = 2, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
  574. { .lomax = 455000000, .svco = 3, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
  575. { .lomax = 520000000, .svco = 0, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
  576. { .lomax = 538000000, .svco = 0, .spd = 0, .scr = 1, .sbs = 3, .gc3 = 1},
  577. { .lomax = 550000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
  578. { .lomax = 620000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
  579. { .lomax = 650000000, .svco = 1, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
  580. { .lomax = 700000000, .svco = 2, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
  581. { .lomax = 780000000, .svco = 2, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
  582. { .lomax = 820000000, .svco = 3, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
  583. { .lomax = 870000000, .svco = 3, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
  584. { .lomax = 911000000, .svco = 3, .spd = 0, .scr = 2, .sbs = 4, .gc3 = 0},
  585. { .lomax = 0, .svco = 0, .spd = 0, .scr = 0, .sbs = 0, .gc3 = 0}};
  586. static int philips_tda827xa_pll_set(u8 addr, struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  587. {
  588. struct saa7134_dev *dev = fe->dvb->priv;
  589. u8 tuner_buf[14];
  590. unsigned char reg2[2];
  591. struct i2c_msg msg = {.addr = addr,.flags = 0,.buf = tuner_buf};
  592. int i, tuner_freq, if_freq;
  593. u32 N;
  594. switch (params->u.ofdm.bandwidth) {
  595. case BANDWIDTH_6_MHZ:
  596. if_freq = 4000000;
  597. break;
  598. case BANDWIDTH_7_MHZ:
  599. if_freq = 4500000;
  600. break;
  601. default: /* 8 MHz or Auto */
  602. if_freq = 5000000;
  603. break;
  604. }
  605. tuner_freq = params->frequency + if_freq;
  606. i = 0;
  607. while (tda827xa_dvbt[i].lomax < tuner_freq) {
  608. if(tda827xa_dvbt[i + 1].lomax == 0)
  609. break;
  610. i++;
  611. }
  612. N = ((tuner_freq + 31250) / 62500) << tda827xa_dvbt[i].spd;
  613. tuner_buf[0] = 0; // subaddress
  614. tuner_buf[1] = N >> 8;
  615. tuner_buf[2] = N & 0xff;
  616. tuner_buf[3] = 0;
  617. tuner_buf[4] = 0x16;
  618. tuner_buf[5] = (tda827xa_dvbt[i].spd << 5) + (tda827xa_dvbt[i].svco << 3) +
  619. tda827xa_dvbt[i].sbs;
  620. tuner_buf[6] = 0x4b + (tda827xa_dvbt[i].gc3 << 4);
  621. tuner_buf[7] = 0x0c;
  622. tuner_buf[8] = 0x06;
  623. tuner_buf[9] = 0x24;
  624. tuner_buf[10] = 0xff;
  625. tuner_buf[11] = 0x60;
  626. tuner_buf[12] = 0x00;
  627. tuner_buf[13] = 0x39; // lpsel
  628. msg.len = 14;
  629. if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1)
  630. return -EIO;
  631. msg.buf= reg2;
  632. msg.len = 2;
  633. reg2[0] = 0x60;
  634. reg2[1] = 0x3c;
  635. i2c_transfer(&dev->i2c_adap, &msg, 1);
  636. reg2[0] = 0xa0;
  637. reg2[1] = 0x40;
  638. i2c_transfer(&dev->i2c_adap, &msg, 1);
  639. msleep(2);
  640. /* correct CP value */
  641. reg2[0] = 0x30;
  642. reg2[1] = 0x10 + tda827xa_dvbt[i].scr;
  643. msg.len = 2;
  644. i2c_transfer(&dev->i2c_adap, &msg, 1);
  645. msleep(550);
  646. reg2[0] = 0x50;
  647. reg2[1] = 0x4f + (tda827xa_dvbt[i].gc3 << 4);
  648. i2c_transfer(&dev->i2c_adap, &msg, 1);
  649. return 0;
  650. }
  651. static void philips_tda827xa_pll_sleep(u8 addr, struct dvb_frontend *fe)
  652. {
  653. struct saa7134_dev *dev = fe->dvb->priv;
  654. static u8 tda827xa_sleep[] = { 0x30, 0x90};
  655. struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tda827xa_sleep,
  656. .len = sizeof(tda827xa_sleep) };
  657. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  658. }
  659. /* ------------------------------------------------------------------ */
  660. static int philips_tiger_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  661. {
  662. int ret;
  663. struct saa7134_dev *dev = fe->dvb->priv;
  664. static u8 tda8290_close[] = { 0x21, 0xc0};
  665. static u8 tda8290_open[] = { 0x21, 0x80};
  666. struct i2c_msg tda8290_msg = {.addr = 0x4b,.flags = 0, .len = 2};
  667. /* close tda8290 i2c bridge */
  668. tda8290_msg.buf = tda8290_close;
  669. ret = i2c_transfer(&dev->i2c_adap, &tda8290_msg, 1);
  670. if (ret != 1)
  671. return -EIO;
  672. msleep(20);
  673. ret = philips_tda827xa_pll_set(0x61, fe, params);
  674. if (ret != 0)
  675. return ret;
  676. /* open tda8290 i2c bridge */
  677. tda8290_msg.buf = tda8290_open;
  678. i2c_transfer(&dev->i2c_adap, &tda8290_msg, 1);
  679. return ret;
  680. };
  681. static int philips_tiger_dvb_mode(struct dvb_frontend *fe)
  682. {
  683. struct saa7134_dev *dev = fe->dvb->priv;
  684. static u8 data[] = { 0x3c, 0x33, 0x6a};
  685. struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)};
  686. if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1)
  687. return -EIO;
  688. return 0;
  689. }
  690. static void philips_tiger_analog_mode(struct dvb_frontend *fe)
  691. {
  692. struct saa7134_dev *dev = fe->dvb->priv;
  693. static u8 data[] = { 0x3c, 0x33, 0x68};
  694. struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)};
  695. i2c_transfer(&dev->i2c_adap, &msg, 1);
  696. philips_tda827xa_pll_sleep( 0x61, fe);
  697. }
  698. static struct tda1004x_config philips_tiger_config = {
  699. .demod_address = 0x08,
  700. .invert = 1,
  701. .invert_oclk = 0,
  702. .xtal_freq = TDA10046_XTAL_16M,
  703. .agc_config = TDA10046_AGC_TDA827X,
  704. .if_freq = TDA10046_FREQ_045,
  705. .pll_init = philips_tiger_dvb_mode,
  706. .pll_set = philips_tiger_pll_set,
  707. .pll_sleep = philips_tiger_analog_mode,
  708. .request_firmware = NULL,
  709. };
  710. #endif
  711. /* ------------------------------------------------------------------ */
  712. #ifdef HAVE_NXT200X
  713. static struct nxt200x_config avertvhda180 = {
  714. .demod_address = 0x0a,
  715. .pll_address = 0x61,
  716. .pll_desc = &dvb_pll_tdhu2,
  717. };
  718. #endif
  719. /* ------------------------------------------------------------------ */
  720. static int dvb_init(struct saa7134_dev *dev)
  721. {
  722. /* init struct videobuf_dvb */
  723. dev->ts.nr_bufs = 32;
  724. dev->ts.nr_packets = 32*4;
  725. dev->dvb.name = dev->name;
  726. videobuf_queue_init(&dev->dvb.dvbq, &saa7134_ts_qops,
  727. dev->pci, &dev->slock,
  728. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  729. V4L2_FIELD_ALTERNATE,
  730. sizeof(struct saa7134_buf),
  731. dev);
  732. switch (dev->board) {
  733. #ifdef HAVE_MT352
  734. case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
  735. printk("%s: pinnacle 300i dvb setup\n",dev->name);
  736. dev->dvb.frontend = mt352_attach(&pinnacle_300i,
  737. &dev->i2c_adap);
  738. break;
  739. #endif
  740. #ifdef HAVE_TDA1004X
  741. case SAA7134_BOARD_MD7134:
  742. dev->dvb.frontend = tda10046_attach(&medion_cardbus,
  743. &dev->i2c_adap);
  744. break;
  745. case SAA7134_BOARD_PHILIPS_TOUGH:
  746. dev->dvb.frontend = tda10046_attach(&philips_tu1216_60_config,
  747. &dev->i2c_adap);
  748. break;
  749. case SAA7134_BOARD_FLYDVBTDUO:
  750. dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config,
  751. &dev->i2c_adap);
  752. break;
  753. case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS:
  754. dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config,
  755. &dev->i2c_adap);
  756. break;
  757. case SAA7134_BOARD_PHILIPS_EUROPA:
  758. dev->dvb.frontend = tda10046_attach(&philips_europa_config,
  759. &dev->i2c_adap);
  760. break;
  761. case SAA7134_BOARD_VIDEOMATE_DVBT_300:
  762. dev->dvb.frontend = tda10046_attach(&philips_europa_config,
  763. &dev->i2c_adap);
  764. break;
  765. case SAA7134_BOARD_VIDEOMATE_DVBT_200:
  766. dev->dvb.frontend = tda10046_attach(&philips_tu1216_61_config,
  767. &dev->i2c_adap);
  768. break;
  769. case SAA7134_BOARD_PHILIPS_TIGER:
  770. dev->dvb.frontend = tda10046_attach(&philips_tiger_config,
  771. &dev->i2c_adap);
  772. break;
  773. case SAA7134_BOARD_ASUSTeK_P7131_DUAL:
  774. dev->dvb.frontend = tda10046_attach(&philips_tiger_config,
  775. &dev->i2c_adap);
  776. break;
  777. #endif
  778. #ifdef HAVE_NXT200X
  779. case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180:
  780. dev->dvb.frontend = nxt200x_attach(&avertvhda180, &dev->i2c_adap);
  781. break;
  782. #endif
  783. default:
  784. printk("%s: Huh? unknown DVB card?\n",dev->name);
  785. break;
  786. }
  787. if (NULL == dev->dvb.frontend) {
  788. printk("%s: frontend initialization failed\n",dev->name);
  789. return -1;
  790. }
  791. /* register everything else */
  792. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev);
  793. }
  794. static int dvb_fini(struct saa7134_dev *dev)
  795. {
  796. static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
  797. switch (dev->board) {
  798. case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
  799. /* otherwise we don't detect the tuner on next insmod */
  800. saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on);
  801. break;
  802. };
  803. videobuf_dvb_unregister(&dev->dvb);
  804. return 0;
  805. }
  806. static struct saa7134_mpeg_ops dvb_ops = {
  807. .type = SAA7134_MPEG_DVB,
  808. .init = dvb_init,
  809. .fini = dvb_fini,
  810. };
  811. static int __init dvb_register(void)
  812. {
  813. return saa7134_ts_register(&dvb_ops);
  814. }
  815. static void __exit dvb_unregister(void)
  816. {
  817. saa7134_ts_unregister(&dvb_ops);
  818. }
  819. module_init(dvb_register);
  820. module_exit(dvb_unregister);
  821. /* ------------------------------------------------------------------ */
  822. /*
  823. * Local variables:
  824. * c-basic-offset: 8
  825. * End:
  826. */