e1000_main.c 133 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961396239633964396539663967396839693970397139723973397439753976397739783979398039813982398339843985398639873988398939903991399239933994399539963997399839994000400140024003400440054006400740084009401040114012401340144015401640174018401940204021402240234024402540264027402840294030403140324033403440354036403740384039404040414042404340444045404640474048404940504051405240534054405540564057405840594060406140624063406440654066406740684069407040714072407340744075407640774078407940804081408240834084408540864087408840894090409140924093409440954096409740984099410041014102410341044105410641074108410941104111411241134114411541164117411841194120412141224123412441254126412741284129413041314132413341344135413641374138413941404141414241434144414541464147414841494150415141524153415441554156415741584159416041614162416341644165416641674168416941704171417241734174417541764177417841794180418141824183418441854186418741884189419041914192419341944195419641974198419942004201420242034204420542064207420842094210421142124213421442154216421742184219422042214222422342244225422642274228422942304231423242334234423542364237423842394240424142424243424442454246424742484249425042514252425342544255425642574258425942604261426242634264426542664267426842694270427142724273427442754276427742784279428042814282428342844285428642874288428942904291429242934294429542964297429842994300430143024303430443054306430743084309431043114312431343144315431643174318431943204321432243234324432543264327432843294330433143324333433443354336433743384339434043414342434343444345434643474348434943504351435243534354435543564357435843594360436143624363436443654366436743684369437043714372437343744375437643774378437943804381438243834384438543864387438843894390439143924393439443954396439743984399440044014402440344044405440644074408440944104411441244134414441544164417441844194420442144224423442444254426442744284429443044314432443344344435443644374438443944404441444244434444444544464447444844494450445144524453445444554456445744584459446044614462446344644465446644674468446944704471447244734474447544764477447844794480448144824483448444854486448744884489449044914492449344944495449644974498449945004501450245034504450545064507450845094510451145124513451445154516451745184519452045214522452345244525452645274528452945304531453245334534453545364537453845394540454145424543454445454546454745484549455045514552455345544555455645574558455945604561456245634564456545664567456845694570457145724573457445754576457745784579458045814582458345844585458645874588458945904591459245934594459545964597459845994600460146024603460446054606460746084609461046114612461346144615461646174618461946204621462246234624462546264627462846294630463146324633463446354636463746384639464046414642464346444645464646474648464946504651465246534654465546564657465846594660466146624663466446654666466746684669467046714672467346744675467646774678467946804681468246834684468546864687468846894690469146924693469446954696469746984699470047014702470347044705470647074708470947104711471247134714471547164717471847194720472147224723472447254726472747284729473047314732473347344735473647374738473947404741474247434744474547464747474847494750475147524753
  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20. *******************************************************************************/
  21. #include "e1000.h"
  22. char e1000_driver_name[] = "e1000";
  23. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  24. #ifndef CONFIG_E1000_NAPI
  25. #define DRIVERNAPI
  26. #else
  27. #define DRIVERNAPI "-NAPI"
  28. #endif
  29. #define DRV_VERSION "7.0.38-k4"DRIVERNAPI
  30. char e1000_driver_version[] = DRV_VERSION;
  31. static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
  32. /* e1000_pci_tbl - PCI Device ID Table
  33. *
  34. * Last entry must be all 0s
  35. *
  36. * Macro expands to...
  37. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  38. */
  39. static struct pci_device_id e1000_pci_tbl[] = {
  40. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  41. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  42. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  43. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  44. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  45. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  46. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  47. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  48. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  49. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  50. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  51. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  52. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  53. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  54. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  55. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  56. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  57. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  58. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  59. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  60. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  61. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  62. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  63. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  64. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  65. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  66. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  67. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  68. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  69. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  70. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  71. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  72. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  73. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  74. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  75. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  76. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  77. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  78. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  79. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  80. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  81. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  82. INTEL_E1000_ETHERNET_DEVICE(0x1096),
  83. INTEL_E1000_ETHERNET_DEVICE(0x1098),
  84. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  85. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  86. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  87. INTEL_E1000_ETHERNET_DEVICE(0x10B9),
  88. /* required last entry */
  89. {0,}
  90. };
  91. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  92. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  93. struct e1000_tx_ring *txdr);
  94. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  95. struct e1000_rx_ring *rxdr);
  96. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  97. struct e1000_tx_ring *tx_ring);
  98. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  99. struct e1000_rx_ring *rx_ring);
  100. /* Local Function Prototypes */
  101. static int e1000_init_module(void);
  102. static void e1000_exit_module(void);
  103. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  104. static void __devexit e1000_remove(struct pci_dev *pdev);
  105. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  106. static int e1000_sw_init(struct e1000_adapter *adapter);
  107. static int e1000_open(struct net_device *netdev);
  108. static int e1000_close(struct net_device *netdev);
  109. static void e1000_configure_tx(struct e1000_adapter *adapter);
  110. static void e1000_configure_rx(struct e1000_adapter *adapter);
  111. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  112. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  113. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  114. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  115. struct e1000_tx_ring *tx_ring);
  116. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  117. struct e1000_rx_ring *rx_ring);
  118. static void e1000_set_multi(struct net_device *netdev);
  119. static void e1000_update_phy_info(unsigned long data);
  120. static void e1000_watchdog(unsigned long data);
  121. static void e1000_82547_tx_fifo_stall(unsigned long data);
  122. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  123. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  124. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  125. static int e1000_set_mac(struct net_device *netdev, void *p);
  126. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  127. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  128. struct e1000_tx_ring *tx_ring);
  129. #ifdef CONFIG_E1000_NAPI
  130. static int e1000_clean(struct net_device *poll_dev, int *budget);
  131. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  132. struct e1000_rx_ring *rx_ring,
  133. int *work_done, int work_to_do);
  134. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  135. struct e1000_rx_ring *rx_ring,
  136. int *work_done, int work_to_do);
  137. #else
  138. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  139. struct e1000_rx_ring *rx_ring);
  140. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  141. struct e1000_rx_ring *rx_ring);
  142. #endif
  143. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  144. struct e1000_rx_ring *rx_ring,
  145. int cleaned_count);
  146. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  147. struct e1000_rx_ring *rx_ring,
  148. int cleaned_count);
  149. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  150. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  151. int cmd);
  152. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  153. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  154. static void e1000_tx_timeout(struct net_device *dev);
  155. static void e1000_reset_task(struct net_device *dev);
  156. static void e1000_smartspeed(struct e1000_adapter *adapter);
  157. static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  158. struct sk_buff *skb);
  159. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  160. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  161. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  162. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  163. #ifdef CONFIG_PM
  164. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  165. static int e1000_resume(struct pci_dev *pdev);
  166. #endif
  167. static void e1000_shutdown(struct pci_dev *pdev);
  168. #ifdef CONFIG_NET_POLL_CONTROLLER
  169. /* for netdump / net console */
  170. static void e1000_netpoll (struct net_device *netdev);
  171. #endif
  172. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
  173. pci_channel_state_t state);
  174. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
  175. static void e1000_io_resume(struct pci_dev *pdev);
  176. static struct pci_error_handlers e1000_err_handler = {
  177. .error_detected = e1000_io_error_detected,
  178. .slot_reset = e1000_io_slot_reset,
  179. .resume = e1000_io_resume,
  180. };
  181. static struct pci_driver e1000_driver = {
  182. .name = e1000_driver_name,
  183. .id_table = e1000_pci_tbl,
  184. .probe = e1000_probe,
  185. .remove = __devexit_p(e1000_remove),
  186. /* Power Managment Hooks */
  187. #ifdef CONFIG_PM
  188. .suspend = e1000_suspend,
  189. .resume = e1000_resume,
  190. #endif
  191. .shutdown = e1000_shutdown,
  192. .err_handler = &e1000_err_handler
  193. };
  194. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  195. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  196. MODULE_LICENSE("GPL");
  197. MODULE_VERSION(DRV_VERSION);
  198. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  199. module_param(debug, int, 0);
  200. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  201. /**
  202. * e1000_init_module - Driver Registration Routine
  203. *
  204. * e1000_init_module is the first routine called when the driver is
  205. * loaded. All it does is register with the PCI subsystem.
  206. **/
  207. static int __init
  208. e1000_init_module(void)
  209. {
  210. int ret;
  211. printk(KERN_INFO "%s - version %s\n",
  212. e1000_driver_string, e1000_driver_version);
  213. printk(KERN_INFO "%s\n", e1000_copyright);
  214. ret = pci_module_init(&e1000_driver);
  215. return ret;
  216. }
  217. module_init(e1000_init_module);
  218. /**
  219. * e1000_exit_module - Driver Exit Cleanup Routine
  220. *
  221. * e1000_exit_module is called just before the driver is removed
  222. * from memory.
  223. **/
  224. static void __exit
  225. e1000_exit_module(void)
  226. {
  227. pci_unregister_driver(&e1000_driver);
  228. }
  229. module_exit(e1000_exit_module);
  230. static int e1000_request_irq(struct e1000_adapter *adapter)
  231. {
  232. struct net_device *netdev = adapter->netdev;
  233. int flags, err = 0;
  234. flags = SA_SHIRQ | SA_SAMPLE_RANDOM;
  235. #ifdef CONFIG_PCI_MSI
  236. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  237. adapter->have_msi = TRUE;
  238. if ((err = pci_enable_msi(adapter->pdev))) {
  239. DPRINTK(PROBE, ERR,
  240. "Unable to allocate MSI interrupt Error: %d\n", err);
  241. adapter->have_msi = FALSE;
  242. }
  243. }
  244. if (adapter->have_msi)
  245. flags &= ~SA_SHIRQ;
  246. #endif
  247. if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
  248. netdev->name, netdev)))
  249. DPRINTK(PROBE, ERR,
  250. "Unable to allocate interrupt Error: %d\n", err);
  251. return err;
  252. }
  253. static void e1000_free_irq(struct e1000_adapter *adapter)
  254. {
  255. struct net_device *netdev = adapter->netdev;
  256. free_irq(adapter->pdev->irq, netdev);
  257. #ifdef CONFIG_PCI_MSI
  258. if (adapter->have_msi)
  259. pci_disable_msi(adapter->pdev);
  260. #endif
  261. }
  262. /**
  263. * e1000_irq_disable - Mask off interrupt generation on the NIC
  264. * @adapter: board private structure
  265. **/
  266. static void
  267. e1000_irq_disable(struct e1000_adapter *adapter)
  268. {
  269. atomic_inc(&adapter->irq_sem);
  270. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  271. E1000_WRITE_FLUSH(&adapter->hw);
  272. synchronize_irq(adapter->pdev->irq);
  273. }
  274. /**
  275. * e1000_irq_enable - Enable default interrupt generation settings
  276. * @adapter: board private structure
  277. **/
  278. static void
  279. e1000_irq_enable(struct e1000_adapter *adapter)
  280. {
  281. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  282. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  283. E1000_WRITE_FLUSH(&adapter->hw);
  284. }
  285. }
  286. static void
  287. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  288. {
  289. struct net_device *netdev = adapter->netdev;
  290. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  291. uint16_t old_vid = adapter->mng_vlan_id;
  292. if (adapter->vlgrp) {
  293. if (!adapter->vlgrp->vlan_devices[vid]) {
  294. if (adapter->hw.mng_cookie.status &
  295. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  296. e1000_vlan_rx_add_vid(netdev, vid);
  297. adapter->mng_vlan_id = vid;
  298. } else
  299. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  300. if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  301. (vid != old_vid) &&
  302. !adapter->vlgrp->vlan_devices[old_vid])
  303. e1000_vlan_rx_kill_vid(netdev, old_vid);
  304. } else
  305. adapter->mng_vlan_id = vid;
  306. }
  307. }
  308. /**
  309. * e1000_release_hw_control - release control of the h/w to f/w
  310. * @adapter: address of board private structure
  311. *
  312. * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  313. * For ASF and Pass Through versions of f/w this means that the
  314. * driver is no longer loaded. For AMT version (only with 82573) i
  315. * of the f/w this means that the netowrk i/f is closed.
  316. *
  317. **/
  318. static void
  319. e1000_release_hw_control(struct e1000_adapter *adapter)
  320. {
  321. uint32_t ctrl_ext;
  322. uint32_t swsm;
  323. /* Let firmware taken over control of h/w */
  324. switch (adapter->hw.mac_type) {
  325. case e1000_82571:
  326. case e1000_82572:
  327. case e1000_80003es2lan:
  328. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  329. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  330. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  331. break;
  332. case e1000_82573:
  333. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  334. E1000_WRITE_REG(&adapter->hw, SWSM,
  335. swsm & ~E1000_SWSM_DRV_LOAD);
  336. default:
  337. break;
  338. }
  339. }
  340. /**
  341. * e1000_get_hw_control - get control of the h/w from f/w
  342. * @adapter: address of board private structure
  343. *
  344. * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  345. * For ASF and Pass Through versions of f/w this means that
  346. * the driver is loaded. For AMT version (only with 82573)
  347. * of the f/w this means that the netowrk i/f is open.
  348. *
  349. **/
  350. static void
  351. e1000_get_hw_control(struct e1000_adapter *adapter)
  352. {
  353. uint32_t ctrl_ext;
  354. uint32_t swsm;
  355. /* Let firmware know the driver has taken over */
  356. switch (adapter->hw.mac_type) {
  357. case e1000_82571:
  358. case e1000_82572:
  359. case e1000_80003es2lan:
  360. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  361. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  362. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  363. break;
  364. case e1000_82573:
  365. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  366. E1000_WRITE_REG(&adapter->hw, SWSM,
  367. swsm | E1000_SWSM_DRV_LOAD);
  368. break;
  369. default:
  370. break;
  371. }
  372. }
  373. int
  374. e1000_up(struct e1000_adapter *adapter)
  375. {
  376. struct net_device *netdev = adapter->netdev;
  377. int i;
  378. /* hardware has been reset, we need to reload some things */
  379. e1000_set_multi(netdev);
  380. e1000_restore_vlan(adapter);
  381. e1000_configure_tx(adapter);
  382. e1000_setup_rctl(adapter);
  383. e1000_configure_rx(adapter);
  384. /* call E1000_DESC_UNUSED which always leaves
  385. * at least 1 descriptor unused to make sure
  386. * next_to_use != next_to_clean */
  387. for (i = 0; i < adapter->num_rx_queues; i++) {
  388. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  389. adapter->alloc_rx_buf(adapter, ring,
  390. E1000_DESC_UNUSED(ring));
  391. }
  392. adapter->tx_queue_len = netdev->tx_queue_len;
  393. mod_timer(&adapter->watchdog_timer, jiffies);
  394. #ifdef CONFIG_E1000_NAPI
  395. netif_poll_enable(netdev);
  396. #endif
  397. e1000_irq_enable(adapter);
  398. return 0;
  399. }
  400. /**
  401. * e1000_power_up_phy - restore link in case the phy was powered down
  402. * @adapter: address of board private structure
  403. *
  404. * The phy may be powered down to save power and turn off link when the
  405. * driver is unloaded and wake on lan is not enabled (among others)
  406. * *** this routine MUST be followed by a call to e1000_reset ***
  407. *
  408. **/
  409. static void e1000_power_up_phy(struct e1000_adapter *adapter)
  410. {
  411. uint16_t mii_reg = 0;
  412. /* Just clear the power down bit to wake the phy back up */
  413. if (adapter->hw.media_type == e1000_media_type_copper) {
  414. /* according to the manual, the phy will retain its
  415. * settings across a power-down/up cycle */
  416. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  417. mii_reg &= ~MII_CR_POWER_DOWN;
  418. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  419. }
  420. }
  421. static void e1000_power_down_phy(struct e1000_adapter *adapter)
  422. {
  423. boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
  424. e1000_check_mng_mode(&adapter->hw);
  425. /* Power down the PHY so no link is implied when interface is down
  426. * The PHY cannot be powered down if any of the following is TRUE
  427. * (a) WoL is enabled
  428. * (b) AMT is active
  429. * (c) SoL/IDER session is active */
  430. if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  431. adapter->hw.media_type == e1000_media_type_copper &&
  432. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
  433. !mng_mode_enabled &&
  434. !e1000_check_phy_reset_block(&adapter->hw)) {
  435. uint16_t mii_reg = 0;
  436. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  437. mii_reg |= MII_CR_POWER_DOWN;
  438. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  439. mdelay(1);
  440. }
  441. }
  442. void
  443. e1000_down(struct e1000_adapter *adapter)
  444. {
  445. struct net_device *netdev = adapter->netdev;
  446. e1000_irq_disable(adapter);
  447. del_timer_sync(&adapter->tx_fifo_stall_timer);
  448. del_timer_sync(&adapter->watchdog_timer);
  449. del_timer_sync(&adapter->phy_info_timer);
  450. #ifdef CONFIG_E1000_NAPI
  451. netif_poll_disable(netdev);
  452. #endif
  453. netdev->tx_queue_len = adapter->tx_queue_len;
  454. adapter->link_speed = 0;
  455. adapter->link_duplex = 0;
  456. netif_carrier_off(netdev);
  457. netif_stop_queue(netdev);
  458. e1000_reset(adapter);
  459. e1000_clean_all_tx_rings(adapter);
  460. e1000_clean_all_rx_rings(adapter);
  461. }
  462. void
  463. e1000_reinit_locked(struct e1000_adapter *adapter)
  464. {
  465. WARN_ON(in_interrupt());
  466. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  467. msleep(1);
  468. e1000_down(adapter);
  469. e1000_up(adapter);
  470. clear_bit(__E1000_RESETTING, &adapter->flags);
  471. }
  472. void
  473. e1000_reset(struct e1000_adapter *adapter)
  474. {
  475. uint32_t pba, manc;
  476. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  477. /* Repartition Pba for greater than 9k mtu
  478. * To take effect CTRL.RST is required.
  479. */
  480. switch (adapter->hw.mac_type) {
  481. case e1000_82547:
  482. case e1000_82547_rev_2:
  483. pba = E1000_PBA_30K;
  484. break;
  485. case e1000_82571:
  486. case e1000_82572:
  487. case e1000_80003es2lan:
  488. pba = E1000_PBA_38K;
  489. break;
  490. case e1000_82573:
  491. pba = E1000_PBA_12K;
  492. break;
  493. default:
  494. pba = E1000_PBA_48K;
  495. break;
  496. }
  497. if ((adapter->hw.mac_type != e1000_82573) &&
  498. (adapter->netdev->mtu > E1000_RXBUFFER_8192))
  499. pba -= 8; /* allocate more FIFO for Tx */
  500. if (adapter->hw.mac_type == e1000_82547) {
  501. adapter->tx_fifo_head = 0;
  502. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  503. adapter->tx_fifo_size =
  504. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  505. atomic_set(&adapter->tx_fifo_stall, 0);
  506. }
  507. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  508. /* flow control settings */
  509. /* Set the FC high water mark to 90% of the FIFO size.
  510. * Required to clear last 3 LSB */
  511. fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
  512. adapter->hw.fc_high_water = fc_high_water_mark;
  513. adapter->hw.fc_low_water = fc_high_water_mark - 8;
  514. if (adapter->hw.mac_type == e1000_80003es2lan)
  515. adapter->hw.fc_pause_time = 0xFFFF;
  516. else
  517. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  518. adapter->hw.fc_send_xon = 1;
  519. adapter->hw.fc = adapter->hw.original_fc;
  520. /* Allow time for pending master requests to run */
  521. e1000_reset_hw(&adapter->hw);
  522. if (adapter->hw.mac_type >= e1000_82544)
  523. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  524. if (e1000_init_hw(&adapter->hw))
  525. DPRINTK(PROBE, ERR, "Hardware Error\n");
  526. e1000_update_mng_vlan(adapter);
  527. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  528. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  529. e1000_reset_adaptive(&adapter->hw);
  530. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  531. if (adapter->en_mng_pt) {
  532. manc = E1000_READ_REG(&adapter->hw, MANC);
  533. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  534. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  535. }
  536. }
  537. /**
  538. * e1000_probe - Device Initialization Routine
  539. * @pdev: PCI device information struct
  540. * @ent: entry in e1000_pci_tbl
  541. *
  542. * Returns 0 on success, negative on failure
  543. *
  544. * e1000_probe initializes an adapter identified by a pci_dev structure.
  545. * The OS initialization, configuring of the adapter private structure,
  546. * and a hardware reset occur.
  547. **/
  548. static int __devinit
  549. e1000_probe(struct pci_dev *pdev,
  550. const struct pci_device_id *ent)
  551. {
  552. struct net_device *netdev;
  553. struct e1000_adapter *adapter;
  554. unsigned long mmio_start, mmio_len;
  555. static int cards_found = 0;
  556. static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */
  557. int i, err, pci_using_dac;
  558. uint16_t eeprom_data;
  559. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  560. if ((err = pci_enable_device(pdev)))
  561. return err;
  562. if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  563. pci_using_dac = 1;
  564. } else {
  565. if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
  566. E1000_ERR("No usable DMA configuration, aborting\n");
  567. return err;
  568. }
  569. pci_using_dac = 0;
  570. }
  571. if ((err = pci_request_regions(pdev, e1000_driver_name)))
  572. return err;
  573. pci_set_master(pdev);
  574. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  575. if (!netdev) {
  576. err = -ENOMEM;
  577. goto err_alloc_etherdev;
  578. }
  579. SET_MODULE_OWNER(netdev);
  580. SET_NETDEV_DEV(netdev, &pdev->dev);
  581. pci_set_drvdata(pdev, netdev);
  582. adapter = netdev_priv(netdev);
  583. adapter->netdev = netdev;
  584. adapter->pdev = pdev;
  585. adapter->hw.back = adapter;
  586. adapter->msg_enable = (1 << debug) - 1;
  587. mmio_start = pci_resource_start(pdev, BAR_0);
  588. mmio_len = pci_resource_len(pdev, BAR_0);
  589. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  590. if (!adapter->hw.hw_addr) {
  591. err = -EIO;
  592. goto err_ioremap;
  593. }
  594. for (i = BAR_1; i <= BAR_5; i++) {
  595. if (pci_resource_len(pdev, i) == 0)
  596. continue;
  597. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  598. adapter->hw.io_base = pci_resource_start(pdev, i);
  599. break;
  600. }
  601. }
  602. netdev->open = &e1000_open;
  603. netdev->stop = &e1000_close;
  604. netdev->hard_start_xmit = &e1000_xmit_frame;
  605. netdev->get_stats = &e1000_get_stats;
  606. netdev->set_multicast_list = &e1000_set_multi;
  607. netdev->set_mac_address = &e1000_set_mac;
  608. netdev->change_mtu = &e1000_change_mtu;
  609. netdev->do_ioctl = &e1000_ioctl;
  610. e1000_set_ethtool_ops(netdev);
  611. netdev->tx_timeout = &e1000_tx_timeout;
  612. netdev->watchdog_timeo = 5 * HZ;
  613. #ifdef CONFIG_E1000_NAPI
  614. netdev->poll = &e1000_clean;
  615. netdev->weight = 64;
  616. #endif
  617. netdev->vlan_rx_register = e1000_vlan_rx_register;
  618. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  619. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  620. #ifdef CONFIG_NET_POLL_CONTROLLER
  621. netdev->poll_controller = e1000_netpoll;
  622. #endif
  623. strcpy(netdev->name, pci_name(pdev));
  624. netdev->mem_start = mmio_start;
  625. netdev->mem_end = mmio_start + mmio_len;
  626. netdev->base_addr = adapter->hw.io_base;
  627. adapter->bd_number = cards_found;
  628. /* setup the private structure */
  629. if ((err = e1000_sw_init(adapter)))
  630. goto err_sw_init;
  631. if ((err = e1000_check_phy_reset_block(&adapter->hw)))
  632. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  633. /* if ksp3, indicate if it's port a being setup */
  634. if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 &&
  635. e1000_ksp3_port_a == 0)
  636. adapter->ksp3_port_a = 1;
  637. e1000_ksp3_port_a++;
  638. /* Reset for multiple KP3 adapters */
  639. if (e1000_ksp3_port_a == 4)
  640. e1000_ksp3_port_a = 0;
  641. if (adapter->hw.mac_type >= e1000_82543) {
  642. netdev->features = NETIF_F_SG |
  643. NETIF_F_HW_CSUM |
  644. NETIF_F_HW_VLAN_TX |
  645. NETIF_F_HW_VLAN_RX |
  646. NETIF_F_HW_VLAN_FILTER;
  647. }
  648. #ifdef NETIF_F_TSO
  649. if ((adapter->hw.mac_type >= e1000_82544) &&
  650. (adapter->hw.mac_type != e1000_82547))
  651. netdev->features |= NETIF_F_TSO;
  652. #ifdef NETIF_F_TSO_IPV6
  653. if (adapter->hw.mac_type > e1000_82547_rev_2)
  654. netdev->features |= NETIF_F_TSO_IPV6;
  655. #endif
  656. #endif
  657. if (pci_using_dac)
  658. netdev->features |= NETIF_F_HIGHDMA;
  659. /* hard_start_xmit is safe against parallel locking */
  660. netdev->features |= NETIF_F_LLTX;
  661. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  662. /* before reading the EEPROM, reset the controller to
  663. * put the device in a known good starting state */
  664. e1000_reset_hw(&adapter->hw);
  665. /* make sure the EEPROM is good */
  666. if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  667. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  668. err = -EIO;
  669. goto err_eeprom;
  670. }
  671. /* copy the MAC address out of the EEPROM */
  672. if (e1000_read_mac_addr(&adapter->hw))
  673. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  674. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  675. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  676. if (!is_valid_ether_addr(netdev->perm_addr)) {
  677. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  678. err = -EIO;
  679. goto err_eeprom;
  680. }
  681. e1000_read_part_num(&adapter->hw, &(adapter->part_num));
  682. e1000_get_bus_info(&adapter->hw);
  683. init_timer(&adapter->tx_fifo_stall_timer);
  684. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  685. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  686. init_timer(&adapter->watchdog_timer);
  687. adapter->watchdog_timer.function = &e1000_watchdog;
  688. adapter->watchdog_timer.data = (unsigned long) adapter;
  689. init_timer(&adapter->phy_info_timer);
  690. adapter->phy_info_timer.function = &e1000_update_phy_info;
  691. adapter->phy_info_timer.data = (unsigned long) adapter;
  692. INIT_WORK(&adapter->reset_task,
  693. (void (*)(void *))e1000_reset_task, netdev);
  694. /* we're going to reset, so assume we have no link for now */
  695. netif_carrier_off(netdev);
  696. netif_stop_queue(netdev);
  697. e1000_check_options(adapter);
  698. /* Initial Wake on LAN setting
  699. * If APM wake is enabled in the EEPROM,
  700. * enable the ACPI Magic Packet filter
  701. */
  702. switch (adapter->hw.mac_type) {
  703. case e1000_82542_rev2_0:
  704. case e1000_82542_rev2_1:
  705. case e1000_82543:
  706. break;
  707. case e1000_82544:
  708. e1000_read_eeprom(&adapter->hw,
  709. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  710. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  711. break;
  712. case e1000_82546:
  713. case e1000_82546_rev_3:
  714. case e1000_82571:
  715. case e1000_80003es2lan:
  716. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
  717. e1000_read_eeprom(&adapter->hw,
  718. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  719. break;
  720. }
  721. /* Fall Through */
  722. default:
  723. e1000_read_eeprom(&adapter->hw,
  724. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  725. break;
  726. }
  727. if (eeprom_data & eeprom_apme_mask)
  728. adapter->wol |= E1000_WUFC_MAG;
  729. /* print bus type/speed/width info */
  730. {
  731. struct e1000_hw *hw = &adapter->hw;
  732. DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
  733. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
  734. (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
  735. ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
  736. (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
  737. (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
  738. (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
  739. (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
  740. ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
  741. (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
  742. (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
  743. "32-bit"));
  744. }
  745. for (i = 0; i < 6; i++)
  746. printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
  747. /* reset the hardware with the new settings */
  748. e1000_reset(adapter);
  749. /* If the controller is 82573 and f/w is AMT, do not set
  750. * DRV_LOAD until the interface is up. For all other cases,
  751. * let the f/w know that the h/w is now under the control
  752. * of the driver. */
  753. if (adapter->hw.mac_type != e1000_82573 ||
  754. !e1000_check_mng_mode(&adapter->hw))
  755. e1000_get_hw_control(adapter);
  756. strcpy(netdev->name, "eth%d");
  757. if ((err = register_netdev(netdev)))
  758. goto err_register;
  759. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  760. cards_found++;
  761. return 0;
  762. err_register:
  763. err_sw_init:
  764. err_eeprom:
  765. iounmap(adapter->hw.hw_addr);
  766. err_ioremap:
  767. free_netdev(netdev);
  768. err_alloc_etherdev:
  769. pci_release_regions(pdev);
  770. return err;
  771. }
  772. /**
  773. * e1000_remove - Device Removal Routine
  774. * @pdev: PCI device information struct
  775. *
  776. * e1000_remove is called by the PCI subsystem to alert the driver
  777. * that it should release a PCI device. The could be caused by a
  778. * Hot-Plug event, or because the driver is going to be removed from
  779. * memory.
  780. **/
  781. static void __devexit
  782. e1000_remove(struct pci_dev *pdev)
  783. {
  784. struct net_device *netdev = pci_get_drvdata(pdev);
  785. struct e1000_adapter *adapter = netdev_priv(netdev);
  786. uint32_t manc;
  787. #ifdef CONFIG_E1000_NAPI
  788. int i;
  789. #endif
  790. flush_scheduled_work();
  791. if (adapter->hw.mac_type >= e1000_82540 &&
  792. adapter->hw.media_type == e1000_media_type_copper) {
  793. manc = E1000_READ_REG(&adapter->hw, MANC);
  794. if (manc & E1000_MANC_SMBUS_EN) {
  795. manc |= E1000_MANC_ARP_EN;
  796. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  797. }
  798. }
  799. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  800. * would have already happened in close and is redundant. */
  801. e1000_release_hw_control(adapter);
  802. unregister_netdev(netdev);
  803. #ifdef CONFIG_E1000_NAPI
  804. for (i = 0; i < adapter->num_rx_queues; i++)
  805. dev_put(&adapter->polling_netdev[i]);
  806. #endif
  807. if (!e1000_check_phy_reset_block(&adapter->hw))
  808. e1000_phy_hw_reset(&adapter->hw);
  809. kfree(adapter->tx_ring);
  810. kfree(adapter->rx_ring);
  811. #ifdef CONFIG_E1000_NAPI
  812. kfree(adapter->polling_netdev);
  813. #endif
  814. iounmap(adapter->hw.hw_addr);
  815. pci_release_regions(pdev);
  816. free_netdev(netdev);
  817. pci_disable_device(pdev);
  818. }
  819. /**
  820. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  821. * @adapter: board private structure to initialize
  822. *
  823. * e1000_sw_init initializes the Adapter private data structure.
  824. * Fields are initialized based on PCI device information and
  825. * OS network device settings (MTU size).
  826. **/
  827. static int __devinit
  828. e1000_sw_init(struct e1000_adapter *adapter)
  829. {
  830. struct e1000_hw *hw = &adapter->hw;
  831. struct net_device *netdev = adapter->netdev;
  832. struct pci_dev *pdev = adapter->pdev;
  833. #ifdef CONFIG_E1000_NAPI
  834. int i;
  835. #endif
  836. /* PCI config space info */
  837. hw->vendor_id = pdev->vendor;
  838. hw->device_id = pdev->device;
  839. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  840. hw->subsystem_id = pdev->subsystem_device;
  841. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  842. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  843. adapter->rx_buffer_len = MAXIMUM_ETHERNET_FRAME_SIZE;
  844. adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
  845. hw->max_frame_size = netdev->mtu +
  846. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  847. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  848. /* identify the MAC */
  849. if (e1000_set_mac_type(hw)) {
  850. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  851. return -EIO;
  852. }
  853. /* initialize eeprom parameters */
  854. if (e1000_init_eeprom_params(hw)) {
  855. E1000_ERR("EEPROM initialization failed\n");
  856. return -EIO;
  857. }
  858. switch (hw->mac_type) {
  859. default:
  860. break;
  861. case e1000_82541:
  862. case e1000_82547:
  863. case e1000_82541_rev_2:
  864. case e1000_82547_rev_2:
  865. hw->phy_init_script = 1;
  866. break;
  867. }
  868. e1000_set_media_type(hw);
  869. hw->wait_autoneg_complete = FALSE;
  870. hw->tbi_compatibility_en = TRUE;
  871. hw->adaptive_ifs = TRUE;
  872. /* Copper options */
  873. if (hw->media_type == e1000_media_type_copper) {
  874. hw->mdix = AUTO_ALL_MODES;
  875. hw->disable_polarity_correction = FALSE;
  876. hw->master_slave = E1000_MASTER_SLAVE;
  877. }
  878. adapter->num_tx_queues = 1;
  879. adapter->num_rx_queues = 1;
  880. if (e1000_alloc_queues(adapter)) {
  881. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  882. return -ENOMEM;
  883. }
  884. #ifdef CONFIG_E1000_NAPI
  885. for (i = 0; i < adapter->num_rx_queues; i++) {
  886. adapter->polling_netdev[i].priv = adapter;
  887. adapter->polling_netdev[i].poll = &e1000_clean;
  888. adapter->polling_netdev[i].weight = 64;
  889. dev_hold(&adapter->polling_netdev[i]);
  890. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  891. }
  892. spin_lock_init(&adapter->tx_queue_lock);
  893. #endif
  894. atomic_set(&adapter->irq_sem, 1);
  895. spin_lock_init(&adapter->stats_lock);
  896. return 0;
  897. }
  898. /**
  899. * e1000_alloc_queues - Allocate memory for all rings
  900. * @adapter: board private structure to initialize
  901. *
  902. * We allocate one ring per queue at run-time since we don't know the
  903. * number of queues at compile-time. The polling_netdev array is
  904. * intended for Multiqueue, but should work fine with a single queue.
  905. **/
  906. static int __devinit
  907. e1000_alloc_queues(struct e1000_adapter *adapter)
  908. {
  909. int size;
  910. size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  911. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  912. if (!adapter->tx_ring)
  913. return -ENOMEM;
  914. memset(adapter->tx_ring, 0, size);
  915. size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  916. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  917. if (!adapter->rx_ring) {
  918. kfree(adapter->tx_ring);
  919. return -ENOMEM;
  920. }
  921. memset(adapter->rx_ring, 0, size);
  922. #ifdef CONFIG_E1000_NAPI
  923. size = sizeof(struct net_device) * adapter->num_rx_queues;
  924. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  925. if (!adapter->polling_netdev) {
  926. kfree(adapter->tx_ring);
  927. kfree(adapter->rx_ring);
  928. return -ENOMEM;
  929. }
  930. memset(adapter->polling_netdev, 0, size);
  931. #endif
  932. return E1000_SUCCESS;
  933. }
  934. /**
  935. * e1000_open - Called when a network interface is made active
  936. * @netdev: network interface device structure
  937. *
  938. * Returns 0 on success, negative value on failure
  939. *
  940. * The open entry point is called when a network interface is made
  941. * active by the system (IFF_UP). At this point all resources needed
  942. * for transmit and receive operations are allocated, the interrupt
  943. * handler is registered with the OS, the watchdog timer is started,
  944. * and the stack is notified that the interface is ready.
  945. **/
  946. static int
  947. e1000_open(struct net_device *netdev)
  948. {
  949. struct e1000_adapter *adapter = netdev_priv(netdev);
  950. int err;
  951. /* disallow open during test */
  952. if (test_bit(__E1000_DRIVER_TESTING, &adapter->flags))
  953. return -EBUSY;
  954. /* allocate transmit descriptors */
  955. if ((err = e1000_setup_all_tx_resources(adapter)))
  956. goto err_setup_tx;
  957. /* allocate receive descriptors */
  958. if ((err = e1000_setup_all_rx_resources(adapter)))
  959. goto err_setup_rx;
  960. err = e1000_request_irq(adapter);
  961. if (err)
  962. goto err_up;
  963. e1000_power_up_phy(adapter);
  964. if ((err = e1000_up(adapter)))
  965. goto err_up;
  966. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  967. if ((adapter->hw.mng_cookie.status &
  968. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  969. e1000_update_mng_vlan(adapter);
  970. }
  971. /* If AMT is enabled, let the firmware know that the network
  972. * interface is now open */
  973. if (adapter->hw.mac_type == e1000_82573 &&
  974. e1000_check_mng_mode(&adapter->hw))
  975. e1000_get_hw_control(adapter);
  976. return E1000_SUCCESS;
  977. err_up:
  978. e1000_free_all_rx_resources(adapter);
  979. err_setup_rx:
  980. e1000_free_all_tx_resources(adapter);
  981. err_setup_tx:
  982. e1000_reset(adapter);
  983. return err;
  984. }
  985. /**
  986. * e1000_close - Disables a network interface
  987. * @netdev: network interface device structure
  988. *
  989. * Returns 0, this is not allowed to fail
  990. *
  991. * The close entry point is called when an interface is de-activated
  992. * by the OS. The hardware is still under the drivers control, but
  993. * needs to be disabled. A global MAC reset is issued to stop the
  994. * hardware, and all transmit and receive resources are freed.
  995. **/
  996. static int
  997. e1000_close(struct net_device *netdev)
  998. {
  999. struct e1000_adapter *adapter = netdev_priv(netdev);
  1000. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  1001. e1000_down(adapter);
  1002. e1000_power_down_phy(adapter);
  1003. e1000_free_irq(adapter);
  1004. e1000_free_all_tx_resources(adapter);
  1005. e1000_free_all_rx_resources(adapter);
  1006. if ((adapter->hw.mng_cookie.status &
  1007. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1008. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  1009. }
  1010. /* If AMT is enabled, let the firmware know that the network
  1011. * interface is now closed */
  1012. if (adapter->hw.mac_type == e1000_82573 &&
  1013. e1000_check_mng_mode(&adapter->hw))
  1014. e1000_release_hw_control(adapter);
  1015. return 0;
  1016. }
  1017. /**
  1018. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1019. * @adapter: address of board private structure
  1020. * @start: address of beginning of memory
  1021. * @len: length of memory
  1022. **/
  1023. static boolean_t
  1024. e1000_check_64k_bound(struct e1000_adapter *adapter,
  1025. void *start, unsigned long len)
  1026. {
  1027. unsigned long begin = (unsigned long) start;
  1028. unsigned long end = begin + len;
  1029. /* First rev 82545 and 82546 need to not allow any memory
  1030. * write location to cross 64k boundary due to errata 23 */
  1031. if (adapter->hw.mac_type == e1000_82545 ||
  1032. adapter->hw.mac_type == e1000_82546) {
  1033. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  1034. }
  1035. return TRUE;
  1036. }
  1037. /**
  1038. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1039. * @adapter: board private structure
  1040. * @txdr: tx descriptor ring (for a specific queue) to setup
  1041. *
  1042. * Return 0 on success, negative on failure
  1043. **/
  1044. static int
  1045. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1046. struct e1000_tx_ring *txdr)
  1047. {
  1048. struct pci_dev *pdev = adapter->pdev;
  1049. int size;
  1050. size = sizeof(struct e1000_buffer) * txdr->count;
  1051. txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1052. if (!txdr->buffer_info) {
  1053. DPRINTK(PROBE, ERR,
  1054. "Unable to allocate memory for the transmit descriptor ring\n");
  1055. return -ENOMEM;
  1056. }
  1057. memset(txdr->buffer_info, 0, size);
  1058. /* round up to nearest 4K */
  1059. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1060. E1000_ROUNDUP(txdr->size, 4096);
  1061. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1062. if (!txdr->desc) {
  1063. setup_tx_desc_die:
  1064. vfree(txdr->buffer_info);
  1065. DPRINTK(PROBE, ERR,
  1066. "Unable to allocate memory for the transmit descriptor ring\n");
  1067. return -ENOMEM;
  1068. }
  1069. /* Fix for errata 23, can't cross 64kB boundary */
  1070. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1071. void *olddesc = txdr->desc;
  1072. dma_addr_t olddma = txdr->dma;
  1073. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  1074. "at %p\n", txdr->size, txdr->desc);
  1075. /* Try again, without freeing the previous */
  1076. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1077. /* Failed allocation, critical failure */
  1078. if (!txdr->desc) {
  1079. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1080. goto setup_tx_desc_die;
  1081. }
  1082. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1083. /* give up */
  1084. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1085. txdr->dma);
  1086. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1087. DPRINTK(PROBE, ERR,
  1088. "Unable to allocate aligned memory "
  1089. "for the transmit descriptor ring\n");
  1090. vfree(txdr->buffer_info);
  1091. return -ENOMEM;
  1092. } else {
  1093. /* Free old allocation, new allocation was successful */
  1094. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1095. }
  1096. }
  1097. memset(txdr->desc, 0, txdr->size);
  1098. txdr->next_to_use = 0;
  1099. txdr->next_to_clean = 0;
  1100. spin_lock_init(&txdr->tx_lock);
  1101. return 0;
  1102. }
  1103. /**
  1104. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1105. * (Descriptors) for all queues
  1106. * @adapter: board private structure
  1107. *
  1108. * If this function returns with an error, then it's possible one or
  1109. * more of the rings is populated (while the rest are not). It is the
  1110. * callers duty to clean those orphaned rings.
  1111. *
  1112. * Return 0 on success, negative on failure
  1113. **/
  1114. int
  1115. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1116. {
  1117. int i, err = 0;
  1118. for (i = 0; i < adapter->num_tx_queues; i++) {
  1119. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1120. if (err) {
  1121. DPRINTK(PROBE, ERR,
  1122. "Allocation for Tx Queue %u failed\n", i);
  1123. break;
  1124. }
  1125. }
  1126. return err;
  1127. }
  1128. /**
  1129. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1130. * @adapter: board private structure
  1131. *
  1132. * Configure the Tx unit of the MAC after a reset.
  1133. **/
  1134. static void
  1135. e1000_configure_tx(struct e1000_adapter *adapter)
  1136. {
  1137. uint64_t tdba;
  1138. struct e1000_hw *hw = &adapter->hw;
  1139. uint32_t tdlen, tctl, tipg, tarc;
  1140. uint32_t ipgr1, ipgr2;
  1141. /* Setup the HW Tx Head and Tail descriptor pointers */
  1142. switch (adapter->num_tx_queues) {
  1143. case 1:
  1144. default:
  1145. tdba = adapter->tx_ring[0].dma;
  1146. tdlen = adapter->tx_ring[0].count *
  1147. sizeof(struct e1000_tx_desc);
  1148. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1149. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1150. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1151. E1000_WRITE_REG(hw, TDH, 0);
  1152. E1000_WRITE_REG(hw, TDT, 0);
  1153. adapter->tx_ring[0].tdh = E1000_TDH;
  1154. adapter->tx_ring[0].tdt = E1000_TDT;
  1155. break;
  1156. }
  1157. /* Set the default values for the Tx Inter Packet Gap timer */
  1158. if (hw->media_type == e1000_media_type_fiber ||
  1159. hw->media_type == e1000_media_type_internal_serdes)
  1160. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1161. else
  1162. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1163. switch (hw->mac_type) {
  1164. case e1000_82542_rev2_0:
  1165. case e1000_82542_rev2_1:
  1166. tipg = DEFAULT_82542_TIPG_IPGT;
  1167. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1168. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1169. break;
  1170. case e1000_80003es2lan:
  1171. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1172. ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
  1173. break;
  1174. default:
  1175. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1176. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1177. break;
  1178. }
  1179. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1180. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1181. E1000_WRITE_REG(hw, TIPG, tipg);
  1182. /* Set the Tx Interrupt Delay register */
  1183. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1184. if (hw->mac_type >= e1000_82540)
  1185. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1186. /* Program the Transmit Control Register */
  1187. tctl = E1000_READ_REG(hw, TCTL);
  1188. tctl &= ~E1000_TCTL_CT;
  1189. tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1190. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1191. #ifdef DISABLE_MULR
  1192. /* disable Multiple Reads for debugging */
  1193. tctl &= ~E1000_TCTL_MULR;
  1194. #endif
  1195. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1196. tarc = E1000_READ_REG(hw, TARC0);
  1197. tarc |= ((1 << 25) | (1 << 21));
  1198. E1000_WRITE_REG(hw, TARC0, tarc);
  1199. tarc = E1000_READ_REG(hw, TARC1);
  1200. tarc |= (1 << 25);
  1201. if (tctl & E1000_TCTL_MULR)
  1202. tarc &= ~(1 << 28);
  1203. else
  1204. tarc |= (1 << 28);
  1205. E1000_WRITE_REG(hw, TARC1, tarc);
  1206. } else if (hw->mac_type == e1000_80003es2lan) {
  1207. tarc = E1000_READ_REG(hw, TARC0);
  1208. tarc |= 1;
  1209. if (hw->media_type == e1000_media_type_internal_serdes)
  1210. tarc |= (1 << 20);
  1211. E1000_WRITE_REG(hw, TARC0, tarc);
  1212. tarc = E1000_READ_REG(hw, TARC1);
  1213. tarc |= 1;
  1214. E1000_WRITE_REG(hw, TARC1, tarc);
  1215. }
  1216. e1000_config_collision_dist(hw);
  1217. /* Setup Transmit Descriptor Settings for eop descriptor */
  1218. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1219. E1000_TXD_CMD_IFCS;
  1220. if (hw->mac_type < e1000_82543)
  1221. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1222. else
  1223. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1224. /* Cache if we're 82544 running in PCI-X because we'll
  1225. * need this to apply a workaround later in the send path. */
  1226. if (hw->mac_type == e1000_82544 &&
  1227. hw->bus_type == e1000_bus_type_pcix)
  1228. adapter->pcix_82544 = 1;
  1229. E1000_WRITE_REG(hw, TCTL, tctl);
  1230. }
  1231. /**
  1232. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1233. * @adapter: board private structure
  1234. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1235. *
  1236. * Returns 0 on success, negative on failure
  1237. **/
  1238. static int
  1239. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1240. struct e1000_rx_ring *rxdr)
  1241. {
  1242. struct pci_dev *pdev = adapter->pdev;
  1243. int size, desc_len;
  1244. size = sizeof(struct e1000_buffer) * rxdr->count;
  1245. rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1246. if (!rxdr->buffer_info) {
  1247. DPRINTK(PROBE, ERR,
  1248. "Unable to allocate memory for the receive descriptor ring\n");
  1249. return -ENOMEM;
  1250. }
  1251. memset(rxdr->buffer_info, 0, size);
  1252. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1253. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1254. if (!rxdr->ps_page) {
  1255. vfree(rxdr->buffer_info);
  1256. DPRINTK(PROBE, ERR,
  1257. "Unable to allocate memory for the receive descriptor ring\n");
  1258. return -ENOMEM;
  1259. }
  1260. memset(rxdr->ps_page, 0, size);
  1261. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1262. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1263. if (!rxdr->ps_page_dma) {
  1264. vfree(rxdr->buffer_info);
  1265. kfree(rxdr->ps_page);
  1266. DPRINTK(PROBE, ERR,
  1267. "Unable to allocate memory for the receive descriptor ring\n");
  1268. return -ENOMEM;
  1269. }
  1270. memset(rxdr->ps_page_dma, 0, size);
  1271. if (adapter->hw.mac_type <= e1000_82547_rev_2)
  1272. desc_len = sizeof(struct e1000_rx_desc);
  1273. else
  1274. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1275. /* Round up to nearest 4K */
  1276. rxdr->size = rxdr->count * desc_len;
  1277. E1000_ROUNDUP(rxdr->size, 4096);
  1278. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1279. if (!rxdr->desc) {
  1280. DPRINTK(PROBE, ERR,
  1281. "Unable to allocate memory for the receive descriptor ring\n");
  1282. setup_rx_desc_die:
  1283. vfree(rxdr->buffer_info);
  1284. kfree(rxdr->ps_page);
  1285. kfree(rxdr->ps_page_dma);
  1286. return -ENOMEM;
  1287. }
  1288. /* Fix for errata 23, can't cross 64kB boundary */
  1289. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1290. void *olddesc = rxdr->desc;
  1291. dma_addr_t olddma = rxdr->dma;
  1292. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1293. "at %p\n", rxdr->size, rxdr->desc);
  1294. /* Try again, without freeing the previous */
  1295. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1296. /* Failed allocation, critical failure */
  1297. if (!rxdr->desc) {
  1298. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1299. DPRINTK(PROBE, ERR,
  1300. "Unable to allocate memory "
  1301. "for the receive descriptor ring\n");
  1302. goto setup_rx_desc_die;
  1303. }
  1304. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1305. /* give up */
  1306. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1307. rxdr->dma);
  1308. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1309. DPRINTK(PROBE, ERR,
  1310. "Unable to allocate aligned memory "
  1311. "for the receive descriptor ring\n");
  1312. goto setup_rx_desc_die;
  1313. } else {
  1314. /* Free old allocation, new allocation was successful */
  1315. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1316. }
  1317. }
  1318. memset(rxdr->desc, 0, rxdr->size);
  1319. rxdr->next_to_clean = 0;
  1320. rxdr->next_to_use = 0;
  1321. return 0;
  1322. }
  1323. /**
  1324. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1325. * (Descriptors) for all queues
  1326. * @adapter: board private structure
  1327. *
  1328. * If this function returns with an error, then it's possible one or
  1329. * more of the rings is populated (while the rest are not). It is the
  1330. * callers duty to clean those orphaned rings.
  1331. *
  1332. * Return 0 on success, negative on failure
  1333. **/
  1334. int
  1335. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1336. {
  1337. int i, err = 0;
  1338. for (i = 0; i < adapter->num_rx_queues; i++) {
  1339. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1340. if (err) {
  1341. DPRINTK(PROBE, ERR,
  1342. "Allocation for Rx Queue %u failed\n", i);
  1343. break;
  1344. }
  1345. }
  1346. return err;
  1347. }
  1348. /**
  1349. * e1000_setup_rctl - configure the receive control registers
  1350. * @adapter: Board private structure
  1351. **/
  1352. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1353. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1354. static void
  1355. e1000_setup_rctl(struct e1000_adapter *adapter)
  1356. {
  1357. uint32_t rctl, rfctl;
  1358. uint32_t psrctl = 0;
  1359. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1360. uint32_t pages = 0;
  1361. #endif
  1362. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1363. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1364. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1365. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1366. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1367. if (adapter->hw.mac_type > e1000_82543)
  1368. rctl |= E1000_RCTL_SECRC;
  1369. if (adapter->hw.tbi_compatibility_on == 1)
  1370. rctl |= E1000_RCTL_SBP;
  1371. else
  1372. rctl &= ~E1000_RCTL_SBP;
  1373. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1374. rctl &= ~E1000_RCTL_LPE;
  1375. else
  1376. rctl |= E1000_RCTL_LPE;
  1377. /* Setup buffer sizes */
  1378. rctl &= ~E1000_RCTL_SZ_4096;
  1379. rctl |= E1000_RCTL_BSEX;
  1380. switch (adapter->rx_buffer_len) {
  1381. case E1000_RXBUFFER_256:
  1382. rctl |= E1000_RCTL_SZ_256;
  1383. rctl &= ~E1000_RCTL_BSEX;
  1384. break;
  1385. case E1000_RXBUFFER_512:
  1386. rctl |= E1000_RCTL_SZ_512;
  1387. rctl &= ~E1000_RCTL_BSEX;
  1388. break;
  1389. case E1000_RXBUFFER_1024:
  1390. rctl |= E1000_RCTL_SZ_1024;
  1391. rctl &= ~E1000_RCTL_BSEX;
  1392. break;
  1393. case E1000_RXBUFFER_2048:
  1394. default:
  1395. rctl |= E1000_RCTL_SZ_2048;
  1396. rctl &= ~E1000_RCTL_BSEX;
  1397. break;
  1398. case E1000_RXBUFFER_4096:
  1399. rctl |= E1000_RCTL_SZ_4096;
  1400. break;
  1401. case E1000_RXBUFFER_8192:
  1402. rctl |= E1000_RCTL_SZ_8192;
  1403. break;
  1404. case E1000_RXBUFFER_16384:
  1405. rctl |= E1000_RCTL_SZ_16384;
  1406. break;
  1407. }
  1408. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1409. /* 82571 and greater support packet-split where the protocol
  1410. * header is placed in skb->data and the packet data is
  1411. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1412. * In the case of a non-split, skb->data is linearly filled,
  1413. * followed by the page buffers. Therefore, skb->data is
  1414. * sized to hold the largest protocol header.
  1415. */
  1416. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1417. if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
  1418. PAGE_SIZE <= 16384)
  1419. adapter->rx_ps_pages = pages;
  1420. else
  1421. adapter->rx_ps_pages = 0;
  1422. #endif
  1423. if (adapter->rx_ps_pages) {
  1424. /* Configure extra packet-split registers */
  1425. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1426. rfctl |= E1000_RFCTL_EXTEN;
  1427. /* disable IPv6 packet split support */
  1428. rfctl |= E1000_RFCTL_IPV6_DIS;
  1429. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1430. rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
  1431. psrctl |= adapter->rx_ps_bsize0 >>
  1432. E1000_PSRCTL_BSIZE0_SHIFT;
  1433. switch (adapter->rx_ps_pages) {
  1434. case 3:
  1435. psrctl |= PAGE_SIZE <<
  1436. E1000_PSRCTL_BSIZE3_SHIFT;
  1437. case 2:
  1438. psrctl |= PAGE_SIZE <<
  1439. E1000_PSRCTL_BSIZE2_SHIFT;
  1440. case 1:
  1441. psrctl |= PAGE_SIZE >>
  1442. E1000_PSRCTL_BSIZE1_SHIFT;
  1443. break;
  1444. }
  1445. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1446. }
  1447. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1448. }
  1449. /**
  1450. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1451. * @adapter: board private structure
  1452. *
  1453. * Configure the Rx unit of the MAC after a reset.
  1454. **/
  1455. static void
  1456. e1000_configure_rx(struct e1000_adapter *adapter)
  1457. {
  1458. uint64_t rdba;
  1459. struct e1000_hw *hw = &adapter->hw;
  1460. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1461. if (adapter->rx_ps_pages) {
  1462. /* this is a 32 byte descriptor */
  1463. rdlen = adapter->rx_ring[0].count *
  1464. sizeof(union e1000_rx_desc_packet_split);
  1465. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1466. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1467. } else {
  1468. rdlen = adapter->rx_ring[0].count *
  1469. sizeof(struct e1000_rx_desc);
  1470. adapter->clean_rx = e1000_clean_rx_irq;
  1471. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1472. }
  1473. /* disable receives while setting up the descriptors */
  1474. rctl = E1000_READ_REG(hw, RCTL);
  1475. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1476. /* set the Receive Delay Timer Register */
  1477. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1478. if (hw->mac_type >= e1000_82540) {
  1479. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1480. if (adapter->itr > 1)
  1481. E1000_WRITE_REG(hw, ITR,
  1482. 1000000000 / (adapter->itr * 256));
  1483. }
  1484. if (hw->mac_type >= e1000_82571) {
  1485. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1486. /* Reset delay timers after every interrupt */
  1487. ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
  1488. #ifdef CONFIG_E1000_NAPI
  1489. /* Auto-Mask interrupts upon ICR read. */
  1490. ctrl_ext |= E1000_CTRL_EXT_IAME;
  1491. #endif
  1492. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1493. E1000_WRITE_REG(hw, IAM, ~0);
  1494. E1000_WRITE_FLUSH(hw);
  1495. }
  1496. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1497. * the Base and Length of the Rx Descriptor Ring */
  1498. switch (adapter->num_rx_queues) {
  1499. case 1:
  1500. default:
  1501. rdba = adapter->rx_ring[0].dma;
  1502. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1503. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1504. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1505. E1000_WRITE_REG(hw, RDH, 0);
  1506. E1000_WRITE_REG(hw, RDT, 0);
  1507. adapter->rx_ring[0].rdh = E1000_RDH;
  1508. adapter->rx_ring[0].rdt = E1000_RDT;
  1509. break;
  1510. }
  1511. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1512. if (hw->mac_type >= e1000_82543) {
  1513. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1514. if (adapter->rx_csum == TRUE) {
  1515. rxcsum |= E1000_RXCSUM_TUOFL;
  1516. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1517. * Must be used in conjunction with packet-split. */
  1518. if ((hw->mac_type >= e1000_82571) &&
  1519. (adapter->rx_ps_pages)) {
  1520. rxcsum |= E1000_RXCSUM_IPPCSE;
  1521. }
  1522. } else {
  1523. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1524. /* don't need to clear IPPCSE as it defaults to 0 */
  1525. }
  1526. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1527. }
  1528. if (hw->mac_type == e1000_82573)
  1529. E1000_WRITE_REG(hw, ERT, 0x0100);
  1530. /* Enable Receives */
  1531. E1000_WRITE_REG(hw, RCTL, rctl);
  1532. }
  1533. /**
  1534. * e1000_free_tx_resources - Free Tx Resources per Queue
  1535. * @adapter: board private structure
  1536. * @tx_ring: Tx descriptor ring for a specific queue
  1537. *
  1538. * Free all transmit software resources
  1539. **/
  1540. static void
  1541. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1542. struct e1000_tx_ring *tx_ring)
  1543. {
  1544. struct pci_dev *pdev = adapter->pdev;
  1545. e1000_clean_tx_ring(adapter, tx_ring);
  1546. vfree(tx_ring->buffer_info);
  1547. tx_ring->buffer_info = NULL;
  1548. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1549. tx_ring->desc = NULL;
  1550. }
  1551. /**
  1552. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1553. * @adapter: board private structure
  1554. *
  1555. * Free all transmit software resources
  1556. **/
  1557. void
  1558. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1559. {
  1560. int i;
  1561. for (i = 0; i < adapter->num_tx_queues; i++)
  1562. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1563. }
  1564. static void
  1565. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1566. struct e1000_buffer *buffer_info)
  1567. {
  1568. if (buffer_info->dma) {
  1569. pci_unmap_page(adapter->pdev,
  1570. buffer_info->dma,
  1571. buffer_info->length,
  1572. PCI_DMA_TODEVICE);
  1573. }
  1574. if (buffer_info->skb)
  1575. dev_kfree_skb_any(buffer_info->skb);
  1576. memset(buffer_info, 0, sizeof(struct e1000_buffer));
  1577. }
  1578. /**
  1579. * e1000_clean_tx_ring - Free Tx Buffers
  1580. * @adapter: board private structure
  1581. * @tx_ring: ring to be cleaned
  1582. **/
  1583. static void
  1584. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1585. struct e1000_tx_ring *tx_ring)
  1586. {
  1587. struct e1000_buffer *buffer_info;
  1588. unsigned long size;
  1589. unsigned int i;
  1590. /* Free all the Tx ring sk_buffs */
  1591. for (i = 0; i < tx_ring->count; i++) {
  1592. buffer_info = &tx_ring->buffer_info[i];
  1593. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1594. }
  1595. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1596. memset(tx_ring->buffer_info, 0, size);
  1597. /* Zero out the descriptor ring */
  1598. memset(tx_ring->desc, 0, tx_ring->size);
  1599. tx_ring->next_to_use = 0;
  1600. tx_ring->next_to_clean = 0;
  1601. tx_ring->last_tx_tso = 0;
  1602. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1603. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1604. }
  1605. /**
  1606. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1607. * @adapter: board private structure
  1608. **/
  1609. static void
  1610. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1611. {
  1612. int i;
  1613. for (i = 0; i < adapter->num_tx_queues; i++)
  1614. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1615. }
  1616. /**
  1617. * e1000_free_rx_resources - Free Rx Resources
  1618. * @adapter: board private structure
  1619. * @rx_ring: ring to clean the resources from
  1620. *
  1621. * Free all receive software resources
  1622. **/
  1623. static void
  1624. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1625. struct e1000_rx_ring *rx_ring)
  1626. {
  1627. struct pci_dev *pdev = adapter->pdev;
  1628. e1000_clean_rx_ring(adapter, rx_ring);
  1629. vfree(rx_ring->buffer_info);
  1630. rx_ring->buffer_info = NULL;
  1631. kfree(rx_ring->ps_page);
  1632. rx_ring->ps_page = NULL;
  1633. kfree(rx_ring->ps_page_dma);
  1634. rx_ring->ps_page_dma = NULL;
  1635. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1636. rx_ring->desc = NULL;
  1637. }
  1638. /**
  1639. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1640. * @adapter: board private structure
  1641. *
  1642. * Free all receive software resources
  1643. **/
  1644. void
  1645. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1646. {
  1647. int i;
  1648. for (i = 0; i < adapter->num_rx_queues; i++)
  1649. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1650. }
  1651. /**
  1652. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1653. * @adapter: board private structure
  1654. * @rx_ring: ring to free buffers from
  1655. **/
  1656. static void
  1657. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1658. struct e1000_rx_ring *rx_ring)
  1659. {
  1660. struct e1000_buffer *buffer_info;
  1661. struct e1000_ps_page *ps_page;
  1662. struct e1000_ps_page_dma *ps_page_dma;
  1663. struct pci_dev *pdev = adapter->pdev;
  1664. unsigned long size;
  1665. unsigned int i, j;
  1666. /* Free all the Rx ring sk_buffs */
  1667. for (i = 0; i < rx_ring->count; i++) {
  1668. buffer_info = &rx_ring->buffer_info[i];
  1669. if (buffer_info->skb) {
  1670. pci_unmap_single(pdev,
  1671. buffer_info->dma,
  1672. buffer_info->length,
  1673. PCI_DMA_FROMDEVICE);
  1674. dev_kfree_skb(buffer_info->skb);
  1675. buffer_info->skb = NULL;
  1676. }
  1677. ps_page = &rx_ring->ps_page[i];
  1678. ps_page_dma = &rx_ring->ps_page_dma[i];
  1679. for (j = 0; j < adapter->rx_ps_pages; j++) {
  1680. if (!ps_page->ps_page[j]) break;
  1681. pci_unmap_page(pdev,
  1682. ps_page_dma->ps_page_dma[j],
  1683. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1684. ps_page_dma->ps_page_dma[j] = 0;
  1685. put_page(ps_page->ps_page[j]);
  1686. ps_page->ps_page[j] = NULL;
  1687. }
  1688. }
  1689. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1690. memset(rx_ring->buffer_info, 0, size);
  1691. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1692. memset(rx_ring->ps_page, 0, size);
  1693. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1694. memset(rx_ring->ps_page_dma, 0, size);
  1695. /* Zero out the descriptor ring */
  1696. memset(rx_ring->desc, 0, rx_ring->size);
  1697. rx_ring->next_to_clean = 0;
  1698. rx_ring->next_to_use = 0;
  1699. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1700. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1701. }
  1702. /**
  1703. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1704. * @adapter: board private structure
  1705. **/
  1706. static void
  1707. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1708. {
  1709. int i;
  1710. for (i = 0; i < adapter->num_rx_queues; i++)
  1711. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1712. }
  1713. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1714. * and memory write and invalidate disabled for certain operations
  1715. */
  1716. static void
  1717. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1718. {
  1719. struct net_device *netdev = adapter->netdev;
  1720. uint32_t rctl;
  1721. e1000_pci_clear_mwi(&adapter->hw);
  1722. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1723. rctl |= E1000_RCTL_RST;
  1724. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1725. E1000_WRITE_FLUSH(&adapter->hw);
  1726. mdelay(5);
  1727. if (netif_running(netdev))
  1728. e1000_clean_all_rx_rings(adapter);
  1729. }
  1730. static void
  1731. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1732. {
  1733. struct net_device *netdev = adapter->netdev;
  1734. uint32_t rctl;
  1735. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1736. rctl &= ~E1000_RCTL_RST;
  1737. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1738. E1000_WRITE_FLUSH(&adapter->hw);
  1739. mdelay(5);
  1740. if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1741. e1000_pci_set_mwi(&adapter->hw);
  1742. if (netif_running(netdev)) {
  1743. /* No need to loop, because 82542 supports only 1 queue */
  1744. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  1745. e1000_configure_rx(adapter);
  1746. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  1747. }
  1748. }
  1749. /**
  1750. * e1000_set_mac - Change the Ethernet Address of the NIC
  1751. * @netdev: network interface device structure
  1752. * @p: pointer to an address structure
  1753. *
  1754. * Returns 0 on success, negative on failure
  1755. **/
  1756. static int
  1757. e1000_set_mac(struct net_device *netdev, void *p)
  1758. {
  1759. struct e1000_adapter *adapter = netdev_priv(netdev);
  1760. struct sockaddr *addr = p;
  1761. if (!is_valid_ether_addr(addr->sa_data))
  1762. return -EADDRNOTAVAIL;
  1763. /* 82542 2.0 needs to be in reset to write receive address registers */
  1764. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1765. e1000_enter_82542_rst(adapter);
  1766. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1767. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1768. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1769. /* With 82571 controllers, LAA may be overwritten (with the default)
  1770. * due to controller reset from the other port. */
  1771. if (adapter->hw.mac_type == e1000_82571) {
  1772. /* activate the work around */
  1773. adapter->hw.laa_is_present = 1;
  1774. /* Hold a copy of the LAA in RAR[14] This is done so that
  1775. * between the time RAR[0] gets clobbered and the time it
  1776. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1777. * of the RARs and no incoming packets directed to this port
  1778. * are dropped. Eventaully the LAA will be in RAR[0] and
  1779. * RAR[14] */
  1780. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1781. E1000_RAR_ENTRIES - 1);
  1782. }
  1783. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1784. e1000_leave_82542_rst(adapter);
  1785. return 0;
  1786. }
  1787. /**
  1788. * e1000_set_multi - Multicast and Promiscuous mode set
  1789. * @netdev: network interface device structure
  1790. *
  1791. * The set_multi entry point is called whenever the multicast address
  1792. * list or the network interface flags are updated. This routine is
  1793. * responsible for configuring the hardware for proper multicast,
  1794. * promiscuous mode, and all-multi behavior.
  1795. **/
  1796. static void
  1797. e1000_set_multi(struct net_device *netdev)
  1798. {
  1799. struct e1000_adapter *adapter = netdev_priv(netdev);
  1800. struct e1000_hw *hw = &adapter->hw;
  1801. struct dev_mc_list *mc_ptr;
  1802. uint32_t rctl;
  1803. uint32_t hash_value;
  1804. int i, rar_entries = E1000_RAR_ENTRIES;
  1805. /* reserve RAR[14] for LAA over-write work-around */
  1806. if (adapter->hw.mac_type == e1000_82571)
  1807. rar_entries--;
  1808. /* Check for Promiscuous and All Multicast modes */
  1809. rctl = E1000_READ_REG(hw, RCTL);
  1810. if (netdev->flags & IFF_PROMISC) {
  1811. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1812. } else if (netdev->flags & IFF_ALLMULTI) {
  1813. rctl |= E1000_RCTL_MPE;
  1814. rctl &= ~E1000_RCTL_UPE;
  1815. } else {
  1816. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1817. }
  1818. E1000_WRITE_REG(hw, RCTL, rctl);
  1819. /* 82542 2.0 needs to be in reset to write receive address registers */
  1820. if (hw->mac_type == e1000_82542_rev2_0)
  1821. e1000_enter_82542_rst(adapter);
  1822. /* load the first 14 multicast address into the exact filters 1-14
  1823. * RAR 0 is used for the station MAC adddress
  1824. * if there are not 14 addresses, go ahead and clear the filters
  1825. * -- with 82571 controllers only 0-13 entries are filled here
  1826. */
  1827. mc_ptr = netdev->mc_list;
  1828. for (i = 1; i < rar_entries; i++) {
  1829. if (mc_ptr) {
  1830. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1831. mc_ptr = mc_ptr->next;
  1832. } else {
  1833. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1834. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1835. }
  1836. }
  1837. /* clear the old settings from the multicast hash table */
  1838. for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
  1839. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1840. /* load any remaining addresses into the hash table */
  1841. for (; mc_ptr; mc_ptr = mc_ptr->next) {
  1842. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1843. e1000_mta_set(hw, hash_value);
  1844. }
  1845. if (hw->mac_type == e1000_82542_rev2_0)
  1846. e1000_leave_82542_rst(adapter);
  1847. }
  1848. /* Need to wait a few seconds after link up to get diagnostic information from
  1849. * the phy */
  1850. static void
  1851. e1000_update_phy_info(unsigned long data)
  1852. {
  1853. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1854. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1855. }
  1856. /**
  1857. * e1000_82547_tx_fifo_stall - Timer Call-back
  1858. * @data: pointer to adapter cast into an unsigned long
  1859. **/
  1860. static void
  1861. e1000_82547_tx_fifo_stall(unsigned long data)
  1862. {
  1863. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1864. struct net_device *netdev = adapter->netdev;
  1865. uint32_t tctl;
  1866. if (atomic_read(&adapter->tx_fifo_stall)) {
  1867. if ((E1000_READ_REG(&adapter->hw, TDT) ==
  1868. E1000_READ_REG(&adapter->hw, TDH)) &&
  1869. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1870. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1871. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1872. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1873. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1874. E1000_WRITE_REG(&adapter->hw, TCTL,
  1875. tctl & ~E1000_TCTL_EN);
  1876. E1000_WRITE_REG(&adapter->hw, TDFT,
  1877. adapter->tx_head_addr);
  1878. E1000_WRITE_REG(&adapter->hw, TDFH,
  1879. adapter->tx_head_addr);
  1880. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1881. adapter->tx_head_addr);
  1882. E1000_WRITE_REG(&adapter->hw, TDFHS,
  1883. adapter->tx_head_addr);
  1884. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1885. E1000_WRITE_FLUSH(&adapter->hw);
  1886. adapter->tx_fifo_head = 0;
  1887. atomic_set(&adapter->tx_fifo_stall, 0);
  1888. netif_wake_queue(netdev);
  1889. } else {
  1890. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  1891. }
  1892. }
  1893. }
  1894. /**
  1895. * e1000_watchdog - Timer Call-back
  1896. * @data: pointer to adapter cast into an unsigned long
  1897. **/
  1898. static void
  1899. e1000_watchdog(unsigned long data)
  1900. {
  1901. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1902. struct net_device *netdev = adapter->netdev;
  1903. struct e1000_tx_ring *txdr = adapter->tx_ring;
  1904. uint32_t link, tctl;
  1905. e1000_check_for_link(&adapter->hw);
  1906. if (adapter->hw.mac_type == e1000_82573) {
  1907. e1000_enable_tx_pkt_filtering(&adapter->hw);
  1908. if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  1909. e1000_update_mng_vlan(adapter);
  1910. }
  1911. if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  1912. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  1913. link = !adapter->hw.serdes_link_down;
  1914. else
  1915. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  1916. if (link) {
  1917. if (!netif_carrier_ok(netdev)) {
  1918. boolean_t txb2b = 1;
  1919. e1000_get_speed_and_duplex(&adapter->hw,
  1920. &adapter->link_speed,
  1921. &adapter->link_duplex);
  1922. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  1923. adapter->link_speed,
  1924. adapter->link_duplex == FULL_DUPLEX ?
  1925. "Full Duplex" : "Half Duplex");
  1926. /* tweak tx_queue_len according to speed/duplex
  1927. * and adjust the timeout factor */
  1928. netdev->tx_queue_len = adapter->tx_queue_len;
  1929. adapter->tx_timeout_factor = 1;
  1930. switch (adapter->link_speed) {
  1931. case SPEED_10:
  1932. txb2b = 0;
  1933. netdev->tx_queue_len = 10;
  1934. adapter->tx_timeout_factor = 8;
  1935. break;
  1936. case SPEED_100:
  1937. txb2b = 0;
  1938. netdev->tx_queue_len = 100;
  1939. /* maybe add some timeout factor ? */
  1940. break;
  1941. }
  1942. if ((adapter->hw.mac_type == e1000_82571 ||
  1943. adapter->hw.mac_type == e1000_82572) &&
  1944. txb2b == 0) {
  1945. #define SPEED_MODE_BIT (1 << 21)
  1946. uint32_t tarc0;
  1947. tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
  1948. tarc0 &= ~SPEED_MODE_BIT;
  1949. E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
  1950. }
  1951. #ifdef NETIF_F_TSO
  1952. /* disable TSO for pcie and 10/100 speeds, to avoid
  1953. * some hardware issues */
  1954. if (!adapter->tso_force &&
  1955. adapter->hw.bus_type == e1000_bus_type_pci_express){
  1956. switch (adapter->link_speed) {
  1957. case SPEED_10:
  1958. case SPEED_100:
  1959. DPRINTK(PROBE,INFO,
  1960. "10/100 speed: disabling TSO\n");
  1961. netdev->features &= ~NETIF_F_TSO;
  1962. break;
  1963. case SPEED_1000:
  1964. netdev->features |= NETIF_F_TSO;
  1965. break;
  1966. default:
  1967. /* oops */
  1968. break;
  1969. }
  1970. }
  1971. #endif
  1972. /* enable transmits in the hardware, need to do this
  1973. * after setting TARC0 */
  1974. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1975. tctl |= E1000_TCTL_EN;
  1976. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1977. netif_carrier_on(netdev);
  1978. netif_wake_queue(netdev);
  1979. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1980. adapter->smartspeed = 0;
  1981. }
  1982. } else {
  1983. if (netif_carrier_ok(netdev)) {
  1984. adapter->link_speed = 0;
  1985. adapter->link_duplex = 0;
  1986. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  1987. netif_carrier_off(netdev);
  1988. netif_stop_queue(netdev);
  1989. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1990. /* 80003ES2LAN workaround--
  1991. * For packet buffer work-around on link down event;
  1992. * disable receives in the ISR and
  1993. * reset device here in the watchdog
  1994. */
  1995. if (adapter->hw.mac_type == e1000_80003es2lan) {
  1996. /* reset device */
  1997. schedule_work(&adapter->reset_task);
  1998. }
  1999. }
  2000. e1000_smartspeed(adapter);
  2001. }
  2002. e1000_update_stats(adapter);
  2003. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  2004. adapter->tpt_old = adapter->stats.tpt;
  2005. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  2006. adapter->colc_old = adapter->stats.colc;
  2007. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  2008. adapter->gorcl_old = adapter->stats.gorcl;
  2009. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  2010. adapter->gotcl_old = adapter->stats.gotcl;
  2011. e1000_update_adaptive(&adapter->hw);
  2012. if (!netif_carrier_ok(netdev)) {
  2013. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  2014. /* We've lost link, so the controller stops DMA,
  2015. * but we've got queued Tx work that's never going
  2016. * to get done, so reset controller to flush Tx.
  2017. * (Do the reset outside of interrupt context). */
  2018. adapter->tx_timeout_count++;
  2019. schedule_work(&adapter->reset_task);
  2020. }
  2021. }
  2022. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  2023. if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  2024. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  2025. * asymmetrical Tx or Rx gets ITR=8000; everyone
  2026. * else is between 2000-8000. */
  2027. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  2028. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  2029. adapter->gotcl - adapter->gorcl :
  2030. adapter->gorcl - adapter->gotcl) / 10000;
  2031. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  2032. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  2033. }
  2034. /* Cause software interrupt to ensure rx ring is cleaned */
  2035. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  2036. /* Force detection of hung controller every watchdog period */
  2037. adapter->detect_tx_hung = TRUE;
  2038. /* With 82571 controllers, LAA may be overwritten due to controller
  2039. * reset from the other port. Set the appropriate LAA in RAR[0] */
  2040. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  2041. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  2042. /* Reset the timer */
  2043. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  2044. }
  2045. #define E1000_TX_FLAGS_CSUM 0x00000001
  2046. #define E1000_TX_FLAGS_VLAN 0x00000002
  2047. #define E1000_TX_FLAGS_TSO 0x00000004
  2048. #define E1000_TX_FLAGS_IPV4 0x00000008
  2049. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2050. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2051. static int
  2052. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2053. struct sk_buff *skb)
  2054. {
  2055. #ifdef NETIF_F_TSO
  2056. struct e1000_context_desc *context_desc;
  2057. struct e1000_buffer *buffer_info;
  2058. unsigned int i;
  2059. uint32_t cmd_length = 0;
  2060. uint16_t ipcse = 0, tucse, mss;
  2061. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  2062. int err;
  2063. if (skb_shinfo(skb)->tso_size) {
  2064. if (skb_header_cloned(skb)) {
  2065. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2066. if (err)
  2067. return err;
  2068. }
  2069. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2070. mss = skb_shinfo(skb)->tso_size;
  2071. if (skb->protocol == htons(ETH_P_IP)) {
  2072. skb->nh.iph->tot_len = 0;
  2073. skb->nh.iph->check = 0;
  2074. skb->h.th->check =
  2075. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  2076. skb->nh.iph->daddr,
  2077. 0,
  2078. IPPROTO_TCP,
  2079. 0);
  2080. cmd_length = E1000_TXD_CMD_IP;
  2081. ipcse = skb->h.raw - skb->data - 1;
  2082. #ifdef NETIF_F_TSO_IPV6
  2083. } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
  2084. skb->nh.ipv6h->payload_len = 0;
  2085. skb->h.th->check =
  2086. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  2087. &skb->nh.ipv6h->daddr,
  2088. 0,
  2089. IPPROTO_TCP,
  2090. 0);
  2091. ipcse = 0;
  2092. #endif
  2093. }
  2094. ipcss = skb->nh.raw - skb->data;
  2095. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  2096. tucss = skb->h.raw - skb->data;
  2097. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  2098. tucse = 0;
  2099. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2100. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2101. i = tx_ring->next_to_use;
  2102. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2103. buffer_info = &tx_ring->buffer_info[i];
  2104. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2105. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2106. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2107. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2108. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2109. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2110. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2111. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2112. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2113. buffer_info->time_stamp = jiffies;
  2114. if (++i == tx_ring->count) i = 0;
  2115. tx_ring->next_to_use = i;
  2116. return TRUE;
  2117. }
  2118. #endif
  2119. return FALSE;
  2120. }
  2121. static boolean_t
  2122. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2123. struct sk_buff *skb)
  2124. {
  2125. struct e1000_context_desc *context_desc;
  2126. struct e1000_buffer *buffer_info;
  2127. unsigned int i;
  2128. uint8_t css;
  2129. if (likely(skb->ip_summed == CHECKSUM_HW)) {
  2130. css = skb->h.raw - skb->data;
  2131. i = tx_ring->next_to_use;
  2132. buffer_info = &tx_ring->buffer_info[i];
  2133. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2134. context_desc->upper_setup.tcp_fields.tucss = css;
  2135. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  2136. context_desc->upper_setup.tcp_fields.tucse = 0;
  2137. context_desc->tcp_seg_setup.data = 0;
  2138. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2139. buffer_info->time_stamp = jiffies;
  2140. if (unlikely(++i == tx_ring->count)) i = 0;
  2141. tx_ring->next_to_use = i;
  2142. return TRUE;
  2143. }
  2144. return FALSE;
  2145. }
  2146. #define E1000_MAX_TXD_PWR 12
  2147. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2148. static int
  2149. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2150. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2151. unsigned int nr_frags, unsigned int mss)
  2152. {
  2153. struct e1000_buffer *buffer_info;
  2154. unsigned int len = skb->len;
  2155. unsigned int offset = 0, size, count = 0, i;
  2156. unsigned int f;
  2157. len -= skb->data_len;
  2158. i = tx_ring->next_to_use;
  2159. while (len) {
  2160. buffer_info = &tx_ring->buffer_info[i];
  2161. size = min(len, max_per_txd);
  2162. #ifdef NETIF_F_TSO
  2163. /* Workaround for Controller erratum --
  2164. * descriptor for non-tso packet in a linear SKB that follows a
  2165. * tso gets written back prematurely before the data is fully
  2166. * DMA'd to the controller */
  2167. if (!skb->data_len && tx_ring->last_tx_tso &&
  2168. !skb_shinfo(skb)->tso_size) {
  2169. tx_ring->last_tx_tso = 0;
  2170. size -= 4;
  2171. }
  2172. /* Workaround for premature desc write-backs
  2173. * in TSO mode. Append 4-byte sentinel desc */
  2174. if (unlikely(mss && !nr_frags && size == len && size > 8))
  2175. size -= 4;
  2176. #endif
  2177. /* work-around for errata 10 and it applies
  2178. * to all controllers in PCI-X mode
  2179. * The fix is to make sure that the first descriptor of a
  2180. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2181. */
  2182. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2183. (size > 2015) && count == 0))
  2184. size = 2015;
  2185. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2186. * terminating buffers within evenly-aligned dwords. */
  2187. if (unlikely(adapter->pcix_82544 &&
  2188. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2189. size > 4))
  2190. size -= 4;
  2191. buffer_info->length = size;
  2192. buffer_info->dma =
  2193. pci_map_single(adapter->pdev,
  2194. skb->data + offset,
  2195. size,
  2196. PCI_DMA_TODEVICE);
  2197. buffer_info->time_stamp = jiffies;
  2198. len -= size;
  2199. offset += size;
  2200. count++;
  2201. if (unlikely(++i == tx_ring->count)) i = 0;
  2202. }
  2203. for (f = 0; f < nr_frags; f++) {
  2204. struct skb_frag_struct *frag;
  2205. frag = &skb_shinfo(skb)->frags[f];
  2206. len = frag->size;
  2207. offset = frag->page_offset;
  2208. while (len) {
  2209. buffer_info = &tx_ring->buffer_info[i];
  2210. size = min(len, max_per_txd);
  2211. #ifdef NETIF_F_TSO
  2212. /* Workaround for premature desc write-backs
  2213. * in TSO mode. Append 4-byte sentinel desc */
  2214. if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2215. size -= 4;
  2216. #endif
  2217. /* Workaround for potential 82544 hang in PCI-X.
  2218. * Avoid terminating buffers within evenly-aligned
  2219. * dwords. */
  2220. if (unlikely(adapter->pcix_82544 &&
  2221. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2222. size > 4))
  2223. size -= 4;
  2224. buffer_info->length = size;
  2225. buffer_info->dma =
  2226. pci_map_page(adapter->pdev,
  2227. frag->page,
  2228. offset,
  2229. size,
  2230. PCI_DMA_TODEVICE);
  2231. buffer_info->time_stamp = jiffies;
  2232. len -= size;
  2233. offset += size;
  2234. count++;
  2235. if (unlikely(++i == tx_ring->count)) i = 0;
  2236. }
  2237. }
  2238. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2239. tx_ring->buffer_info[i].skb = skb;
  2240. tx_ring->buffer_info[first].next_to_watch = i;
  2241. return count;
  2242. }
  2243. static void
  2244. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2245. int tx_flags, int count)
  2246. {
  2247. struct e1000_tx_desc *tx_desc = NULL;
  2248. struct e1000_buffer *buffer_info;
  2249. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2250. unsigned int i;
  2251. if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2252. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2253. E1000_TXD_CMD_TSE;
  2254. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2255. if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2256. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2257. }
  2258. if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2259. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2260. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2261. }
  2262. if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2263. txd_lower |= E1000_TXD_CMD_VLE;
  2264. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2265. }
  2266. i = tx_ring->next_to_use;
  2267. while (count--) {
  2268. buffer_info = &tx_ring->buffer_info[i];
  2269. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2270. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2271. tx_desc->lower.data =
  2272. cpu_to_le32(txd_lower | buffer_info->length);
  2273. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2274. if (unlikely(++i == tx_ring->count)) i = 0;
  2275. }
  2276. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2277. /* Force memory writes to complete before letting h/w
  2278. * know there are new descriptors to fetch. (Only
  2279. * applicable for weak-ordered memory model archs,
  2280. * such as IA-64). */
  2281. wmb();
  2282. tx_ring->next_to_use = i;
  2283. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2284. }
  2285. /**
  2286. * 82547 workaround to avoid controller hang in half-duplex environment.
  2287. * The workaround is to avoid queuing a large packet that would span
  2288. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2289. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2290. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2291. * to the beginning of the Tx FIFO.
  2292. **/
  2293. #define E1000_FIFO_HDR 0x10
  2294. #define E1000_82547_PAD_LEN 0x3E0
  2295. static int
  2296. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2297. {
  2298. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2299. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2300. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2301. if (adapter->link_duplex != HALF_DUPLEX)
  2302. goto no_fifo_stall_required;
  2303. if (atomic_read(&adapter->tx_fifo_stall))
  2304. return 1;
  2305. if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2306. atomic_set(&adapter->tx_fifo_stall, 1);
  2307. return 1;
  2308. }
  2309. no_fifo_stall_required:
  2310. adapter->tx_fifo_head += skb_fifo_len;
  2311. if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2312. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2313. return 0;
  2314. }
  2315. #define MINIMUM_DHCP_PACKET_SIZE 282
  2316. static int
  2317. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2318. {
  2319. struct e1000_hw *hw = &adapter->hw;
  2320. uint16_t length, offset;
  2321. if (vlan_tx_tag_present(skb)) {
  2322. if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2323. ( adapter->hw.mng_cookie.status &
  2324. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2325. return 0;
  2326. }
  2327. if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
  2328. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2329. if ((htons(ETH_P_IP) == eth->h_proto)) {
  2330. const struct iphdr *ip =
  2331. (struct iphdr *)((uint8_t *)skb->data+14);
  2332. if (IPPROTO_UDP == ip->protocol) {
  2333. struct udphdr *udp =
  2334. (struct udphdr *)((uint8_t *)ip +
  2335. (ip->ihl << 2));
  2336. if (ntohs(udp->dest) == 67) {
  2337. offset = (uint8_t *)udp + 8 - skb->data;
  2338. length = skb->len - offset;
  2339. return e1000_mng_write_dhcp_info(hw,
  2340. (uint8_t *)udp + 8,
  2341. length);
  2342. }
  2343. }
  2344. }
  2345. }
  2346. return 0;
  2347. }
  2348. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2349. static int
  2350. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2351. {
  2352. struct e1000_adapter *adapter = netdev_priv(netdev);
  2353. struct e1000_tx_ring *tx_ring;
  2354. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2355. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2356. unsigned int tx_flags = 0;
  2357. unsigned int len = skb->len;
  2358. unsigned long flags;
  2359. unsigned int nr_frags = 0;
  2360. unsigned int mss = 0;
  2361. int count = 0;
  2362. int tso;
  2363. unsigned int f;
  2364. len -= skb->data_len;
  2365. tx_ring = adapter->tx_ring;
  2366. if (unlikely(skb->len <= 0)) {
  2367. dev_kfree_skb_any(skb);
  2368. return NETDEV_TX_OK;
  2369. }
  2370. #ifdef NETIF_F_TSO
  2371. mss = skb_shinfo(skb)->tso_size;
  2372. /* The controller does a simple calculation to
  2373. * make sure there is enough room in the FIFO before
  2374. * initiating the DMA for each buffer. The calc is:
  2375. * 4 = ceil(buffer len/mss). To make sure we don't
  2376. * overrun the FIFO, adjust the max buffer len if mss
  2377. * drops. */
  2378. if (mss) {
  2379. uint8_t hdr_len;
  2380. max_per_txd = min(mss << 2, max_per_txd);
  2381. max_txd_pwr = fls(max_per_txd) - 1;
  2382. /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
  2383. * points to just header, pull a few bytes of payload from
  2384. * frags into skb->data */
  2385. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2386. if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
  2387. switch (adapter->hw.mac_type) {
  2388. unsigned int pull_size;
  2389. case e1000_82571:
  2390. case e1000_82572:
  2391. case e1000_82573:
  2392. pull_size = min((unsigned int)4, skb->data_len);
  2393. if (!__pskb_pull_tail(skb, pull_size)) {
  2394. printk(KERN_ERR
  2395. "__pskb_pull_tail failed.\n");
  2396. dev_kfree_skb_any(skb);
  2397. return NETDEV_TX_OK;
  2398. }
  2399. len = skb->len - skb->data_len;
  2400. break;
  2401. default:
  2402. /* do nothing */
  2403. break;
  2404. }
  2405. }
  2406. }
  2407. /* reserve a descriptor for the offload context */
  2408. if ((mss) || (skb->ip_summed == CHECKSUM_HW))
  2409. count++;
  2410. count++;
  2411. #else
  2412. if (skb->ip_summed == CHECKSUM_HW)
  2413. count++;
  2414. #endif
  2415. #ifdef NETIF_F_TSO
  2416. /* Controller Erratum workaround */
  2417. if (!skb->data_len && tx_ring->last_tx_tso &&
  2418. !skb_shinfo(skb)->tso_size)
  2419. count++;
  2420. #endif
  2421. count += TXD_USE_COUNT(len, max_txd_pwr);
  2422. if (adapter->pcix_82544)
  2423. count++;
  2424. /* work-around for errata 10 and it applies to all controllers
  2425. * in PCI-X mode, so add one more descriptor to the count
  2426. */
  2427. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2428. (len > 2015)))
  2429. count++;
  2430. nr_frags = skb_shinfo(skb)->nr_frags;
  2431. for (f = 0; f < nr_frags; f++)
  2432. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2433. max_txd_pwr);
  2434. if (adapter->pcix_82544)
  2435. count += nr_frags;
  2436. if (adapter->hw.tx_pkt_filtering &&
  2437. (adapter->hw.mac_type == e1000_82573))
  2438. e1000_transfer_dhcp_info(adapter, skb);
  2439. local_irq_save(flags);
  2440. if (!spin_trylock(&tx_ring->tx_lock)) {
  2441. /* Collision - tell upper layer to requeue */
  2442. local_irq_restore(flags);
  2443. return NETDEV_TX_LOCKED;
  2444. }
  2445. /* need: count + 2 desc gap to keep tail from touching
  2446. * head, otherwise try next time */
  2447. if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
  2448. netif_stop_queue(netdev);
  2449. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2450. return NETDEV_TX_BUSY;
  2451. }
  2452. if (unlikely(adapter->hw.mac_type == e1000_82547)) {
  2453. if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2454. netif_stop_queue(netdev);
  2455. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2456. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2457. return NETDEV_TX_BUSY;
  2458. }
  2459. }
  2460. if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2461. tx_flags |= E1000_TX_FLAGS_VLAN;
  2462. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2463. }
  2464. first = tx_ring->next_to_use;
  2465. tso = e1000_tso(adapter, tx_ring, skb);
  2466. if (tso < 0) {
  2467. dev_kfree_skb_any(skb);
  2468. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2469. return NETDEV_TX_OK;
  2470. }
  2471. if (likely(tso)) {
  2472. tx_ring->last_tx_tso = 1;
  2473. tx_flags |= E1000_TX_FLAGS_TSO;
  2474. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2475. tx_flags |= E1000_TX_FLAGS_CSUM;
  2476. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2477. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2478. * no longer assume, we must. */
  2479. if (likely(skb->protocol == htons(ETH_P_IP)))
  2480. tx_flags |= E1000_TX_FLAGS_IPV4;
  2481. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2482. e1000_tx_map(adapter, tx_ring, skb, first,
  2483. max_per_txd, nr_frags, mss));
  2484. netdev->trans_start = jiffies;
  2485. /* Make sure there is space in the ring for the next send. */
  2486. if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
  2487. netif_stop_queue(netdev);
  2488. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2489. return NETDEV_TX_OK;
  2490. }
  2491. /**
  2492. * e1000_tx_timeout - Respond to a Tx Hang
  2493. * @netdev: network interface device structure
  2494. **/
  2495. static void
  2496. e1000_tx_timeout(struct net_device *netdev)
  2497. {
  2498. struct e1000_adapter *adapter = netdev_priv(netdev);
  2499. /* Do the reset outside of interrupt context */
  2500. adapter->tx_timeout_count++;
  2501. schedule_work(&adapter->reset_task);
  2502. }
  2503. static void
  2504. e1000_reset_task(struct net_device *netdev)
  2505. {
  2506. struct e1000_adapter *adapter = netdev_priv(netdev);
  2507. e1000_reinit_locked(adapter);
  2508. }
  2509. /**
  2510. * e1000_get_stats - Get System Network Statistics
  2511. * @netdev: network interface device structure
  2512. *
  2513. * Returns the address of the device statistics structure.
  2514. * The statistics are actually updated from the timer callback.
  2515. **/
  2516. static struct net_device_stats *
  2517. e1000_get_stats(struct net_device *netdev)
  2518. {
  2519. struct e1000_adapter *adapter = netdev_priv(netdev);
  2520. /* only return the current stats */
  2521. return &adapter->net_stats;
  2522. }
  2523. /**
  2524. * e1000_change_mtu - Change the Maximum Transfer Unit
  2525. * @netdev: network interface device structure
  2526. * @new_mtu: new value for maximum frame size
  2527. *
  2528. * Returns 0 on success, negative on failure
  2529. **/
  2530. static int
  2531. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2532. {
  2533. struct e1000_adapter *adapter = netdev_priv(netdev);
  2534. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2535. uint16_t eeprom_data = 0;
  2536. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2537. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2538. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2539. return -EINVAL;
  2540. }
  2541. /* Adapter-specific max frame size limits. */
  2542. switch (adapter->hw.mac_type) {
  2543. case e1000_undefined ... e1000_82542_rev2_1:
  2544. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2545. DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
  2546. return -EINVAL;
  2547. }
  2548. break;
  2549. case e1000_82573:
  2550. /* only enable jumbo frames if ASPM is disabled completely
  2551. * this means both bits must be zero in 0x1A bits 3:2 */
  2552. e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
  2553. &eeprom_data);
  2554. if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
  2555. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2556. DPRINTK(PROBE, ERR,
  2557. "Jumbo Frames not supported.\n");
  2558. return -EINVAL;
  2559. }
  2560. break;
  2561. }
  2562. /* fall through to get support */
  2563. case e1000_82571:
  2564. case e1000_82572:
  2565. case e1000_80003es2lan:
  2566. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2567. if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2568. DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
  2569. return -EINVAL;
  2570. }
  2571. break;
  2572. default:
  2573. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  2574. break;
  2575. }
  2576. /* NOTE: dev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
  2577. * means we reserve 2 more, this pushes us to allocate from the next
  2578. * larger slab size
  2579. * i.e. RXBUFFER_2048 --> size-4096 slab */
  2580. if (max_frame <= E1000_RXBUFFER_256)
  2581. adapter->rx_buffer_len = E1000_RXBUFFER_256;
  2582. else if (max_frame <= E1000_RXBUFFER_512)
  2583. adapter->rx_buffer_len = E1000_RXBUFFER_512;
  2584. else if (max_frame <= E1000_RXBUFFER_1024)
  2585. adapter->rx_buffer_len = E1000_RXBUFFER_1024;
  2586. else if (max_frame <= E1000_RXBUFFER_2048)
  2587. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2588. else if (max_frame <= E1000_RXBUFFER_4096)
  2589. adapter->rx_buffer_len = E1000_RXBUFFER_4096;
  2590. else if (max_frame <= E1000_RXBUFFER_8192)
  2591. adapter->rx_buffer_len = E1000_RXBUFFER_8192;
  2592. else if (max_frame <= E1000_RXBUFFER_16384)
  2593. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  2594. /* adjust allocation if LPE protects us, and we aren't using SBP */
  2595. #define MAXIMUM_ETHERNET_VLAN_SIZE 1522
  2596. if (!adapter->hw.tbi_compatibility_on &&
  2597. ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
  2598. (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
  2599. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  2600. netdev->mtu = new_mtu;
  2601. if (netif_running(netdev))
  2602. e1000_reinit_locked(adapter);
  2603. adapter->hw.max_frame_size = max_frame;
  2604. return 0;
  2605. }
  2606. /**
  2607. * e1000_update_stats - Update the board statistics counters
  2608. * @adapter: board private structure
  2609. **/
  2610. void
  2611. e1000_update_stats(struct e1000_adapter *adapter)
  2612. {
  2613. struct e1000_hw *hw = &adapter->hw;
  2614. struct pci_dev *pdev = adapter->pdev;
  2615. unsigned long flags;
  2616. uint16_t phy_tmp;
  2617. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2618. /*
  2619. * Prevent stats update while adapter is being reset, or if the pci
  2620. * connection is down.
  2621. */
  2622. if (adapter->link_speed == 0)
  2623. return;
  2624. if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
  2625. return;
  2626. spin_lock_irqsave(&adapter->stats_lock, flags);
  2627. /* these counters are modified from e1000_adjust_tbi_stats,
  2628. * called from the interrupt context, so they must only
  2629. * be written while holding adapter->stats_lock
  2630. */
  2631. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2632. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2633. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2634. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2635. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2636. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2637. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2638. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2639. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2640. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2641. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2642. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2643. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2644. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2645. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2646. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2647. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2648. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2649. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2650. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2651. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2652. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2653. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2654. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2655. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2656. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2657. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2658. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2659. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2660. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2661. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2662. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2663. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2664. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2665. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2666. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2667. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2668. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2669. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2670. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2671. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2672. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2673. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2674. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2675. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2676. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2677. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2678. /* used for adaptive IFS */
  2679. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2680. adapter->stats.tpt += hw->tx_packet_delta;
  2681. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2682. adapter->stats.colc += hw->collision_delta;
  2683. if (hw->mac_type >= e1000_82543) {
  2684. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2685. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2686. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2687. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2688. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2689. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2690. }
  2691. if (hw->mac_type > e1000_82547_rev_2) {
  2692. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2693. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2694. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2695. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2696. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2697. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2698. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2699. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2700. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2701. }
  2702. /* Fill out the OS statistics structure */
  2703. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2704. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2705. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2706. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2707. adapter->net_stats.multicast = adapter->stats.mprc;
  2708. adapter->net_stats.collisions = adapter->stats.colc;
  2709. /* Rx Errors */
  2710. /* RLEC on some newer hardware can be incorrect so build
  2711. * our own version based on RUC and ROC */
  2712. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2713. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2714. adapter->stats.ruc + adapter->stats.roc +
  2715. adapter->stats.cexterr;
  2716. adapter->net_stats.rx_length_errors = adapter->stats.ruc +
  2717. adapter->stats.roc;
  2718. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2719. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2720. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2721. /* Tx Errors */
  2722. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2723. adapter->stats.latecol;
  2724. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2725. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2726. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2727. /* Tx Dropped needs to be maintained elsewhere */
  2728. /* Phy Stats */
  2729. if (hw->media_type == e1000_media_type_copper) {
  2730. if ((adapter->link_speed == SPEED_1000) &&
  2731. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2732. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2733. adapter->phy_stats.idle_errors += phy_tmp;
  2734. }
  2735. if ((hw->mac_type <= e1000_82546) &&
  2736. (hw->phy_type == e1000_phy_m88) &&
  2737. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2738. adapter->phy_stats.receive_errors += phy_tmp;
  2739. }
  2740. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2741. }
  2742. /**
  2743. * e1000_intr - Interrupt Handler
  2744. * @irq: interrupt number
  2745. * @data: pointer to a network interface device structure
  2746. * @pt_regs: CPU registers structure
  2747. **/
  2748. static irqreturn_t
  2749. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2750. {
  2751. struct net_device *netdev = data;
  2752. struct e1000_adapter *adapter = netdev_priv(netdev);
  2753. struct e1000_hw *hw = &adapter->hw;
  2754. uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
  2755. #ifndef CONFIG_E1000_NAPI
  2756. int i;
  2757. #else
  2758. /* Interrupt Auto-Mask...upon reading ICR,
  2759. * interrupts are masked. No need for the
  2760. * IMC write, but it does mean we should
  2761. * account for it ASAP. */
  2762. if (likely(hw->mac_type >= e1000_82571))
  2763. atomic_inc(&adapter->irq_sem);
  2764. #endif
  2765. if (unlikely(!icr)) {
  2766. #ifdef CONFIG_E1000_NAPI
  2767. if (hw->mac_type >= e1000_82571)
  2768. e1000_irq_enable(adapter);
  2769. #endif
  2770. return IRQ_NONE; /* Not our interrupt */
  2771. }
  2772. if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2773. hw->get_link_status = 1;
  2774. /* 80003ES2LAN workaround--
  2775. * For packet buffer work-around on link down event;
  2776. * disable receives here in the ISR and
  2777. * reset adapter in watchdog
  2778. */
  2779. if (netif_carrier_ok(netdev) &&
  2780. (adapter->hw.mac_type == e1000_80003es2lan)) {
  2781. /* disable receives */
  2782. rctl = E1000_READ_REG(hw, RCTL);
  2783. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  2784. }
  2785. mod_timer(&adapter->watchdog_timer, jiffies);
  2786. }
  2787. #ifdef CONFIG_E1000_NAPI
  2788. if (unlikely(hw->mac_type < e1000_82571)) {
  2789. atomic_inc(&adapter->irq_sem);
  2790. E1000_WRITE_REG(hw, IMC, ~0);
  2791. E1000_WRITE_FLUSH(hw);
  2792. }
  2793. if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
  2794. __netif_rx_schedule(&adapter->polling_netdev[0]);
  2795. else
  2796. e1000_irq_enable(adapter);
  2797. #else
  2798. /* Writing IMC and IMS is needed for 82547.
  2799. * Due to Hub Link bus being occupied, an interrupt
  2800. * de-assertion message is not able to be sent.
  2801. * When an interrupt assertion message is generated later,
  2802. * two messages are re-ordered and sent out.
  2803. * That causes APIC to think 82547 is in de-assertion
  2804. * state, while 82547 is in assertion state, resulting
  2805. * in dead lock. Writing IMC forces 82547 into
  2806. * de-assertion state.
  2807. */
  2808. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
  2809. atomic_inc(&adapter->irq_sem);
  2810. E1000_WRITE_REG(hw, IMC, ~0);
  2811. }
  2812. for (i = 0; i < E1000_MAX_INTR; i++)
  2813. if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2814. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2815. break;
  2816. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2817. e1000_irq_enable(adapter);
  2818. #endif
  2819. return IRQ_HANDLED;
  2820. }
  2821. #ifdef CONFIG_E1000_NAPI
  2822. /**
  2823. * e1000_clean - NAPI Rx polling callback
  2824. * @adapter: board private structure
  2825. **/
  2826. static int
  2827. e1000_clean(struct net_device *poll_dev, int *budget)
  2828. {
  2829. struct e1000_adapter *adapter;
  2830. int work_to_do = min(*budget, poll_dev->quota);
  2831. int tx_cleaned = 0, i = 0, work_done = 0;
  2832. /* Must NOT use netdev_priv macro here. */
  2833. adapter = poll_dev->priv;
  2834. /* Keep link state information with original netdev */
  2835. if (!netif_carrier_ok(adapter->netdev))
  2836. goto quit_polling;
  2837. while (poll_dev != &adapter->polling_netdev[i]) {
  2838. i++;
  2839. BUG_ON(i == adapter->num_rx_queues);
  2840. }
  2841. if (likely(adapter->num_tx_queues == 1)) {
  2842. /* e1000_clean is called per-cpu. This lock protects
  2843. * tx_ring[0] from being cleaned by multiple cpus
  2844. * simultaneously. A failure obtaining the lock means
  2845. * tx_ring[0] is currently being cleaned anyway. */
  2846. if (spin_trylock(&adapter->tx_queue_lock)) {
  2847. tx_cleaned = e1000_clean_tx_irq(adapter,
  2848. &adapter->tx_ring[0]);
  2849. spin_unlock(&adapter->tx_queue_lock);
  2850. }
  2851. } else
  2852. tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
  2853. adapter->clean_rx(adapter, &adapter->rx_ring[i],
  2854. &work_done, work_to_do);
  2855. *budget -= work_done;
  2856. poll_dev->quota -= work_done;
  2857. /* If no Tx and not enough Rx work done, exit the polling mode */
  2858. if ((!tx_cleaned && (work_done == 0)) ||
  2859. !netif_running(adapter->netdev)) {
  2860. quit_polling:
  2861. netif_rx_complete(poll_dev);
  2862. e1000_irq_enable(adapter);
  2863. return 0;
  2864. }
  2865. return 1;
  2866. }
  2867. #endif
  2868. /**
  2869. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2870. * @adapter: board private structure
  2871. **/
  2872. static boolean_t
  2873. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  2874. struct e1000_tx_ring *tx_ring)
  2875. {
  2876. struct net_device *netdev = adapter->netdev;
  2877. struct e1000_tx_desc *tx_desc, *eop_desc;
  2878. struct e1000_buffer *buffer_info;
  2879. unsigned int i, eop;
  2880. #ifdef CONFIG_E1000_NAPI
  2881. unsigned int count = 0;
  2882. #endif
  2883. boolean_t cleaned = FALSE;
  2884. i = tx_ring->next_to_clean;
  2885. eop = tx_ring->buffer_info[i].next_to_watch;
  2886. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2887. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2888. for (cleaned = FALSE; !cleaned; ) {
  2889. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2890. buffer_info = &tx_ring->buffer_info[i];
  2891. cleaned = (i == eop);
  2892. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  2893. memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
  2894. if (unlikely(++i == tx_ring->count)) i = 0;
  2895. }
  2896. eop = tx_ring->buffer_info[i].next_to_watch;
  2897. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2898. #ifdef CONFIG_E1000_NAPI
  2899. #define E1000_TX_WEIGHT 64
  2900. /* weight of a sort for tx, to avoid endless transmit cleanup */
  2901. if (count++ == E1000_TX_WEIGHT) break;
  2902. #endif
  2903. }
  2904. tx_ring->next_to_clean = i;
  2905. #define TX_WAKE_THRESHOLD 32
  2906. if (unlikely(cleaned && netif_queue_stopped(netdev) &&
  2907. netif_carrier_ok(netdev))) {
  2908. spin_lock(&tx_ring->tx_lock);
  2909. if (netif_queue_stopped(netdev) &&
  2910. (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))
  2911. netif_wake_queue(netdev);
  2912. spin_unlock(&tx_ring->tx_lock);
  2913. }
  2914. if (adapter->detect_tx_hung) {
  2915. /* Detect a transmit hang in hardware, this serializes the
  2916. * check with the clearing of time_stamp and movement of i */
  2917. adapter->detect_tx_hung = FALSE;
  2918. if (tx_ring->buffer_info[eop].dma &&
  2919. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  2920. (adapter->tx_timeout_factor * HZ))
  2921. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  2922. E1000_STATUS_TXOFF)) {
  2923. /* detected Tx unit hang */
  2924. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  2925. " Tx Queue <%lu>\n"
  2926. " TDH <%x>\n"
  2927. " TDT <%x>\n"
  2928. " next_to_use <%x>\n"
  2929. " next_to_clean <%x>\n"
  2930. "buffer_info[next_to_clean]\n"
  2931. " time_stamp <%lx>\n"
  2932. " next_to_watch <%x>\n"
  2933. " jiffies <%lx>\n"
  2934. " next_to_watch.status <%x>\n",
  2935. (unsigned long)((tx_ring - adapter->tx_ring) /
  2936. sizeof(struct e1000_tx_ring)),
  2937. readl(adapter->hw.hw_addr + tx_ring->tdh),
  2938. readl(adapter->hw.hw_addr + tx_ring->tdt),
  2939. tx_ring->next_to_use,
  2940. tx_ring->next_to_clean,
  2941. tx_ring->buffer_info[eop].time_stamp,
  2942. eop,
  2943. jiffies,
  2944. eop_desc->upper.fields.status);
  2945. netif_stop_queue(netdev);
  2946. }
  2947. }
  2948. return cleaned;
  2949. }
  2950. /**
  2951. * e1000_rx_checksum - Receive Checksum Offload for 82543
  2952. * @adapter: board private structure
  2953. * @status_err: receive descriptor status and error fields
  2954. * @csum: receive descriptor csum field
  2955. * @sk_buff: socket buffer with received data
  2956. **/
  2957. static void
  2958. e1000_rx_checksum(struct e1000_adapter *adapter,
  2959. uint32_t status_err, uint32_t csum,
  2960. struct sk_buff *skb)
  2961. {
  2962. uint16_t status = (uint16_t)status_err;
  2963. uint8_t errors = (uint8_t)(status_err >> 24);
  2964. skb->ip_summed = CHECKSUM_NONE;
  2965. /* 82543 or newer only */
  2966. if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
  2967. /* Ignore Checksum bit is set */
  2968. if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
  2969. /* TCP/UDP checksum error bit is set */
  2970. if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
  2971. /* let the stack verify checksum errors */
  2972. adapter->hw_csum_err++;
  2973. return;
  2974. }
  2975. /* TCP/UDP Checksum has not been calculated */
  2976. if (adapter->hw.mac_type <= e1000_82547_rev_2) {
  2977. if (!(status & E1000_RXD_STAT_TCPCS))
  2978. return;
  2979. } else {
  2980. if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  2981. return;
  2982. }
  2983. /* It must be a TCP or UDP packet with a valid checksum */
  2984. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  2985. /* TCP checksum is good */
  2986. skb->ip_summed = CHECKSUM_UNNECESSARY;
  2987. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2988. /* IP fragment with UDP payload */
  2989. /* Hardware complements the payload checksum, so we undo it
  2990. * and then put the value in host order for further stack use.
  2991. */
  2992. csum = ntohl(csum ^ 0xFFFF);
  2993. skb->csum = csum;
  2994. skb->ip_summed = CHECKSUM_HW;
  2995. }
  2996. adapter->hw_csum_good++;
  2997. }
  2998. /**
  2999. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  3000. * @adapter: board private structure
  3001. **/
  3002. static boolean_t
  3003. #ifdef CONFIG_E1000_NAPI
  3004. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3005. struct e1000_rx_ring *rx_ring,
  3006. int *work_done, int work_to_do)
  3007. #else
  3008. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3009. struct e1000_rx_ring *rx_ring)
  3010. #endif
  3011. {
  3012. struct net_device *netdev = adapter->netdev;
  3013. struct pci_dev *pdev = adapter->pdev;
  3014. struct e1000_rx_desc *rx_desc, *next_rxd;
  3015. struct e1000_buffer *buffer_info, *next_buffer;
  3016. unsigned long flags;
  3017. uint32_t length;
  3018. uint8_t last_byte;
  3019. unsigned int i;
  3020. int cleaned_count = 0;
  3021. boolean_t cleaned = FALSE;
  3022. i = rx_ring->next_to_clean;
  3023. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3024. buffer_info = &rx_ring->buffer_info[i];
  3025. while (rx_desc->status & E1000_RXD_STAT_DD) {
  3026. struct sk_buff *skb;
  3027. u8 status;
  3028. #ifdef CONFIG_E1000_NAPI
  3029. if (*work_done >= work_to_do)
  3030. break;
  3031. (*work_done)++;
  3032. #endif
  3033. status = rx_desc->status;
  3034. skb = buffer_info->skb;
  3035. buffer_info->skb = NULL;
  3036. prefetch(skb->data - NET_IP_ALIGN);
  3037. if (++i == rx_ring->count) i = 0;
  3038. next_rxd = E1000_RX_DESC(*rx_ring, i);
  3039. prefetch(next_rxd);
  3040. next_buffer = &rx_ring->buffer_info[i];
  3041. cleaned = TRUE;
  3042. cleaned_count++;
  3043. pci_unmap_single(pdev,
  3044. buffer_info->dma,
  3045. buffer_info->length,
  3046. PCI_DMA_FROMDEVICE);
  3047. length = le16_to_cpu(rx_desc->length);
  3048. if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
  3049. /* All receives must fit into a single buffer */
  3050. E1000_DBG("%s: Receive packet consumed multiple"
  3051. " buffers\n", netdev->name);
  3052. dev_kfree_skb_irq(skb);
  3053. goto next_desc;
  3054. }
  3055. if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  3056. last_byte = *(skb->data + length - 1);
  3057. if (TBI_ACCEPT(&adapter->hw, status,
  3058. rx_desc->errors, length, last_byte)) {
  3059. spin_lock_irqsave(&adapter->stats_lock, flags);
  3060. e1000_tbi_adjust_stats(&adapter->hw,
  3061. &adapter->stats,
  3062. length, skb->data);
  3063. spin_unlock_irqrestore(&adapter->stats_lock,
  3064. flags);
  3065. length--;
  3066. } else {
  3067. /* recycle */
  3068. buffer_info->skb = skb;
  3069. goto next_desc;
  3070. }
  3071. }
  3072. /* code added for copybreak, this should improve
  3073. * performance for small packets with large amounts
  3074. * of reassembly being done in the stack */
  3075. #define E1000_CB_LENGTH 256
  3076. if (length < E1000_CB_LENGTH) {
  3077. struct sk_buff *new_skb =
  3078. dev_alloc_skb(length + NET_IP_ALIGN);
  3079. if (new_skb) {
  3080. skb_reserve(new_skb, NET_IP_ALIGN);
  3081. new_skb->dev = netdev;
  3082. memcpy(new_skb->data - NET_IP_ALIGN,
  3083. skb->data - NET_IP_ALIGN,
  3084. length + NET_IP_ALIGN);
  3085. /* save the skb in buffer_info as good */
  3086. buffer_info->skb = skb;
  3087. skb = new_skb;
  3088. skb_put(skb, length);
  3089. }
  3090. } else
  3091. skb_put(skb, length);
  3092. /* end copybreak code */
  3093. /* Receive Checksum Offload */
  3094. e1000_rx_checksum(adapter,
  3095. (uint32_t)(status) |
  3096. ((uint32_t)(rx_desc->errors) << 24),
  3097. le16_to_cpu(rx_desc->csum), skb);
  3098. skb->protocol = eth_type_trans(skb, netdev);
  3099. #ifdef CONFIG_E1000_NAPI
  3100. if (unlikely(adapter->vlgrp &&
  3101. (status & E1000_RXD_STAT_VP))) {
  3102. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3103. le16_to_cpu(rx_desc->special) &
  3104. E1000_RXD_SPC_VLAN_MASK);
  3105. } else {
  3106. netif_receive_skb(skb);
  3107. }
  3108. #else /* CONFIG_E1000_NAPI */
  3109. if (unlikely(adapter->vlgrp &&
  3110. (status & E1000_RXD_STAT_VP))) {
  3111. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3112. le16_to_cpu(rx_desc->special) &
  3113. E1000_RXD_SPC_VLAN_MASK);
  3114. } else {
  3115. netif_rx(skb);
  3116. }
  3117. #endif /* CONFIG_E1000_NAPI */
  3118. netdev->last_rx = jiffies;
  3119. next_desc:
  3120. rx_desc->status = 0;
  3121. /* return some buffers to hardware, one at a time is too slow */
  3122. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3123. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3124. cleaned_count = 0;
  3125. }
  3126. /* use prefetched values */
  3127. rx_desc = next_rxd;
  3128. buffer_info = next_buffer;
  3129. }
  3130. rx_ring->next_to_clean = i;
  3131. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3132. if (cleaned_count)
  3133. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3134. return cleaned;
  3135. }
  3136. /**
  3137. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  3138. * @adapter: board private structure
  3139. **/
  3140. static boolean_t
  3141. #ifdef CONFIG_E1000_NAPI
  3142. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3143. struct e1000_rx_ring *rx_ring,
  3144. int *work_done, int work_to_do)
  3145. #else
  3146. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3147. struct e1000_rx_ring *rx_ring)
  3148. #endif
  3149. {
  3150. union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
  3151. struct net_device *netdev = adapter->netdev;
  3152. struct pci_dev *pdev = adapter->pdev;
  3153. struct e1000_buffer *buffer_info, *next_buffer;
  3154. struct e1000_ps_page *ps_page;
  3155. struct e1000_ps_page_dma *ps_page_dma;
  3156. struct sk_buff *skb;
  3157. unsigned int i, j;
  3158. uint32_t length, staterr;
  3159. int cleaned_count = 0;
  3160. boolean_t cleaned = FALSE;
  3161. i = rx_ring->next_to_clean;
  3162. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3163. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3164. buffer_info = &rx_ring->buffer_info[i];
  3165. while (staterr & E1000_RXD_STAT_DD) {
  3166. buffer_info = &rx_ring->buffer_info[i];
  3167. ps_page = &rx_ring->ps_page[i];
  3168. ps_page_dma = &rx_ring->ps_page_dma[i];
  3169. #ifdef CONFIG_E1000_NAPI
  3170. if (unlikely(*work_done >= work_to_do))
  3171. break;
  3172. (*work_done)++;
  3173. #endif
  3174. skb = buffer_info->skb;
  3175. /* in the packet split case this is header only */
  3176. prefetch(skb->data - NET_IP_ALIGN);
  3177. if (++i == rx_ring->count) i = 0;
  3178. next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
  3179. prefetch(next_rxd);
  3180. next_buffer = &rx_ring->buffer_info[i];
  3181. cleaned = TRUE;
  3182. cleaned_count++;
  3183. pci_unmap_single(pdev, buffer_info->dma,
  3184. buffer_info->length,
  3185. PCI_DMA_FROMDEVICE);
  3186. if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3187. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3188. " the full packet\n", netdev->name);
  3189. dev_kfree_skb_irq(skb);
  3190. goto next_desc;
  3191. }
  3192. if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3193. dev_kfree_skb_irq(skb);
  3194. goto next_desc;
  3195. }
  3196. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3197. if (unlikely(!length)) {
  3198. E1000_DBG("%s: Last part of the packet spanning"
  3199. " multiple descriptors\n", netdev->name);
  3200. dev_kfree_skb_irq(skb);
  3201. goto next_desc;
  3202. }
  3203. /* Good Receive */
  3204. skb_put(skb, length);
  3205. {
  3206. /* this looks ugly, but it seems compiler issues make it
  3207. more efficient than reusing j */
  3208. int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
  3209. /* page alloc/put takes too long and effects small packet
  3210. * throughput, so unsplit small packets and save the alloc/put*/
  3211. if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
  3212. u8 *vaddr;
  3213. /* there is no documentation about how to call
  3214. * kmap_atomic, so we can't hold the mapping
  3215. * very long */
  3216. pci_dma_sync_single_for_cpu(pdev,
  3217. ps_page_dma->ps_page_dma[0],
  3218. PAGE_SIZE,
  3219. PCI_DMA_FROMDEVICE);
  3220. vaddr = kmap_atomic(ps_page->ps_page[0],
  3221. KM_SKB_DATA_SOFTIRQ);
  3222. memcpy(skb->tail, vaddr, l1);
  3223. kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
  3224. pci_dma_sync_single_for_device(pdev,
  3225. ps_page_dma->ps_page_dma[0],
  3226. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3227. skb_put(skb, l1);
  3228. length += l1;
  3229. goto copydone;
  3230. } /* if */
  3231. }
  3232. for (j = 0; j < adapter->rx_ps_pages; j++) {
  3233. if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
  3234. break;
  3235. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3236. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3237. ps_page_dma->ps_page_dma[j] = 0;
  3238. skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
  3239. length);
  3240. ps_page->ps_page[j] = NULL;
  3241. skb->len += length;
  3242. skb->data_len += length;
  3243. skb->truesize += length;
  3244. }
  3245. copydone:
  3246. e1000_rx_checksum(adapter, staterr,
  3247. le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
  3248. skb->protocol = eth_type_trans(skb, netdev);
  3249. if (likely(rx_desc->wb.upper.header_status &
  3250. cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
  3251. adapter->rx_hdr_split++;
  3252. #ifdef CONFIG_E1000_NAPI
  3253. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3254. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3255. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3256. E1000_RXD_SPC_VLAN_MASK);
  3257. } else {
  3258. netif_receive_skb(skb);
  3259. }
  3260. #else /* CONFIG_E1000_NAPI */
  3261. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3262. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3263. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3264. E1000_RXD_SPC_VLAN_MASK);
  3265. } else {
  3266. netif_rx(skb);
  3267. }
  3268. #endif /* CONFIG_E1000_NAPI */
  3269. netdev->last_rx = jiffies;
  3270. next_desc:
  3271. rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
  3272. buffer_info->skb = NULL;
  3273. /* return some buffers to hardware, one at a time is too slow */
  3274. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3275. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3276. cleaned_count = 0;
  3277. }
  3278. /* use prefetched values */
  3279. rx_desc = next_rxd;
  3280. buffer_info = next_buffer;
  3281. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3282. }
  3283. rx_ring->next_to_clean = i;
  3284. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3285. if (cleaned_count)
  3286. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3287. return cleaned;
  3288. }
  3289. /**
  3290. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3291. * @adapter: address of board private structure
  3292. **/
  3293. static void
  3294. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3295. struct e1000_rx_ring *rx_ring,
  3296. int cleaned_count)
  3297. {
  3298. struct net_device *netdev = adapter->netdev;
  3299. struct pci_dev *pdev = adapter->pdev;
  3300. struct e1000_rx_desc *rx_desc;
  3301. struct e1000_buffer *buffer_info;
  3302. struct sk_buff *skb;
  3303. unsigned int i;
  3304. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3305. i = rx_ring->next_to_use;
  3306. buffer_info = &rx_ring->buffer_info[i];
  3307. while (cleaned_count--) {
  3308. if (!(skb = buffer_info->skb))
  3309. skb = dev_alloc_skb(bufsz);
  3310. else {
  3311. skb_trim(skb, 0);
  3312. goto map_skb;
  3313. }
  3314. if (unlikely(!skb)) {
  3315. /* Better luck next round */
  3316. adapter->alloc_rx_buff_failed++;
  3317. break;
  3318. }
  3319. /* Fix for errata 23, can't cross 64kB boundary */
  3320. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3321. struct sk_buff *oldskb = skb;
  3322. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3323. "at %p\n", bufsz, skb->data);
  3324. /* Try again, without freeing the previous */
  3325. skb = dev_alloc_skb(bufsz);
  3326. /* Failed allocation, critical failure */
  3327. if (!skb) {
  3328. dev_kfree_skb(oldskb);
  3329. break;
  3330. }
  3331. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3332. /* give up */
  3333. dev_kfree_skb(skb);
  3334. dev_kfree_skb(oldskb);
  3335. break; /* while !buffer_info->skb */
  3336. } else {
  3337. /* Use new allocation */
  3338. dev_kfree_skb(oldskb);
  3339. }
  3340. }
  3341. /* Make buffer alignment 2 beyond a 16 byte boundary
  3342. * this will result in a 16 byte aligned IP header after
  3343. * the 14 byte MAC header is removed
  3344. */
  3345. skb_reserve(skb, NET_IP_ALIGN);
  3346. skb->dev = netdev;
  3347. buffer_info->skb = skb;
  3348. buffer_info->length = adapter->rx_buffer_len;
  3349. map_skb:
  3350. buffer_info->dma = pci_map_single(pdev,
  3351. skb->data,
  3352. adapter->rx_buffer_len,
  3353. PCI_DMA_FROMDEVICE);
  3354. /* Fix for errata 23, can't cross 64kB boundary */
  3355. if (!e1000_check_64k_bound(adapter,
  3356. (void *)(unsigned long)buffer_info->dma,
  3357. adapter->rx_buffer_len)) {
  3358. DPRINTK(RX_ERR, ERR,
  3359. "dma align check failed: %u bytes at %p\n",
  3360. adapter->rx_buffer_len,
  3361. (void *)(unsigned long)buffer_info->dma);
  3362. dev_kfree_skb(skb);
  3363. buffer_info->skb = NULL;
  3364. pci_unmap_single(pdev, buffer_info->dma,
  3365. adapter->rx_buffer_len,
  3366. PCI_DMA_FROMDEVICE);
  3367. break; /* while !buffer_info->skb */
  3368. }
  3369. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3370. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3371. if (unlikely(++i == rx_ring->count))
  3372. i = 0;
  3373. buffer_info = &rx_ring->buffer_info[i];
  3374. }
  3375. if (likely(rx_ring->next_to_use != i)) {
  3376. rx_ring->next_to_use = i;
  3377. if (unlikely(i-- == 0))
  3378. i = (rx_ring->count - 1);
  3379. /* Force memory writes to complete before letting h/w
  3380. * know there are new descriptors to fetch. (Only
  3381. * applicable for weak-ordered memory model archs,
  3382. * such as IA-64). */
  3383. wmb();
  3384. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3385. }
  3386. }
  3387. /**
  3388. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3389. * @adapter: address of board private structure
  3390. **/
  3391. static void
  3392. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3393. struct e1000_rx_ring *rx_ring,
  3394. int cleaned_count)
  3395. {
  3396. struct net_device *netdev = adapter->netdev;
  3397. struct pci_dev *pdev = adapter->pdev;
  3398. union e1000_rx_desc_packet_split *rx_desc;
  3399. struct e1000_buffer *buffer_info;
  3400. struct e1000_ps_page *ps_page;
  3401. struct e1000_ps_page_dma *ps_page_dma;
  3402. struct sk_buff *skb;
  3403. unsigned int i, j;
  3404. i = rx_ring->next_to_use;
  3405. buffer_info = &rx_ring->buffer_info[i];
  3406. ps_page = &rx_ring->ps_page[i];
  3407. ps_page_dma = &rx_ring->ps_page_dma[i];
  3408. while (cleaned_count--) {
  3409. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3410. for (j = 0; j < PS_PAGE_BUFFERS; j++) {
  3411. if (j < adapter->rx_ps_pages) {
  3412. if (likely(!ps_page->ps_page[j])) {
  3413. ps_page->ps_page[j] =
  3414. alloc_page(GFP_ATOMIC);
  3415. if (unlikely(!ps_page->ps_page[j])) {
  3416. adapter->alloc_rx_buff_failed++;
  3417. goto no_buffers;
  3418. }
  3419. ps_page_dma->ps_page_dma[j] =
  3420. pci_map_page(pdev,
  3421. ps_page->ps_page[j],
  3422. 0, PAGE_SIZE,
  3423. PCI_DMA_FROMDEVICE);
  3424. }
  3425. /* Refresh the desc even if buffer_addrs didn't
  3426. * change because each write-back erases
  3427. * this info.
  3428. */
  3429. rx_desc->read.buffer_addr[j+1] =
  3430. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3431. } else
  3432. rx_desc->read.buffer_addr[j+1] = ~0;
  3433. }
  3434. skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3435. if (unlikely(!skb)) {
  3436. adapter->alloc_rx_buff_failed++;
  3437. break;
  3438. }
  3439. /* Make buffer alignment 2 beyond a 16 byte boundary
  3440. * this will result in a 16 byte aligned IP header after
  3441. * the 14 byte MAC header is removed
  3442. */
  3443. skb_reserve(skb, NET_IP_ALIGN);
  3444. skb->dev = netdev;
  3445. buffer_info->skb = skb;
  3446. buffer_info->length = adapter->rx_ps_bsize0;
  3447. buffer_info->dma = pci_map_single(pdev, skb->data,
  3448. adapter->rx_ps_bsize0,
  3449. PCI_DMA_FROMDEVICE);
  3450. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3451. if (unlikely(++i == rx_ring->count)) i = 0;
  3452. buffer_info = &rx_ring->buffer_info[i];
  3453. ps_page = &rx_ring->ps_page[i];
  3454. ps_page_dma = &rx_ring->ps_page_dma[i];
  3455. }
  3456. no_buffers:
  3457. if (likely(rx_ring->next_to_use != i)) {
  3458. rx_ring->next_to_use = i;
  3459. if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
  3460. /* Force memory writes to complete before letting h/w
  3461. * know there are new descriptors to fetch. (Only
  3462. * applicable for weak-ordered memory model archs,
  3463. * such as IA-64). */
  3464. wmb();
  3465. /* Hardware increments by 16 bytes, but packet split
  3466. * descriptors are 32 bytes...so we increment tail
  3467. * twice as much.
  3468. */
  3469. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3470. }
  3471. }
  3472. /**
  3473. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3474. * @adapter:
  3475. **/
  3476. static void
  3477. e1000_smartspeed(struct e1000_adapter *adapter)
  3478. {
  3479. uint16_t phy_status;
  3480. uint16_t phy_ctrl;
  3481. if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3482. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3483. return;
  3484. if (adapter->smartspeed == 0) {
  3485. /* If Master/Slave config fault is asserted twice,
  3486. * we assume back-to-back */
  3487. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3488. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3489. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3490. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3491. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3492. if (phy_ctrl & CR_1000T_MS_ENABLE) {
  3493. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3494. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3495. phy_ctrl);
  3496. adapter->smartspeed++;
  3497. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3498. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3499. &phy_ctrl)) {
  3500. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3501. MII_CR_RESTART_AUTO_NEG);
  3502. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3503. phy_ctrl);
  3504. }
  3505. }
  3506. return;
  3507. } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3508. /* If still no link, perhaps using 2/3 pair cable */
  3509. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3510. phy_ctrl |= CR_1000T_MS_ENABLE;
  3511. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3512. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3513. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3514. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3515. MII_CR_RESTART_AUTO_NEG);
  3516. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3517. }
  3518. }
  3519. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3520. if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3521. adapter->smartspeed = 0;
  3522. }
  3523. /**
  3524. * e1000_ioctl -
  3525. * @netdev:
  3526. * @ifreq:
  3527. * @cmd:
  3528. **/
  3529. static int
  3530. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3531. {
  3532. switch (cmd) {
  3533. case SIOCGMIIPHY:
  3534. case SIOCGMIIREG:
  3535. case SIOCSMIIREG:
  3536. return e1000_mii_ioctl(netdev, ifr, cmd);
  3537. default:
  3538. return -EOPNOTSUPP;
  3539. }
  3540. }
  3541. /**
  3542. * e1000_mii_ioctl -
  3543. * @netdev:
  3544. * @ifreq:
  3545. * @cmd:
  3546. **/
  3547. static int
  3548. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3549. {
  3550. struct e1000_adapter *adapter = netdev_priv(netdev);
  3551. struct mii_ioctl_data *data = if_mii(ifr);
  3552. int retval;
  3553. uint16_t mii_reg;
  3554. uint16_t spddplx;
  3555. unsigned long flags;
  3556. if (adapter->hw.media_type != e1000_media_type_copper)
  3557. return -EOPNOTSUPP;
  3558. switch (cmd) {
  3559. case SIOCGMIIPHY:
  3560. data->phy_id = adapter->hw.phy_addr;
  3561. break;
  3562. case SIOCGMIIREG:
  3563. if (!capable(CAP_NET_ADMIN))
  3564. return -EPERM;
  3565. spin_lock_irqsave(&adapter->stats_lock, flags);
  3566. if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3567. &data->val_out)) {
  3568. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3569. return -EIO;
  3570. }
  3571. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3572. break;
  3573. case SIOCSMIIREG:
  3574. if (!capable(CAP_NET_ADMIN))
  3575. return -EPERM;
  3576. if (data->reg_num & ~(0x1F))
  3577. return -EFAULT;
  3578. mii_reg = data->val_in;
  3579. spin_lock_irqsave(&adapter->stats_lock, flags);
  3580. if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3581. mii_reg)) {
  3582. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3583. return -EIO;
  3584. }
  3585. if (adapter->hw.media_type == e1000_media_type_copper) {
  3586. switch (data->reg_num) {
  3587. case PHY_CTRL:
  3588. if (mii_reg & MII_CR_POWER_DOWN)
  3589. break;
  3590. if (mii_reg & MII_CR_AUTO_NEG_EN) {
  3591. adapter->hw.autoneg = 1;
  3592. adapter->hw.autoneg_advertised = 0x2F;
  3593. } else {
  3594. if (mii_reg & 0x40)
  3595. spddplx = SPEED_1000;
  3596. else if (mii_reg & 0x2000)
  3597. spddplx = SPEED_100;
  3598. else
  3599. spddplx = SPEED_10;
  3600. spddplx += (mii_reg & 0x100)
  3601. ? DUPLEX_FULL :
  3602. DUPLEX_HALF;
  3603. retval = e1000_set_spd_dplx(adapter,
  3604. spddplx);
  3605. if (retval) {
  3606. spin_unlock_irqrestore(
  3607. &adapter->stats_lock,
  3608. flags);
  3609. return retval;
  3610. }
  3611. }
  3612. if (netif_running(adapter->netdev))
  3613. e1000_reinit_locked(adapter);
  3614. else
  3615. e1000_reset(adapter);
  3616. break;
  3617. case M88E1000_PHY_SPEC_CTRL:
  3618. case M88E1000_EXT_PHY_SPEC_CTRL:
  3619. if (e1000_phy_reset(&adapter->hw)) {
  3620. spin_unlock_irqrestore(
  3621. &adapter->stats_lock, flags);
  3622. return -EIO;
  3623. }
  3624. break;
  3625. }
  3626. } else {
  3627. switch (data->reg_num) {
  3628. case PHY_CTRL:
  3629. if (mii_reg & MII_CR_POWER_DOWN)
  3630. break;
  3631. if (netif_running(adapter->netdev))
  3632. e1000_reinit_locked(adapter);
  3633. else
  3634. e1000_reset(adapter);
  3635. break;
  3636. }
  3637. }
  3638. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3639. break;
  3640. default:
  3641. return -EOPNOTSUPP;
  3642. }
  3643. return E1000_SUCCESS;
  3644. }
  3645. void
  3646. e1000_pci_set_mwi(struct e1000_hw *hw)
  3647. {
  3648. struct e1000_adapter *adapter = hw->back;
  3649. int ret_val = pci_set_mwi(adapter->pdev);
  3650. if (ret_val)
  3651. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3652. }
  3653. void
  3654. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3655. {
  3656. struct e1000_adapter *adapter = hw->back;
  3657. pci_clear_mwi(adapter->pdev);
  3658. }
  3659. void
  3660. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3661. {
  3662. struct e1000_adapter *adapter = hw->back;
  3663. pci_read_config_word(adapter->pdev, reg, value);
  3664. }
  3665. void
  3666. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3667. {
  3668. struct e1000_adapter *adapter = hw->back;
  3669. pci_write_config_word(adapter->pdev, reg, *value);
  3670. }
  3671. uint32_t
  3672. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  3673. {
  3674. return inl(port);
  3675. }
  3676. void
  3677. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3678. {
  3679. outl(value, port);
  3680. }
  3681. static void
  3682. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3683. {
  3684. struct e1000_adapter *adapter = netdev_priv(netdev);
  3685. uint32_t ctrl, rctl;
  3686. e1000_irq_disable(adapter);
  3687. adapter->vlgrp = grp;
  3688. if (grp) {
  3689. /* enable VLAN tag insert/strip */
  3690. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3691. ctrl |= E1000_CTRL_VME;
  3692. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3693. /* enable VLAN receive filtering */
  3694. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3695. rctl |= E1000_RCTL_VFE;
  3696. rctl &= ~E1000_RCTL_CFIEN;
  3697. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3698. e1000_update_mng_vlan(adapter);
  3699. } else {
  3700. /* disable VLAN tag insert/strip */
  3701. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3702. ctrl &= ~E1000_CTRL_VME;
  3703. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3704. /* disable VLAN filtering */
  3705. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3706. rctl &= ~E1000_RCTL_VFE;
  3707. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3708. if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3709. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3710. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3711. }
  3712. }
  3713. e1000_irq_enable(adapter);
  3714. }
  3715. static void
  3716. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3717. {
  3718. struct e1000_adapter *adapter = netdev_priv(netdev);
  3719. uint32_t vfta, index;
  3720. if ((adapter->hw.mng_cookie.status &
  3721. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3722. (vid == adapter->mng_vlan_id))
  3723. return;
  3724. /* add VID to filter table */
  3725. index = (vid >> 5) & 0x7F;
  3726. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3727. vfta |= (1 << (vid & 0x1F));
  3728. e1000_write_vfta(&adapter->hw, index, vfta);
  3729. }
  3730. static void
  3731. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3732. {
  3733. struct e1000_adapter *adapter = netdev_priv(netdev);
  3734. uint32_t vfta, index;
  3735. e1000_irq_disable(adapter);
  3736. if (adapter->vlgrp)
  3737. adapter->vlgrp->vlan_devices[vid] = NULL;
  3738. e1000_irq_enable(adapter);
  3739. if ((adapter->hw.mng_cookie.status &
  3740. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3741. (vid == adapter->mng_vlan_id)) {
  3742. /* release control to f/w */
  3743. e1000_release_hw_control(adapter);
  3744. return;
  3745. }
  3746. /* remove VID from filter table */
  3747. index = (vid >> 5) & 0x7F;
  3748. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3749. vfta &= ~(1 << (vid & 0x1F));
  3750. e1000_write_vfta(&adapter->hw, index, vfta);
  3751. }
  3752. static void
  3753. e1000_restore_vlan(struct e1000_adapter *adapter)
  3754. {
  3755. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3756. if (adapter->vlgrp) {
  3757. uint16_t vid;
  3758. for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3759. if (!adapter->vlgrp->vlan_devices[vid])
  3760. continue;
  3761. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3762. }
  3763. }
  3764. }
  3765. int
  3766. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3767. {
  3768. adapter->hw.autoneg = 0;
  3769. /* Fiber NICs only allow 1000 gbps Full duplex */
  3770. if ((adapter->hw.media_type == e1000_media_type_fiber) &&
  3771. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3772. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3773. return -EINVAL;
  3774. }
  3775. switch (spddplx) {
  3776. case SPEED_10 + DUPLEX_HALF:
  3777. adapter->hw.forced_speed_duplex = e1000_10_half;
  3778. break;
  3779. case SPEED_10 + DUPLEX_FULL:
  3780. adapter->hw.forced_speed_duplex = e1000_10_full;
  3781. break;
  3782. case SPEED_100 + DUPLEX_HALF:
  3783. adapter->hw.forced_speed_duplex = e1000_100_half;
  3784. break;
  3785. case SPEED_100 + DUPLEX_FULL:
  3786. adapter->hw.forced_speed_duplex = e1000_100_full;
  3787. break;
  3788. case SPEED_1000 + DUPLEX_FULL:
  3789. adapter->hw.autoneg = 1;
  3790. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3791. break;
  3792. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3793. default:
  3794. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3795. return -EINVAL;
  3796. }
  3797. return 0;
  3798. }
  3799. #ifdef CONFIG_PM
  3800. /* Save/restore 16 or 64 dwords of PCI config space depending on which
  3801. * bus we're on (PCI(X) vs. PCI-E)
  3802. */
  3803. #define PCIE_CONFIG_SPACE_LEN 256
  3804. #define PCI_CONFIG_SPACE_LEN 64
  3805. static int
  3806. e1000_pci_save_state(struct e1000_adapter *adapter)
  3807. {
  3808. struct pci_dev *dev = adapter->pdev;
  3809. int size;
  3810. int i;
  3811. if (adapter->hw.mac_type >= e1000_82571)
  3812. size = PCIE_CONFIG_SPACE_LEN;
  3813. else
  3814. size = PCI_CONFIG_SPACE_LEN;
  3815. WARN_ON(adapter->config_space != NULL);
  3816. adapter->config_space = kmalloc(size, GFP_KERNEL);
  3817. if (!adapter->config_space) {
  3818. DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
  3819. return -ENOMEM;
  3820. }
  3821. for (i = 0; i < (size / 4); i++)
  3822. pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
  3823. return 0;
  3824. }
  3825. static void
  3826. e1000_pci_restore_state(struct e1000_adapter *adapter)
  3827. {
  3828. struct pci_dev *dev = adapter->pdev;
  3829. int size;
  3830. int i;
  3831. if (adapter->config_space == NULL)
  3832. return;
  3833. if (adapter->hw.mac_type >= e1000_82571)
  3834. size = PCIE_CONFIG_SPACE_LEN;
  3835. else
  3836. size = PCI_CONFIG_SPACE_LEN;
  3837. for (i = 0; i < (size / 4); i++)
  3838. pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
  3839. kfree(adapter->config_space);
  3840. adapter->config_space = NULL;
  3841. return;
  3842. }
  3843. #endif /* CONFIG_PM */
  3844. static int
  3845. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3846. {
  3847. struct net_device *netdev = pci_get_drvdata(pdev);
  3848. struct e1000_adapter *adapter = netdev_priv(netdev);
  3849. uint32_t ctrl, ctrl_ext, rctl, manc, status;
  3850. uint32_t wufc = adapter->wol;
  3851. int retval = 0;
  3852. netif_device_detach(netdev);
  3853. if (netif_running(netdev)) {
  3854. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  3855. e1000_down(adapter);
  3856. }
  3857. #ifdef CONFIG_PM
  3858. /* Implement our own version of pci_save_state(pdev) because pci-
  3859. * express adapters have 256-byte config spaces. */
  3860. retval = e1000_pci_save_state(adapter);
  3861. if (retval)
  3862. return retval;
  3863. #endif
  3864. status = E1000_READ_REG(&adapter->hw, STATUS);
  3865. if (status & E1000_STATUS_LU)
  3866. wufc &= ~E1000_WUFC_LNKC;
  3867. if (wufc) {
  3868. e1000_setup_rctl(adapter);
  3869. e1000_set_multi(netdev);
  3870. /* turn on all-multi mode if wake on multicast is enabled */
  3871. if (adapter->wol & E1000_WUFC_MC) {
  3872. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3873. rctl |= E1000_RCTL_MPE;
  3874. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3875. }
  3876. if (adapter->hw.mac_type >= e1000_82540) {
  3877. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3878. /* advertise wake from D3Cold */
  3879. #define E1000_CTRL_ADVD3WUC 0x00100000
  3880. /* phy power management enable */
  3881. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  3882. ctrl |= E1000_CTRL_ADVD3WUC |
  3883. E1000_CTRL_EN_PHY_PWR_MGMT;
  3884. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3885. }
  3886. if (adapter->hw.media_type == e1000_media_type_fiber ||
  3887. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  3888. /* keep the laser running in D3 */
  3889. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3890. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  3891. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  3892. }
  3893. /* Allow time for pending master requests to run */
  3894. e1000_disable_pciex_master(&adapter->hw);
  3895. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  3896. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  3897. pci_enable_wake(pdev, PCI_D3hot, 1);
  3898. pci_enable_wake(pdev, PCI_D3cold, 1);
  3899. } else {
  3900. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  3901. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  3902. pci_enable_wake(pdev, PCI_D3hot, 0);
  3903. pci_enable_wake(pdev, PCI_D3cold, 0);
  3904. }
  3905. if (adapter->hw.mac_type >= e1000_82540 &&
  3906. adapter->hw.media_type == e1000_media_type_copper) {
  3907. manc = E1000_READ_REG(&adapter->hw, MANC);
  3908. if (manc & E1000_MANC_SMBUS_EN) {
  3909. manc |= E1000_MANC_ARP_EN;
  3910. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3911. pci_enable_wake(pdev, PCI_D3hot, 1);
  3912. pci_enable_wake(pdev, PCI_D3cold, 1);
  3913. }
  3914. }
  3915. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  3916. * would have already happened in close and is redundant. */
  3917. e1000_release_hw_control(adapter);
  3918. pci_disable_device(pdev);
  3919. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  3920. return 0;
  3921. }
  3922. #ifdef CONFIG_PM
  3923. static int
  3924. e1000_resume(struct pci_dev *pdev)
  3925. {
  3926. struct net_device *netdev = pci_get_drvdata(pdev);
  3927. struct e1000_adapter *adapter = netdev_priv(netdev);
  3928. uint32_t manc, ret_val;
  3929. pci_set_power_state(pdev, PCI_D0);
  3930. e1000_pci_restore_state(adapter);
  3931. ret_val = pci_enable_device(pdev);
  3932. pci_set_master(pdev);
  3933. pci_enable_wake(pdev, PCI_D3hot, 0);
  3934. pci_enable_wake(pdev, PCI_D3cold, 0);
  3935. e1000_reset(adapter);
  3936. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  3937. if (netif_running(netdev))
  3938. e1000_up(adapter);
  3939. netif_device_attach(netdev);
  3940. if (adapter->hw.mac_type >= e1000_82540 &&
  3941. adapter->hw.media_type == e1000_media_type_copper) {
  3942. manc = E1000_READ_REG(&adapter->hw, MANC);
  3943. manc &= ~(E1000_MANC_ARP_EN);
  3944. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3945. }
  3946. /* If the controller is 82573 and f/w is AMT, do not set
  3947. * DRV_LOAD until the interface is up. For all other cases,
  3948. * let the f/w know that the h/w is now under the control
  3949. * of the driver. */
  3950. if (adapter->hw.mac_type != e1000_82573 ||
  3951. !e1000_check_mng_mode(&adapter->hw))
  3952. e1000_get_hw_control(adapter);
  3953. return 0;
  3954. }
  3955. #endif
  3956. static void e1000_shutdown(struct pci_dev *pdev)
  3957. {
  3958. e1000_suspend(pdev, PMSG_SUSPEND);
  3959. }
  3960. #ifdef CONFIG_NET_POLL_CONTROLLER
  3961. /*
  3962. * Polling 'interrupt' - used by things like netconsole to send skbs
  3963. * without having to re-enable interrupts. It's not called while
  3964. * the interrupt routine is executing.
  3965. */
  3966. static void
  3967. e1000_netpoll(struct net_device *netdev)
  3968. {
  3969. struct e1000_adapter *adapter = netdev_priv(netdev);
  3970. disable_irq(adapter->pdev->irq);
  3971. e1000_intr(adapter->pdev->irq, netdev, NULL);
  3972. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  3973. #ifndef CONFIG_E1000_NAPI
  3974. adapter->clean_rx(adapter, adapter->rx_ring);
  3975. #endif
  3976. enable_irq(adapter->pdev->irq);
  3977. }
  3978. #endif
  3979. /**
  3980. * e1000_io_error_detected - called when PCI error is detected
  3981. * @pdev: Pointer to PCI device
  3982. * @state: The current pci conneection state
  3983. *
  3984. * This function is called after a PCI bus error affecting
  3985. * this device has been detected.
  3986. */
  3987. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
  3988. {
  3989. struct net_device *netdev = pci_get_drvdata(pdev);
  3990. struct e1000_adapter *adapter = netdev->priv;
  3991. netif_device_detach(netdev);
  3992. if (netif_running(netdev))
  3993. e1000_down(adapter);
  3994. /* Request a slot slot reset. */
  3995. return PCI_ERS_RESULT_NEED_RESET;
  3996. }
  3997. /**
  3998. * e1000_io_slot_reset - called after the pci bus has been reset.
  3999. * @pdev: Pointer to PCI device
  4000. *
  4001. * Restart the card from scratch, as if from a cold-boot. Implementation
  4002. * resembles the first-half of the e1000_resume routine.
  4003. */
  4004. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
  4005. {
  4006. struct net_device *netdev = pci_get_drvdata(pdev);
  4007. struct e1000_adapter *adapter = netdev->priv;
  4008. if (pci_enable_device(pdev)) {
  4009. printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
  4010. return PCI_ERS_RESULT_DISCONNECT;
  4011. }
  4012. pci_set_master(pdev);
  4013. pci_enable_wake(pdev, 3, 0);
  4014. pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
  4015. /* Perform card reset only on one instance of the card */
  4016. if (PCI_FUNC (pdev->devfn) != 0)
  4017. return PCI_ERS_RESULT_RECOVERED;
  4018. e1000_reset(adapter);
  4019. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  4020. return PCI_ERS_RESULT_RECOVERED;
  4021. }
  4022. /**
  4023. * e1000_io_resume - called when traffic can start flowing again.
  4024. * @pdev: Pointer to PCI device
  4025. *
  4026. * This callback is called when the error recovery driver tells us that
  4027. * its OK to resume normal operation. Implementation resembles the
  4028. * second-half of the e1000_resume routine.
  4029. */
  4030. static void e1000_io_resume(struct pci_dev *pdev)
  4031. {
  4032. struct net_device *netdev = pci_get_drvdata(pdev);
  4033. struct e1000_adapter *adapter = netdev->priv;
  4034. uint32_t manc, swsm;
  4035. if (netif_running(netdev)) {
  4036. if (e1000_up(adapter)) {
  4037. printk("e1000: can't bring device back up after reset\n");
  4038. return;
  4039. }
  4040. }
  4041. netif_device_attach(netdev);
  4042. if (adapter->hw.mac_type >= e1000_82540 &&
  4043. adapter->hw.media_type == e1000_media_type_copper) {
  4044. manc = E1000_READ_REG(&adapter->hw, MANC);
  4045. manc &= ~(E1000_MANC_ARP_EN);
  4046. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4047. }
  4048. switch (adapter->hw.mac_type) {
  4049. case e1000_82573:
  4050. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  4051. E1000_WRITE_REG(&adapter->hw, SWSM,
  4052. swsm | E1000_SWSM_DRV_LOAD);
  4053. break;
  4054. default:
  4055. break;
  4056. }
  4057. if (netif_running(netdev))
  4058. mod_timer(&adapter->watchdog_timer, jiffies);
  4059. }
  4060. /* e1000_main.c */