smd_private.h 8.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333
  1. /* arch/arm/mach-msm/smd_private.h
  2. *
  3. * Copyright (C) 2007 Google, Inc.
  4. * Copyright (c) 2007 QUALCOMM Incorporated
  5. *
  6. * This software is licensed under the terms of the GNU General Public
  7. * License version 2, as published by the Free Software Foundation, and
  8. * may be copied, distributed, and modified under those terms.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. */
  16. #ifndef _ARCH_ARM_MACH_MSM_MSM_SMD_PRIVATE_H_
  17. #define _ARCH_ARM_MACH_MSM_MSM_SMD_PRIVATE_H_
  18. #include <linux/platform_device.h>
  19. #include <linux/spinlock.h>
  20. #include <linux/list.h>
  21. struct smem_heap_info {
  22. unsigned initialized;
  23. unsigned free_offset;
  24. unsigned heap_remaining;
  25. unsigned reserved;
  26. };
  27. struct smem_heap_entry {
  28. unsigned allocated;
  29. unsigned offset;
  30. unsigned size;
  31. unsigned reserved;
  32. };
  33. struct smem_proc_comm {
  34. unsigned command;
  35. unsigned status;
  36. unsigned data1;
  37. unsigned data2;
  38. };
  39. #define PC_APPS 0
  40. #define PC_MODEM 1
  41. #define VERSION_SMD 0
  42. #define VERSION_QDSP6 4
  43. #define VERSION_APPS_SBL 6
  44. #define VERSION_MODEM_SBL 7
  45. #define VERSION_APPS 8
  46. #define VERSION_MODEM 9
  47. struct smem_shared {
  48. struct smem_proc_comm proc_comm[4];
  49. unsigned version[32];
  50. struct smem_heap_info heap_info;
  51. struct smem_heap_entry heap_toc[512];
  52. };
  53. #define SMSM_V1_SIZE (sizeof(unsigned) * 8)
  54. #define SMSM_V2_SIZE (sizeof(unsigned) * 4)
  55. #ifndef CONFIG_ARCH_MSM_SCORPION
  56. struct smsm_interrupt_info {
  57. uint32_t interrupt_mask;
  58. uint32_t pending_interrupts;
  59. uint32_t wakeup_reason;
  60. };
  61. #else
  62. #define DEM_MAX_PORT_NAME_LEN (20)
  63. struct msm_dem_slave_data {
  64. uint32_t sleep_time;
  65. uint32_t interrupt_mask;
  66. uint32_t resources_used;
  67. uint32_t reserved1;
  68. uint32_t wakeup_reason;
  69. uint32_t pending_interrupts;
  70. uint32_t rpc_prog;
  71. uint32_t rpc_proc;
  72. char smd_port_name[DEM_MAX_PORT_NAME_LEN];
  73. uint32_t reserved2;
  74. };
  75. #endif
  76. #define SZ_DIAG_ERR_MSG 0xC8
  77. #define ID_DIAG_ERR_MSG SMEM_DIAG_ERR_MESSAGE
  78. #define ID_SMD_CHANNELS SMEM_SMD_BASE_ID
  79. #define ID_SHARED_STATE SMEM_SMSM_SHARED_STATE
  80. #define ID_CH_ALLOC_TBL SMEM_CHANNEL_ALLOC_TBL
  81. #define SMSM_INIT 0x00000001
  82. #define SMSM_SMDINIT 0x00000008
  83. #define SMSM_RPCINIT 0x00000020
  84. #define SMSM_RESET 0x00000040
  85. #define SMSM_RSA 0x00000080
  86. #define SMSM_RUN 0x00000100
  87. #define SMSM_PWRC 0x00000200
  88. #define SMSM_TIMEWAIT 0x00000400
  89. #define SMSM_TIMEINIT 0x00000800
  90. #define SMSM_PWRC_EARLY_EXIT 0x00001000
  91. #define SMSM_WFPI 0x00002000
  92. #define SMSM_SLEEP 0x00004000
  93. #define SMSM_SLEEPEXIT 0x00008000
  94. #define SMSM_APPS_REBOOT 0x00020000
  95. #define SMSM_SYSTEM_POWER_DOWN 0x00040000
  96. #define SMSM_SYSTEM_REBOOT 0x00080000
  97. #define SMSM_SYSTEM_DOWNLOAD 0x00100000
  98. #define SMSM_PWRC_SUSPEND 0x00200000
  99. #define SMSM_APPS_SHUTDOWN 0x00400000
  100. #define SMSM_SMD_LOOPBACK 0x00800000
  101. #define SMSM_RUN_QUIET 0x01000000
  102. #define SMSM_MODEM_WAIT 0x02000000
  103. #define SMSM_MODEM_BREAK 0x04000000
  104. #define SMSM_MODEM_CONTINUE 0x08000000
  105. #define SMSM_UNKNOWN 0x80000000
  106. #define SMSM_WKUP_REASON_RPC 0x00000001
  107. #define SMSM_WKUP_REASON_INT 0x00000002
  108. #define SMSM_WKUP_REASON_GPIO 0x00000004
  109. #define SMSM_WKUP_REASON_TIMER 0x00000008
  110. #define SMSM_WKUP_REASON_ALARM 0x00000010
  111. #define SMSM_WKUP_REASON_RESET 0x00000020
  112. #ifndef CONFIG_ARCH_MSM_SCORPION
  113. enum smsm_state_item {
  114. SMSM_STATE_APPS = 1,
  115. SMSM_STATE_MODEM = 3,
  116. SMSM_STATE_COUNT,
  117. };
  118. #else
  119. enum smsm_state_item {
  120. SMSM_STATE_APPS,
  121. SMSM_STATE_MODEM,
  122. SMSM_STATE_HEXAGON,
  123. SMSM_STATE_APPS_DEM,
  124. SMSM_STATE_MODEM_DEM,
  125. SMSM_STATE_QDSP6_DEM,
  126. SMSM_STATE_POWER_MASTER_DEM,
  127. SMSM_STATE_TIME_MASTER_DEM,
  128. SMSM_STATE_COUNT,
  129. };
  130. #endif
  131. void *smem_alloc(unsigned id, unsigned size);
  132. int smsm_change_state(enum smsm_state_item item, uint32_t clear_mask, uint32_t set_mask);
  133. uint32_t smsm_get_state(enum smsm_state_item item);
  134. int smsm_set_sleep_duration(uint32_t delay);
  135. void smsm_print_sleep_info(void);
  136. #define SMEM_NUM_SMD_CHANNELS 64
  137. typedef enum {
  138. /* fixed items */
  139. SMEM_PROC_COMM = 0,
  140. SMEM_HEAP_INFO,
  141. SMEM_ALLOCATION_TABLE,
  142. SMEM_VERSION_INFO,
  143. SMEM_HW_RESET_DETECT,
  144. SMEM_AARM_WARM_BOOT,
  145. SMEM_DIAG_ERR_MESSAGE,
  146. SMEM_SPINLOCK_ARRAY,
  147. SMEM_MEMORY_BARRIER_LOCATION,
  148. /* dynamic items */
  149. SMEM_AARM_PARTITION_TABLE,
  150. SMEM_AARM_BAD_BLOCK_TABLE,
  151. SMEM_RESERVE_BAD_BLOCKS,
  152. SMEM_WM_UUID,
  153. SMEM_CHANNEL_ALLOC_TBL,
  154. SMEM_SMD_BASE_ID,
  155. SMEM_SMEM_LOG_IDX = SMEM_SMD_BASE_ID + SMEM_NUM_SMD_CHANNELS,
  156. SMEM_SMEM_LOG_EVENTS,
  157. SMEM_SMEM_STATIC_LOG_IDX,
  158. SMEM_SMEM_STATIC_LOG_EVENTS,
  159. SMEM_SMEM_SLOW_CLOCK_SYNC,
  160. SMEM_SMEM_SLOW_CLOCK_VALUE,
  161. SMEM_BIO_LED_BUF,
  162. SMEM_SMSM_SHARED_STATE,
  163. SMEM_SMSM_INT_INFO,
  164. SMEM_SMSM_SLEEP_DELAY,
  165. SMEM_SMSM_LIMIT_SLEEP,
  166. SMEM_SLEEP_POWER_COLLAPSE_DISABLED,
  167. SMEM_KEYPAD_KEYS_PRESSED,
  168. SMEM_KEYPAD_STATE_UPDATED,
  169. SMEM_KEYPAD_STATE_IDX,
  170. SMEM_GPIO_INT,
  171. SMEM_MDDI_LCD_IDX,
  172. SMEM_MDDI_HOST_DRIVER_STATE,
  173. SMEM_MDDI_LCD_DISP_STATE,
  174. SMEM_LCD_CUR_PANEL,
  175. SMEM_MARM_BOOT_SEGMENT_INFO,
  176. SMEM_AARM_BOOT_SEGMENT_INFO,
  177. SMEM_SLEEP_STATIC,
  178. SMEM_SCORPION_FREQUENCY,
  179. SMEM_SMD_PROFILES,
  180. SMEM_TSSC_BUSY,
  181. SMEM_HS_SUSPEND_FILTER_INFO,
  182. SMEM_BATT_INFO,
  183. SMEM_APPS_BOOT_MODE,
  184. SMEM_VERSION_FIRST,
  185. SMEM_VERSION_LAST = SMEM_VERSION_FIRST + 24,
  186. SMEM_OSS_RRCASN1_BUF1,
  187. SMEM_OSS_RRCASN1_BUF2,
  188. SMEM_ID_VENDOR0,
  189. SMEM_ID_VENDOR1,
  190. SMEM_ID_VENDOR2,
  191. SMEM_HW_SW_BUILD_ID,
  192. SMEM_SMD_BLOCK_PORT_BASE_ID,
  193. SMEM_SMD_BLOCK_PORT_PROC0_HEAP = SMEM_SMD_BLOCK_PORT_BASE_ID + SMEM_NUM_SMD_CHANNELS,
  194. SMEM_SMD_BLOCK_PORT_PROC1_HEAP = SMEM_SMD_BLOCK_PORT_PROC0_HEAP + SMEM_NUM_SMD_CHANNELS,
  195. SMEM_I2C_MUTEX = SMEM_SMD_BLOCK_PORT_PROC1_HEAP + SMEM_NUM_SMD_CHANNELS,
  196. SMEM_SCLK_CONVERSION,
  197. SMEM_SMD_SMSM_INTR_MUX,
  198. SMEM_SMSM_CPU_INTR_MASK,
  199. SMEM_APPS_DEM_SLAVE_DATA,
  200. SMEM_QDSP6_DEM_SLAVE_DATA,
  201. SMEM_CLKREGIM_BSP,
  202. SMEM_CLKREGIM_SOURCES,
  203. SMEM_SMD_FIFO_BASE_ID,
  204. SMEM_USABLE_RAM_PARTITION_TABLE = SMEM_SMD_FIFO_BASE_ID + SMEM_NUM_SMD_CHANNELS,
  205. SMEM_POWER_ON_STATUS_INFO,
  206. SMEM_DAL_AREA,
  207. SMEM_SMEM_LOG_POWER_IDX,
  208. SMEM_SMEM_LOG_POWER_WRAP,
  209. SMEM_SMEM_LOG_POWER_EVENTS,
  210. SMEM_ERR_CRASH_LOG,
  211. SMEM_ERR_F3_TRACE_LOG,
  212. SMEM_NUM_ITEMS,
  213. } smem_mem_type;
  214. #define SMD_SS_CLOSED 0x00000000
  215. #define SMD_SS_OPENING 0x00000001
  216. #define SMD_SS_OPENED 0x00000002
  217. #define SMD_SS_FLUSHING 0x00000003
  218. #define SMD_SS_CLOSING 0x00000004
  219. #define SMD_SS_RESET 0x00000005
  220. #define SMD_SS_RESET_OPENING 0x00000006
  221. #define SMD_BUF_SIZE 8192
  222. #define SMD_CHANNELS 64
  223. #define SMD_HEADER_SIZE 20
  224. struct smd_alloc_elm {
  225. char name[20];
  226. uint32_t cid;
  227. uint32_t ctype;
  228. uint32_t ref_count;
  229. };
  230. struct smd_half_channel {
  231. unsigned state;
  232. unsigned char fDSR;
  233. unsigned char fCTS;
  234. unsigned char fCD;
  235. unsigned char fRI;
  236. unsigned char fHEAD;
  237. unsigned char fTAIL;
  238. unsigned char fSTATE;
  239. unsigned char fUNUSED;
  240. unsigned tail;
  241. unsigned head;
  242. } __attribute__(( aligned(4), packed ));
  243. struct smd_shared_v1 {
  244. struct smd_half_channel ch0;
  245. unsigned char data0[SMD_BUF_SIZE];
  246. struct smd_half_channel ch1;
  247. unsigned char data1[SMD_BUF_SIZE];
  248. };
  249. struct smd_shared_v2 {
  250. struct smd_half_channel ch0;
  251. struct smd_half_channel ch1;
  252. };
  253. struct smd_channel {
  254. volatile struct smd_half_channel *send;
  255. volatile struct smd_half_channel *recv;
  256. unsigned char *send_data;
  257. unsigned char *recv_data;
  258. unsigned fifo_mask;
  259. unsigned fifo_size;
  260. unsigned current_packet;
  261. unsigned n;
  262. struct list_head ch_list;
  263. void *priv;
  264. void (*notify)(void *priv, unsigned flags);
  265. int (*read)(struct smd_channel *ch, void *data, int len);
  266. int (*write)(struct smd_channel *ch, const void *data, int len);
  267. int (*read_avail)(struct smd_channel *ch);
  268. int (*write_avail)(struct smd_channel *ch);
  269. void (*update_state)(struct smd_channel *ch);
  270. unsigned last_state;
  271. void (*notify_other_cpu)(void);
  272. unsigned type;
  273. char name[32];
  274. struct platform_device pdev;
  275. };
  276. #define SMD_TYPE_MASK 0x0FF
  277. #define SMD_TYPE_APPS_MODEM 0x000
  278. #define SMD_TYPE_APPS_DSP 0x001
  279. #define SMD_TYPE_MODEM_DSP 0x002
  280. #define SMD_KIND_MASK 0xF00
  281. #define SMD_KIND_UNKNOWN 0x000
  282. #define SMD_KIND_STREAM 0x100
  283. #define SMD_KIND_PACKET 0x200
  284. extern struct list_head smd_ch_closed_list;
  285. extern struct list_head smd_ch_list_modem;
  286. extern struct list_head smd_ch_list_dsp;
  287. extern spinlock_t smd_lock;
  288. extern spinlock_t smem_lock;
  289. void *smem_find(unsigned id, unsigned size);
  290. void *smem_item(unsigned id, unsigned *size);
  291. uint32_t raw_smsm_get_state(enum smsm_state_item item);
  292. extern void msm_init_last_radio_log(struct module *);
  293. #endif