ymfpci_main.c 72 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  3. * Routines for control of YMF724/740/744/754 chips
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. *
  19. */
  20. #include <sound/driver.h>
  21. #include <linux/delay.h>
  22. #include <linux/firmware.h>
  23. #include <linux/init.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/pci.h>
  26. #include <linux/sched.h>
  27. #include <linux/slab.h>
  28. #include <linux/vmalloc.h>
  29. #include <sound/core.h>
  30. #include <sound/control.h>
  31. #include <sound/info.h>
  32. #include <sound/tlv.h>
  33. #include <sound/ymfpci.h>
  34. #include <sound/asoundef.h>
  35. #include <sound/mpu401.h>
  36. #include <asm/io.h>
  37. #include <asm/byteorder.h>
  38. /*
  39. * common I/O routines
  40. */
  41. static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip);
  42. static inline u8 snd_ymfpci_readb(struct snd_ymfpci *chip, u32 offset)
  43. {
  44. return readb(chip->reg_area_virt + offset);
  45. }
  46. static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val)
  47. {
  48. writeb(val, chip->reg_area_virt + offset);
  49. }
  50. static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset)
  51. {
  52. return readw(chip->reg_area_virt + offset);
  53. }
  54. static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val)
  55. {
  56. writew(val, chip->reg_area_virt + offset);
  57. }
  58. static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset)
  59. {
  60. return readl(chip->reg_area_virt + offset);
  61. }
  62. static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val)
  63. {
  64. writel(val, chip->reg_area_virt + offset);
  65. }
  66. static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary)
  67. {
  68. unsigned long end_time;
  69. u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR;
  70. end_time = jiffies + msecs_to_jiffies(750);
  71. do {
  72. if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
  73. return 0;
  74. schedule_timeout_uninterruptible(1);
  75. } while (time_before(jiffies, end_time));
  76. snd_printk(KERN_ERR "codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg));
  77. return -EBUSY;
  78. }
  79. static void snd_ymfpci_codec_write(struct snd_ac97 *ac97, u16 reg, u16 val)
  80. {
  81. struct snd_ymfpci *chip = ac97->private_data;
  82. u32 cmd;
  83. snd_ymfpci_codec_ready(chip, 0);
  84. cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val;
  85. snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd);
  86. }
  87. static u16 snd_ymfpci_codec_read(struct snd_ac97 *ac97, u16 reg)
  88. {
  89. struct snd_ymfpci *chip = ac97->private_data;
  90. if (snd_ymfpci_codec_ready(chip, 0))
  91. return ~0;
  92. snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg);
  93. if (snd_ymfpci_codec_ready(chip, 0))
  94. return ~0;
  95. if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) {
  96. int i;
  97. for (i = 0; i < 600; i++)
  98. snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
  99. }
  100. return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
  101. }
  102. /*
  103. * Misc routines
  104. */
  105. static u32 snd_ymfpci_calc_delta(u32 rate)
  106. {
  107. switch (rate) {
  108. case 8000: return 0x02aaab00;
  109. case 11025: return 0x03accd00;
  110. case 16000: return 0x05555500;
  111. case 22050: return 0x07599a00;
  112. case 32000: return 0x0aaaab00;
  113. case 44100: return 0x0eb33300;
  114. default: return ((rate << 16) / 375) << 5;
  115. }
  116. }
  117. static u32 def_rate[8] = {
  118. 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000
  119. };
  120. static u32 snd_ymfpci_calc_lpfK(u32 rate)
  121. {
  122. u32 i;
  123. static u32 val[8] = {
  124. 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000,
  125. 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000
  126. };
  127. if (rate == 44100)
  128. return 0x40000000; /* FIXME: What's the right value? */
  129. for (i = 0; i < 8; i++)
  130. if (rate <= def_rate[i])
  131. return val[i];
  132. return val[0];
  133. }
  134. static u32 snd_ymfpci_calc_lpfQ(u32 rate)
  135. {
  136. u32 i;
  137. static u32 val[8] = {
  138. 0x35280000, 0x34A70000, 0x32020000, 0x31770000,
  139. 0x31390000, 0x31C90000, 0x33D00000, 0x40000000
  140. };
  141. if (rate == 44100)
  142. return 0x370A0000;
  143. for (i = 0; i < 8; i++)
  144. if (rate <= def_rate[i])
  145. return val[i];
  146. return val[0];
  147. }
  148. /*
  149. * Hardware start management
  150. */
  151. static void snd_ymfpci_hw_start(struct snd_ymfpci *chip)
  152. {
  153. unsigned long flags;
  154. spin_lock_irqsave(&chip->reg_lock, flags);
  155. if (chip->start_count++ > 0)
  156. goto __end;
  157. snd_ymfpci_writel(chip, YDSXGR_MODE,
  158. snd_ymfpci_readl(chip, YDSXGR_MODE) | 3);
  159. chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
  160. __end:
  161. spin_unlock_irqrestore(&chip->reg_lock, flags);
  162. }
  163. static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip)
  164. {
  165. unsigned long flags;
  166. long timeout = 1000;
  167. spin_lock_irqsave(&chip->reg_lock, flags);
  168. if (--chip->start_count > 0)
  169. goto __end;
  170. snd_ymfpci_writel(chip, YDSXGR_MODE,
  171. snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3);
  172. while (timeout-- > 0) {
  173. if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0)
  174. break;
  175. }
  176. if (atomic_read(&chip->interrupt_sleep_count)) {
  177. atomic_set(&chip->interrupt_sleep_count, 0);
  178. wake_up(&chip->interrupt_sleep);
  179. }
  180. __end:
  181. spin_unlock_irqrestore(&chip->reg_lock, flags);
  182. }
  183. /*
  184. * Playback voice management
  185. */
  186. static int voice_alloc(struct snd_ymfpci *chip,
  187. enum snd_ymfpci_voice_type type, int pair,
  188. struct snd_ymfpci_voice **rvoice)
  189. {
  190. struct snd_ymfpci_voice *voice, *voice2;
  191. int idx;
  192. *rvoice = NULL;
  193. for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) {
  194. voice = &chip->voices[idx];
  195. voice2 = pair ? &chip->voices[idx+1] : NULL;
  196. if (voice->use || (voice2 && voice2->use))
  197. continue;
  198. voice->use = 1;
  199. if (voice2)
  200. voice2->use = 1;
  201. switch (type) {
  202. case YMFPCI_PCM:
  203. voice->pcm = 1;
  204. if (voice2)
  205. voice2->pcm = 1;
  206. break;
  207. case YMFPCI_SYNTH:
  208. voice->synth = 1;
  209. break;
  210. case YMFPCI_MIDI:
  211. voice->midi = 1;
  212. break;
  213. }
  214. snd_ymfpci_hw_start(chip);
  215. if (voice2)
  216. snd_ymfpci_hw_start(chip);
  217. *rvoice = voice;
  218. return 0;
  219. }
  220. return -ENOMEM;
  221. }
  222. static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip,
  223. enum snd_ymfpci_voice_type type, int pair,
  224. struct snd_ymfpci_voice **rvoice)
  225. {
  226. unsigned long flags;
  227. int result;
  228. snd_assert(rvoice != NULL, return -EINVAL);
  229. snd_assert(!pair || type == YMFPCI_PCM, return -EINVAL);
  230. spin_lock_irqsave(&chip->voice_lock, flags);
  231. for (;;) {
  232. result = voice_alloc(chip, type, pair, rvoice);
  233. if (result == 0 || type != YMFPCI_PCM)
  234. break;
  235. /* TODO: synth/midi voice deallocation */
  236. break;
  237. }
  238. spin_unlock_irqrestore(&chip->voice_lock, flags);
  239. return result;
  240. }
  241. static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice)
  242. {
  243. unsigned long flags;
  244. snd_assert(pvoice != NULL, return -EINVAL);
  245. snd_ymfpci_hw_stop(chip);
  246. spin_lock_irqsave(&chip->voice_lock, flags);
  247. if (pvoice->number == chip->src441_used) {
  248. chip->src441_used = -1;
  249. pvoice->ypcm->use_441_slot = 0;
  250. }
  251. pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0;
  252. pvoice->ypcm = NULL;
  253. pvoice->interrupt = NULL;
  254. spin_unlock_irqrestore(&chip->voice_lock, flags);
  255. return 0;
  256. }
  257. /*
  258. * PCM part
  259. */
  260. static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice)
  261. {
  262. struct snd_ymfpci_pcm *ypcm;
  263. u32 pos, delta;
  264. if ((ypcm = voice->ypcm) == NULL)
  265. return;
  266. if (ypcm->substream == NULL)
  267. return;
  268. spin_lock(&chip->reg_lock);
  269. if (ypcm->running) {
  270. pos = le32_to_cpu(voice->bank[chip->active_bank].start);
  271. if (pos < ypcm->last_pos)
  272. delta = pos + (ypcm->buffer_size - ypcm->last_pos);
  273. else
  274. delta = pos - ypcm->last_pos;
  275. ypcm->period_pos += delta;
  276. ypcm->last_pos = pos;
  277. if (ypcm->period_pos >= ypcm->period_size) {
  278. // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
  279. ypcm->period_pos %= ypcm->period_size;
  280. spin_unlock(&chip->reg_lock);
  281. snd_pcm_period_elapsed(ypcm->substream);
  282. spin_lock(&chip->reg_lock);
  283. }
  284. if (unlikely(ypcm->update_pcm_vol)) {
  285. unsigned int subs = ypcm->substream->number;
  286. unsigned int next_bank = 1 - chip->active_bank;
  287. struct snd_ymfpci_playback_bank *bank;
  288. u32 volume;
  289. bank = &voice->bank[next_bank];
  290. volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15);
  291. bank->left_gain_end = volume;
  292. if (ypcm->output_rear)
  293. bank->eff2_gain_end = volume;
  294. if (ypcm->voices[1])
  295. bank = &ypcm->voices[1]->bank[next_bank];
  296. volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15);
  297. bank->right_gain_end = volume;
  298. if (ypcm->output_rear)
  299. bank->eff3_gain_end = volume;
  300. ypcm->update_pcm_vol--;
  301. }
  302. }
  303. spin_unlock(&chip->reg_lock);
  304. }
  305. static void snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream *substream)
  306. {
  307. struct snd_pcm_runtime *runtime = substream->runtime;
  308. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  309. struct snd_ymfpci *chip = ypcm->chip;
  310. u32 pos, delta;
  311. spin_lock(&chip->reg_lock);
  312. if (ypcm->running) {
  313. pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
  314. if (pos < ypcm->last_pos)
  315. delta = pos + (ypcm->buffer_size - ypcm->last_pos);
  316. else
  317. delta = pos - ypcm->last_pos;
  318. ypcm->period_pos += delta;
  319. ypcm->last_pos = pos;
  320. if (ypcm->period_pos >= ypcm->period_size) {
  321. ypcm->period_pos %= ypcm->period_size;
  322. // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
  323. spin_unlock(&chip->reg_lock);
  324. snd_pcm_period_elapsed(substream);
  325. spin_lock(&chip->reg_lock);
  326. }
  327. }
  328. spin_unlock(&chip->reg_lock);
  329. }
  330. static int snd_ymfpci_playback_trigger(struct snd_pcm_substream *substream,
  331. int cmd)
  332. {
  333. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  334. struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
  335. struct snd_kcontrol *kctl = NULL;
  336. int result = 0;
  337. spin_lock(&chip->reg_lock);
  338. if (ypcm->voices[0] == NULL) {
  339. result = -EINVAL;
  340. goto __unlock;
  341. }
  342. switch (cmd) {
  343. case SNDRV_PCM_TRIGGER_START:
  344. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  345. case SNDRV_PCM_TRIGGER_RESUME:
  346. chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr);
  347. if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
  348. chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr);
  349. ypcm->running = 1;
  350. break;
  351. case SNDRV_PCM_TRIGGER_STOP:
  352. if (substream->pcm == chip->pcm && !ypcm->use_441_slot) {
  353. kctl = chip->pcm_mixer[substream->number].ctl;
  354. kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  355. }
  356. /* fall through */
  357. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  358. case SNDRV_PCM_TRIGGER_SUSPEND:
  359. chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0;
  360. if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
  361. chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0;
  362. ypcm->running = 0;
  363. break;
  364. default:
  365. result = -EINVAL;
  366. break;
  367. }
  368. __unlock:
  369. spin_unlock(&chip->reg_lock);
  370. if (kctl)
  371. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
  372. return result;
  373. }
  374. static int snd_ymfpci_capture_trigger(struct snd_pcm_substream *substream,
  375. int cmd)
  376. {
  377. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  378. struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
  379. int result = 0;
  380. u32 tmp;
  381. spin_lock(&chip->reg_lock);
  382. switch (cmd) {
  383. case SNDRV_PCM_TRIGGER_START:
  384. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  385. case SNDRV_PCM_TRIGGER_RESUME:
  386. tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number);
  387. snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
  388. ypcm->running = 1;
  389. break;
  390. case SNDRV_PCM_TRIGGER_STOP:
  391. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  392. case SNDRV_PCM_TRIGGER_SUSPEND:
  393. tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number);
  394. snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
  395. ypcm->running = 0;
  396. break;
  397. default:
  398. result = -EINVAL;
  399. break;
  400. }
  401. spin_unlock(&chip->reg_lock);
  402. return result;
  403. }
  404. static int snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm *ypcm, int voices)
  405. {
  406. int err;
  407. if (ypcm->voices[1] != NULL && voices < 2) {
  408. snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]);
  409. ypcm->voices[1] = NULL;
  410. }
  411. if (voices == 1 && ypcm->voices[0] != NULL)
  412. return 0; /* already allocated */
  413. if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL)
  414. return 0; /* already allocated */
  415. if (voices > 1) {
  416. if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) {
  417. snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]);
  418. ypcm->voices[0] = NULL;
  419. }
  420. }
  421. err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]);
  422. if (err < 0)
  423. return err;
  424. ypcm->voices[0]->ypcm = ypcm;
  425. ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt;
  426. if (voices > 1) {
  427. ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1];
  428. ypcm->voices[1]->ypcm = ypcm;
  429. }
  430. return 0;
  431. }
  432. static void snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm *ypcm, unsigned int voiceidx,
  433. struct snd_pcm_runtime *runtime,
  434. int has_pcm_volume)
  435. {
  436. struct snd_ymfpci_voice *voice = ypcm->voices[voiceidx];
  437. u32 format;
  438. u32 delta = snd_ymfpci_calc_delta(runtime->rate);
  439. u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate);
  440. u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate);
  441. struct snd_ymfpci_playback_bank *bank;
  442. unsigned int nbank;
  443. u32 vol_left, vol_right;
  444. u8 use_left, use_right;
  445. unsigned long flags;
  446. snd_assert(voice != NULL, return);
  447. if (runtime->channels == 1) {
  448. use_left = 1;
  449. use_right = 1;
  450. } else {
  451. use_left = (voiceidx & 1) == 0;
  452. use_right = !use_left;
  453. }
  454. if (has_pcm_volume) {
  455. vol_left = cpu_to_le32(ypcm->chip->pcm_mixer
  456. [ypcm->substream->number].left << 15);
  457. vol_right = cpu_to_le32(ypcm->chip->pcm_mixer
  458. [ypcm->substream->number].right << 15);
  459. } else {
  460. vol_left = cpu_to_le32(0x40000000);
  461. vol_right = cpu_to_le32(0x40000000);
  462. }
  463. spin_lock_irqsave(&ypcm->chip->voice_lock, flags);
  464. format = runtime->channels == 2 ? 0x00010000 : 0;
  465. if (snd_pcm_format_width(runtime->format) == 8)
  466. format |= 0x80000000;
  467. else if (ypcm->chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
  468. runtime->rate == 44100 && runtime->channels == 2 &&
  469. voiceidx == 0 && (ypcm->chip->src441_used == -1 ||
  470. ypcm->chip->src441_used == voice->number)) {
  471. ypcm->chip->src441_used = voice->number;
  472. ypcm->use_441_slot = 1;
  473. format |= 0x10000000;
  474. }
  475. if (ypcm->chip->src441_used == voice->number &&
  476. (format & 0x10000000) == 0) {
  477. ypcm->chip->src441_used = -1;
  478. ypcm->use_441_slot = 0;
  479. }
  480. if (runtime->channels == 2 && (voiceidx & 1) != 0)
  481. format |= 1;
  482. spin_unlock_irqrestore(&ypcm->chip->voice_lock, flags);
  483. for (nbank = 0; nbank < 2; nbank++) {
  484. bank = &voice->bank[nbank];
  485. memset(bank, 0, sizeof(*bank));
  486. bank->format = cpu_to_le32(format);
  487. bank->base = cpu_to_le32(runtime->dma_addr);
  488. bank->loop_end = cpu_to_le32(ypcm->buffer_size);
  489. bank->lpfQ = cpu_to_le32(lpfQ);
  490. bank->delta =
  491. bank->delta_end = cpu_to_le32(delta);
  492. bank->lpfK =
  493. bank->lpfK_end = cpu_to_le32(lpfK);
  494. bank->eg_gain =
  495. bank->eg_gain_end = cpu_to_le32(0x40000000);
  496. if (ypcm->output_front) {
  497. if (use_left) {
  498. bank->left_gain =
  499. bank->left_gain_end = vol_left;
  500. }
  501. if (use_right) {
  502. bank->right_gain =
  503. bank->right_gain_end = vol_right;
  504. }
  505. }
  506. if (ypcm->output_rear) {
  507. if (!ypcm->swap_rear) {
  508. if (use_left) {
  509. bank->eff2_gain =
  510. bank->eff2_gain_end = vol_left;
  511. }
  512. if (use_right) {
  513. bank->eff3_gain =
  514. bank->eff3_gain_end = vol_right;
  515. }
  516. } else {
  517. /* The SPDIF out channels seem to be swapped, so we have
  518. * to swap them here, too. The rear analog out channels
  519. * will be wrong, but otherwise AC3 would not work.
  520. */
  521. if (use_left) {
  522. bank->eff3_gain =
  523. bank->eff3_gain_end = vol_left;
  524. }
  525. if (use_right) {
  526. bank->eff2_gain =
  527. bank->eff2_gain_end = vol_right;
  528. }
  529. }
  530. }
  531. }
  532. }
  533. static int __devinit snd_ymfpci_ac3_init(struct snd_ymfpci *chip)
  534. {
  535. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
  536. 4096, &chip->ac3_tmp_base) < 0)
  537. return -ENOMEM;
  538. chip->bank_effect[3][0]->base =
  539. chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr);
  540. chip->bank_effect[3][0]->loop_end =
  541. chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024);
  542. chip->bank_effect[4][0]->base =
  543. chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048);
  544. chip->bank_effect[4][0]->loop_end =
  545. chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024);
  546. spin_lock_irq(&chip->reg_lock);
  547. snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
  548. snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3);
  549. spin_unlock_irq(&chip->reg_lock);
  550. return 0;
  551. }
  552. static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip)
  553. {
  554. spin_lock_irq(&chip->reg_lock);
  555. snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
  556. snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3));
  557. spin_unlock_irq(&chip->reg_lock);
  558. // snd_ymfpci_irq_wait(chip);
  559. if (chip->ac3_tmp_base.area) {
  560. snd_dma_free_pages(&chip->ac3_tmp_base);
  561. chip->ac3_tmp_base.area = NULL;
  562. }
  563. return 0;
  564. }
  565. static int snd_ymfpci_playback_hw_params(struct snd_pcm_substream *substream,
  566. struct snd_pcm_hw_params *hw_params)
  567. {
  568. struct snd_pcm_runtime *runtime = substream->runtime;
  569. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  570. int err;
  571. if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
  572. return err;
  573. if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0)
  574. return err;
  575. return 0;
  576. }
  577. static int snd_ymfpci_playback_hw_free(struct snd_pcm_substream *substream)
  578. {
  579. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  580. struct snd_pcm_runtime *runtime = substream->runtime;
  581. struct snd_ymfpci_pcm *ypcm;
  582. if (runtime->private_data == NULL)
  583. return 0;
  584. ypcm = runtime->private_data;
  585. /* wait, until the PCI operations are not finished */
  586. snd_ymfpci_irq_wait(chip);
  587. snd_pcm_lib_free_pages(substream);
  588. if (ypcm->voices[1]) {
  589. snd_ymfpci_voice_free(chip, ypcm->voices[1]);
  590. ypcm->voices[1] = NULL;
  591. }
  592. if (ypcm->voices[0]) {
  593. snd_ymfpci_voice_free(chip, ypcm->voices[0]);
  594. ypcm->voices[0] = NULL;
  595. }
  596. return 0;
  597. }
  598. static int snd_ymfpci_playback_prepare(struct snd_pcm_substream *substream)
  599. {
  600. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  601. struct snd_pcm_runtime *runtime = substream->runtime;
  602. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  603. struct snd_kcontrol *kctl;
  604. unsigned int nvoice;
  605. ypcm->period_size = runtime->period_size;
  606. ypcm->buffer_size = runtime->buffer_size;
  607. ypcm->period_pos = 0;
  608. ypcm->last_pos = 0;
  609. for (nvoice = 0; nvoice < runtime->channels; nvoice++)
  610. snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime,
  611. substream->pcm == chip->pcm);
  612. if (substream->pcm == chip->pcm && !ypcm->use_441_slot) {
  613. kctl = chip->pcm_mixer[substream->number].ctl;
  614. kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  615. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
  616. }
  617. return 0;
  618. }
  619. static int snd_ymfpci_capture_hw_params(struct snd_pcm_substream *substream,
  620. struct snd_pcm_hw_params *hw_params)
  621. {
  622. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  623. }
  624. static int snd_ymfpci_capture_hw_free(struct snd_pcm_substream *substream)
  625. {
  626. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  627. /* wait, until the PCI operations are not finished */
  628. snd_ymfpci_irq_wait(chip);
  629. return snd_pcm_lib_free_pages(substream);
  630. }
  631. static int snd_ymfpci_capture_prepare(struct snd_pcm_substream *substream)
  632. {
  633. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  634. struct snd_pcm_runtime *runtime = substream->runtime;
  635. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  636. struct snd_ymfpci_capture_bank * bank;
  637. int nbank;
  638. u32 rate, format;
  639. ypcm->period_size = runtime->period_size;
  640. ypcm->buffer_size = runtime->buffer_size;
  641. ypcm->period_pos = 0;
  642. ypcm->last_pos = 0;
  643. ypcm->shift = 0;
  644. rate = ((48000 * 4096) / runtime->rate) - 1;
  645. format = 0;
  646. if (runtime->channels == 2) {
  647. format |= 2;
  648. ypcm->shift++;
  649. }
  650. if (snd_pcm_format_width(runtime->format) == 8)
  651. format |= 1;
  652. else
  653. ypcm->shift++;
  654. switch (ypcm->capture_bank_number) {
  655. case 0:
  656. snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format);
  657. snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate);
  658. break;
  659. case 1:
  660. snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format);
  661. snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate);
  662. break;
  663. }
  664. for (nbank = 0; nbank < 2; nbank++) {
  665. bank = chip->bank_capture[ypcm->capture_bank_number][nbank];
  666. bank->base = cpu_to_le32(runtime->dma_addr);
  667. bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift);
  668. bank->start = 0;
  669. bank->num_of_loops = 0;
  670. }
  671. return 0;
  672. }
  673. static snd_pcm_uframes_t snd_ymfpci_playback_pointer(struct snd_pcm_substream *substream)
  674. {
  675. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  676. struct snd_pcm_runtime *runtime = substream->runtime;
  677. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  678. struct snd_ymfpci_voice *voice = ypcm->voices[0];
  679. if (!(ypcm->running && voice))
  680. return 0;
  681. return le32_to_cpu(voice->bank[chip->active_bank].start);
  682. }
  683. static snd_pcm_uframes_t snd_ymfpci_capture_pointer(struct snd_pcm_substream *substream)
  684. {
  685. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  686. struct snd_pcm_runtime *runtime = substream->runtime;
  687. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  688. if (!ypcm->running)
  689. return 0;
  690. return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
  691. }
  692. static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip)
  693. {
  694. wait_queue_t wait;
  695. int loops = 4;
  696. while (loops-- > 0) {
  697. if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0)
  698. continue;
  699. init_waitqueue_entry(&wait, current);
  700. add_wait_queue(&chip->interrupt_sleep, &wait);
  701. atomic_inc(&chip->interrupt_sleep_count);
  702. schedule_timeout_uninterruptible(msecs_to_jiffies(50));
  703. remove_wait_queue(&chip->interrupt_sleep, &wait);
  704. }
  705. }
  706. static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id)
  707. {
  708. struct snd_ymfpci *chip = dev_id;
  709. u32 status, nvoice, mode;
  710. struct snd_ymfpci_voice *voice;
  711. status = snd_ymfpci_readl(chip, YDSXGR_STATUS);
  712. if (status & 0x80000000) {
  713. chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
  714. spin_lock(&chip->voice_lock);
  715. for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) {
  716. voice = &chip->voices[nvoice];
  717. if (voice->interrupt)
  718. voice->interrupt(chip, voice);
  719. }
  720. for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) {
  721. if (chip->capture_substream[nvoice])
  722. snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]);
  723. }
  724. #if 0
  725. for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) {
  726. if (chip->effect_substream[nvoice])
  727. snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]);
  728. }
  729. #endif
  730. spin_unlock(&chip->voice_lock);
  731. spin_lock(&chip->reg_lock);
  732. snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000);
  733. mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2;
  734. snd_ymfpci_writel(chip, YDSXGR_MODE, mode);
  735. spin_unlock(&chip->reg_lock);
  736. if (atomic_read(&chip->interrupt_sleep_count)) {
  737. atomic_set(&chip->interrupt_sleep_count, 0);
  738. wake_up(&chip->interrupt_sleep);
  739. }
  740. }
  741. status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG);
  742. if (status & 1) {
  743. if (chip->timer)
  744. snd_timer_interrupt(chip->timer, chip->timer->sticks);
  745. }
  746. snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status);
  747. if (chip->rawmidi)
  748. snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data);
  749. return IRQ_HANDLED;
  750. }
  751. static struct snd_pcm_hardware snd_ymfpci_playback =
  752. {
  753. .info = (SNDRV_PCM_INFO_MMAP |
  754. SNDRV_PCM_INFO_MMAP_VALID |
  755. SNDRV_PCM_INFO_INTERLEAVED |
  756. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  757. SNDRV_PCM_INFO_PAUSE |
  758. SNDRV_PCM_INFO_RESUME),
  759. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  760. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  761. .rate_min = 8000,
  762. .rate_max = 48000,
  763. .channels_min = 1,
  764. .channels_max = 2,
  765. .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
  766. .period_bytes_min = 64,
  767. .period_bytes_max = 256 * 1024, /* FIXME: enough? */
  768. .periods_min = 3,
  769. .periods_max = 1024,
  770. .fifo_size = 0,
  771. };
  772. static struct snd_pcm_hardware snd_ymfpci_capture =
  773. {
  774. .info = (SNDRV_PCM_INFO_MMAP |
  775. SNDRV_PCM_INFO_MMAP_VALID |
  776. SNDRV_PCM_INFO_INTERLEAVED |
  777. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  778. SNDRV_PCM_INFO_PAUSE |
  779. SNDRV_PCM_INFO_RESUME),
  780. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  781. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  782. .rate_min = 8000,
  783. .rate_max = 48000,
  784. .channels_min = 1,
  785. .channels_max = 2,
  786. .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
  787. .period_bytes_min = 64,
  788. .period_bytes_max = 256 * 1024, /* FIXME: enough? */
  789. .periods_min = 3,
  790. .periods_max = 1024,
  791. .fifo_size = 0,
  792. };
  793. static void snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime *runtime)
  794. {
  795. kfree(runtime->private_data);
  796. }
  797. static int snd_ymfpci_playback_open_1(struct snd_pcm_substream *substream)
  798. {
  799. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  800. struct snd_pcm_runtime *runtime = substream->runtime;
  801. struct snd_ymfpci_pcm *ypcm;
  802. ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
  803. if (ypcm == NULL)
  804. return -ENOMEM;
  805. ypcm->chip = chip;
  806. ypcm->type = PLAYBACK_VOICE;
  807. ypcm->substream = substream;
  808. runtime->hw = snd_ymfpci_playback;
  809. runtime->private_data = ypcm;
  810. runtime->private_free = snd_ymfpci_pcm_free_substream;
  811. /* FIXME? True value is 256/48 = 5.33333 ms */
  812. snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
  813. return 0;
  814. }
  815. /* call with spinlock held */
  816. static void ymfpci_open_extension(struct snd_ymfpci *chip)
  817. {
  818. if (! chip->rear_opened) {
  819. if (! chip->spdif_opened) /* set AC3 */
  820. snd_ymfpci_writel(chip, YDSXGR_MODE,
  821. snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30));
  822. /* enable second codec (4CHEN) */
  823. snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
  824. (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010);
  825. }
  826. }
  827. /* call with spinlock held */
  828. static void ymfpci_close_extension(struct snd_ymfpci *chip)
  829. {
  830. if (! chip->rear_opened) {
  831. if (! chip->spdif_opened)
  832. snd_ymfpci_writel(chip, YDSXGR_MODE,
  833. snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30));
  834. snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
  835. (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010);
  836. }
  837. }
  838. static int snd_ymfpci_playback_open(struct snd_pcm_substream *substream)
  839. {
  840. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  841. struct snd_pcm_runtime *runtime = substream->runtime;
  842. struct snd_ymfpci_pcm *ypcm;
  843. int err;
  844. if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
  845. return err;
  846. ypcm = runtime->private_data;
  847. ypcm->output_front = 1;
  848. ypcm->output_rear = chip->mode_dup4ch ? 1 : 0;
  849. ypcm->swap_rear = 0;
  850. spin_lock_irq(&chip->reg_lock);
  851. if (ypcm->output_rear) {
  852. ymfpci_open_extension(chip);
  853. chip->rear_opened++;
  854. }
  855. spin_unlock_irq(&chip->reg_lock);
  856. return 0;
  857. }
  858. static int snd_ymfpci_playback_spdif_open(struct snd_pcm_substream *substream)
  859. {
  860. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  861. struct snd_pcm_runtime *runtime = substream->runtime;
  862. struct snd_ymfpci_pcm *ypcm;
  863. int err;
  864. if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
  865. return err;
  866. ypcm = runtime->private_data;
  867. ypcm->output_front = 0;
  868. ypcm->output_rear = 1;
  869. ypcm->swap_rear = 1;
  870. spin_lock_irq(&chip->reg_lock);
  871. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
  872. snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2);
  873. ymfpci_open_extension(chip);
  874. chip->spdif_pcm_bits = chip->spdif_bits;
  875. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
  876. chip->spdif_opened++;
  877. spin_unlock_irq(&chip->reg_lock);
  878. chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  879. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
  880. SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
  881. return 0;
  882. }
  883. static int snd_ymfpci_playback_4ch_open(struct snd_pcm_substream *substream)
  884. {
  885. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  886. struct snd_pcm_runtime *runtime = substream->runtime;
  887. struct snd_ymfpci_pcm *ypcm;
  888. int err;
  889. if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
  890. return err;
  891. ypcm = runtime->private_data;
  892. ypcm->output_front = 0;
  893. ypcm->output_rear = 1;
  894. ypcm->swap_rear = 0;
  895. spin_lock_irq(&chip->reg_lock);
  896. ymfpci_open_extension(chip);
  897. chip->rear_opened++;
  898. spin_unlock_irq(&chip->reg_lock);
  899. return 0;
  900. }
  901. static int snd_ymfpci_capture_open(struct snd_pcm_substream *substream,
  902. u32 capture_bank_number)
  903. {
  904. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  905. struct snd_pcm_runtime *runtime = substream->runtime;
  906. struct snd_ymfpci_pcm *ypcm;
  907. ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
  908. if (ypcm == NULL)
  909. return -ENOMEM;
  910. ypcm->chip = chip;
  911. ypcm->type = capture_bank_number + CAPTURE_REC;
  912. ypcm->substream = substream;
  913. ypcm->capture_bank_number = capture_bank_number;
  914. chip->capture_substream[capture_bank_number] = substream;
  915. runtime->hw = snd_ymfpci_capture;
  916. /* FIXME? True value is 256/48 = 5.33333 ms */
  917. snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
  918. runtime->private_data = ypcm;
  919. runtime->private_free = snd_ymfpci_pcm_free_substream;
  920. snd_ymfpci_hw_start(chip);
  921. return 0;
  922. }
  923. static int snd_ymfpci_capture_rec_open(struct snd_pcm_substream *substream)
  924. {
  925. return snd_ymfpci_capture_open(substream, 0);
  926. }
  927. static int snd_ymfpci_capture_ac97_open(struct snd_pcm_substream *substream)
  928. {
  929. return snd_ymfpci_capture_open(substream, 1);
  930. }
  931. static int snd_ymfpci_playback_close_1(struct snd_pcm_substream *substream)
  932. {
  933. return 0;
  934. }
  935. static int snd_ymfpci_playback_close(struct snd_pcm_substream *substream)
  936. {
  937. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  938. struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
  939. spin_lock_irq(&chip->reg_lock);
  940. if (ypcm->output_rear && chip->rear_opened > 0) {
  941. chip->rear_opened--;
  942. ymfpci_close_extension(chip);
  943. }
  944. spin_unlock_irq(&chip->reg_lock);
  945. return snd_ymfpci_playback_close_1(substream);
  946. }
  947. static int snd_ymfpci_playback_spdif_close(struct snd_pcm_substream *substream)
  948. {
  949. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  950. spin_lock_irq(&chip->reg_lock);
  951. chip->spdif_opened = 0;
  952. ymfpci_close_extension(chip);
  953. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
  954. snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2);
  955. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
  956. spin_unlock_irq(&chip->reg_lock);
  957. chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  958. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
  959. SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
  960. return snd_ymfpci_playback_close_1(substream);
  961. }
  962. static int snd_ymfpci_playback_4ch_close(struct snd_pcm_substream *substream)
  963. {
  964. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  965. spin_lock_irq(&chip->reg_lock);
  966. if (chip->rear_opened > 0) {
  967. chip->rear_opened--;
  968. ymfpci_close_extension(chip);
  969. }
  970. spin_unlock_irq(&chip->reg_lock);
  971. return snd_ymfpci_playback_close_1(substream);
  972. }
  973. static int snd_ymfpci_capture_close(struct snd_pcm_substream *substream)
  974. {
  975. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  976. struct snd_pcm_runtime *runtime = substream->runtime;
  977. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  978. if (ypcm != NULL) {
  979. chip->capture_substream[ypcm->capture_bank_number] = NULL;
  980. snd_ymfpci_hw_stop(chip);
  981. }
  982. return 0;
  983. }
  984. static struct snd_pcm_ops snd_ymfpci_playback_ops = {
  985. .open = snd_ymfpci_playback_open,
  986. .close = snd_ymfpci_playback_close,
  987. .ioctl = snd_pcm_lib_ioctl,
  988. .hw_params = snd_ymfpci_playback_hw_params,
  989. .hw_free = snd_ymfpci_playback_hw_free,
  990. .prepare = snd_ymfpci_playback_prepare,
  991. .trigger = snd_ymfpci_playback_trigger,
  992. .pointer = snd_ymfpci_playback_pointer,
  993. };
  994. static struct snd_pcm_ops snd_ymfpci_capture_rec_ops = {
  995. .open = snd_ymfpci_capture_rec_open,
  996. .close = snd_ymfpci_capture_close,
  997. .ioctl = snd_pcm_lib_ioctl,
  998. .hw_params = snd_ymfpci_capture_hw_params,
  999. .hw_free = snd_ymfpci_capture_hw_free,
  1000. .prepare = snd_ymfpci_capture_prepare,
  1001. .trigger = snd_ymfpci_capture_trigger,
  1002. .pointer = snd_ymfpci_capture_pointer,
  1003. };
  1004. int __devinit snd_ymfpci_pcm(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
  1005. {
  1006. struct snd_pcm *pcm;
  1007. int err;
  1008. if (rpcm)
  1009. *rpcm = NULL;
  1010. if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0)
  1011. return err;
  1012. pcm->private_data = chip;
  1013. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops);
  1014. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops);
  1015. /* global setup */
  1016. pcm->info_flags = 0;
  1017. strcpy(pcm->name, "YMFPCI");
  1018. chip->pcm = pcm;
  1019. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1020. snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
  1021. if (rpcm)
  1022. *rpcm = pcm;
  1023. return 0;
  1024. }
  1025. static struct snd_pcm_ops snd_ymfpci_capture_ac97_ops = {
  1026. .open = snd_ymfpci_capture_ac97_open,
  1027. .close = snd_ymfpci_capture_close,
  1028. .ioctl = snd_pcm_lib_ioctl,
  1029. .hw_params = snd_ymfpci_capture_hw_params,
  1030. .hw_free = snd_ymfpci_capture_hw_free,
  1031. .prepare = snd_ymfpci_capture_prepare,
  1032. .trigger = snd_ymfpci_capture_trigger,
  1033. .pointer = snd_ymfpci_capture_pointer,
  1034. };
  1035. int __devinit snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
  1036. {
  1037. struct snd_pcm *pcm;
  1038. int err;
  1039. if (rpcm)
  1040. *rpcm = NULL;
  1041. if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0)
  1042. return err;
  1043. pcm->private_data = chip;
  1044. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops);
  1045. /* global setup */
  1046. pcm->info_flags = 0;
  1047. sprintf(pcm->name, "YMFPCI - %s",
  1048. chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97");
  1049. chip->pcm2 = pcm;
  1050. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1051. snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
  1052. if (rpcm)
  1053. *rpcm = pcm;
  1054. return 0;
  1055. }
  1056. static struct snd_pcm_ops snd_ymfpci_playback_spdif_ops = {
  1057. .open = snd_ymfpci_playback_spdif_open,
  1058. .close = snd_ymfpci_playback_spdif_close,
  1059. .ioctl = snd_pcm_lib_ioctl,
  1060. .hw_params = snd_ymfpci_playback_hw_params,
  1061. .hw_free = snd_ymfpci_playback_hw_free,
  1062. .prepare = snd_ymfpci_playback_prepare,
  1063. .trigger = snd_ymfpci_playback_trigger,
  1064. .pointer = snd_ymfpci_playback_pointer,
  1065. };
  1066. int __devinit snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
  1067. {
  1068. struct snd_pcm *pcm;
  1069. int err;
  1070. if (rpcm)
  1071. *rpcm = NULL;
  1072. if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0)
  1073. return err;
  1074. pcm->private_data = chip;
  1075. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops);
  1076. /* global setup */
  1077. pcm->info_flags = 0;
  1078. strcpy(pcm->name, "YMFPCI - IEC958");
  1079. chip->pcm_spdif = pcm;
  1080. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1081. snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
  1082. if (rpcm)
  1083. *rpcm = pcm;
  1084. return 0;
  1085. }
  1086. static struct snd_pcm_ops snd_ymfpci_playback_4ch_ops = {
  1087. .open = snd_ymfpci_playback_4ch_open,
  1088. .close = snd_ymfpci_playback_4ch_close,
  1089. .ioctl = snd_pcm_lib_ioctl,
  1090. .hw_params = snd_ymfpci_playback_hw_params,
  1091. .hw_free = snd_ymfpci_playback_hw_free,
  1092. .prepare = snd_ymfpci_playback_prepare,
  1093. .trigger = snd_ymfpci_playback_trigger,
  1094. .pointer = snd_ymfpci_playback_pointer,
  1095. };
  1096. int __devinit snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
  1097. {
  1098. struct snd_pcm *pcm;
  1099. int err;
  1100. if (rpcm)
  1101. *rpcm = NULL;
  1102. if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0)
  1103. return err;
  1104. pcm->private_data = chip;
  1105. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops);
  1106. /* global setup */
  1107. pcm->info_flags = 0;
  1108. strcpy(pcm->name, "YMFPCI - Rear PCM");
  1109. chip->pcm_4ch = pcm;
  1110. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1111. snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
  1112. if (rpcm)
  1113. *rpcm = pcm;
  1114. return 0;
  1115. }
  1116. static int snd_ymfpci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1117. {
  1118. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1119. uinfo->count = 1;
  1120. return 0;
  1121. }
  1122. static int snd_ymfpci_spdif_default_get(struct snd_kcontrol *kcontrol,
  1123. struct snd_ctl_elem_value *ucontrol)
  1124. {
  1125. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1126. spin_lock_irq(&chip->reg_lock);
  1127. ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff;
  1128. ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff;
  1129. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
  1130. spin_unlock_irq(&chip->reg_lock);
  1131. return 0;
  1132. }
  1133. static int snd_ymfpci_spdif_default_put(struct snd_kcontrol *kcontrol,
  1134. struct snd_ctl_elem_value *ucontrol)
  1135. {
  1136. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1137. unsigned int val;
  1138. int change;
  1139. val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
  1140. (ucontrol->value.iec958.status[1] << 8);
  1141. spin_lock_irq(&chip->reg_lock);
  1142. change = chip->spdif_bits != val;
  1143. chip->spdif_bits = val;
  1144. if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL)
  1145. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
  1146. spin_unlock_irq(&chip->reg_lock);
  1147. return change;
  1148. }
  1149. static struct snd_kcontrol_new snd_ymfpci_spdif_default __devinitdata =
  1150. {
  1151. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1152. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  1153. .info = snd_ymfpci_spdif_default_info,
  1154. .get = snd_ymfpci_spdif_default_get,
  1155. .put = snd_ymfpci_spdif_default_put
  1156. };
  1157. static int snd_ymfpci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1158. {
  1159. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1160. uinfo->count = 1;
  1161. return 0;
  1162. }
  1163. static int snd_ymfpci_spdif_mask_get(struct snd_kcontrol *kcontrol,
  1164. struct snd_ctl_elem_value *ucontrol)
  1165. {
  1166. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1167. spin_lock_irq(&chip->reg_lock);
  1168. ucontrol->value.iec958.status[0] = 0x3e;
  1169. ucontrol->value.iec958.status[1] = 0xff;
  1170. spin_unlock_irq(&chip->reg_lock);
  1171. return 0;
  1172. }
  1173. static struct snd_kcontrol_new snd_ymfpci_spdif_mask __devinitdata =
  1174. {
  1175. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1176. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1177. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
  1178. .info = snd_ymfpci_spdif_mask_info,
  1179. .get = snd_ymfpci_spdif_mask_get,
  1180. };
  1181. static int snd_ymfpci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1182. {
  1183. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1184. uinfo->count = 1;
  1185. return 0;
  1186. }
  1187. static int snd_ymfpci_spdif_stream_get(struct snd_kcontrol *kcontrol,
  1188. struct snd_ctl_elem_value *ucontrol)
  1189. {
  1190. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1191. spin_lock_irq(&chip->reg_lock);
  1192. ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff;
  1193. ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff;
  1194. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
  1195. spin_unlock_irq(&chip->reg_lock);
  1196. return 0;
  1197. }
  1198. static int snd_ymfpci_spdif_stream_put(struct snd_kcontrol *kcontrol,
  1199. struct snd_ctl_elem_value *ucontrol)
  1200. {
  1201. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1202. unsigned int val;
  1203. int change;
  1204. val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
  1205. (ucontrol->value.iec958.status[1] << 8);
  1206. spin_lock_irq(&chip->reg_lock);
  1207. change = chip->spdif_pcm_bits != val;
  1208. chip->spdif_pcm_bits = val;
  1209. if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2))
  1210. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
  1211. spin_unlock_irq(&chip->reg_lock);
  1212. return change;
  1213. }
  1214. static struct snd_kcontrol_new snd_ymfpci_spdif_stream __devinitdata =
  1215. {
  1216. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
  1217. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1218. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
  1219. .info = snd_ymfpci_spdif_stream_info,
  1220. .get = snd_ymfpci_spdif_stream_get,
  1221. .put = snd_ymfpci_spdif_stream_put
  1222. };
  1223. static int snd_ymfpci_drec_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *info)
  1224. {
  1225. static char *texts[3] = {"AC'97", "IEC958", "ZV Port"};
  1226. info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1227. info->count = 1;
  1228. info->value.enumerated.items = 3;
  1229. if (info->value.enumerated.item > 2)
  1230. info->value.enumerated.item = 2;
  1231. strcpy(info->value.enumerated.name, texts[info->value.enumerated.item]);
  1232. return 0;
  1233. }
  1234. static int snd_ymfpci_drec_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
  1235. {
  1236. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1237. u16 reg;
  1238. spin_lock_irq(&chip->reg_lock);
  1239. reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
  1240. spin_unlock_irq(&chip->reg_lock);
  1241. if (!(reg & 0x100))
  1242. value->value.enumerated.item[0] = 0;
  1243. else
  1244. value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0);
  1245. return 0;
  1246. }
  1247. static int snd_ymfpci_drec_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
  1248. {
  1249. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1250. u16 reg, old_reg;
  1251. spin_lock_irq(&chip->reg_lock);
  1252. old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
  1253. if (value->value.enumerated.item[0] == 0)
  1254. reg = old_reg & ~0x100;
  1255. else
  1256. reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9);
  1257. snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg);
  1258. spin_unlock_irq(&chip->reg_lock);
  1259. return reg != old_reg;
  1260. }
  1261. static struct snd_kcontrol_new snd_ymfpci_drec_source __devinitdata = {
  1262. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
  1263. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1264. .name = "Direct Recording Source",
  1265. .info = snd_ymfpci_drec_source_info,
  1266. .get = snd_ymfpci_drec_source_get,
  1267. .put = snd_ymfpci_drec_source_put
  1268. };
  1269. /*
  1270. * Mixer controls
  1271. */
  1272. #define YMFPCI_SINGLE(xname, xindex, reg, shift) \
  1273. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  1274. .info = snd_ymfpci_info_single, \
  1275. .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \
  1276. .private_value = ((reg) | ((shift) << 16)) }
  1277. #define snd_ymfpci_info_single snd_ctl_boolean_mono_info
  1278. static int snd_ymfpci_get_single(struct snd_kcontrol *kcontrol,
  1279. struct snd_ctl_elem_value *ucontrol)
  1280. {
  1281. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1282. int reg = kcontrol->private_value & 0xffff;
  1283. unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
  1284. unsigned int mask = 1;
  1285. switch (reg) {
  1286. case YDSXGR_SPDIFOUTCTRL: break;
  1287. case YDSXGR_SPDIFINCTRL: break;
  1288. default: return -EINVAL;
  1289. }
  1290. ucontrol->value.integer.value[0] =
  1291. (snd_ymfpci_readl(chip, reg) >> shift) & mask;
  1292. return 0;
  1293. }
  1294. static int snd_ymfpci_put_single(struct snd_kcontrol *kcontrol,
  1295. struct snd_ctl_elem_value *ucontrol)
  1296. {
  1297. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1298. int reg = kcontrol->private_value & 0xffff;
  1299. unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
  1300. unsigned int mask = 1;
  1301. int change;
  1302. unsigned int val, oval;
  1303. switch (reg) {
  1304. case YDSXGR_SPDIFOUTCTRL: break;
  1305. case YDSXGR_SPDIFINCTRL: break;
  1306. default: return -EINVAL;
  1307. }
  1308. val = (ucontrol->value.integer.value[0] & mask);
  1309. val <<= shift;
  1310. spin_lock_irq(&chip->reg_lock);
  1311. oval = snd_ymfpci_readl(chip, reg);
  1312. val = (oval & ~(mask << shift)) | val;
  1313. change = val != oval;
  1314. snd_ymfpci_writel(chip, reg, val);
  1315. spin_unlock_irq(&chip->reg_lock);
  1316. return change;
  1317. }
  1318. static const DECLARE_TLV_DB_LINEAR(db_scale_native, TLV_DB_GAIN_MUTE, 0);
  1319. #define YMFPCI_DOUBLE(xname, xindex, reg) \
  1320. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  1321. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
  1322. .info = snd_ymfpci_info_double, \
  1323. .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \
  1324. .private_value = reg, \
  1325. .tlv = { .p = db_scale_native } }
  1326. static int snd_ymfpci_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1327. {
  1328. unsigned int reg = kcontrol->private_value;
  1329. if (reg < 0x80 || reg >= 0xc0)
  1330. return -EINVAL;
  1331. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1332. uinfo->count = 2;
  1333. uinfo->value.integer.min = 0;
  1334. uinfo->value.integer.max = 16383;
  1335. return 0;
  1336. }
  1337. static int snd_ymfpci_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1338. {
  1339. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1340. unsigned int reg = kcontrol->private_value;
  1341. unsigned int shift_left = 0, shift_right = 16, mask = 16383;
  1342. unsigned int val;
  1343. if (reg < 0x80 || reg >= 0xc0)
  1344. return -EINVAL;
  1345. spin_lock_irq(&chip->reg_lock);
  1346. val = snd_ymfpci_readl(chip, reg);
  1347. spin_unlock_irq(&chip->reg_lock);
  1348. ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
  1349. ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
  1350. return 0;
  1351. }
  1352. static int snd_ymfpci_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1353. {
  1354. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1355. unsigned int reg = kcontrol->private_value;
  1356. unsigned int shift_left = 0, shift_right = 16, mask = 16383;
  1357. int change;
  1358. unsigned int val1, val2, oval;
  1359. if (reg < 0x80 || reg >= 0xc0)
  1360. return -EINVAL;
  1361. val1 = ucontrol->value.integer.value[0] & mask;
  1362. val2 = ucontrol->value.integer.value[1] & mask;
  1363. val1 <<= shift_left;
  1364. val2 <<= shift_right;
  1365. spin_lock_irq(&chip->reg_lock);
  1366. oval = snd_ymfpci_readl(chip, reg);
  1367. val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
  1368. change = val1 != oval;
  1369. snd_ymfpci_writel(chip, reg, val1);
  1370. spin_unlock_irq(&chip->reg_lock);
  1371. return change;
  1372. }
  1373. static int snd_ymfpci_put_nativedacvol(struct snd_kcontrol *kcontrol,
  1374. struct snd_ctl_elem_value *ucontrol)
  1375. {
  1376. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1377. unsigned int reg = YDSXGR_NATIVEDACOUTVOL;
  1378. unsigned int reg2 = YDSXGR_BUF441OUTVOL;
  1379. int change;
  1380. unsigned int value, oval;
  1381. value = ucontrol->value.integer.value[0] & 0x3fff;
  1382. value |= (ucontrol->value.integer.value[1] & 0x3fff) << 16;
  1383. spin_lock_irq(&chip->reg_lock);
  1384. oval = snd_ymfpci_readl(chip, reg);
  1385. change = value != oval;
  1386. snd_ymfpci_writel(chip, reg, value);
  1387. snd_ymfpci_writel(chip, reg2, value);
  1388. spin_unlock_irq(&chip->reg_lock);
  1389. return change;
  1390. }
  1391. /*
  1392. * 4ch duplication
  1393. */
  1394. #define snd_ymfpci_info_dup4ch snd_ctl_boolean_mono_info
  1395. static int snd_ymfpci_get_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1396. {
  1397. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1398. ucontrol->value.integer.value[0] = chip->mode_dup4ch;
  1399. return 0;
  1400. }
  1401. static int snd_ymfpci_put_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1402. {
  1403. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1404. int change;
  1405. change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch);
  1406. if (change)
  1407. chip->mode_dup4ch = !!ucontrol->value.integer.value[0];
  1408. return change;
  1409. }
  1410. static struct snd_kcontrol_new snd_ymfpci_controls[] __devinitdata = {
  1411. {
  1412. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1413. .name = "Wave Playback Volume",
  1414. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1415. SNDRV_CTL_ELEM_ACCESS_TLV_READ,
  1416. .info = snd_ymfpci_info_double,
  1417. .get = snd_ymfpci_get_double,
  1418. .put = snd_ymfpci_put_nativedacvol,
  1419. .private_value = YDSXGR_NATIVEDACOUTVOL,
  1420. .tlv = { .p = db_scale_native },
  1421. },
  1422. YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL),
  1423. YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL),
  1424. YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL),
  1425. YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL),
  1426. YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL),
  1427. YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL),
  1428. YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL),
  1429. YMFPCI_DOUBLE("FM Legacy Volume", 0, YDSXGR_LEGACYOUTVOL),
  1430. YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL),
  1431. YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL),
  1432. YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL),
  1433. YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL),
  1434. YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0),
  1435. YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0),
  1436. YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4),
  1437. {
  1438. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1439. .name = "4ch Duplication",
  1440. .info = snd_ymfpci_info_dup4ch,
  1441. .get = snd_ymfpci_get_dup4ch,
  1442. .put = snd_ymfpci_put_dup4ch,
  1443. },
  1444. };
  1445. /*
  1446. * GPIO
  1447. */
  1448. static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin)
  1449. {
  1450. u16 reg, mode;
  1451. unsigned long flags;
  1452. spin_lock_irqsave(&chip->reg_lock, flags);
  1453. reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
  1454. reg &= ~(1 << (pin + 8));
  1455. reg |= (1 << pin);
  1456. snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
  1457. /* set the level mode for input line */
  1458. mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG);
  1459. mode &= ~(3 << (pin * 2));
  1460. snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode);
  1461. snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
  1462. mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS);
  1463. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1464. return (mode >> pin) & 1;
  1465. }
  1466. static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable)
  1467. {
  1468. u16 reg;
  1469. unsigned long flags;
  1470. spin_lock_irqsave(&chip->reg_lock, flags);
  1471. reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
  1472. reg &= ~(1 << pin);
  1473. reg &= ~(1 << (pin + 8));
  1474. snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
  1475. snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin);
  1476. snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
  1477. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1478. return 0;
  1479. }
  1480. #define snd_ymfpci_gpio_sw_info snd_ctl_boolean_mono_info
  1481. static int snd_ymfpci_gpio_sw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1482. {
  1483. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1484. int pin = (int)kcontrol->private_value;
  1485. ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
  1486. return 0;
  1487. }
  1488. static int snd_ymfpci_gpio_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1489. {
  1490. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1491. int pin = (int)kcontrol->private_value;
  1492. if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) {
  1493. snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]);
  1494. ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
  1495. return 1;
  1496. }
  1497. return 0;
  1498. }
  1499. static struct snd_kcontrol_new snd_ymfpci_rear_shared __devinitdata = {
  1500. .name = "Shared Rear/Line-In Switch",
  1501. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1502. .info = snd_ymfpci_gpio_sw_info,
  1503. .get = snd_ymfpci_gpio_sw_get,
  1504. .put = snd_ymfpci_gpio_sw_put,
  1505. .private_value = 2,
  1506. };
  1507. /*
  1508. * PCM voice volume
  1509. */
  1510. static int snd_ymfpci_pcm_vol_info(struct snd_kcontrol *kcontrol,
  1511. struct snd_ctl_elem_info *uinfo)
  1512. {
  1513. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1514. uinfo->count = 2;
  1515. uinfo->value.integer.min = 0;
  1516. uinfo->value.integer.max = 0x8000;
  1517. return 0;
  1518. }
  1519. static int snd_ymfpci_pcm_vol_get(struct snd_kcontrol *kcontrol,
  1520. struct snd_ctl_elem_value *ucontrol)
  1521. {
  1522. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1523. unsigned int subs = kcontrol->id.subdevice;
  1524. ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left;
  1525. ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right;
  1526. return 0;
  1527. }
  1528. static int snd_ymfpci_pcm_vol_put(struct snd_kcontrol *kcontrol,
  1529. struct snd_ctl_elem_value *ucontrol)
  1530. {
  1531. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1532. unsigned int subs = kcontrol->id.subdevice;
  1533. struct snd_pcm_substream *substream;
  1534. unsigned long flags;
  1535. if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left ||
  1536. ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) {
  1537. chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0];
  1538. chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1];
  1539. substream = (struct snd_pcm_substream *)kcontrol->private_value;
  1540. spin_lock_irqsave(&chip->voice_lock, flags);
  1541. if (substream->runtime && substream->runtime->private_data) {
  1542. struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
  1543. if (!ypcm->use_441_slot)
  1544. ypcm->update_pcm_vol = 2;
  1545. }
  1546. spin_unlock_irqrestore(&chip->voice_lock, flags);
  1547. return 1;
  1548. }
  1549. return 0;
  1550. }
  1551. static struct snd_kcontrol_new snd_ymfpci_pcm_volume __devinitdata = {
  1552. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1553. .name = "PCM Playback Volume",
  1554. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1555. SNDRV_CTL_ELEM_ACCESS_INACTIVE,
  1556. .info = snd_ymfpci_pcm_vol_info,
  1557. .get = snd_ymfpci_pcm_vol_get,
  1558. .put = snd_ymfpci_pcm_vol_put,
  1559. };
  1560. /*
  1561. * Mixer routines
  1562. */
  1563. static void snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
  1564. {
  1565. struct snd_ymfpci *chip = bus->private_data;
  1566. chip->ac97_bus = NULL;
  1567. }
  1568. static void snd_ymfpci_mixer_free_ac97(struct snd_ac97 *ac97)
  1569. {
  1570. struct snd_ymfpci *chip = ac97->private_data;
  1571. chip->ac97 = NULL;
  1572. }
  1573. int __devinit snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch)
  1574. {
  1575. struct snd_ac97_template ac97;
  1576. struct snd_kcontrol *kctl;
  1577. struct snd_pcm_substream *substream;
  1578. unsigned int idx;
  1579. int err;
  1580. static struct snd_ac97_bus_ops ops = {
  1581. .write = snd_ymfpci_codec_write,
  1582. .read = snd_ymfpci_codec_read,
  1583. };
  1584. if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
  1585. return err;
  1586. chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus;
  1587. chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */
  1588. memset(&ac97, 0, sizeof(ac97));
  1589. ac97.private_data = chip;
  1590. ac97.private_free = snd_ymfpci_mixer_free_ac97;
  1591. if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
  1592. return err;
  1593. /* to be sure */
  1594. snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS,
  1595. AC97_EA_VRA|AC97_EA_VRM, 0);
  1596. for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) {
  1597. if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0)
  1598. return err;
  1599. }
  1600. /* add S/PDIF control */
  1601. snd_assert(chip->pcm_spdif != NULL, return -EIO);
  1602. if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0)
  1603. return err;
  1604. kctl->id.device = chip->pcm_spdif->device;
  1605. if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0)
  1606. return err;
  1607. kctl->id.device = chip->pcm_spdif->device;
  1608. if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0)
  1609. return err;
  1610. kctl->id.device = chip->pcm_spdif->device;
  1611. chip->spdif_pcm_ctl = kctl;
  1612. /* direct recording source */
  1613. if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
  1614. (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0)
  1615. return err;
  1616. /*
  1617. * shared rear/line-in
  1618. */
  1619. if (rear_switch) {
  1620. if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0)
  1621. return err;
  1622. }
  1623. /* per-voice volume */
  1624. substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
  1625. for (idx = 0; idx < 32; ++idx) {
  1626. kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip);
  1627. if (!kctl)
  1628. return -ENOMEM;
  1629. kctl->id.device = chip->pcm->device;
  1630. kctl->id.subdevice = idx;
  1631. kctl->private_value = (unsigned long)substream;
  1632. if ((err = snd_ctl_add(chip->card, kctl)) < 0)
  1633. return err;
  1634. chip->pcm_mixer[idx].left = 0x8000;
  1635. chip->pcm_mixer[idx].right = 0x8000;
  1636. chip->pcm_mixer[idx].ctl = kctl;
  1637. substream = substream->next;
  1638. }
  1639. return 0;
  1640. }
  1641. /*
  1642. * timer
  1643. */
  1644. static int snd_ymfpci_timer_start(struct snd_timer *timer)
  1645. {
  1646. struct snd_ymfpci *chip;
  1647. unsigned long flags;
  1648. unsigned int count;
  1649. chip = snd_timer_chip(timer);
  1650. count = (timer->sticks << 1) - 1;
  1651. spin_lock_irqsave(&chip->reg_lock, flags);
  1652. snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count);
  1653. snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03);
  1654. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1655. return 0;
  1656. }
  1657. static int snd_ymfpci_timer_stop(struct snd_timer *timer)
  1658. {
  1659. struct snd_ymfpci *chip;
  1660. unsigned long flags;
  1661. chip = snd_timer_chip(timer);
  1662. spin_lock_irqsave(&chip->reg_lock, flags);
  1663. snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00);
  1664. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1665. return 0;
  1666. }
  1667. static int snd_ymfpci_timer_precise_resolution(struct snd_timer *timer,
  1668. unsigned long *num, unsigned long *den)
  1669. {
  1670. *num = 1;
  1671. *den = 48000;
  1672. return 0;
  1673. }
  1674. static struct snd_timer_hardware snd_ymfpci_timer_hw = {
  1675. .flags = SNDRV_TIMER_HW_AUTO,
  1676. .resolution = 20833, /* 1/fs = 20.8333...us */
  1677. .ticks = 0x8000,
  1678. .start = snd_ymfpci_timer_start,
  1679. .stop = snd_ymfpci_timer_stop,
  1680. .precise_resolution = snd_ymfpci_timer_precise_resolution,
  1681. };
  1682. int __devinit snd_ymfpci_timer(struct snd_ymfpci *chip, int device)
  1683. {
  1684. struct snd_timer *timer = NULL;
  1685. struct snd_timer_id tid;
  1686. int err;
  1687. tid.dev_class = SNDRV_TIMER_CLASS_CARD;
  1688. tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
  1689. tid.card = chip->card->number;
  1690. tid.device = device;
  1691. tid.subdevice = 0;
  1692. if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) {
  1693. strcpy(timer->name, "YMFPCI timer");
  1694. timer->private_data = chip;
  1695. timer->hw = snd_ymfpci_timer_hw;
  1696. }
  1697. chip->timer = timer;
  1698. return err;
  1699. }
  1700. /*
  1701. * proc interface
  1702. */
  1703. static void snd_ymfpci_proc_read(struct snd_info_entry *entry,
  1704. struct snd_info_buffer *buffer)
  1705. {
  1706. struct snd_ymfpci *chip = entry->private_data;
  1707. int i;
  1708. snd_iprintf(buffer, "YMFPCI\n\n");
  1709. for (i = 0; i <= YDSXGR_WORKBASE; i += 4)
  1710. snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i));
  1711. }
  1712. static int __devinit snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip)
  1713. {
  1714. struct snd_info_entry *entry;
  1715. if (! snd_card_proc_new(card, "ymfpci", &entry))
  1716. snd_info_set_text_ops(entry, chip, snd_ymfpci_proc_read);
  1717. return 0;
  1718. }
  1719. /*
  1720. * initialization routines
  1721. */
  1722. static void snd_ymfpci_aclink_reset(struct pci_dev * pci)
  1723. {
  1724. u8 cmd;
  1725. pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd);
  1726. #if 0 // force to reset
  1727. if (cmd & 0x03) {
  1728. #endif
  1729. pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
  1730. pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03);
  1731. pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
  1732. pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0);
  1733. pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0);
  1734. #if 0
  1735. }
  1736. #endif
  1737. }
  1738. static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip)
  1739. {
  1740. snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001);
  1741. }
  1742. static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip)
  1743. {
  1744. u32 val;
  1745. int timeout = 1000;
  1746. val = snd_ymfpci_readl(chip, YDSXGR_CONFIG);
  1747. if (val)
  1748. snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000);
  1749. while (timeout-- > 0) {
  1750. val = snd_ymfpci_readl(chip, YDSXGR_STATUS);
  1751. if ((val & 0x00000002) == 0)
  1752. break;
  1753. }
  1754. }
  1755. #ifdef CONFIG_SND_YMFPCI_FIRMWARE_IN_KERNEL
  1756. #include "ymfpci_image.h"
  1757. static struct firmware snd_ymfpci_dsp_microcode = {
  1758. .size = YDSXG_DSPLENGTH,
  1759. .data = (u8 *)DspInst,
  1760. };
  1761. static struct firmware snd_ymfpci_controller_microcode = {
  1762. .size = YDSXG_CTRLLENGTH,
  1763. .data = (u8 *)CntrlInst,
  1764. };
  1765. static struct firmware snd_ymfpci_controller_1e_microcode = {
  1766. .size = YDSXG_CTRLLENGTH,
  1767. .data = (u8 *)CntrlInst1E,
  1768. };
  1769. #endif
  1770. #ifdef CONFIG_SND_YMFPCI_FIRMWARE_IN_KERNEL
  1771. static int snd_ymfpci_request_firmware(struct snd_ymfpci *chip)
  1772. {
  1773. chip->dsp_microcode = &snd_ymfpci_dsp_microcode;
  1774. if (chip->device_id == PCI_DEVICE_ID_YAMAHA_724F ||
  1775. chip->device_id == PCI_DEVICE_ID_YAMAHA_740C ||
  1776. chip->device_id == PCI_DEVICE_ID_YAMAHA_744 ||
  1777. chip->device_id == PCI_DEVICE_ID_YAMAHA_754)
  1778. chip->controller_microcode =
  1779. &snd_ymfpci_controller_1e_microcode;
  1780. else
  1781. chip->controller_microcode =
  1782. &snd_ymfpci_controller_microcode;
  1783. return 0;
  1784. }
  1785. #else /* use fw_loader */
  1786. #ifdef __LITTLE_ENDIAN
  1787. static inline void snd_ymfpci_convert_from_le(const struct firmware *fw) { }
  1788. #else
  1789. static void snd_ymfpci_convert_from_le(const struct firmware *fw)
  1790. {
  1791. int i;
  1792. u32 *data = (u32 *)fw->data;
  1793. for (i = 0; i < fw->size / 4; ++i)
  1794. le32_to_cpus(&data[i]);
  1795. }
  1796. #endif
  1797. static int snd_ymfpci_request_firmware(struct snd_ymfpci *chip)
  1798. {
  1799. int err, is_1e;
  1800. const char *name;
  1801. err = request_firmware(&chip->dsp_microcode, "yamaha/ds1_dsp.fw",
  1802. &chip->pci->dev);
  1803. if (err >= 0) {
  1804. if (chip->dsp_microcode->size == YDSXG_DSPLENGTH)
  1805. snd_ymfpci_convert_from_le(chip->dsp_microcode);
  1806. else {
  1807. snd_printk(KERN_ERR "DSP microcode has wrong size\n");
  1808. err = -EINVAL;
  1809. }
  1810. }
  1811. if (err < 0)
  1812. return err;
  1813. is_1e = chip->device_id == PCI_DEVICE_ID_YAMAHA_724F ||
  1814. chip->device_id == PCI_DEVICE_ID_YAMAHA_740C ||
  1815. chip->device_id == PCI_DEVICE_ID_YAMAHA_744 ||
  1816. chip->device_id == PCI_DEVICE_ID_YAMAHA_754;
  1817. name = is_1e ? "yamaha/ds1e_ctrl.fw" : "yamaha/ds1_ctrl.fw";
  1818. err = request_firmware(&chip->controller_microcode, name,
  1819. &chip->pci->dev);
  1820. if (err >= 0) {
  1821. if (chip->controller_microcode->size == YDSXG_CTRLLENGTH)
  1822. snd_ymfpci_convert_from_le(chip->controller_microcode);
  1823. else {
  1824. snd_printk(KERN_ERR "controller microcode"
  1825. " has wrong size\n");
  1826. err = -EINVAL;
  1827. }
  1828. }
  1829. if (err < 0)
  1830. return err;
  1831. return 0;
  1832. }
  1833. MODULE_FIRMWARE("yamaha/ds1_dsp.fw");
  1834. MODULE_FIRMWARE("yamaha/ds1_ctrl.fw");
  1835. MODULE_FIRMWARE("yamaha/ds1e_ctrl.fw");
  1836. #endif
  1837. static void snd_ymfpci_download_image(struct snd_ymfpci *chip)
  1838. {
  1839. int i;
  1840. u16 ctrl;
  1841. u32 *inst;
  1842. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000);
  1843. snd_ymfpci_disable_dsp(chip);
  1844. snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000);
  1845. snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000);
  1846. snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000);
  1847. snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000);
  1848. snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000);
  1849. snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000);
  1850. snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000);
  1851. ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
  1852. snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
  1853. /* setup DSP instruction code */
  1854. inst = (u32 *)chip->dsp_microcode->data;
  1855. for (i = 0; i < YDSXG_DSPLENGTH / 4; i++)
  1856. snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2), inst[i]);
  1857. /* setup control instruction code */
  1858. inst = (u32 *)chip->controller_microcode->data;
  1859. for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++)
  1860. snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2), inst[i]);
  1861. snd_ymfpci_enable_dsp(chip);
  1862. }
  1863. static int __devinit snd_ymfpci_memalloc(struct snd_ymfpci *chip)
  1864. {
  1865. long size, playback_ctrl_size;
  1866. int voice, bank, reg;
  1867. u8 *ptr;
  1868. dma_addr_t ptr_addr;
  1869. playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES;
  1870. chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2;
  1871. chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2;
  1872. chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2;
  1873. chip->work_size = YDSXG_DEFAULT_WORK_SIZE;
  1874. size = ALIGN(playback_ctrl_size, 0x100) +
  1875. ALIGN(chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES, 0x100) +
  1876. ALIGN(chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES, 0x100) +
  1877. ALIGN(chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES, 0x100) +
  1878. chip->work_size;
  1879. /* work_ptr must be aligned to 256 bytes, but it's already
  1880. covered with the kernel page allocation mechanism */
  1881. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
  1882. size, &chip->work_ptr) < 0)
  1883. return -ENOMEM;
  1884. ptr = chip->work_ptr.area;
  1885. ptr_addr = chip->work_ptr.addr;
  1886. memset(ptr, 0, size); /* for sure */
  1887. chip->bank_base_playback = ptr;
  1888. chip->bank_base_playback_addr = ptr_addr;
  1889. chip->ctrl_playback = (u32 *)ptr;
  1890. chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES);
  1891. ptr += ALIGN(playback_ctrl_size, 0x100);
  1892. ptr_addr += ALIGN(playback_ctrl_size, 0x100);
  1893. for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) {
  1894. chip->voices[voice].number = voice;
  1895. chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr;
  1896. chip->voices[voice].bank_addr = ptr_addr;
  1897. for (bank = 0; bank < 2; bank++) {
  1898. chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr;
  1899. ptr += chip->bank_size_playback;
  1900. ptr_addr += chip->bank_size_playback;
  1901. }
  1902. }
  1903. ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
  1904. ptr_addr = ALIGN(ptr_addr, 0x100);
  1905. chip->bank_base_capture = ptr;
  1906. chip->bank_base_capture_addr = ptr_addr;
  1907. for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++)
  1908. for (bank = 0; bank < 2; bank++) {
  1909. chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr;
  1910. ptr += chip->bank_size_capture;
  1911. ptr_addr += chip->bank_size_capture;
  1912. }
  1913. ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
  1914. ptr_addr = ALIGN(ptr_addr, 0x100);
  1915. chip->bank_base_effect = ptr;
  1916. chip->bank_base_effect_addr = ptr_addr;
  1917. for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++)
  1918. for (bank = 0; bank < 2; bank++) {
  1919. chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr;
  1920. ptr += chip->bank_size_effect;
  1921. ptr_addr += chip->bank_size_effect;
  1922. }
  1923. ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
  1924. ptr_addr = ALIGN(ptr_addr, 0x100);
  1925. chip->work_base = ptr;
  1926. chip->work_base_addr = ptr_addr;
  1927. snd_assert(ptr + chip->work_size == chip->work_ptr.area + chip->work_ptr.bytes, );
  1928. snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr);
  1929. snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr);
  1930. snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr);
  1931. snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr);
  1932. snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2);
  1933. /* S/PDIF output initialization */
  1934. chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff;
  1935. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0);
  1936. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
  1937. /* S/PDIF input initialization */
  1938. snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0);
  1939. /* digital mixer setup */
  1940. for (reg = 0x80; reg < 0xc0; reg += 4)
  1941. snd_ymfpci_writel(chip, reg, 0);
  1942. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff);
  1943. snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff);
  1944. snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff);
  1945. snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff);
  1946. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff);
  1947. snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff);
  1948. snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff);
  1949. return 0;
  1950. }
  1951. static int snd_ymfpci_free(struct snd_ymfpci *chip)
  1952. {
  1953. u16 ctrl;
  1954. snd_assert(chip != NULL, return -EINVAL);
  1955. if (chip->res_reg_area) { /* don't touch busy hardware */
  1956. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
  1957. snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
  1958. snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0);
  1959. snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0);
  1960. snd_ymfpci_disable_dsp(chip);
  1961. snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0);
  1962. snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0);
  1963. snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0);
  1964. snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0);
  1965. snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0);
  1966. ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
  1967. snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
  1968. }
  1969. snd_ymfpci_ac3_done(chip);
  1970. /* Set PCI device to D3 state */
  1971. #if 0
  1972. /* FIXME: temporarily disabled, otherwise we cannot fire up
  1973. * the chip again unless reboot. ACPI bug?
  1974. */
  1975. pci_set_power_state(chip->pci, 3);
  1976. #endif
  1977. #ifdef CONFIG_PM
  1978. vfree(chip->saved_regs);
  1979. #endif
  1980. release_and_free_resource(chip->mpu_res);
  1981. release_and_free_resource(chip->fm_res);
  1982. snd_ymfpci_free_gameport(chip);
  1983. if (chip->reg_area_virt)
  1984. iounmap(chip->reg_area_virt);
  1985. if (chip->work_ptr.area)
  1986. snd_dma_free_pages(&chip->work_ptr);
  1987. if (chip->irq >= 0)
  1988. free_irq(chip->irq, chip);
  1989. release_and_free_resource(chip->res_reg_area);
  1990. pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl);
  1991. pci_disable_device(chip->pci);
  1992. #ifndef CONFIG_SND_YMFPCI_FIRMWARE_IN_KERNEL
  1993. release_firmware(chip->dsp_microcode);
  1994. release_firmware(chip->controller_microcode);
  1995. #endif
  1996. kfree(chip);
  1997. return 0;
  1998. }
  1999. static int snd_ymfpci_dev_free(struct snd_device *device)
  2000. {
  2001. struct snd_ymfpci *chip = device->device_data;
  2002. return snd_ymfpci_free(chip);
  2003. }
  2004. #ifdef CONFIG_PM
  2005. static int saved_regs_index[] = {
  2006. /* spdif */
  2007. YDSXGR_SPDIFOUTCTRL,
  2008. YDSXGR_SPDIFOUTSTATUS,
  2009. YDSXGR_SPDIFINCTRL,
  2010. /* volumes */
  2011. YDSXGR_PRIADCLOOPVOL,
  2012. YDSXGR_NATIVEDACINVOL,
  2013. YDSXGR_NATIVEDACOUTVOL,
  2014. YDSXGR_BUF441OUTVOL,
  2015. YDSXGR_NATIVEADCINVOL,
  2016. YDSXGR_SPDIFLOOPVOL,
  2017. YDSXGR_SPDIFOUTVOL,
  2018. YDSXGR_ZVOUTVOL,
  2019. YDSXGR_LEGACYOUTVOL,
  2020. /* address bases */
  2021. YDSXGR_PLAYCTRLBASE,
  2022. YDSXGR_RECCTRLBASE,
  2023. YDSXGR_EFFCTRLBASE,
  2024. YDSXGR_WORKBASE,
  2025. /* capture set up */
  2026. YDSXGR_MAPOFREC,
  2027. YDSXGR_RECFORMAT,
  2028. YDSXGR_RECSLOTSR,
  2029. YDSXGR_ADCFORMAT,
  2030. YDSXGR_ADCSLOTSR,
  2031. };
  2032. #define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index)
  2033. int snd_ymfpci_suspend(struct pci_dev *pci, pm_message_t state)
  2034. {
  2035. struct snd_card *card = pci_get_drvdata(pci);
  2036. struct snd_ymfpci *chip = card->private_data;
  2037. unsigned int i;
  2038. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  2039. snd_pcm_suspend_all(chip->pcm);
  2040. snd_pcm_suspend_all(chip->pcm2);
  2041. snd_pcm_suspend_all(chip->pcm_spdif);
  2042. snd_pcm_suspend_all(chip->pcm_4ch);
  2043. snd_ac97_suspend(chip->ac97);
  2044. for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
  2045. chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]);
  2046. chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE);
  2047. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
  2048. snd_ymfpci_disable_dsp(chip);
  2049. pci_disable_device(pci);
  2050. pci_save_state(pci);
  2051. pci_set_power_state(pci, pci_choose_state(pci, state));
  2052. return 0;
  2053. }
  2054. int snd_ymfpci_resume(struct pci_dev *pci)
  2055. {
  2056. struct snd_card *card = pci_get_drvdata(pci);
  2057. struct snd_ymfpci *chip = card->private_data;
  2058. unsigned int i;
  2059. pci_set_power_state(pci, PCI_D0);
  2060. pci_restore_state(pci);
  2061. if (pci_enable_device(pci) < 0) {
  2062. printk(KERN_ERR "ymfpci: pci_enable_device failed, "
  2063. "disabling device\n");
  2064. snd_card_disconnect(card);
  2065. return -EIO;
  2066. }
  2067. pci_set_master(pci);
  2068. snd_ymfpci_aclink_reset(pci);
  2069. snd_ymfpci_codec_ready(chip, 0);
  2070. snd_ymfpci_download_image(chip);
  2071. udelay(100);
  2072. for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
  2073. snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]);
  2074. snd_ac97_resume(chip->ac97);
  2075. /* start hw again */
  2076. if (chip->start_count > 0) {
  2077. spin_lock_irq(&chip->reg_lock);
  2078. snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode);
  2079. chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT);
  2080. spin_unlock_irq(&chip->reg_lock);
  2081. }
  2082. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  2083. return 0;
  2084. }
  2085. #endif /* CONFIG_PM */
  2086. int __devinit snd_ymfpci_create(struct snd_card *card,
  2087. struct pci_dev * pci,
  2088. unsigned short old_legacy_ctrl,
  2089. struct snd_ymfpci ** rchip)
  2090. {
  2091. struct snd_ymfpci *chip;
  2092. int err;
  2093. static struct snd_device_ops ops = {
  2094. .dev_free = snd_ymfpci_dev_free,
  2095. };
  2096. *rchip = NULL;
  2097. /* enable PCI device */
  2098. if ((err = pci_enable_device(pci)) < 0)
  2099. return err;
  2100. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  2101. if (chip == NULL) {
  2102. pci_disable_device(pci);
  2103. return -ENOMEM;
  2104. }
  2105. chip->old_legacy_ctrl = old_legacy_ctrl;
  2106. spin_lock_init(&chip->reg_lock);
  2107. spin_lock_init(&chip->voice_lock);
  2108. init_waitqueue_head(&chip->interrupt_sleep);
  2109. atomic_set(&chip->interrupt_sleep_count, 0);
  2110. chip->card = card;
  2111. chip->pci = pci;
  2112. chip->irq = -1;
  2113. chip->device_id = pci->device;
  2114. chip->rev = pci->revision;
  2115. chip->reg_area_phys = pci_resource_start(pci, 0);
  2116. chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000);
  2117. pci_set_master(pci);
  2118. chip->src441_used = -1;
  2119. if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) {
  2120. snd_printk(KERN_ERR "unable to grab memory region 0x%lx-0x%lx\n", chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1);
  2121. snd_ymfpci_free(chip);
  2122. return -EBUSY;
  2123. }
  2124. if (request_irq(pci->irq, snd_ymfpci_interrupt, IRQF_SHARED,
  2125. "YMFPCI", chip)) {
  2126. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  2127. snd_ymfpci_free(chip);
  2128. return -EBUSY;
  2129. }
  2130. chip->irq = pci->irq;
  2131. snd_ymfpci_aclink_reset(pci);
  2132. if (snd_ymfpci_codec_ready(chip, 0) < 0) {
  2133. snd_ymfpci_free(chip);
  2134. return -EIO;
  2135. }
  2136. err = snd_ymfpci_request_firmware(chip);
  2137. if (err < 0) {
  2138. snd_printk(KERN_ERR "firmware request failed: %d\n", err);
  2139. snd_ymfpci_free(chip);
  2140. return err;
  2141. }
  2142. snd_ymfpci_download_image(chip);
  2143. udelay(100); /* seems we need a delay after downloading image.. */
  2144. if (snd_ymfpci_memalloc(chip) < 0) {
  2145. snd_ymfpci_free(chip);
  2146. return -EIO;
  2147. }
  2148. if ((err = snd_ymfpci_ac3_init(chip)) < 0) {
  2149. snd_ymfpci_free(chip);
  2150. return err;
  2151. }
  2152. #ifdef CONFIG_PM
  2153. chip->saved_regs = vmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32));
  2154. if (chip->saved_regs == NULL) {
  2155. snd_ymfpci_free(chip);
  2156. return -ENOMEM;
  2157. }
  2158. #endif
  2159. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
  2160. snd_ymfpci_free(chip);
  2161. return err;
  2162. }
  2163. snd_ymfpci_proc_init(card, chip);
  2164. snd_card_set_dev(card, &pci->dev);
  2165. *rchip = chip;
  2166. return 0;
  2167. }