aureon.c 61 KB

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  1. /*
  2. * ALSA driver for ICEnsemble VT1724 (Envy24HT)
  3. *
  4. * Lowlevel functions for Terratec Aureon cards
  5. *
  6. * Copyright (c) 2003 Takashi Iwai <tiwai@suse.de>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. *
  23. * NOTES:
  24. *
  25. * - we reuse the struct snd_akm4xxx record for storing the wm8770 codec data.
  26. * both wm and akm codecs are pretty similar, so we can integrate
  27. * both controls in the future, once if wm codecs are reused in
  28. * many boards.
  29. *
  30. * - DAC digital volumes are not implemented in the mixer.
  31. * if they show better response than DAC analog volumes, we can use them
  32. * instead.
  33. *
  34. * Lowlevel functions for AudioTrak Prodigy 7.1 (and possibly 192) cards
  35. * Copyright (c) 2003 Dimitromanolakis Apostolos <apostol@cs.utoronto.ca>
  36. *
  37. * version 0.82: Stable / not all features work yet (no communication with AC97 secondary)
  38. * added 64x/128x oversampling switch (should be 64x only for 96khz)
  39. * fixed some recording labels (still need to check the rest)
  40. * recording is working probably thanks to correct wm8770 initialization
  41. *
  42. * version 0.5: Initial release:
  43. * working: analog output, mixer, headphone amplifier switch
  44. * not working: prety much everything else, at least i could verify that
  45. * we have no digital output, no capture, pretty bad clicks and poops
  46. * on mixer switch and other coll stuff.
  47. *
  48. */
  49. #include <sound/driver.h>
  50. #include <asm/io.h>
  51. #include <linux/delay.h>
  52. #include <linux/interrupt.h>
  53. #include <linux/init.h>
  54. #include <linux/slab.h>
  55. #include <linux/mutex.h>
  56. #include <sound/core.h>
  57. #include "ice1712.h"
  58. #include "envy24ht.h"
  59. #include "aureon.h"
  60. #include <sound/tlv.h>
  61. /* WM8770 registers */
  62. #define WM_DAC_ATTEN 0x00 /* DAC1-8 analog attenuation */
  63. #define WM_DAC_MASTER_ATTEN 0x08 /* DAC master analog attenuation */
  64. #define WM_DAC_DIG_ATTEN 0x09 /* DAC1-8 digital attenuation */
  65. #define WM_DAC_DIG_MASTER_ATTEN 0x11 /* DAC master digital attenuation */
  66. #define WM_PHASE_SWAP 0x12 /* DAC phase */
  67. #define WM_DAC_CTRL1 0x13 /* DAC control bits */
  68. #define WM_MUTE 0x14 /* mute controls */
  69. #define WM_DAC_CTRL2 0x15 /* de-emphasis and zefo-flag */
  70. #define WM_INT_CTRL 0x16 /* interface control */
  71. #define WM_MASTER 0x17 /* master clock and mode */
  72. #define WM_POWERDOWN 0x18 /* power-down controls */
  73. #define WM_ADC_GAIN 0x19 /* ADC gain L(19)/R(1a) */
  74. #define WM_ADC_MUX 0x1b /* input MUX */
  75. #define WM_OUT_MUX1 0x1c /* output MUX */
  76. #define WM_OUT_MUX2 0x1e /* output MUX */
  77. #define WM_RESET 0x1f /* software reset */
  78. /* CS8415A registers */
  79. #define CS8415_CTRL1 0x01
  80. #define CS8415_CTRL2 0x02
  81. #define CS8415_QSUB 0x14
  82. #define CS8415_RATIO 0x1E
  83. #define CS8415_C_BUFFER 0x20
  84. #define CS8415_ID 0x7F
  85. /* PCA9554 registers */
  86. #define PCA9554_DEV 0x40 /* I2C device address */
  87. #define PCA9554_IN 0x00 /* input port */
  88. #define PCA9554_OUT 0x01 /* output port */
  89. #define PCA9554_INVERT 0x02 /* input invert */
  90. #define PCA9554_DIR 0x03 /* port directions */
  91. /*
  92. * Aureon Universe additional controls using PCA9554
  93. */
  94. /*
  95. * Send data to pca9554
  96. */
  97. static void aureon_pca9554_write(struct snd_ice1712 *ice, unsigned char reg,
  98. unsigned char data)
  99. {
  100. unsigned int tmp;
  101. int i, j;
  102. unsigned char dev = PCA9554_DEV; /* ID 0100000, write */
  103. unsigned char val = 0;
  104. tmp = snd_ice1712_gpio_read(ice);
  105. snd_ice1712_gpio_set_mask(ice, ~(AUREON_SPI_MOSI|AUREON_SPI_CLK|
  106. AUREON_WM_RW|AUREON_WM_CS|
  107. AUREON_CS8415_CS));
  108. tmp |= AUREON_WM_RW;
  109. tmp |= AUREON_CS8415_CS | AUREON_WM_CS; /* disable SPI devices */
  110. tmp &= ~AUREON_SPI_MOSI;
  111. tmp &= ~AUREON_SPI_CLK;
  112. snd_ice1712_gpio_write(ice, tmp);
  113. udelay(50);
  114. /*
  115. * send i2c stop condition and start condition
  116. * to obtain sane state
  117. */
  118. tmp |= AUREON_SPI_CLK;
  119. snd_ice1712_gpio_write(ice, tmp);
  120. udelay(50);
  121. tmp |= AUREON_SPI_MOSI;
  122. snd_ice1712_gpio_write(ice, tmp);
  123. udelay(100);
  124. tmp &= ~AUREON_SPI_MOSI;
  125. snd_ice1712_gpio_write(ice, tmp);
  126. udelay(50);
  127. tmp &= ~AUREON_SPI_CLK;
  128. snd_ice1712_gpio_write(ice, tmp);
  129. udelay(100);
  130. /*
  131. * send device address, command and value,
  132. * skipping ack cycles inbetween
  133. */
  134. for (j = 0; j < 3; j++) {
  135. switch(j) {
  136. case 0: val = dev; break;
  137. case 1: val = reg; break;
  138. case 2: val = data; break;
  139. }
  140. for (i = 7; i >= 0; i--) {
  141. tmp &= ~AUREON_SPI_CLK;
  142. snd_ice1712_gpio_write(ice, tmp);
  143. udelay(40);
  144. if (val & (1 << i))
  145. tmp |= AUREON_SPI_MOSI;
  146. else
  147. tmp &= ~AUREON_SPI_MOSI;
  148. snd_ice1712_gpio_write(ice, tmp);
  149. udelay(40);
  150. tmp |= AUREON_SPI_CLK;
  151. snd_ice1712_gpio_write(ice, tmp);
  152. udelay(40);
  153. }
  154. tmp &= ~AUREON_SPI_CLK;
  155. snd_ice1712_gpio_write(ice, tmp);
  156. udelay(40);
  157. tmp |= AUREON_SPI_CLK;
  158. snd_ice1712_gpio_write(ice, tmp);
  159. udelay(40);
  160. tmp &= ~AUREON_SPI_CLK;
  161. snd_ice1712_gpio_write(ice, tmp);
  162. udelay(40);
  163. }
  164. tmp &= ~AUREON_SPI_CLK;
  165. snd_ice1712_gpio_write(ice, tmp);
  166. udelay(40);
  167. tmp &= ~AUREON_SPI_MOSI;
  168. snd_ice1712_gpio_write(ice, tmp);
  169. udelay(40);
  170. tmp |= AUREON_SPI_CLK;
  171. snd_ice1712_gpio_write(ice, tmp);
  172. udelay(50);
  173. tmp |= AUREON_SPI_MOSI;
  174. snd_ice1712_gpio_write(ice, tmp);
  175. udelay(100);
  176. }
  177. static int aureon_universe_inmux_info(struct snd_kcontrol *kcontrol,
  178. struct snd_ctl_elem_info *uinfo)
  179. {
  180. char *texts[3] = {"Internal Aux", "Wavetable", "Rear Line-In"};
  181. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  182. uinfo->count = 1;
  183. uinfo->value.enumerated.items = 3;
  184. if(uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  185. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  186. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  187. return 0;
  188. }
  189. static int aureon_universe_inmux_get(struct snd_kcontrol *kcontrol,
  190. struct snd_ctl_elem_value *ucontrol)
  191. {
  192. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  193. ucontrol->value.integer.value[0] = ice->spec.aureon.pca9554_out;
  194. return 0;
  195. }
  196. static int aureon_universe_inmux_put(struct snd_kcontrol *kcontrol,
  197. struct snd_ctl_elem_value *ucontrol)
  198. {
  199. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  200. unsigned char oval, nval;
  201. int change;
  202. snd_ice1712_save_gpio_status(ice);
  203. oval = ice->spec.aureon.pca9554_out;
  204. nval = ucontrol->value.integer.value[0];
  205. if ((change = (oval != nval))) {
  206. aureon_pca9554_write(ice, PCA9554_OUT, nval);
  207. ice->spec.aureon.pca9554_out = nval;
  208. }
  209. snd_ice1712_restore_gpio_status(ice);
  210. return change;
  211. }
  212. static void aureon_ac97_write(struct snd_ice1712 *ice, unsigned short reg,
  213. unsigned short val)
  214. {
  215. unsigned int tmp;
  216. /* Send address to XILINX chip */
  217. tmp = (snd_ice1712_gpio_read(ice) & ~0xFF) | (reg & 0x7F);
  218. snd_ice1712_gpio_write(ice, tmp);
  219. udelay(10);
  220. tmp |= AUREON_AC97_ADDR;
  221. snd_ice1712_gpio_write(ice, tmp);
  222. udelay(10);
  223. tmp &= ~AUREON_AC97_ADDR;
  224. snd_ice1712_gpio_write(ice, tmp);
  225. udelay(10);
  226. /* Send low-order byte to XILINX chip */
  227. tmp &= ~AUREON_AC97_DATA_MASK;
  228. tmp |= val & AUREON_AC97_DATA_MASK;
  229. snd_ice1712_gpio_write(ice, tmp);
  230. udelay(10);
  231. tmp |= AUREON_AC97_DATA_LOW;
  232. snd_ice1712_gpio_write(ice, tmp);
  233. udelay(10);
  234. tmp &= ~AUREON_AC97_DATA_LOW;
  235. snd_ice1712_gpio_write(ice, tmp);
  236. udelay(10);
  237. /* Send high-order byte to XILINX chip */
  238. tmp &= ~AUREON_AC97_DATA_MASK;
  239. tmp |= (val >> 8) & AUREON_AC97_DATA_MASK;
  240. snd_ice1712_gpio_write(ice, tmp);
  241. udelay(10);
  242. tmp |= AUREON_AC97_DATA_HIGH;
  243. snd_ice1712_gpio_write(ice, tmp);
  244. udelay(10);
  245. tmp &= ~AUREON_AC97_DATA_HIGH;
  246. snd_ice1712_gpio_write(ice, tmp);
  247. udelay(10);
  248. /* Instruct XILINX chip to parse the data to the STAC9744 chip */
  249. tmp |= AUREON_AC97_COMMIT;
  250. snd_ice1712_gpio_write(ice, tmp);
  251. udelay(10);
  252. tmp &= ~AUREON_AC97_COMMIT;
  253. snd_ice1712_gpio_write(ice, tmp);
  254. udelay(10);
  255. /* Store the data in out private buffer */
  256. ice->spec.aureon.stac9744[(reg & 0x7F) >> 1] = val;
  257. }
  258. static unsigned short aureon_ac97_read(struct snd_ice1712 *ice, unsigned short reg)
  259. {
  260. return ice->spec.aureon.stac9744[(reg & 0x7F) >> 1];
  261. }
  262. /*
  263. * Initialize STAC9744 chip
  264. */
  265. static int aureon_ac97_init (struct snd_ice1712 *ice)
  266. {
  267. int i;
  268. static const unsigned short ac97_defaults[] = {
  269. 0x00, 0x9640,
  270. 0x02, 0x8000,
  271. 0x04, 0x8000,
  272. 0x06, 0x8000,
  273. 0x0C, 0x8008,
  274. 0x0E, 0x8008,
  275. 0x10, 0x8808,
  276. 0x12, 0x8808,
  277. 0x14, 0x8808,
  278. 0x16, 0x8808,
  279. 0x18, 0x8808,
  280. 0x1C, 0x8000,
  281. 0x26, 0x000F,
  282. 0x28, 0x0201,
  283. 0x2C, 0xBB80,
  284. 0x32, 0xBB80,
  285. 0x7C, 0x8384,
  286. 0x7E, 0x7644,
  287. (unsigned short)-1
  288. };
  289. unsigned int tmp;
  290. /* Cold reset */
  291. tmp = (snd_ice1712_gpio_read(ice) | AUREON_AC97_RESET) & ~AUREON_AC97_DATA_MASK;
  292. snd_ice1712_gpio_write(ice, tmp);
  293. udelay(3);
  294. tmp &= ~AUREON_AC97_RESET;
  295. snd_ice1712_gpio_write(ice, tmp);
  296. udelay(3);
  297. tmp |= AUREON_AC97_RESET;
  298. snd_ice1712_gpio_write(ice, tmp);
  299. udelay(3);
  300. memset(&ice->spec.aureon.stac9744, 0, sizeof(ice->spec.aureon.stac9744));
  301. for (i=0; ac97_defaults[i] != (unsigned short)-1; i+=2)
  302. ice->spec.aureon.stac9744[(ac97_defaults[i]) >> 1] = ac97_defaults[i+1];
  303. aureon_ac97_write(ice, AC97_MASTER, 0x0000); // Unmute AC'97 master volume permanently - muting is done by WM8770
  304. return 0;
  305. }
  306. #define AUREON_AC97_STEREO 0x80
  307. /*
  308. * AC'97 volume controls
  309. */
  310. static int aureon_ac97_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  311. {
  312. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  313. uinfo->count = kcontrol->private_value & AUREON_AC97_STEREO ? 2 : 1;
  314. uinfo->value.integer.min = 0;
  315. uinfo->value.integer.max = 31;
  316. return 0;
  317. }
  318. static int aureon_ac97_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  319. {
  320. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  321. unsigned short vol;
  322. mutex_lock(&ice->gpio_mutex);
  323. vol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  324. ucontrol->value.integer.value[0] = 0x1F - (vol & 0x1F);
  325. if (kcontrol->private_value & AUREON_AC97_STEREO)
  326. ucontrol->value.integer.value[1] = 0x1F - ((vol >> 8) & 0x1F);
  327. mutex_unlock(&ice->gpio_mutex);
  328. return 0;
  329. }
  330. static int aureon_ac97_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  331. {
  332. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  333. unsigned short ovol, nvol;
  334. int change;
  335. snd_ice1712_save_gpio_status(ice);
  336. ovol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  337. nvol = (0x1F - ucontrol->value.integer.value[0]) & 0x001F;
  338. if (kcontrol->private_value & AUREON_AC97_STEREO)
  339. nvol |= ((0x1F - ucontrol->value.integer.value[1]) << 8) & 0x1F00;
  340. nvol |= ovol & ~0x1F1F;
  341. if ((change = (ovol != nvol)))
  342. aureon_ac97_write(ice, kcontrol->private_value & 0x7F, nvol);
  343. snd_ice1712_restore_gpio_status(ice);
  344. return change;
  345. }
  346. /*
  347. * AC'97 mute controls
  348. */
  349. #define aureon_ac97_mute_info snd_ctl_boolean_mono_info
  350. static int aureon_ac97_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  351. {
  352. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  353. mutex_lock(&ice->gpio_mutex);
  354. ucontrol->value.integer.value[0] = aureon_ac97_read(ice, kcontrol->private_value & 0x7F) & 0x8000 ? 0 : 1;
  355. mutex_unlock(&ice->gpio_mutex);
  356. return 0;
  357. }
  358. static int aureon_ac97_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  359. {
  360. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  361. unsigned short ovol, nvol;
  362. int change;
  363. snd_ice1712_save_gpio_status(ice);
  364. ovol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  365. nvol = (ucontrol->value.integer.value[0] ? 0x0000 : 0x8000) | (ovol & ~ 0x8000);
  366. if ((change = (ovol != nvol)))
  367. aureon_ac97_write(ice, kcontrol->private_value & 0x7F, nvol);
  368. snd_ice1712_restore_gpio_status(ice);
  369. return change;
  370. }
  371. /*
  372. * AC'97 mute controls
  373. */
  374. #define aureon_ac97_micboost_info snd_ctl_boolean_mono_info
  375. static int aureon_ac97_micboost_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  376. {
  377. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  378. mutex_lock(&ice->gpio_mutex);
  379. ucontrol->value.integer.value[0] = aureon_ac97_read(ice, AC97_MIC) & 0x0020 ? 0 : 1;
  380. mutex_unlock(&ice->gpio_mutex);
  381. return 0;
  382. }
  383. static int aureon_ac97_micboost_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  384. {
  385. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  386. unsigned short ovol, nvol;
  387. int change;
  388. snd_ice1712_save_gpio_status(ice);
  389. ovol = aureon_ac97_read(ice, AC97_MIC);
  390. nvol = (ucontrol->value.integer.value[0] ? 0x0000 : 0x0020) | (ovol & ~0x0020);
  391. if ((change = (ovol != nvol)))
  392. aureon_ac97_write(ice, AC97_MIC, nvol);
  393. snd_ice1712_restore_gpio_status(ice);
  394. return change;
  395. }
  396. /*
  397. * write data in the SPI mode
  398. */
  399. static void aureon_spi_write(struct snd_ice1712 *ice, unsigned int cs, unsigned int data, int bits)
  400. {
  401. unsigned int tmp;
  402. int i;
  403. unsigned int mosi, clk;
  404. tmp = snd_ice1712_gpio_read(ice);
  405. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ||
  406. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71XT) {
  407. snd_ice1712_gpio_set_mask(ice, ~(PRODIGY_SPI_MOSI|PRODIGY_SPI_CLK|PRODIGY_WM_CS));
  408. mosi = PRODIGY_SPI_MOSI;
  409. clk = PRODIGY_SPI_CLK;
  410. }
  411. else {
  412. snd_ice1712_gpio_set_mask(ice, ~(AUREON_WM_RW|AUREON_SPI_MOSI|AUREON_SPI_CLK|
  413. AUREON_WM_CS|AUREON_CS8415_CS));
  414. mosi = AUREON_SPI_MOSI;
  415. clk = AUREON_SPI_CLK;
  416. tmp |= AUREON_WM_RW;
  417. }
  418. tmp &= ~cs;
  419. snd_ice1712_gpio_write(ice, tmp);
  420. udelay(1);
  421. for (i = bits - 1; i >= 0; i--) {
  422. tmp &= ~clk;
  423. snd_ice1712_gpio_write(ice, tmp);
  424. udelay(1);
  425. if (data & (1 << i))
  426. tmp |= mosi;
  427. else
  428. tmp &= ~mosi;
  429. snd_ice1712_gpio_write(ice, tmp);
  430. udelay(1);
  431. tmp |= clk;
  432. snd_ice1712_gpio_write(ice, tmp);
  433. udelay(1);
  434. }
  435. tmp &= ~clk;
  436. tmp |= cs;
  437. snd_ice1712_gpio_write(ice, tmp);
  438. udelay(1);
  439. tmp |= clk;
  440. snd_ice1712_gpio_write(ice, tmp);
  441. udelay(1);
  442. }
  443. /*
  444. * Read data in SPI mode
  445. */
  446. static void aureon_spi_read(struct snd_ice1712 *ice, unsigned int cs, unsigned int data, int bits, unsigned char *buffer, int size) {
  447. int i, j;
  448. unsigned int tmp;
  449. tmp = (snd_ice1712_gpio_read(ice) & ~AUREON_SPI_CLK) | AUREON_CS8415_CS|AUREON_WM_CS;
  450. snd_ice1712_gpio_write(ice, tmp);
  451. tmp &= ~cs;
  452. snd_ice1712_gpio_write(ice, tmp);
  453. udelay(1);
  454. for (i=bits-1; i>=0; i--) {
  455. if (data & (1 << i))
  456. tmp |= AUREON_SPI_MOSI;
  457. else
  458. tmp &= ~AUREON_SPI_MOSI;
  459. snd_ice1712_gpio_write(ice, tmp);
  460. udelay(1);
  461. tmp |= AUREON_SPI_CLK;
  462. snd_ice1712_gpio_write(ice, tmp);
  463. udelay(1);
  464. tmp &= ~AUREON_SPI_CLK;
  465. snd_ice1712_gpio_write(ice, tmp);
  466. udelay(1);
  467. }
  468. for (j=0; j<size; j++) {
  469. unsigned char outdata = 0;
  470. for (i=7; i>=0; i--) {
  471. tmp = snd_ice1712_gpio_read(ice);
  472. outdata <<= 1;
  473. outdata |= (tmp & AUREON_SPI_MISO) ? 1 : 0;
  474. udelay(1);
  475. tmp |= AUREON_SPI_CLK;
  476. snd_ice1712_gpio_write(ice, tmp);
  477. udelay(1);
  478. tmp &= ~AUREON_SPI_CLK;
  479. snd_ice1712_gpio_write(ice, tmp);
  480. udelay(1);
  481. }
  482. buffer[j] = outdata;
  483. }
  484. tmp |= cs;
  485. snd_ice1712_gpio_write(ice, tmp);
  486. }
  487. static unsigned char aureon_cs8415_get(struct snd_ice1712 *ice, int reg) {
  488. unsigned char val;
  489. aureon_spi_write(ice, AUREON_CS8415_CS, 0x2000 | reg, 16);
  490. aureon_spi_read(ice, AUREON_CS8415_CS, 0x21, 8, &val, 1);
  491. return val;
  492. }
  493. static void aureon_cs8415_read(struct snd_ice1712 *ice, int reg, unsigned char *buffer, int size) {
  494. aureon_spi_write(ice, AUREON_CS8415_CS, 0x2000 | reg, 16);
  495. aureon_spi_read(ice, AUREON_CS8415_CS, 0x21, 8, buffer, size);
  496. }
  497. static void aureon_cs8415_put(struct snd_ice1712 *ice, int reg, unsigned char val) {
  498. aureon_spi_write(ice, AUREON_CS8415_CS, 0x200000 | (reg << 8) | val, 24);
  499. }
  500. /*
  501. * get the current register value of WM codec
  502. */
  503. static unsigned short wm_get(struct snd_ice1712 *ice, int reg)
  504. {
  505. reg <<= 1;
  506. return ((unsigned short)ice->akm[0].images[reg] << 8) |
  507. ice->akm[0].images[reg + 1];
  508. }
  509. /*
  510. * set the register value of WM codec
  511. */
  512. static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val)
  513. {
  514. aureon_spi_write(ice,
  515. ((ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ||
  516. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71XT) ?
  517. PRODIGY_WM_CS : AUREON_WM_CS),
  518. (reg << 9) | (val & 0x1ff), 16);
  519. }
  520. /*
  521. * set the register value of WM codec and remember it
  522. */
  523. static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
  524. {
  525. wm_put_nocache(ice, reg, val);
  526. reg <<= 1;
  527. ice->akm[0].images[reg] = val >> 8;
  528. ice->akm[0].images[reg + 1] = val;
  529. }
  530. /*
  531. */
  532. #define aureon_mono_bool_info snd_ctl_boolean_mono_info
  533. /*
  534. * AC'97 master playback mute controls (Mute on WM8770 chip)
  535. */
  536. #define aureon_ac97_mmute_info snd_ctl_boolean_mono_info
  537. static int aureon_ac97_mmute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  538. {
  539. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  540. mutex_lock(&ice->gpio_mutex);
  541. ucontrol->value.integer.value[0] = (wm_get(ice, WM_OUT_MUX1) >> 1) & 0x01;
  542. mutex_unlock(&ice->gpio_mutex);
  543. return 0;
  544. }
  545. static int aureon_ac97_mmute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) {
  546. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  547. unsigned short ovol, nvol;
  548. int change;
  549. snd_ice1712_save_gpio_status(ice);
  550. ovol = wm_get(ice, WM_OUT_MUX1);
  551. nvol = (ovol & ~0x02) | (ucontrol->value.integer.value[0] ? 0x02 : 0x00);
  552. if ((change = (ovol != nvol)))
  553. wm_put(ice, WM_OUT_MUX1, nvol);
  554. snd_ice1712_restore_gpio_status(ice);
  555. return change;
  556. }
  557. static const DECLARE_TLV_DB_SCALE(db_scale_wm_dac, -12700, 100, 1);
  558. static const DECLARE_TLV_DB_SCALE(db_scale_wm_pcm, -6400, 50, 1);
  559. static const DECLARE_TLV_DB_SCALE(db_scale_wm_adc, -1200, 100, 0);
  560. static const DECLARE_TLV_DB_SCALE(db_scale_ac97_master, -4650, 150, 0);
  561. static const DECLARE_TLV_DB_SCALE(db_scale_ac97_gain, -3450, 150, 0);
  562. /*
  563. * Logarithmic volume values for WM8770
  564. * Computed as 20 * Log10(255 / x)
  565. */
  566. static const unsigned char wm_vol[256] = {
  567. 127, 48, 42, 39, 36, 34, 33, 31, 30, 29, 28, 27, 27, 26, 25, 25, 24, 24, 23,
  568. 23, 22, 22, 21, 21, 21, 20, 20, 20, 19, 19, 19, 18, 18, 18, 18, 17, 17, 17,
  569. 17, 16, 16, 16, 16, 15, 15, 15, 15, 15, 15, 14, 14, 14, 14, 14, 13, 13, 13,
  570. 13, 13, 13, 13, 12, 12, 12, 12, 12, 12, 12, 11, 11, 11, 11, 11, 11, 11, 11,
  571. 11, 10, 10, 10, 10, 10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 8, 8,
  572. 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6,
  573. 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
  574. 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3,
  575. 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
  576. 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
  577. 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  578. 0, 0
  579. };
  580. #define WM_VOL_MAX (sizeof(wm_vol) - 1)
  581. #define WM_VOL_MUTE 0x8000
  582. static void wm_set_vol(struct snd_ice1712 *ice, unsigned int index, unsigned short vol, unsigned short master)
  583. {
  584. unsigned char nvol;
  585. if ((master & WM_VOL_MUTE) || (vol & WM_VOL_MUTE))
  586. nvol = 0;
  587. else
  588. nvol = 127 - wm_vol[(((vol & ~WM_VOL_MUTE) * (master & ~WM_VOL_MUTE)) / 127) & WM_VOL_MAX];
  589. wm_put(ice, index, nvol);
  590. wm_put_nocache(ice, index, 0x180 | nvol);
  591. }
  592. /*
  593. * DAC mute control
  594. */
  595. #define wm_pcm_mute_info snd_ctl_boolean_mono_info
  596. static int wm_pcm_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  597. {
  598. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  599. mutex_lock(&ice->gpio_mutex);
  600. ucontrol->value.integer.value[0] = (wm_get(ice, WM_MUTE) & 0x10) ? 0 : 1;
  601. mutex_unlock(&ice->gpio_mutex);
  602. return 0;
  603. }
  604. static int wm_pcm_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  605. {
  606. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  607. unsigned short nval, oval;
  608. int change;
  609. snd_ice1712_save_gpio_status(ice);
  610. oval = wm_get(ice, WM_MUTE);
  611. nval = (oval & ~0x10) | (ucontrol->value.integer.value[0] ? 0 : 0x10);
  612. if ((change = (nval != oval)))
  613. wm_put(ice, WM_MUTE, nval);
  614. snd_ice1712_restore_gpio_status(ice);
  615. return change;
  616. }
  617. /*
  618. * Master volume attenuation mixer control
  619. */
  620. static int wm_master_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  621. {
  622. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  623. uinfo->count = 2;
  624. uinfo->value.integer.min = 0;
  625. uinfo->value.integer.max = WM_VOL_MAX;
  626. return 0;
  627. }
  628. static int wm_master_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  629. {
  630. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  631. int i;
  632. for (i=0; i<2; i++)
  633. ucontrol->value.integer.value[i] = ice->spec.aureon.master[i] & ~WM_VOL_MUTE;
  634. return 0;
  635. }
  636. static int wm_master_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  637. {
  638. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  639. int ch, change = 0;
  640. snd_ice1712_save_gpio_status(ice);
  641. for (ch = 0; ch < 2; ch++) {
  642. if (ucontrol->value.integer.value[ch] != ice->spec.aureon.master[ch]) {
  643. int dac;
  644. ice->spec.aureon.master[ch] &= WM_VOL_MUTE;
  645. ice->spec.aureon.master[ch] |= ucontrol->value.integer.value[ch];
  646. for (dac = 0; dac < ice->num_total_dacs; dac += 2)
  647. wm_set_vol(ice, WM_DAC_ATTEN + dac + ch,
  648. ice->spec.aureon.vol[dac + ch],
  649. ice->spec.aureon.master[ch]);
  650. change = 1;
  651. }
  652. }
  653. snd_ice1712_restore_gpio_status(ice);
  654. return change;
  655. }
  656. /*
  657. * DAC volume attenuation mixer control
  658. */
  659. static int wm_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  660. {
  661. int voices = kcontrol->private_value >> 8;
  662. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  663. uinfo->count = voices;
  664. uinfo->value.integer.min = 0; /* mute (-101dB) */
  665. uinfo->value.integer.max = 0x7F; /* 0dB */
  666. return 0;
  667. }
  668. static int wm_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  669. {
  670. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  671. int i, ofs, voices;
  672. voices = kcontrol->private_value >> 8;
  673. ofs = kcontrol->private_value & 0xff;
  674. for (i = 0; i < voices; i++)
  675. ucontrol->value.integer.value[i] = ice->spec.aureon.vol[ofs+i] & ~WM_VOL_MUTE;
  676. return 0;
  677. }
  678. static int wm_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  679. {
  680. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  681. int i, idx, ofs, voices;
  682. int change = 0;
  683. voices = kcontrol->private_value >> 8;
  684. ofs = kcontrol->private_value & 0xff;
  685. snd_ice1712_save_gpio_status(ice);
  686. for (i = 0; i < voices; i++) {
  687. idx = WM_DAC_ATTEN + ofs + i;
  688. if (ucontrol->value.integer.value[i] != ice->spec.aureon.vol[ofs+i]) {
  689. ice->spec.aureon.vol[ofs+i] &= WM_VOL_MUTE;
  690. ice->spec.aureon.vol[ofs+i] |= ucontrol->value.integer.value[i];
  691. wm_set_vol(ice, idx, ice->spec.aureon.vol[ofs+i],
  692. ice->spec.aureon.master[i]);
  693. change = 1;
  694. }
  695. }
  696. snd_ice1712_restore_gpio_status(ice);
  697. return change;
  698. }
  699. /*
  700. * WM8770 mute control
  701. */
  702. static int wm_mute_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) {
  703. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  704. uinfo->count = kcontrol->private_value >> 8;
  705. uinfo->value.integer.min = 0;
  706. uinfo->value.integer.max = 1;
  707. return 0;
  708. }
  709. static int wm_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  710. {
  711. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  712. int voices, ofs, i;
  713. voices = kcontrol->private_value >> 8;
  714. ofs = kcontrol->private_value & 0xFF;
  715. for (i = 0; i < voices; i++)
  716. ucontrol->value.integer.value[i] = (ice->spec.aureon.vol[ofs+i] & WM_VOL_MUTE) ? 0 : 1;
  717. return 0;
  718. }
  719. static int wm_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  720. {
  721. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  722. int change = 0, voices, ofs, i;
  723. voices = kcontrol->private_value >> 8;
  724. ofs = kcontrol->private_value & 0xFF;
  725. snd_ice1712_save_gpio_status(ice);
  726. for (i = 0; i < voices; i++) {
  727. int val = (ice->spec.aureon.vol[ofs + i] & WM_VOL_MUTE) ? 0 : 1;
  728. if (ucontrol->value.integer.value[i] != val) {
  729. ice->spec.aureon.vol[ofs + i] &= ~WM_VOL_MUTE;
  730. ice->spec.aureon.vol[ofs + i] |=
  731. ucontrol->value.integer.value[i] ? 0 : WM_VOL_MUTE;
  732. wm_set_vol(ice, ofs + i, ice->spec.aureon.vol[ofs + i],
  733. ice->spec.aureon.master[i]);
  734. change = 1;
  735. }
  736. }
  737. snd_ice1712_restore_gpio_status(ice);
  738. return change;
  739. }
  740. /*
  741. * WM8770 master mute control
  742. */
  743. #define wm_master_mute_info snd_ctl_boolean_stereo_info
  744. static int wm_master_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  745. {
  746. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  747. ucontrol->value.integer.value[0] = (ice->spec.aureon.master[0] & WM_VOL_MUTE) ? 0 : 1;
  748. ucontrol->value.integer.value[1] = (ice->spec.aureon.master[1] & WM_VOL_MUTE) ? 0 : 1;
  749. return 0;
  750. }
  751. static int wm_master_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  752. {
  753. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  754. int change = 0, i;
  755. snd_ice1712_save_gpio_status(ice);
  756. for (i = 0; i < 2; i++) {
  757. int val = (ice->spec.aureon.master[i] & WM_VOL_MUTE) ? 0 : 1;
  758. if (ucontrol->value.integer.value[i] != val) {
  759. int dac;
  760. ice->spec.aureon.master[i] &= ~WM_VOL_MUTE;
  761. ice->spec.aureon.master[i] |=
  762. ucontrol->value.integer.value[i] ? 0 : WM_VOL_MUTE;
  763. for (dac = 0; dac < ice->num_total_dacs; dac += 2)
  764. wm_set_vol(ice, WM_DAC_ATTEN + dac + i,
  765. ice->spec.aureon.vol[dac + i],
  766. ice->spec.aureon.master[i]);
  767. change = 1;
  768. }
  769. }
  770. snd_ice1712_restore_gpio_status(ice);
  771. return change;
  772. }
  773. /* digital master volume */
  774. #define PCM_0dB 0xff
  775. #define PCM_RES 128 /* -64dB */
  776. #define PCM_MIN (PCM_0dB - PCM_RES)
  777. static int wm_pcm_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  778. {
  779. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  780. uinfo->count = 1;
  781. uinfo->value.integer.min = 0; /* mute (-64dB) */
  782. uinfo->value.integer.max = PCM_RES; /* 0dB */
  783. return 0;
  784. }
  785. static int wm_pcm_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  786. {
  787. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  788. unsigned short val;
  789. mutex_lock(&ice->gpio_mutex);
  790. val = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff;
  791. val = val > PCM_MIN ? (val - PCM_MIN) : 0;
  792. ucontrol->value.integer.value[0] = val;
  793. mutex_unlock(&ice->gpio_mutex);
  794. return 0;
  795. }
  796. static int wm_pcm_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  797. {
  798. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  799. unsigned short ovol, nvol;
  800. int change = 0;
  801. snd_ice1712_save_gpio_status(ice);
  802. nvol = ucontrol->value.integer.value[0];
  803. nvol = (nvol ? (nvol + PCM_MIN) : 0) & 0xff;
  804. ovol = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff;
  805. if (ovol != nvol) {
  806. wm_put(ice, WM_DAC_DIG_MASTER_ATTEN, nvol); /* prelatch */
  807. wm_put_nocache(ice, WM_DAC_DIG_MASTER_ATTEN, nvol | 0x100); /* update */
  808. change = 1;
  809. }
  810. snd_ice1712_restore_gpio_status(ice);
  811. return change;
  812. }
  813. /*
  814. * ADC mute control
  815. */
  816. #define wm_adc_mute_info snd_ctl_boolean_stereo_info
  817. static int wm_adc_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  818. {
  819. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  820. unsigned short val;
  821. int i;
  822. mutex_lock(&ice->gpio_mutex);
  823. for (i = 0; i < 2; i++) {
  824. val = wm_get(ice, WM_ADC_GAIN + i);
  825. ucontrol->value.integer.value[i] = ~val>>5 & 0x1;
  826. }
  827. mutex_unlock(&ice->gpio_mutex);
  828. return 0;
  829. }
  830. static int wm_adc_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  831. {
  832. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  833. unsigned short new, old;
  834. int i, change = 0;
  835. snd_ice1712_save_gpio_status(ice);
  836. for (i = 0; i < 2; i++) {
  837. old = wm_get(ice, WM_ADC_GAIN + i);
  838. new = (~ucontrol->value.integer.value[i]<<5&0x20) | (old&~0x20);
  839. if (new != old) {
  840. wm_put(ice, WM_ADC_GAIN + i, new);
  841. change = 1;
  842. }
  843. }
  844. snd_ice1712_restore_gpio_status(ice);
  845. return change;
  846. }
  847. /*
  848. * ADC gain mixer control
  849. */
  850. static int wm_adc_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  851. {
  852. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  853. uinfo->count = 2;
  854. uinfo->value.integer.min = 0; /* -12dB */
  855. uinfo->value.integer.max = 0x1f; /* 19dB */
  856. return 0;
  857. }
  858. static int wm_adc_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  859. {
  860. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  861. int i, idx;
  862. unsigned short vol;
  863. mutex_lock(&ice->gpio_mutex);
  864. for (i = 0; i < 2; i++) {
  865. idx = WM_ADC_GAIN + i;
  866. vol = wm_get(ice, idx) & 0x1f;
  867. ucontrol->value.integer.value[i] = vol;
  868. }
  869. mutex_unlock(&ice->gpio_mutex);
  870. return 0;
  871. }
  872. static int wm_adc_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  873. {
  874. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  875. int i, idx;
  876. unsigned short ovol, nvol;
  877. int change = 0;
  878. snd_ice1712_save_gpio_status(ice);
  879. for (i = 0; i < 2; i++) {
  880. idx = WM_ADC_GAIN + i;
  881. nvol = ucontrol->value.integer.value[i];
  882. ovol = wm_get(ice, idx);
  883. if ((ovol & 0x1f) != nvol) {
  884. wm_put(ice, idx, nvol | (ovol & ~0x1f));
  885. change = 1;
  886. }
  887. }
  888. snd_ice1712_restore_gpio_status(ice);
  889. return change;
  890. }
  891. /*
  892. * ADC input mux mixer control
  893. */
  894. static int wm_adc_mux_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  895. {
  896. static const char * const texts[] = {
  897. "CD", //AIN1
  898. "Aux", //AIN2
  899. "Line", //AIN3
  900. "Mic", //AIN4
  901. "AC97" //AIN5
  902. };
  903. static const char * const universe_texts[] = {
  904. "Aux1", //AIN1
  905. "CD", //AIN2
  906. "Phono", //AIN3
  907. "Line", //AIN4
  908. "Aux2", //AIN5
  909. "Mic", //AIN6
  910. "Aux3", //AIN7
  911. "AC97" //AIN8
  912. };
  913. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  914. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  915. uinfo->count = 2;
  916. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON71_UNIVERSE) {
  917. uinfo->value.enumerated.items = 8;
  918. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  919. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  920. strcpy(uinfo->value.enumerated.name, universe_texts[uinfo->value.enumerated.item]);
  921. }
  922. else {
  923. uinfo->value.enumerated.items = 5;
  924. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  925. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  926. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  927. }
  928. return 0;
  929. }
  930. static int wm_adc_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  931. {
  932. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  933. unsigned short val;
  934. mutex_lock(&ice->gpio_mutex);
  935. val = wm_get(ice, WM_ADC_MUX);
  936. ucontrol->value.enumerated.item[0] = val & 7;
  937. ucontrol->value.enumerated.item[1] = (val >> 4) & 7;
  938. mutex_unlock(&ice->gpio_mutex);
  939. return 0;
  940. }
  941. static int wm_adc_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  942. {
  943. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  944. unsigned short oval, nval;
  945. int change;
  946. snd_ice1712_save_gpio_status(ice);
  947. oval = wm_get(ice, WM_ADC_MUX);
  948. nval = oval & ~0x77;
  949. nval |= ucontrol->value.enumerated.item[0] & 7;
  950. nval |= (ucontrol->value.enumerated.item[1] & 7) << 4;
  951. change = (oval != nval);
  952. if (change)
  953. wm_put(ice, WM_ADC_MUX, nval);
  954. snd_ice1712_restore_gpio_status(ice);
  955. return change;
  956. }
  957. /*
  958. * CS8415 Input mux
  959. */
  960. static int aureon_cs8415_mux_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  961. {
  962. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  963. static const char * const aureon_texts[] = {
  964. "CD", //RXP0
  965. "Optical" //RXP1
  966. };
  967. static const char * const prodigy_texts[] = {
  968. "CD",
  969. "Coax"
  970. };
  971. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  972. uinfo->count = 1;
  973. uinfo->value.enumerated.items = 2;
  974. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  975. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  976. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71)
  977. strcpy(uinfo->value.enumerated.name, prodigy_texts[uinfo->value.enumerated.item]);
  978. else
  979. strcpy(uinfo->value.enumerated.name, aureon_texts[uinfo->value.enumerated.item]);
  980. return 0;
  981. }
  982. static int aureon_cs8415_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  983. {
  984. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  985. //snd_ice1712_save_gpio_status(ice);
  986. //val = aureon_cs8415_get(ice, CS8415_CTRL2);
  987. ucontrol->value.enumerated.item[0] = ice->spec.aureon.cs8415_mux;
  988. //snd_ice1712_restore_gpio_status(ice);
  989. return 0;
  990. }
  991. static int aureon_cs8415_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  992. {
  993. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  994. unsigned short oval, nval;
  995. int change;
  996. snd_ice1712_save_gpio_status(ice);
  997. oval = aureon_cs8415_get(ice, CS8415_CTRL2);
  998. nval = oval & ~0x07;
  999. nval |= ucontrol->value.enumerated.item[0] & 7;
  1000. change = (oval != nval);
  1001. if (change)
  1002. aureon_cs8415_put(ice, CS8415_CTRL2, nval);
  1003. snd_ice1712_restore_gpio_status(ice);
  1004. ice->spec.aureon.cs8415_mux = ucontrol->value.enumerated.item[0];
  1005. return change;
  1006. }
  1007. static int aureon_cs8415_rate_info (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1008. {
  1009. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1010. uinfo->count = 1;
  1011. uinfo->value.integer.min = 0;
  1012. uinfo->value.integer.max = 192000;
  1013. return 0;
  1014. }
  1015. static int aureon_cs8415_rate_get (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1016. {
  1017. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1018. unsigned char ratio;
  1019. ratio = aureon_cs8415_get(ice, CS8415_RATIO);
  1020. ucontrol->value.integer.value[0] = (int)((unsigned int)ratio * 750);
  1021. return 0;
  1022. }
  1023. /*
  1024. * CS8415A Mute
  1025. */
  1026. #define aureon_cs8415_mute_info snd_ctl_boolean_mono_info
  1027. static int aureon_cs8415_mute_get (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1028. {
  1029. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1030. snd_ice1712_save_gpio_status(ice);
  1031. ucontrol->value.integer.value[0] = (aureon_cs8415_get(ice, CS8415_CTRL1) & 0x20) ? 0 : 1;
  1032. snd_ice1712_restore_gpio_status(ice);
  1033. return 0;
  1034. }
  1035. static int aureon_cs8415_mute_put (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1036. {
  1037. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1038. unsigned char oval, nval;
  1039. int change;
  1040. snd_ice1712_save_gpio_status(ice);
  1041. oval = aureon_cs8415_get(ice, CS8415_CTRL1);
  1042. if (ucontrol->value.integer.value[0])
  1043. nval = oval & ~0x20;
  1044. else
  1045. nval = oval | 0x20;
  1046. if ((change = (oval != nval)))
  1047. aureon_cs8415_put(ice, CS8415_CTRL1, nval);
  1048. snd_ice1712_restore_gpio_status(ice);
  1049. return change;
  1050. }
  1051. /*
  1052. * CS8415A Q-Sub info
  1053. */
  1054. static int aureon_cs8415_qsub_info (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) {
  1055. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1056. uinfo->count = 10;
  1057. return 0;
  1058. }
  1059. static int aureon_cs8415_qsub_get (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) {
  1060. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1061. snd_ice1712_save_gpio_status(ice);
  1062. aureon_cs8415_read(ice, CS8415_QSUB, ucontrol->value.bytes.data, 10);
  1063. snd_ice1712_restore_gpio_status(ice);
  1064. return 0;
  1065. }
  1066. static int aureon_cs8415_spdif_info (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) {
  1067. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1068. uinfo->count = 1;
  1069. return 0;
  1070. }
  1071. static int aureon_cs8415_mask_get (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) {
  1072. memset(ucontrol->value.iec958.status, 0xFF, 24);
  1073. return 0;
  1074. }
  1075. static int aureon_cs8415_spdif_get (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) {
  1076. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1077. snd_ice1712_save_gpio_status(ice);
  1078. aureon_cs8415_read(ice, CS8415_C_BUFFER, ucontrol->value.iec958.status, 24);
  1079. snd_ice1712_restore_gpio_status(ice);
  1080. return 0;
  1081. }
  1082. /*
  1083. * Headphone Amplifier
  1084. */
  1085. static int aureon_set_headphone_amp(struct snd_ice1712 *ice, int enable)
  1086. {
  1087. unsigned int tmp, tmp2;
  1088. tmp2 = tmp = snd_ice1712_gpio_read(ice);
  1089. if (enable)
  1090. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1091. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT)
  1092. tmp |= AUREON_HP_SEL;
  1093. else
  1094. tmp |= PRODIGY_HP_SEL;
  1095. else
  1096. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1097. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT)
  1098. tmp &= ~ AUREON_HP_SEL;
  1099. else
  1100. tmp &= ~ PRODIGY_HP_SEL;
  1101. if (tmp != tmp2) {
  1102. snd_ice1712_gpio_write(ice, tmp);
  1103. return 1;
  1104. }
  1105. return 0;
  1106. }
  1107. static int aureon_get_headphone_amp(struct snd_ice1712 *ice)
  1108. {
  1109. unsigned int tmp = snd_ice1712_gpio_read(ice);
  1110. return ( tmp & AUREON_HP_SEL )!= 0;
  1111. }
  1112. #define aureon_hpamp_info snd_ctl_boolean_mono_info
  1113. static int aureon_hpamp_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1114. {
  1115. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1116. ucontrol->value.integer.value[0] = aureon_get_headphone_amp(ice);
  1117. return 0;
  1118. }
  1119. static int aureon_hpamp_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1120. {
  1121. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1122. return aureon_set_headphone_amp(ice,ucontrol->value.integer.value[0]);
  1123. }
  1124. /*
  1125. * Deemphasis
  1126. */
  1127. #define aureon_deemp_info snd_ctl_boolean_mono_info
  1128. static int aureon_deemp_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1129. {
  1130. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1131. ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL2) & 0xf) == 0xf;
  1132. return 0;
  1133. }
  1134. static int aureon_deemp_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1135. {
  1136. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1137. int temp, temp2;
  1138. temp2 = temp = wm_get(ice, WM_DAC_CTRL2);
  1139. if (ucontrol->value.integer.value[0])
  1140. temp |= 0xf;
  1141. else
  1142. temp &= ~0xf;
  1143. if (temp != temp2) {
  1144. wm_put(ice, WM_DAC_CTRL2, temp);
  1145. return 1;
  1146. }
  1147. return 0;
  1148. }
  1149. /*
  1150. * ADC Oversampling
  1151. */
  1152. static int aureon_oversampling_info(struct snd_kcontrol *k, struct snd_ctl_elem_info *uinfo)
  1153. {
  1154. static const char * const texts[2] = { "128x", "64x" };
  1155. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1156. uinfo->count = 1;
  1157. uinfo->value.enumerated.items = 2;
  1158. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1159. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1160. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1161. return 0;
  1162. }
  1163. static int aureon_oversampling_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1164. {
  1165. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1166. ucontrol->value.enumerated.item[0] = (wm_get(ice, WM_MASTER) & 0x8) == 0x8;
  1167. return 0;
  1168. }
  1169. static int aureon_oversampling_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1170. {
  1171. int temp, temp2;
  1172. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1173. temp2 = temp = wm_get(ice, WM_MASTER);
  1174. if (ucontrol->value.enumerated.item[0])
  1175. temp |= 0x8;
  1176. else
  1177. temp &= ~0x8;
  1178. if (temp != temp2) {
  1179. wm_put(ice, WM_MASTER, temp);
  1180. return 1;
  1181. }
  1182. return 0;
  1183. }
  1184. /*
  1185. * mixers
  1186. */
  1187. static struct snd_kcontrol_new aureon_dac_controls[] __devinitdata = {
  1188. {
  1189. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1190. .name = "Master Playback Switch",
  1191. .info = wm_master_mute_info,
  1192. .get = wm_master_mute_get,
  1193. .put = wm_master_mute_put
  1194. },
  1195. {
  1196. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1197. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1198. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1199. .name = "Master Playback Volume",
  1200. .info = wm_master_vol_info,
  1201. .get = wm_master_vol_get,
  1202. .put = wm_master_vol_put,
  1203. .tlv = { .p = db_scale_wm_dac }
  1204. },
  1205. {
  1206. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1207. .name = "Front Playback Switch",
  1208. .info = wm_mute_info,
  1209. .get = wm_mute_get,
  1210. .put = wm_mute_put,
  1211. .private_value = (2 << 8) | 0
  1212. },
  1213. {
  1214. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1215. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1216. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1217. .name = "Front Playback Volume",
  1218. .info = wm_vol_info,
  1219. .get = wm_vol_get,
  1220. .put = wm_vol_put,
  1221. .private_value = (2 << 8) | 0,
  1222. .tlv = { .p = db_scale_wm_dac }
  1223. },
  1224. {
  1225. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1226. .name = "Rear Playback Switch",
  1227. .info = wm_mute_info,
  1228. .get = wm_mute_get,
  1229. .put = wm_mute_put,
  1230. .private_value = (2 << 8) | 2
  1231. },
  1232. {
  1233. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1234. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1235. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1236. .name = "Rear Playback Volume",
  1237. .info = wm_vol_info,
  1238. .get = wm_vol_get,
  1239. .put = wm_vol_put,
  1240. .private_value = (2 << 8) | 2,
  1241. .tlv = { .p = db_scale_wm_dac }
  1242. },
  1243. {
  1244. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1245. .name = "Center Playback Switch",
  1246. .info = wm_mute_info,
  1247. .get = wm_mute_get,
  1248. .put = wm_mute_put,
  1249. .private_value = (1 << 8) | 4
  1250. },
  1251. {
  1252. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1253. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1254. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1255. .name = "Center Playback Volume",
  1256. .info = wm_vol_info,
  1257. .get = wm_vol_get,
  1258. .put = wm_vol_put,
  1259. .private_value = (1 << 8) | 4,
  1260. .tlv = { .p = db_scale_wm_dac }
  1261. },
  1262. {
  1263. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1264. .name = "LFE Playback Switch",
  1265. .info = wm_mute_info,
  1266. .get = wm_mute_get,
  1267. .put = wm_mute_put,
  1268. .private_value = (1 << 8) | 5
  1269. },
  1270. {
  1271. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1272. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1273. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1274. .name = "LFE Playback Volume",
  1275. .info = wm_vol_info,
  1276. .get = wm_vol_get,
  1277. .put = wm_vol_put,
  1278. .private_value = (1 << 8) | 5,
  1279. .tlv = { .p = db_scale_wm_dac }
  1280. },
  1281. {
  1282. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1283. .name = "Side Playback Switch",
  1284. .info = wm_mute_info,
  1285. .get = wm_mute_get,
  1286. .put = wm_mute_put,
  1287. .private_value = (2 << 8) | 6
  1288. },
  1289. {
  1290. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1291. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1292. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1293. .name = "Side Playback Volume",
  1294. .info = wm_vol_info,
  1295. .get = wm_vol_get,
  1296. .put = wm_vol_put,
  1297. .private_value = (2 << 8) | 6,
  1298. .tlv = { .p = db_scale_wm_dac }
  1299. }
  1300. };
  1301. static struct snd_kcontrol_new wm_controls[] __devinitdata = {
  1302. {
  1303. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1304. .name = "PCM Playback Switch",
  1305. .info = wm_pcm_mute_info,
  1306. .get = wm_pcm_mute_get,
  1307. .put = wm_pcm_mute_put
  1308. },
  1309. {
  1310. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1311. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1312. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1313. .name = "PCM Playback Volume",
  1314. .info = wm_pcm_vol_info,
  1315. .get = wm_pcm_vol_get,
  1316. .put = wm_pcm_vol_put,
  1317. .tlv = { .p = db_scale_wm_pcm }
  1318. },
  1319. {
  1320. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1321. .name = "Capture Switch",
  1322. .info = wm_adc_mute_info,
  1323. .get = wm_adc_mute_get,
  1324. .put = wm_adc_mute_put,
  1325. },
  1326. {
  1327. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1328. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1329. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1330. .name = "Capture Volume",
  1331. .info = wm_adc_vol_info,
  1332. .get = wm_adc_vol_get,
  1333. .put = wm_adc_vol_put,
  1334. .tlv = { .p = db_scale_wm_adc }
  1335. },
  1336. {
  1337. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1338. .name = "Capture Source",
  1339. .info = wm_adc_mux_info,
  1340. .get = wm_adc_mux_get,
  1341. .put = wm_adc_mux_put,
  1342. .private_value = 5
  1343. },
  1344. {
  1345. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1346. .name = "External Amplifier",
  1347. .info = aureon_hpamp_info,
  1348. .get = aureon_hpamp_get,
  1349. .put = aureon_hpamp_put
  1350. },
  1351. {
  1352. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1353. .name = "DAC Deemphasis Switch",
  1354. .info = aureon_deemp_info,
  1355. .get = aureon_deemp_get,
  1356. .put = aureon_deemp_put
  1357. },
  1358. {
  1359. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1360. .name = "ADC Oversampling",
  1361. .info = aureon_oversampling_info,
  1362. .get = aureon_oversampling_get,
  1363. .put = aureon_oversampling_put
  1364. }
  1365. };
  1366. static struct snd_kcontrol_new ac97_controls[] __devinitdata = {
  1367. {
  1368. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1369. .name = "AC97 Playback Switch",
  1370. .info = aureon_ac97_mmute_info,
  1371. .get = aureon_ac97_mmute_get,
  1372. .put = aureon_ac97_mmute_put,
  1373. .private_value = AC97_MASTER
  1374. },
  1375. {
  1376. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1377. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1378. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1379. .name = "AC97 Playback Volume",
  1380. .info = aureon_ac97_vol_info,
  1381. .get = aureon_ac97_vol_get,
  1382. .put = aureon_ac97_vol_put,
  1383. .private_value = AC97_MASTER|AUREON_AC97_STEREO,
  1384. .tlv = { .p = db_scale_ac97_master }
  1385. },
  1386. {
  1387. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1388. .name = "CD Playback Switch",
  1389. .info = aureon_ac97_mute_info,
  1390. .get = aureon_ac97_mute_get,
  1391. .put = aureon_ac97_mute_put,
  1392. .private_value = AC97_CD
  1393. },
  1394. {
  1395. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1396. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1397. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1398. .name = "CD Playback Volume",
  1399. .info = aureon_ac97_vol_info,
  1400. .get = aureon_ac97_vol_get,
  1401. .put = aureon_ac97_vol_put,
  1402. .private_value = AC97_CD|AUREON_AC97_STEREO,
  1403. .tlv = { .p = db_scale_ac97_gain }
  1404. },
  1405. {
  1406. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1407. .name = "Aux Playback Switch",
  1408. .info = aureon_ac97_mute_info,
  1409. .get = aureon_ac97_mute_get,
  1410. .put = aureon_ac97_mute_put,
  1411. .private_value = AC97_AUX,
  1412. },
  1413. {
  1414. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1415. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1416. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1417. .name = "Aux Playback Volume",
  1418. .info = aureon_ac97_vol_info,
  1419. .get = aureon_ac97_vol_get,
  1420. .put = aureon_ac97_vol_put,
  1421. .private_value = AC97_AUX|AUREON_AC97_STEREO,
  1422. .tlv = { .p = db_scale_ac97_gain }
  1423. },
  1424. {
  1425. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1426. .name = "Line Playback Switch",
  1427. .info = aureon_ac97_mute_info,
  1428. .get = aureon_ac97_mute_get,
  1429. .put = aureon_ac97_mute_put,
  1430. .private_value = AC97_LINE
  1431. },
  1432. {
  1433. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1434. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1435. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1436. .name = "Line Playback Volume",
  1437. .info = aureon_ac97_vol_info,
  1438. .get = aureon_ac97_vol_get,
  1439. .put = aureon_ac97_vol_put,
  1440. .private_value = AC97_LINE|AUREON_AC97_STEREO,
  1441. .tlv = { .p = db_scale_ac97_gain }
  1442. },
  1443. {
  1444. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1445. .name = "Mic Playback Switch",
  1446. .info = aureon_ac97_mute_info,
  1447. .get = aureon_ac97_mute_get,
  1448. .put = aureon_ac97_mute_put,
  1449. .private_value = AC97_MIC
  1450. },
  1451. {
  1452. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1453. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1454. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1455. .name = "Mic Playback Volume",
  1456. .info = aureon_ac97_vol_info,
  1457. .get = aureon_ac97_vol_get,
  1458. .put = aureon_ac97_vol_put,
  1459. .private_value = AC97_MIC,
  1460. .tlv = { .p = db_scale_ac97_gain }
  1461. },
  1462. {
  1463. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1464. .name = "Mic Boost (+20dB)",
  1465. .info = aureon_ac97_micboost_info,
  1466. .get = aureon_ac97_micboost_get,
  1467. .put = aureon_ac97_micboost_put
  1468. }
  1469. };
  1470. static struct snd_kcontrol_new universe_ac97_controls[] __devinitdata = {
  1471. {
  1472. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1473. .name = "AC97 Playback Switch",
  1474. .info = aureon_ac97_mmute_info,
  1475. .get = aureon_ac97_mmute_get,
  1476. .put = aureon_ac97_mmute_put,
  1477. .private_value = AC97_MASTER
  1478. },
  1479. {
  1480. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1481. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1482. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1483. .name = "AC97 Playback Volume",
  1484. .info = aureon_ac97_vol_info,
  1485. .get = aureon_ac97_vol_get,
  1486. .put = aureon_ac97_vol_put,
  1487. .private_value = AC97_MASTER|AUREON_AC97_STEREO,
  1488. .tlv = { .p = db_scale_ac97_master }
  1489. },
  1490. {
  1491. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1492. .name = "CD Playback Switch",
  1493. .info = aureon_ac97_mute_info,
  1494. .get = aureon_ac97_mute_get,
  1495. .put = aureon_ac97_mute_put,
  1496. .private_value = AC97_AUX
  1497. },
  1498. {
  1499. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1500. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1501. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1502. .name = "CD Playback Volume",
  1503. .info = aureon_ac97_vol_info,
  1504. .get = aureon_ac97_vol_get,
  1505. .put = aureon_ac97_vol_put,
  1506. .private_value = AC97_AUX|AUREON_AC97_STEREO,
  1507. .tlv = { .p = db_scale_ac97_gain }
  1508. },
  1509. {
  1510. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1511. .name = "Phono Playback Switch",
  1512. .info = aureon_ac97_mute_info,
  1513. .get = aureon_ac97_mute_get,
  1514. .put = aureon_ac97_mute_put,
  1515. .private_value = AC97_CD
  1516. },
  1517. {
  1518. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1519. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1520. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1521. .name = "Phono Playback Volume",
  1522. .info = aureon_ac97_vol_info,
  1523. .get = aureon_ac97_vol_get,
  1524. .put = aureon_ac97_vol_put,
  1525. .private_value = AC97_CD|AUREON_AC97_STEREO,
  1526. .tlv = { .p = db_scale_ac97_gain }
  1527. },
  1528. {
  1529. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1530. .name = "Line Playback Switch",
  1531. .info = aureon_ac97_mute_info,
  1532. .get = aureon_ac97_mute_get,
  1533. .put = aureon_ac97_mute_put,
  1534. .private_value = AC97_LINE
  1535. },
  1536. {
  1537. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1538. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1539. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1540. .name = "Line Playback Volume",
  1541. .info = aureon_ac97_vol_info,
  1542. .get = aureon_ac97_vol_get,
  1543. .put = aureon_ac97_vol_put,
  1544. .private_value = AC97_LINE|AUREON_AC97_STEREO,
  1545. .tlv = { .p = db_scale_ac97_gain }
  1546. },
  1547. {
  1548. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1549. .name = "Mic Playback Switch",
  1550. .info = aureon_ac97_mute_info,
  1551. .get = aureon_ac97_mute_get,
  1552. .put = aureon_ac97_mute_put,
  1553. .private_value = AC97_MIC
  1554. },
  1555. {
  1556. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1557. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1558. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1559. .name = "Mic Playback Volume",
  1560. .info = aureon_ac97_vol_info,
  1561. .get = aureon_ac97_vol_get,
  1562. .put = aureon_ac97_vol_put,
  1563. .private_value = AC97_MIC,
  1564. .tlv = { .p = db_scale_ac97_gain }
  1565. },
  1566. {
  1567. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1568. .name = "Mic Boost (+20dB)",
  1569. .info = aureon_ac97_micboost_info,
  1570. .get = aureon_ac97_micboost_get,
  1571. .put = aureon_ac97_micboost_put
  1572. },
  1573. {
  1574. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1575. .name = "Aux Playback Switch",
  1576. .info = aureon_ac97_mute_info,
  1577. .get = aureon_ac97_mute_get,
  1578. .put = aureon_ac97_mute_put,
  1579. .private_value = AC97_VIDEO,
  1580. },
  1581. {
  1582. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1583. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1584. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1585. .name = "Aux Playback Volume",
  1586. .info = aureon_ac97_vol_info,
  1587. .get = aureon_ac97_vol_get,
  1588. .put = aureon_ac97_vol_put,
  1589. .private_value = AC97_VIDEO|AUREON_AC97_STEREO,
  1590. .tlv = { .p = db_scale_ac97_gain }
  1591. },
  1592. {
  1593. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1594. .name = "Aux Source",
  1595. .info = aureon_universe_inmux_info,
  1596. .get = aureon_universe_inmux_get,
  1597. .put = aureon_universe_inmux_put
  1598. }
  1599. };
  1600. static struct snd_kcontrol_new cs8415_controls[] __devinitdata = {
  1601. {
  1602. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1603. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH),
  1604. .info = aureon_cs8415_mute_info,
  1605. .get = aureon_cs8415_mute_get,
  1606. .put = aureon_cs8415_mute_put
  1607. },
  1608. {
  1609. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1610. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,NONE) "Source",
  1611. .info = aureon_cs8415_mux_info,
  1612. .get = aureon_cs8415_mux_get,
  1613. .put = aureon_cs8415_mux_put,
  1614. },
  1615. {
  1616. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1617. .name = SNDRV_CTL_NAME_IEC958("Q-subcode ",CAPTURE,DEFAULT),
  1618. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1619. .info = aureon_cs8415_qsub_info,
  1620. .get = aureon_cs8415_qsub_get,
  1621. },
  1622. {
  1623. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1624. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK),
  1625. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1626. .info = aureon_cs8415_spdif_info,
  1627. .get = aureon_cs8415_mask_get
  1628. },
  1629. {
  1630. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1631. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT),
  1632. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1633. .info = aureon_cs8415_spdif_info,
  1634. .get = aureon_cs8415_spdif_get
  1635. },
  1636. {
  1637. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1638. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,NONE) "Rate",
  1639. .access =SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1640. .info = aureon_cs8415_rate_info,
  1641. .get = aureon_cs8415_rate_get
  1642. }
  1643. };
  1644. static int __devinit aureon_add_controls(struct snd_ice1712 *ice)
  1645. {
  1646. unsigned int i, counts;
  1647. int err;
  1648. counts = ARRAY_SIZE(aureon_dac_controls);
  1649. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON51_SKY)
  1650. counts -= 2; /* no side */
  1651. for (i = 0; i < counts; i++) {
  1652. err = snd_ctl_add(ice->card, snd_ctl_new1(&aureon_dac_controls[i], ice));
  1653. if (err < 0)
  1654. return err;
  1655. }
  1656. for (i = 0; i < ARRAY_SIZE(wm_controls); i++) {
  1657. err = snd_ctl_add(ice->card, snd_ctl_new1(&wm_controls[i], ice));
  1658. if (err < 0)
  1659. return err;
  1660. }
  1661. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON71_UNIVERSE) {
  1662. for (i = 0; i < ARRAY_SIZE(universe_ac97_controls); i++) {
  1663. err = snd_ctl_add(ice->card, snd_ctl_new1(&universe_ac97_controls[i], ice));
  1664. if (err < 0)
  1665. return err;
  1666. }
  1667. }
  1668. else if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1669. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT) {
  1670. for (i = 0; i < ARRAY_SIZE(ac97_controls); i++) {
  1671. err = snd_ctl_add(ice->card, snd_ctl_new1(&ac97_controls[i], ice));
  1672. if (err < 0)
  1673. return err;
  1674. }
  1675. }
  1676. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1677. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT) {
  1678. unsigned char id;
  1679. snd_ice1712_save_gpio_status(ice);
  1680. id = aureon_cs8415_get(ice, CS8415_ID);
  1681. if (id != 0x41)
  1682. snd_printk(KERN_INFO "No CS8415 chip. Skipping CS8415 controls.\n");
  1683. else if ((id & 0x0F) != 0x01)
  1684. snd_printk(KERN_INFO "Detected unsupported CS8415 rev. (%c)\n", (char)((id & 0x0F) + 'A' - 1));
  1685. else {
  1686. for (i = 0; i< ARRAY_SIZE(cs8415_controls); i++) {
  1687. struct snd_kcontrol *kctl;
  1688. err = snd_ctl_add(ice->card, (kctl = snd_ctl_new1(&cs8415_controls[i], ice)));
  1689. if (err < 0)
  1690. return err;
  1691. if (i > 1)
  1692. kctl->id.device = ice->pcm->device;
  1693. }
  1694. }
  1695. snd_ice1712_restore_gpio_status(ice);
  1696. }
  1697. return 0;
  1698. }
  1699. /*
  1700. * initialize the chip
  1701. */
  1702. static int __devinit aureon_init(struct snd_ice1712 *ice)
  1703. {
  1704. static const unsigned short wm_inits_aureon[] = {
  1705. /* These come first to reduce init pop noise */
  1706. 0x1b, 0x044, /* ADC Mux (AC'97 source) */
  1707. 0x1c, 0x00B, /* Out Mux1 (VOUT1 = DAC+AUX, VOUT2 = DAC) */
  1708. 0x1d, 0x009, /* Out Mux2 (VOUT2 = DAC, VOUT3 = DAC) */
  1709. 0x18, 0x000, /* All power-up */
  1710. 0x16, 0x122, /* I2S, normal polarity, 24bit */
  1711. 0x17, 0x022, /* 256fs, slave mode */
  1712. 0x00, 0, /* DAC1 analog mute */
  1713. 0x01, 0, /* DAC2 analog mute */
  1714. 0x02, 0, /* DAC3 analog mute */
  1715. 0x03, 0, /* DAC4 analog mute */
  1716. 0x04, 0, /* DAC5 analog mute */
  1717. 0x05, 0, /* DAC6 analog mute */
  1718. 0x06, 0, /* DAC7 analog mute */
  1719. 0x07, 0, /* DAC8 analog mute */
  1720. 0x08, 0x100, /* master analog mute */
  1721. 0x09, 0xff, /* DAC1 digital full */
  1722. 0x0a, 0xff, /* DAC2 digital full */
  1723. 0x0b, 0xff, /* DAC3 digital full */
  1724. 0x0c, 0xff, /* DAC4 digital full */
  1725. 0x0d, 0xff, /* DAC5 digital full */
  1726. 0x0e, 0xff, /* DAC6 digital full */
  1727. 0x0f, 0xff, /* DAC7 digital full */
  1728. 0x10, 0xff, /* DAC8 digital full */
  1729. 0x11, 0x1ff, /* master digital full */
  1730. 0x12, 0x000, /* phase normal */
  1731. 0x13, 0x090, /* unmute DAC L/R */
  1732. 0x14, 0x000, /* all unmute */
  1733. 0x15, 0x000, /* no deemphasis, no ZFLG */
  1734. 0x19, 0x000, /* -12dB ADC/L */
  1735. 0x1a, 0x000, /* -12dB ADC/R */
  1736. (unsigned short)-1
  1737. };
  1738. static const unsigned short wm_inits_prodigy[] = {
  1739. /* These come first to reduce init pop noise */
  1740. 0x1b, 0x000, /* ADC Mux */
  1741. 0x1c, 0x009, /* Out Mux1 */
  1742. 0x1d, 0x009, /* Out Mux2 */
  1743. 0x18, 0x000, /* All power-up */
  1744. 0x16, 0x022, /* I2S, normal polarity, 24bit, high-pass on */
  1745. 0x17, 0x006, /* 128fs, slave mode */
  1746. 0x00, 0, /* DAC1 analog mute */
  1747. 0x01, 0, /* DAC2 analog mute */
  1748. 0x02, 0, /* DAC3 analog mute */
  1749. 0x03, 0, /* DAC4 analog mute */
  1750. 0x04, 0, /* DAC5 analog mute */
  1751. 0x05, 0, /* DAC6 analog mute */
  1752. 0x06, 0, /* DAC7 analog mute */
  1753. 0x07, 0, /* DAC8 analog mute */
  1754. 0x08, 0x100, /* master analog mute */
  1755. 0x09, 0x7f, /* DAC1 digital full */
  1756. 0x0a, 0x7f, /* DAC2 digital full */
  1757. 0x0b, 0x7f, /* DAC3 digital full */
  1758. 0x0c, 0x7f, /* DAC4 digital full */
  1759. 0x0d, 0x7f, /* DAC5 digital full */
  1760. 0x0e, 0x7f, /* DAC6 digital full */
  1761. 0x0f, 0x7f, /* DAC7 digital full */
  1762. 0x10, 0x7f, /* DAC8 digital full */
  1763. 0x11, 0x1FF, /* master digital full */
  1764. 0x12, 0x000, /* phase normal */
  1765. 0x13, 0x090, /* unmute DAC L/R */
  1766. 0x14, 0x000, /* all unmute */
  1767. 0x15, 0x000, /* no deemphasis, no ZFLG */
  1768. 0x19, 0x000, /* -12dB ADC/L */
  1769. 0x1a, 0x000, /* -12dB ADC/R */
  1770. (unsigned short)-1
  1771. };
  1772. static const unsigned short cs_inits[] = {
  1773. 0x0441, /* RUN */
  1774. 0x0180, /* no mute, OMCK output on RMCK pin */
  1775. 0x0201, /* S/PDIF source on RXP1 */
  1776. 0x0605, /* slave, 24bit, MSB on second OSCLK, SDOUT for right channel when OLRCK is high */
  1777. (unsigned short)-1
  1778. };
  1779. unsigned int tmp;
  1780. const unsigned short *p;
  1781. int err, i;
  1782. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON51_SKY) {
  1783. ice->num_total_dacs = 6;
  1784. ice->num_total_adcs = 2;
  1785. } else {
  1786. /* aureon 7.1 and prodigy 7.1 */
  1787. ice->num_total_dacs = 8;
  1788. ice->num_total_adcs = 2;
  1789. }
  1790. /* to remeber the register values of CS8415 */
  1791. ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
  1792. if (! ice->akm)
  1793. return -ENOMEM;
  1794. ice->akm_codecs = 1;
  1795. if ((err = aureon_ac97_init(ice)) != 0)
  1796. return err;
  1797. snd_ice1712_gpio_set_dir(ice, 0x5fffff); /* fix this for the time being */
  1798. /* reset the wm codec as the SPI mode */
  1799. snd_ice1712_save_gpio_status(ice);
  1800. snd_ice1712_gpio_set_mask(ice, ~(AUREON_WM_RESET|AUREON_WM_CS|AUREON_CS8415_CS|AUREON_HP_SEL));
  1801. tmp = snd_ice1712_gpio_read(ice);
  1802. tmp &= ~AUREON_WM_RESET;
  1803. snd_ice1712_gpio_write(ice, tmp);
  1804. udelay(1);
  1805. tmp |= AUREON_WM_CS | AUREON_CS8415_CS;
  1806. snd_ice1712_gpio_write(ice, tmp);
  1807. udelay(1);
  1808. tmp |= AUREON_WM_RESET;
  1809. snd_ice1712_gpio_write(ice, tmp);
  1810. udelay(1);
  1811. /* initialize WM8770 codec */
  1812. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71 ||
  1813. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ||
  1814. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71XT)
  1815. p = wm_inits_prodigy;
  1816. else
  1817. p = wm_inits_aureon;
  1818. for (; *p != (unsigned short)-1; p += 2)
  1819. wm_put(ice, p[0], p[1]);
  1820. /* initialize CS8415A codec */
  1821. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1822. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT) {
  1823. for (p = cs_inits; *p != (unsigned short)-1; p++)
  1824. aureon_spi_write(ice, AUREON_CS8415_CS, *p | 0x200000, 24);
  1825. ice->spec.aureon.cs8415_mux = 1;
  1826. aureon_set_headphone_amp(ice, 1);
  1827. }
  1828. snd_ice1712_restore_gpio_status(ice);
  1829. /* initialize PCA9554 pin directions & set default input*/
  1830. aureon_pca9554_write(ice, PCA9554_DIR, 0x00);
  1831. aureon_pca9554_write(ice, PCA9554_OUT, 0x00); /* internal AUX */
  1832. ice->spec.aureon.master[0] = WM_VOL_MUTE;
  1833. ice->spec.aureon.master[1] = WM_VOL_MUTE;
  1834. for (i = 0; i < ice->num_total_dacs; i++) {
  1835. ice->spec.aureon.vol[i] = WM_VOL_MUTE;
  1836. wm_set_vol(ice, i, ice->spec.aureon.vol[i], ice->spec.aureon.master[i % 2]);
  1837. }
  1838. return 0;
  1839. }
  1840. /*
  1841. * Aureon boards don't provide the EEPROM data except for the vendor IDs.
  1842. * hence the driver needs to sets up it properly.
  1843. */
  1844. static unsigned char aureon51_eeprom[] __devinitdata = {
  1845. [ICE_EEP2_SYSCONF] = 0x0a, /* clock 512, spdif-in/ADC, 3DACs */
  1846. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1847. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1848. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1849. [ICE_EEP2_GPIO_DIR] = 0xff,
  1850. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1851. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1852. [ICE_EEP2_GPIO_MASK] = 0x00,
  1853. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1854. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1855. [ICE_EEP2_GPIO_STATE] = 0x00,
  1856. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1857. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1858. };
  1859. static unsigned char aureon71_eeprom[] __devinitdata = {
  1860. [ICE_EEP2_SYSCONF] = 0x0b, /* clock 512, spdif-in/ADC, 4DACs */
  1861. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1862. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1863. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1864. [ICE_EEP2_GPIO_DIR] = 0xff,
  1865. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1866. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1867. [ICE_EEP2_GPIO_MASK] = 0x00,
  1868. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1869. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1870. [ICE_EEP2_GPIO_STATE] = 0x00,
  1871. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1872. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1873. };
  1874. #define prodigy71_eeprom aureon71_eeprom
  1875. static unsigned char prodigy71lt_eeprom[] __devinitdata = {
  1876. [ICE_EEP2_SYSCONF] = 0x4b, /* clock 384, spdif-in/ADC, 4DACs */
  1877. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1878. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1879. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1880. [ICE_EEP2_GPIO_DIR] = 0xff,
  1881. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1882. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1883. [ICE_EEP2_GPIO_MASK] = 0x00,
  1884. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1885. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1886. [ICE_EEP2_GPIO_STATE] = 0x00,
  1887. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1888. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1889. };
  1890. #define prodigy71xt_eeprom prodigy71lt_eeprom
  1891. /* entry point */
  1892. struct snd_ice1712_card_info snd_vt1724_aureon_cards[] __devinitdata = {
  1893. {
  1894. .subvendor = VT1724_SUBDEVICE_AUREON51_SKY,
  1895. .name = "Terratec Aureon 5.1-Sky",
  1896. .model = "aureon51",
  1897. .chip_init = aureon_init,
  1898. .build_controls = aureon_add_controls,
  1899. .eeprom_size = sizeof(aureon51_eeprom),
  1900. .eeprom_data = aureon51_eeprom,
  1901. .driver = "Aureon51",
  1902. },
  1903. {
  1904. .subvendor = VT1724_SUBDEVICE_AUREON71_SPACE,
  1905. .name = "Terratec Aureon 7.1-Space",
  1906. .model = "aureon71",
  1907. .chip_init = aureon_init,
  1908. .build_controls = aureon_add_controls,
  1909. .eeprom_size = sizeof(aureon71_eeprom),
  1910. .eeprom_data = aureon71_eeprom,
  1911. .driver = "Aureon71",
  1912. },
  1913. {
  1914. .subvendor = VT1724_SUBDEVICE_AUREON71_UNIVERSE,
  1915. .name = "Terratec Aureon 7.1-Universe",
  1916. .model = "universe",
  1917. .chip_init = aureon_init,
  1918. .build_controls = aureon_add_controls,
  1919. .eeprom_size = sizeof(aureon71_eeprom),
  1920. .eeprom_data = aureon71_eeprom,
  1921. .driver = "Aureon71Univ", /* keep in 15 letters */
  1922. },
  1923. {
  1924. .subvendor = VT1724_SUBDEVICE_PRODIGY71,
  1925. .name = "Audiotrak Prodigy 7.1",
  1926. .model = "prodigy71",
  1927. .chip_init = aureon_init,
  1928. .build_controls = aureon_add_controls,
  1929. .eeprom_size = sizeof(prodigy71_eeprom),
  1930. .eeprom_data = prodigy71_eeprom,
  1931. .driver = "Prodigy71", /* should be identical with Aureon71 */
  1932. },
  1933. {
  1934. .subvendor = VT1724_SUBDEVICE_PRODIGY71LT,
  1935. .name = "Audiotrak Prodigy 7.1 LT",
  1936. .model = "prodigy71lt",
  1937. .chip_init = aureon_init,
  1938. .build_controls = aureon_add_controls,
  1939. .eeprom_size = sizeof(prodigy71lt_eeprom),
  1940. .eeprom_data = prodigy71lt_eeprom,
  1941. .driver = "Prodigy71LT",
  1942. },
  1943. {
  1944. .subvendor = VT1724_SUBDEVICE_PRODIGY71XT,
  1945. .name = "Audiotrak Prodigy 7.1 XT",
  1946. .model = "prodigy71xt",
  1947. .chip_init = aureon_init,
  1948. .build_controls = aureon_add_controls,
  1949. .eeprom_size = sizeof(prodigy71xt_eeprom),
  1950. .eeprom_data = prodigy71xt_eeprom,
  1951. .driver = "Prodigy71LT",
  1952. },
  1953. { } /* terminator */
  1954. };