mach_apic.h 2.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103
  1. #ifndef __ASM_MACH_APIC_H
  2. #define __ASM_MACH_APIC_H
  3. #include <mach_apicdef.h>
  4. #include <asm/smp.h>
  5. #define APIC_DFR_VALUE (APIC_DFR_FLAT)
  6. #define no_balance_irq (0)
  7. #define esr_disable (0)
  8. #define INT_DELIVERY_MODE dest_LowestPrio
  9. #define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */
  10. #ifdef CONFIG_SMP
  11. #define TARGET_CPUS cpu_online_map
  12. #else
  13. #define TARGET_CPUS cpumask_of_cpu(0)
  14. #endif
  15. #define check_apicid_used(bitmap, apicid) physid_isset(apicid, bitmap)
  16. #define check_apicid_present(bit) physid_isset(bit, phys_cpu_present_map)
  17. static inline int apic_id_registered(void)
  18. {
  19. return physid_isset(GET_APIC_ID(apic_read(APIC_ID)), phys_cpu_present_map);
  20. }
  21. /*
  22. * Set up the logical destination ID.
  23. *
  24. * Intel recommends to set DFR, LDR and TPR before enabling
  25. * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
  26. * document number 292116). So here it goes...
  27. */
  28. static inline void init_apic_ldr(void)
  29. {
  30. unsigned long val;
  31. apic_write_around(APIC_DFR, APIC_DFR_VALUE);
  32. val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
  33. val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id());
  34. apic_write_around(APIC_LDR, val);
  35. }
  36. static inline void summit_check(char *oem, char *productid)
  37. {
  38. }
  39. static inline void setup_apic_routing(void)
  40. {
  41. }
  42. static inline int apicid_to_node(int logical_apicid)
  43. {
  44. return 0;
  45. }
  46. /* Mapping from cpu number to logical apicid */
  47. static inline int cpu_to_logical_apicid(int cpu)
  48. {
  49. return 1 << cpu;
  50. }
  51. static inline int cpu_present_to_apicid(int mps_cpu)
  52. {
  53. if (mps_cpu < get_physical_broadcast())
  54. return mps_cpu;
  55. else
  56. return BAD_APICID;
  57. }
  58. static inline physid_mask_t apicid_to_cpu_present(int apicid)
  59. {
  60. return physid_mask_of_physid(apicid);
  61. }
  62. #define WAKE_SECONDARY_VIA_INIT
  63. static inline void setup_portio_remap(void)
  64. {
  65. }
  66. static inline void enable_apic_mode(void)
  67. {
  68. }
  69. static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
  70. {
  71. return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
  72. }
  73. static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
  74. {
  75. return cpus_addr(cpumask)[0];
  76. }
  77. static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
  78. {
  79. return cpuid_apic >> index_msb;
  80. }
  81. #endif /* __ASM_MACH_APIC_H */