ide.h 2.5 KB

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  1. /* $Id: ide.h,v 1.21 2001/09/25 20:21:48 kanoj Exp $
  2. * ide.h: Ultra/PCI specific IDE glue.
  3. *
  4. * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
  5. * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
  6. */
  7. #ifndef _SPARC64_IDE_H
  8. #define _SPARC64_IDE_H
  9. #ifdef __KERNEL__
  10. #include <asm/pgalloc.h>
  11. #include <asm/io.h>
  12. #include <asm/spitfire.h>
  13. #include <asm/cacheflush.h>
  14. #include <asm/page.h>
  15. #ifndef MAX_HWIFS
  16. # ifdef CONFIG_BLK_DEV_IDEPCI
  17. #define MAX_HWIFS 10
  18. # else
  19. #define MAX_HWIFS 2
  20. # endif
  21. #endif
  22. #define ide_default_io_ctl(base) ((base) + 0x206) /* obsolete */
  23. #define __ide_insl(data_reg, buffer, wcount) \
  24. __ide_insw(data_reg, buffer, (wcount)<<1)
  25. #define __ide_outsl(data_reg, buffer, wcount) \
  26. __ide_outsw(data_reg, buffer, (wcount)<<1)
  27. /* On sparc64, I/O ports and MMIO registers are accessed identically. */
  28. #define __ide_mm_insw __ide_insw
  29. #define __ide_mm_insl __ide_insl
  30. #define __ide_mm_outsw __ide_outsw
  31. #define __ide_mm_outsl __ide_outsl
  32. static inline unsigned int inw_be(void __iomem *addr)
  33. {
  34. unsigned int ret;
  35. __asm__ __volatile__("lduha [%1] %2, %0"
  36. : "=r" (ret)
  37. : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
  38. return ret;
  39. }
  40. static inline void __ide_insw(void __iomem *port, void *dst, u32 count)
  41. {
  42. #ifdef DCACHE_ALIASING_POSSIBLE
  43. unsigned long end = (unsigned long)dst + (count << 1);
  44. #endif
  45. u16 *ps = dst;
  46. u32 *pi;
  47. if(((u64)ps) & 0x2) {
  48. *ps++ = inw_be(port);
  49. count--;
  50. }
  51. pi = (u32 *)ps;
  52. while(count >= 2) {
  53. u32 w;
  54. w = inw_be(port) << 16;
  55. w |= inw_be(port);
  56. *pi++ = w;
  57. count -= 2;
  58. }
  59. ps = (u16 *)pi;
  60. if(count)
  61. *ps++ = inw_be(port);
  62. #ifdef DCACHE_ALIASING_POSSIBLE
  63. __flush_dcache_range((unsigned long)dst, end);
  64. #endif
  65. }
  66. static inline void outw_be(unsigned short w, void __iomem *addr)
  67. {
  68. __asm__ __volatile__("stha %0, [%1] %2"
  69. : /* no outputs */
  70. : "r" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
  71. }
  72. static inline void __ide_outsw(void __iomem *port, void *src, u32 count)
  73. {
  74. #ifdef DCACHE_ALIASING_POSSIBLE
  75. unsigned long end = (unsigned long)src + (count << 1);
  76. #endif
  77. const u16 *ps = src;
  78. const u32 *pi;
  79. if(((u64)src) & 0x2) {
  80. outw_be(*ps++, port);
  81. count--;
  82. }
  83. pi = (const u32 *)ps;
  84. while(count >= 2) {
  85. u32 w;
  86. w = *pi++;
  87. outw_be((w >> 16), port);
  88. outw_be(w, port);
  89. count -= 2;
  90. }
  91. ps = (const u16 *)pi;
  92. if(count)
  93. outw_be(*ps, port);
  94. #ifdef DCACHE_ALIASING_POSSIBLE
  95. __flush_dcache_range((unsigned long)src, end);
  96. #endif
  97. }
  98. #endif /* __KERNEL__ */
  99. #endif /* _SPARC64_IDE_H */