pci.h 4.3 KB

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  1. #ifndef __PPC_PCI_H
  2. #define __PPC_PCI_H
  3. #ifdef __KERNEL__
  4. #include <linux/types.h>
  5. #include <linux/slab.h>
  6. #include <linux/string.h>
  7. #include <linux/mm.h>
  8. #include <asm/scatterlist.h>
  9. #include <asm/io.h>
  10. #include <asm/pci-bridge.h>
  11. #include <asm-generic/pci-dma-compat.h>
  12. struct pci_dev;
  13. /* Values for the `which' argument to sys_pciconfig_iobase syscall. */
  14. #define IOBASE_BRIDGE_NUMBER 0
  15. #define IOBASE_MEMORY 1
  16. #define IOBASE_IO 2
  17. #define IOBASE_ISA_IO 3
  18. #define IOBASE_ISA_MEM 4
  19. /*
  20. * Set this to 1 if you want the kernel to re-assign all PCI
  21. * bus numbers
  22. */
  23. extern int pci_assign_all_buses;
  24. #define pcibios_assign_all_busses() (pci_assign_all_buses)
  25. #define pcibios_scan_all_fns(a, b) 0
  26. #define PCIBIOS_MIN_IO 0x1000
  27. #define PCIBIOS_MIN_MEM 0x10000000
  28. extern inline void pcibios_set_master(struct pci_dev *dev)
  29. {
  30. /* No special bus mastering setup handling */
  31. }
  32. extern inline void pcibios_penalize_isa_irq(int irq, int active)
  33. {
  34. /* We don't do dynamic PCI IRQ allocation */
  35. }
  36. extern unsigned long pci_resource_to_bus(struct pci_dev *pdev, struct resource *res);
  37. /*
  38. * The PCI bus bridge can translate addresses issued by the processor(s)
  39. * into a different address on the PCI bus. On 32-bit cpus, we assume
  40. * this mapping is 1-1, but on 64-bit systems it often isn't.
  41. *
  42. * Obsolete ! Drivers should now use pci_resource_to_bus
  43. */
  44. extern unsigned long phys_to_bus(unsigned long pa);
  45. extern unsigned long pci_phys_to_bus(unsigned long pa, int busnr);
  46. extern unsigned long pci_bus_to_phys(unsigned int ba, int busnr);
  47. /* The PCI address space does equal the physical memory
  48. * address space. The networking and block device layers use
  49. * this boolean for bounce buffer decisions.
  50. */
  51. #define PCI_DMA_BUS_IS_PHYS (1)
  52. #ifdef CONFIG_NOT_COHERENT_CACHE
  53. /*
  54. * pci_unmap_{page,single} are NOPs but pci_dma_sync_single_for_cpu()
  55. * and so on are not, so...
  56. */
  57. #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
  58. dma_addr_t ADDR_NAME;
  59. #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
  60. __u32 LEN_NAME;
  61. #define pci_unmap_addr(PTR, ADDR_NAME) \
  62. ((PTR)->ADDR_NAME)
  63. #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
  64. (((PTR)->ADDR_NAME) = (VAL))
  65. #define pci_unmap_len(PTR, LEN_NAME) \
  66. ((PTR)->LEN_NAME)
  67. #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
  68. (((PTR)->LEN_NAME) = (VAL))
  69. #else /* coherent */
  70. /* pci_unmap_{page,single} is a nop so... */
  71. #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
  72. #define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
  73. #define pci_unmap_addr(PTR, ADDR_NAME) (0)
  74. #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
  75. #define pci_unmap_len(PTR, LEN_NAME) (0)
  76. #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
  77. #endif /* CONFIG_NOT_COHERENT_CACHE */
  78. #ifdef CONFIG_PCI
  79. static inline void pci_dma_burst_advice(struct pci_dev *pdev,
  80. enum pci_dma_burst_strategy *strat,
  81. unsigned long *strategy_parameter)
  82. {
  83. *strat = PCI_DMA_BURST_INFINITY;
  84. *strategy_parameter = ~0UL;
  85. }
  86. #endif
  87. /* Return the index of the PCI controller for device PDEV. */
  88. #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
  89. /* Set the name of the bus as it appears in /proc/bus/pci */
  90. static inline int pci_proc_domain(struct pci_bus *bus)
  91. {
  92. return 0;
  93. }
  94. /* Map a range of PCI memory or I/O space for a device into user space */
  95. int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
  96. enum pci_mmap_state mmap_state, int write_combine);
  97. /* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
  98. #define HAVE_PCI_MMAP 1
  99. extern void
  100. pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
  101. struct resource *res);
  102. extern void
  103. pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
  104. struct pci_bus_region *region);
  105. static inline struct resource *
  106. pcibios_select_root(struct pci_dev *pdev, struct resource *res)
  107. {
  108. struct resource *root = NULL;
  109. if (res->flags & IORESOURCE_IO)
  110. root = &ioport_resource;
  111. if (res->flags & IORESOURCE_MEM)
  112. root = &iomem_resource;
  113. return root;
  114. }
  115. struct file;
  116. extern pgprot_t pci_phys_mem_access_prot(struct file *file,
  117. unsigned long pfn,
  118. unsigned long size,
  119. pgprot_t prot);
  120. #define HAVE_ARCH_PCI_RESOURCE_TO_USER
  121. extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
  122. const struct resource *rsrc,
  123. resource_size_t *start, resource_size_t *end);
  124. #endif /* __KERNEL__ */
  125. #endif /* __PPC_PCI_H */