dma-mapping.h 2.4 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677
  1. #ifndef _ASM_IA64_DMA_MAPPING_H
  2. #define _ASM_IA64_DMA_MAPPING_H
  3. /*
  4. * Copyright (C) 2003-2004 Hewlett-Packard Co
  5. * David Mosberger-Tang <davidm@hpl.hp.com>
  6. */
  7. #include <asm/machvec.h>
  8. #include <linux/scatterlist.h>
  9. #define dma_alloc_coherent platform_dma_alloc_coherent
  10. /* coherent mem. is cheap */
  11. static inline void *
  12. dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
  13. gfp_t flag)
  14. {
  15. return dma_alloc_coherent(dev, size, dma_handle, flag);
  16. }
  17. #define dma_free_coherent platform_dma_free_coherent
  18. static inline void
  19. dma_free_noncoherent(struct device *dev, size_t size, void *cpu_addr,
  20. dma_addr_t dma_handle)
  21. {
  22. dma_free_coherent(dev, size, cpu_addr, dma_handle);
  23. }
  24. #define dma_map_single platform_dma_map_single
  25. #define dma_map_sg platform_dma_map_sg
  26. #define dma_unmap_single platform_dma_unmap_single
  27. #define dma_unmap_sg platform_dma_unmap_sg
  28. #define dma_sync_single_for_cpu platform_dma_sync_single_for_cpu
  29. #define dma_sync_sg_for_cpu platform_dma_sync_sg_for_cpu
  30. #define dma_sync_single_for_device platform_dma_sync_single_for_device
  31. #define dma_sync_sg_for_device platform_dma_sync_sg_for_device
  32. #define dma_mapping_error platform_dma_mapping_error
  33. #define dma_map_page(dev, pg, off, size, dir) \
  34. dma_map_single(dev, page_address(pg) + (off), (size), (dir))
  35. #define dma_unmap_page(dev, dma_addr, size, dir) \
  36. dma_unmap_single(dev, dma_addr, size, dir)
  37. /*
  38. * Rest of this file is part of the "Advanced DMA API". Use at your own risk.
  39. * See Documentation/DMA-API.txt for details.
  40. */
  41. #define dma_sync_single_range_for_cpu(dev, dma_handle, offset, size, dir) \
  42. dma_sync_single_for_cpu(dev, dma_handle, size, dir)
  43. #define dma_sync_single_range_for_device(dev, dma_handle, offset, size, dir) \
  44. dma_sync_single_for_device(dev, dma_handle, size, dir)
  45. #define dma_supported platform_dma_supported
  46. static inline int
  47. dma_set_mask (struct device *dev, u64 mask)
  48. {
  49. if (!dev->dma_mask || !dma_supported(dev, mask))
  50. return -EIO;
  51. *dev->dma_mask = mask;
  52. return 0;
  53. }
  54. extern int dma_get_cache_alignment(void);
  55. static inline void
  56. dma_cache_sync (struct device *dev, void *vaddr, size_t size,
  57. enum dma_data_direction dir)
  58. {
  59. /*
  60. * IA-64 is cache-coherent, so this is mostly a no-op. However, we do need to
  61. * ensure that dma_cache_sync() enforces order, hence the mb().
  62. */
  63. mb();
  64. }
  65. #define dma_is_consistent(d, h) (1) /* all we do is coherent memory... */
  66. #endif /* _ASM_IA64_DMA_MAPPING_H */