blackfin.h 5.6 KB

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  1. /*
  2. * File: include/asm-blackfin/mach-bf537/blackfin.h
  3. * Based on:
  4. * Author:
  5. *
  6. * Created:
  7. * Description:
  8. *
  9. * Rev:
  10. *
  11. * Modified:
  12. *
  13. *
  14. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2, or (at your option)
  19. * any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful,
  22. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  24. * GNU General Public License for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; see the file COPYING.
  28. * If not, write to the Free Software Foundation,
  29. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  30. */
  31. #ifndef _MACH_BLACKFIN_H_
  32. #define _MACH_BLACKFIN_H_
  33. #define BF537_FAMILY
  34. #include "bf537.h"
  35. #include "mem_map.h"
  36. #include "defBF534.h"
  37. #include "anomaly.h"
  38. #if defined(CONFIG_BF537) || defined(CONFIG_BF536)
  39. #include "defBF537.h"
  40. #endif
  41. #if !defined(__ASSEMBLY__)
  42. #include "cdefBF534.h"
  43. /* UART 0*/
  44. #define bfin_read_UART_THR() bfin_read_UART0_THR()
  45. #define bfin_write_UART_THR(val) bfin_write_UART0_THR(val)
  46. #define bfin_read_UART_RBR() bfin_read_UART0_RBR()
  47. #define bfin_write_UART_RBR(val) bfin_write_UART0_RBR(val)
  48. #define bfin_read_UART_DLL() bfin_read_UART0_DLL()
  49. #define bfin_write_UART_DLL(val) bfin_write_UART0_DLL(val)
  50. #define bfin_read_UART_IER() bfin_read_UART0_IER()
  51. #define bfin_write_UART_IER(val) bfin_write_UART0_IER(val)
  52. #define bfin_read_UART_DLH() bfin_read_UART0_DLH()
  53. #define bfin_write_UART_DLH(val) bfin_write_UART0_DLH(val)
  54. #define bfin_read_UART_IIR() bfin_read_UART0_IIR()
  55. #define bfin_write_UART_IIR(val) bfin_write_UART0_IIR(val)
  56. #define bfin_read_UART_LCR() bfin_read_UART0_LCR()
  57. #define bfin_write_UART_LCR(val) bfin_write_UART0_LCR(val)
  58. #define bfin_read_UART_MCR() bfin_read_UART0_MCR()
  59. #define bfin_write_UART_MCR(val) bfin_write_UART0_MCR(val)
  60. #define bfin_read_UART_LSR() bfin_read_UART0_LSR()
  61. #define bfin_write_UART_LSR(val) bfin_write_UART0_LSR(val)
  62. #define bfin_read_UART_SCR() bfin_read_UART0_SCR()
  63. #define bfin_write_UART_SCR(val) bfin_write_UART0_SCR(val)
  64. #define bfin_read_UART_GCTL() bfin_read_UART0_GCTL()
  65. #define bfin_write_UART_GCTL(val) bfin_write_UART0_GCTL(val)
  66. #if defined(CONFIG_BF537) || defined(CONFIG_BF536)
  67. #include "cdefBF537.h"
  68. #endif
  69. #endif
  70. /* MAP used DEFINES from BF533 to BF537 - so we don't need to change them in the driver, kernel, etc. */
  71. /* UART_IIR Register */
  72. #define STATUS(x) ((x << 1) & 0x06)
  73. #define STATUS_P1 0x02
  74. #define STATUS_P0 0x01
  75. /* UART 0*/
  76. /* DMA Channnel */
  77. #define bfin_read_CH_UART_RX() bfin_read_CH_UART0_RX()
  78. #define bfin_write_CH_UART_RX(val) bfin_write_CH_UART0_RX(val)
  79. #define CH_UART_RX CH_UART0_RX
  80. #define bfin_read_CH_UART_TX() bfin_read_CH_UART0_TX()
  81. #define bfin_write_CH_UART_TX(val) bfin_write_CH_UART0_TX(val)
  82. #define CH_UART_TX CH_UART0_TX
  83. /* System Interrupt Controller */
  84. #define bfin_read_IRQ_UART_RX() bfin_read_IRQ_UART0_RX()
  85. #define bfin_write_IRQ_UART_RX(val) bfin_write_IRQ_UART0_RX(val)
  86. #define IRQ_UART_RX IRQ_UART0_RX
  87. #define bfin_read_IRQ_UART_TX() bfin_read_IRQ_UART0_TX()
  88. #define bfin_write_IRQ_UART_TX(val) bfin_write_IRQ_UART0_TX(val)
  89. #define IRQ_UART_TX IRQ_UART0_TX
  90. #define bfin_read_IRQ_UART_ERROR() bfin_read_IRQ_UART0_ERROR()
  91. #define bfin_write_IRQ_UART_ERROR(val) bfin_write_IRQ_UART0_ERROR(val)
  92. #define IRQ_UART_ERROR IRQ_UART0_ERROR
  93. /* MMR Registers*/
  94. #define bfin_read_UART_THR() bfin_read_UART0_THR()
  95. #define bfin_write_UART_THR(val) bfin_write_UART0_THR(val)
  96. #define UART_THR UART0_THR
  97. #define bfin_read_UART_RBR() bfin_read_UART0_RBR()
  98. #define bfin_write_UART_RBR(val) bfin_write_UART0_RBR(val)
  99. #define UART_RBR UART0_RBR
  100. #define bfin_read_UART_DLL() bfin_read_UART0_DLL()
  101. #define bfin_write_UART_DLL(val) bfin_write_UART0_DLL(val)
  102. #define UART_DLL UART0_DLL
  103. #define bfin_read_UART_IER() bfin_read_UART0_IER()
  104. #define bfin_write_UART_IER(val) bfin_write_UART0_IER(val)
  105. #define UART_IER UART0_IER
  106. #define bfin_read_UART_DLH() bfin_read_UART0_DLH()
  107. #define bfin_write_UART_DLH(val) bfin_write_UART0_DLH(val)
  108. #define UART_DLH UART0_DLH
  109. #define bfin_read_UART_IIR() bfin_read_UART0_IIR()
  110. #define bfin_write_UART_IIR(val) bfin_write_UART0_IIR(val)
  111. #define UART_IIR UART0_IIR
  112. #define bfin_read_UART_LCR() bfin_read_UART0_LCR()
  113. #define bfin_write_UART_LCR(val) bfin_write_UART0_LCR(val)
  114. #define UART_LCR UART0_LCR
  115. #define bfin_read_UART_MCR() bfin_read_UART0_MCR()
  116. #define bfin_write_UART_MCR(val) bfin_write_UART0_MCR(val)
  117. #define UART_MCR UART0_MCR
  118. #define bfin_read_UART_LSR() bfin_read_UART0_LSR()
  119. #define bfin_write_UART_LSR(val) bfin_write_UART0_LSR(val)
  120. #define UART_LSR UART0_LSR
  121. #define bfin_read_UART_SCR() bfin_read_UART0_SCR()
  122. #define bfin_write_UART_SCR(val) bfin_write_UART0_SCR(val)
  123. #define UART_SCR UART0_SCR
  124. #define bfin_read_UART_GCTL() bfin_read_UART0_GCTL()
  125. #define bfin_write_UART_GCTL(val) bfin_write_UART0_GCTL(val)
  126. #define UART_GCTL UART0_GCTL
  127. /* DPMC*/
  128. #define bfin_read_STOPCK_OFF() bfin_read_STOPCK()
  129. #define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val)
  130. #define STOPCK_OFF STOPCK
  131. /* PLL_DIV Masks */
  132. #define CCLK_DIV1 CSEL_DIV1 /* CCLK = VCO / 1 */
  133. #define CCLK_DIV2 CSEL_DIV2 /* CCLK = VCO / 2 */
  134. #define CCLK_DIV4 CSEL_DIV4 /* CCLK = VCO / 4 */
  135. #define CCLK_DIV8 CSEL_DIV8 /* CCLK = VCO / 8 */
  136. #endif