cplbinit.h 2.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687
  1. /*
  2. * File: include/asm-blackfin/cplbinit.h
  3. * Based on:
  4. * Author:
  5. *
  6. * Created:
  7. * Description:
  8. *
  9. * Modified:
  10. * Copyright 2004-2006 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. #ifndef __ASM_CPLBINIT_H__
  30. #define __ASM_CPLBINIT_H__
  31. #include <asm/blackfin.h>
  32. #include <asm/cplb.h>
  33. #define INITIAL_T 0x1
  34. #define SWITCH_T 0x2
  35. #define I_CPLB 0x4
  36. #define D_CPLB 0x8
  37. #define IN_KERNEL 1
  38. enum
  39. {ZERO_P, L1I_MEM, L1D_MEM, SDRAM_KERN , SDRAM_RAM_MTD, SDRAM_DMAZ, RES_MEM, ASYNC_MEM, L2_MEM};
  40. struct cplb_desc {
  41. u32 start; /* start address */
  42. u32 end; /* end address */
  43. u32 psize; /* prefered size if any otherwise 1MB or 4MB*/
  44. u16 attr;/* attributes */
  45. u16 i_conf;/* I-CPLB DATA */
  46. u16 d_conf;/* D-CPLB DATA */
  47. u16 valid;/* valid */
  48. const s8 name[30];/* name */
  49. };
  50. struct cplb_tab {
  51. u_long *tab;
  52. u16 pos;
  53. u16 size;
  54. };
  55. extern u_long icplb_table[];
  56. extern u_long dcplb_table[];
  57. /* Till here we are discussing about the static memory management model.
  58. * However, the operating envoronments commonly define more CPLB
  59. * descriptors to cover the entire addressable memory than will fit into
  60. * the available on-chip 16 CPLB MMRs. When this happens, the below table
  61. * will be used which will hold all the potentially required CPLB descriptors
  62. *
  63. * This is how Page descriptor Table is implemented in uClinux/Blackfin.
  64. */
  65. extern u_long ipdt_table[];
  66. extern u_long dpdt_table[];
  67. #ifdef CONFIG_CPLB_INFO
  68. extern u_long ipdt_swapcount_table[];
  69. extern u_long dpdt_swapcount_table[];
  70. #endif
  71. extern unsigned long reserved_mem_dcache_on;
  72. extern unsigned long reserved_mem_icache_on;
  73. extern void generate_cpl_tables(void);
  74. #endif