usb.h 4.4 KB

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  1. // include/asm-arm/mach-omap/usb.h
  2. #ifndef __ASM_ARCH_OMAP_USB_H
  3. #define __ASM_ARCH_OMAP_USB_H
  4. #include <asm/arch/board.h>
  5. /*-------------------------------------------------------------------------*/
  6. #define OMAP1_OTG_BASE 0xfffb0400
  7. #define OMAP1_UDC_BASE 0xfffb4000
  8. #define OMAP1_OHCI_BASE 0xfffba000
  9. #define OMAP2_OHCI_BASE 0x4805e000
  10. #define OMAP2_UDC_BASE 0x4805e200
  11. #define OMAP2_OTG_BASE 0x4805e300
  12. #ifdef CONFIG_ARCH_OMAP1
  13. #define OTG_BASE OMAP1_OTG_BASE
  14. #define UDC_BASE OMAP1_UDC_BASE
  15. #define OMAP_OHCI_BASE OMAP1_OHCI_BASE
  16. #else
  17. #define OTG_BASE OMAP2_OTG_BASE
  18. #define UDC_BASE OMAP2_UDC_BASE
  19. #define OMAP_OHCI_BASE OMAP2_OHCI_BASE
  20. #endif
  21. /*-------------------------------------------------------------------------*/
  22. /*
  23. * OTG and transceiver registers, for OMAPs starting with ARM926
  24. */
  25. #define OTG_REG32(offset) __REG32(OTG_BASE + (offset))
  26. #define OTG_REG16(offset) __REG16(OTG_BASE + (offset))
  27. #define OTG_REV_REG OTG_REG32(0x00)
  28. #define OTG_SYSCON_1_REG OTG_REG32(0x04)
  29. # define USB2_TRX_MODE(w) (((w)>>24)&0x07)
  30. # define USB1_TRX_MODE(w) (((w)>>20)&0x07)
  31. # define USB0_TRX_MODE(w) (((w)>>16)&0x07)
  32. # define OTG_IDLE_EN (1 << 15)
  33. # define HST_IDLE_EN (1 << 14)
  34. # define DEV_IDLE_EN (1 << 13)
  35. # define OTG_RESET_DONE (1 << 2)
  36. # define OTG_SOFT_RESET (1 << 1)
  37. #define OTG_SYSCON_2_REG OTG_REG32(0x08)
  38. # define OTG_EN (1 << 31)
  39. # define USBX_SYNCHRO (1 << 30)
  40. # define OTG_MST16 (1 << 29)
  41. # define SRP_GPDATA (1 << 28)
  42. # define SRP_GPDVBUS (1 << 27)
  43. # define SRP_GPUVBUS(w) (((w)>>24)&0x07)
  44. # define A_WAIT_VRISE(w) (((w)>>20)&0x07)
  45. # define B_ASE_BRST(w) (((w)>>16)&0x07)
  46. # define SRP_DPW (1 << 14)
  47. # define SRP_DATA (1 << 13)
  48. # define SRP_VBUS (1 << 12)
  49. # define OTG_PADEN (1 << 10)
  50. # define HMC_PADEN (1 << 9)
  51. # define UHOST_EN (1 << 8)
  52. # define HMC_TLLSPEED (1 << 7)
  53. # define HMC_TLLATTACH (1 << 6)
  54. # define OTG_HMC(w) (((w)>>0)&0x3f)
  55. #define OTG_CTRL_REG OTG_REG32(0x0c)
  56. # define OTG_USB2_EN (1 << 29)
  57. # define OTG_USB2_DP (1 << 28)
  58. # define OTG_USB2_DM (1 << 27)
  59. # define OTG_USB1_EN (1 << 26)
  60. # define OTG_USB1_DP (1 << 25)
  61. # define OTG_USB1_DM (1 << 24)
  62. # define OTG_USB0_EN (1 << 23)
  63. # define OTG_USB0_DP (1 << 22)
  64. # define OTG_USB0_DM (1 << 21)
  65. # define OTG_ASESSVLD (1 << 20)
  66. # define OTG_BSESSEND (1 << 19)
  67. # define OTG_BSESSVLD (1 << 18)
  68. # define OTG_VBUSVLD (1 << 17)
  69. # define OTG_ID (1 << 16)
  70. # define OTG_DRIVER_SEL (1 << 15)
  71. # define OTG_A_SETB_HNPEN (1 << 12)
  72. # define OTG_A_BUSREQ (1 << 11)
  73. # define OTG_B_HNPEN (1 << 9)
  74. # define OTG_B_BUSREQ (1 << 8)
  75. # define OTG_BUSDROP (1 << 7)
  76. # define OTG_PULLDOWN (1 << 5)
  77. # define OTG_PULLUP (1 << 4)
  78. # define OTG_DRV_VBUS (1 << 3)
  79. # define OTG_PD_VBUS (1 << 2)
  80. # define OTG_PU_VBUS (1 << 1)
  81. # define OTG_PU_ID (1 << 0)
  82. #define OTG_IRQ_EN_REG OTG_REG16(0x10)
  83. # define DRIVER_SWITCH (1 << 15)
  84. # define A_VBUS_ERR (1 << 13)
  85. # define A_REQ_TMROUT (1 << 12)
  86. # define A_SRP_DETECT (1 << 11)
  87. # define B_HNP_FAIL (1 << 10)
  88. # define B_SRP_TMROUT (1 << 9)
  89. # define B_SRP_DONE (1 << 8)
  90. # define B_SRP_STARTED (1 << 7)
  91. # define OPRT_CHG (1 << 0)
  92. #define OTG_IRQ_SRC_REG OTG_REG16(0x14)
  93. // same bits as in IRQ_EN
  94. #define OTG_OUTCTRL_REG OTG_REG16(0x18)
  95. # define OTGVPD (1 << 14)
  96. # define OTGVPU (1 << 13)
  97. # define OTGPUID (1 << 12)
  98. # define USB2VDR (1 << 10)
  99. # define USB2PDEN (1 << 9)
  100. # define USB2PUEN (1 << 8)
  101. # define USB1VDR (1 << 6)
  102. # define USB1PDEN (1 << 5)
  103. # define USB1PUEN (1 << 4)
  104. # define USB0VDR (1 << 2)
  105. # define USB0PDEN (1 << 1)
  106. # define USB0PUEN (1 << 0)
  107. #define OTG_TEST_REG OTG_REG16(0x20)
  108. #define OTG_VENDOR_CODE_REG OTG_REG32(0xfc)
  109. /*-------------------------------------------------------------------------*/
  110. /* OMAP1 */
  111. #define USB_TRANSCEIVER_CTRL_REG __REG32(0xfffe1000 + 0x0064)
  112. # define CONF_USB2_UNI_R (1 << 8)
  113. # define CONF_USB1_UNI_R (1 << 7)
  114. # define CONF_USB_PORT0_R(x) (((x)>>4)&0x7)
  115. # define CONF_USB0_ISOLATE_R (1 << 3)
  116. # define CONF_USB_PWRDN_DM_R (1 << 2)
  117. # define CONF_USB_PWRDN_DP_R (1 << 1)
  118. /* OMAP2 */
  119. #define CONTROL_DEVCONF_REG __REG32(L4_24XX_BASE + 0x0274)
  120. # define USB_UNIDIR 0x0
  121. # define USB_UNIDIR_TLL 0x1
  122. # define USB_BIDIR 0x2
  123. # define USB_BIDIR_TLL 0x3
  124. # define USBT0WRMODEI(x) ((x) << 22)
  125. # define USBT1WRMODEI(x) ((x) << 20)
  126. # define USBT2WRMODEI(x) ((x) << 18)
  127. # define USBT2TLL5PI (1 << 17)
  128. # define USB0PUENACTLOI (1 << 16)
  129. # define USBSTANDBYCTRL (1 << 15)
  130. #endif /* __ASM_ARCH_OMAP_USB_H */