iop_wdt.c 5.8 KB

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  1. /*
  2. * drivers/char/watchdog/iop_wdt.c
  3. *
  4. * WDT driver for Intel I/O Processors
  5. * Copyright (C) 2005, Intel Corporation.
  6. *
  7. * Based on ixp4xx driver, Copyright 2004 (c) MontaVista, Software, Inc.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms and conditions of the GNU General Public License,
  11. * version 2, as published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope it will be useful, but WITHOUT
  14. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  15. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  16. * more details.
  17. *
  18. * You should have received a copy of the GNU General Public License along with
  19. * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
  20. * Place - Suite 330, Boston, MA 02111-1307 USA.
  21. *
  22. * Curt E Bruns <curt.e.bruns@intel.com>
  23. * Peter Milne <peter.milne@d-tacq.com>
  24. * Dan Williams <dan.j.williams@intel.com>
  25. */
  26. #include <linux/module.h>
  27. #include <linux/kernel.h>
  28. #include <linux/fs.h>
  29. #include <linux/init.h>
  30. #include <linux/device.h>
  31. #include <linux/miscdevice.h>
  32. #include <linux/watchdog.h>
  33. #include <linux/uaccess.h>
  34. #include <asm/hardware.h>
  35. static int nowayout = WATCHDOG_NOWAYOUT;
  36. static unsigned long wdt_status;
  37. static unsigned long boot_status;
  38. #define WDT_IN_USE 0
  39. #define WDT_OK_TO_CLOSE 1
  40. #define WDT_ENABLED 2
  41. static unsigned long iop_watchdog_timeout(void)
  42. {
  43. return (0xffffffffUL / get_iop_tick_rate());
  44. }
  45. /**
  46. * wdt_supports_disable - determine if we are accessing a iop13xx watchdog
  47. * or iop3xx by whether it has a disable command
  48. */
  49. static int wdt_supports_disable(void)
  50. {
  51. int can_disable;
  52. if (IOP_WDTCR_EN_ARM != IOP_WDTCR_DIS_ARM)
  53. can_disable = 1;
  54. else
  55. can_disable = 0;
  56. return can_disable;
  57. }
  58. static void wdt_enable(void)
  59. {
  60. /* Arm and enable the Timer to starting counting down from 0xFFFF.FFFF
  61. * Takes approx. 10.7s to timeout
  62. */
  63. write_wdtcr(IOP_WDTCR_EN_ARM);
  64. write_wdtcr(IOP_WDTCR_EN);
  65. }
  66. /* returns 0 if the timer was successfully disabled */
  67. static int wdt_disable(void)
  68. {
  69. /* Stop Counting */
  70. if (wdt_supports_disable()) {
  71. write_wdtcr(IOP_WDTCR_DIS_ARM);
  72. write_wdtcr(IOP_WDTCR_DIS);
  73. clear_bit(WDT_ENABLED, &wdt_status);
  74. printk(KERN_INFO "WATCHDOG: Disabled\n");
  75. return 0;
  76. } else
  77. return 1;
  78. }
  79. static int iop_wdt_open(struct inode *inode, struct file *file)
  80. {
  81. if (test_and_set_bit(WDT_IN_USE, &wdt_status))
  82. return -EBUSY;
  83. clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
  84. wdt_enable();
  85. set_bit(WDT_ENABLED, &wdt_status);
  86. return nonseekable_open(inode, file);
  87. }
  88. static ssize_t
  89. iop_wdt_write(struct file *file, const char *data, size_t len,
  90. loff_t *ppos)
  91. {
  92. if (len) {
  93. if (!nowayout) {
  94. size_t i;
  95. clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
  96. for (i = 0; i != len; i++) {
  97. char c;
  98. if (get_user(c, data + i))
  99. return -EFAULT;
  100. if (c == 'V')
  101. set_bit(WDT_OK_TO_CLOSE, &wdt_status);
  102. }
  103. }
  104. wdt_enable();
  105. }
  106. return len;
  107. }
  108. static struct watchdog_info ident = {
  109. .options = WDIOF_CARDRESET | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
  110. .identity = "iop watchdog",
  111. };
  112. static int
  113. iop_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
  114. unsigned long arg)
  115. {
  116. int options;
  117. int ret = -ENOTTY;
  118. switch (cmd) {
  119. case WDIOC_GETSUPPORT:
  120. if (copy_to_user
  121. ((struct watchdog_info *)arg, &ident, sizeof ident))
  122. ret = -EFAULT;
  123. else
  124. ret = 0;
  125. break;
  126. case WDIOC_GETSTATUS:
  127. ret = put_user(0, (int *)arg);
  128. break;
  129. case WDIOC_GETBOOTSTATUS:
  130. ret = put_user(boot_status, (int *)arg);
  131. break;
  132. case WDIOC_GETTIMEOUT:
  133. ret = put_user(iop_watchdog_timeout(), (int *)arg);
  134. break;
  135. case WDIOC_KEEPALIVE:
  136. wdt_enable();
  137. ret = 0;
  138. break;
  139. case WDIOC_SETOPTIONS:
  140. if (get_user(options, (int *)arg))
  141. return -EFAULT;
  142. if (options & WDIOS_DISABLECARD) {
  143. if (!nowayout) {
  144. if (wdt_disable() == 0) {
  145. set_bit(WDT_OK_TO_CLOSE, &wdt_status);
  146. ret = 0;
  147. } else
  148. ret = -ENXIO;
  149. } else
  150. ret = 0;
  151. }
  152. if (options & WDIOS_ENABLECARD) {
  153. wdt_enable();
  154. ret = 0;
  155. }
  156. break;
  157. }
  158. return ret;
  159. }
  160. static int iop_wdt_release(struct inode *inode, struct file *file)
  161. {
  162. int state = 1;
  163. if (test_bit(WDT_OK_TO_CLOSE, &wdt_status))
  164. if (test_bit(WDT_ENABLED, &wdt_status))
  165. state = wdt_disable();
  166. /* if the timer is not disbaled reload and notify that we are still
  167. * going down
  168. */
  169. if (state != 0) {
  170. wdt_enable();
  171. printk(KERN_CRIT "WATCHDOG: Device closed unexpectedly - "
  172. "reset in %lu seconds\n", iop_watchdog_timeout());
  173. }
  174. clear_bit(WDT_IN_USE, &wdt_status);
  175. clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
  176. return 0;
  177. }
  178. static const struct file_operations iop_wdt_fops = {
  179. .owner = THIS_MODULE,
  180. .llseek = no_llseek,
  181. .write = iop_wdt_write,
  182. .ioctl = iop_wdt_ioctl,
  183. .open = iop_wdt_open,
  184. .release = iop_wdt_release,
  185. };
  186. static struct miscdevice iop_wdt_miscdev = {
  187. .minor = WATCHDOG_MINOR,
  188. .name = "watchdog",
  189. .fops = &iop_wdt_fops,
  190. };
  191. static int __init iop_wdt_init(void)
  192. {
  193. int ret;
  194. ret = misc_register(&iop_wdt_miscdev);
  195. if (ret == 0)
  196. printk("iop watchdog timer: timeout %lu sec\n",
  197. iop_watchdog_timeout());
  198. /* check if the reset was caused by the watchdog timer */
  199. boot_status = (read_rcsr() & IOP_RCSR_WDT) ? WDIOF_CARDRESET : 0;
  200. /* Configure Watchdog Timeout to cause an Internal Bus (IB) Reset
  201. * NOTE: An IB Reset will Reset both cores in the IOP342
  202. */
  203. write_wdtsr(IOP13XX_WDTCR_IB_RESET);
  204. return ret;
  205. }
  206. static void __exit iop_wdt_exit(void)
  207. {
  208. misc_deregister(&iop_wdt_miscdev);
  209. }
  210. module_init(iop_wdt_init);
  211. module_exit(iop_wdt_exit);
  212. module_param(nowayout, int, 0);
  213. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started");
  214. MODULE_AUTHOR("Curt E Bruns <curt.e.bruns@intel.com>");
  215. MODULE_DESCRIPTION("iop watchdog timer driver");
  216. MODULE_LICENSE("GPL");
  217. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);