uartlite.c 16 KB

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  1. /*
  2. * uartlite.c: Serial driver for Xilinx uartlite serial controller
  3. *
  4. * Copyright (C) 2006 Peter Korsgaard <jacmet@sunsite.dk>
  5. * Copyright (C) 2007 Secret Lab Technologies Ltd.
  6. *
  7. * This file is licensed under the terms of the GNU General Public License
  8. * version 2. This program is licensed "as is" without any warranty of any
  9. * kind, whether express or implied.
  10. */
  11. #include <linux/platform_device.h>
  12. #include <linux/module.h>
  13. #include <linux/console.h>
  14. #include <linux/serial.h>
  15. #include <linux/serial_core.h>
  16. #include <linux/tty.h>
  17. #include <linux/delay.h>
  18. #include <linux/interrupt.h>
  19. #include <asm/io.h>
  20. #if defined(CONFIG_OF)
  21. #include <linux/of_device.h>
  22. #include <linux/of_platform.h>
  23. #endif
  24. #define ULITE_NAME "ttyUL"
  25. #define ULITE_MAJOR 204
  26. #define ULITE_MINOR 187
  27. #define ULITE_NR_UARTS 4
  28. /* ---------------------------------------------------------------------
  29. * Register definitions
  30. *
  31. * For register details see datasheet:
  32. * http://www.xilinx.com/bvdocs/ipcenter/data_sheet/opb_uartlite.pdf
  33. */
  34. #define ULITE_RX 0x00
  35. #define ULITE_TX 0x04
  36. #define ULITE_STATUS 0x08
  37. #define ULITE_CONTROL 0x0c
  38. #define ULITE_REGION 16
  39. #define ULITE_STATUS_RXVALID 0x01
  40. #define ULITE_STATUS_RXFULL 0x02
  41. #define ULITE_STATUS_TXEMPTY 0x04
  42. #define ULITE_STATUS_TXFULL 0x08
  43. #define ULITE_STATUS_IE 0x10
  44. #define ULITE_STATUS_OVERRUN 0x20
  45. #define ULITE_STATUS_FRAME 0x40
  46. #define ULITE_STATUS_PARITY 0x80
  47. #define ULITE_CONTROL_RST_TX 0x01
  48. #define ULITE_CONTROL_RST_RX 0x02
  49. #define ULITE_CONTROL_IE 0x10
  50. static struct uart_port ulite_ports[ULITE_NR_UARTS];
  51. /* ---------------------------------------------------------------------
  52. * Core UART driver operations
  53. */
  54. static int ulite_receive(struct uart_port *port, int stat)
  55. {
  56. struct tty_struct *tty = port->info->tty;
  57. unsigned char ch = 0;
  58. char flag = TTY_NORMAL;
  59. if ((stat & (ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
  60. | ULITE_STATUS_FRAME)) == 0)
  61. return 0;
  62. /* stats */
  63. if (stat & ULITE_STATUS_RXVALID) {
  64. port->icount.rx++;
  65. ch = readb(port->membase + ULITE_RX);
  66. if (stat & ULITE_STATUS_PARITY)
  67. port->icount.parity++;
  68. }
  69. if (stat & ULITE_STATUS_OVERRUN)
  70. port->icount.overrun++;
  71. if (stat & ULITE_STATUS_FRAME)
  72. port->icount.frame++;
  73. /* drop byte with parity error if IGNPAR specificed */
  74. if (stat & port->ignore_status_mask & ULITE_STATUS_PARITY)
  75. stat &= ~ULITE_STATUS_RXVALID;
  76. stat &= port->read_status_mask;
  77. if (stat & ULITE_STATUS_PARITY)
  78. flag = TTY_PARITY;
  79. stat &= ~port->ignore_status_mask;
  80. if (stat & ULITE_STATUS_RXVALID)
  81. tty_insert_flip_char(tty, ch, flag);
  82. if (stat & ULITE_STATUS_FRAME)
  83. tty_insert_flip_char(tty, 0, TTY_FRAME);
  84. if (stat & ULITE_STATUS_OVERRUN)
  85. tty_insert_flip_char(tty, 0, TTY_OVERRUN);
  86. return 1;
  87. }
  88. static int ulite_transmit(struct uart_port *port, int stat)
  89. {
  90. struct circ_buf *xmit = &port->info->xmit;
  91. if (stat & ULITE_STATUS_TXFULL)
  92. return 0;
  93. if (port->x_char) {
  94. writeb(port->x_char, port->membase + ULITE_TX);
  95. port->x_char = 0;
  96. port->icount.tx++;
  97. return 1;
  98. }
  99. if (uart_circ_empty(xmit) || uart_tx_stopped(port))
  100. return 0;
  101. writeb(xmit->buf[xmit->tail], port->membase + ULITE_TX);
  102. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
  103. port->icount.tx++;
  104. /* wake up */
  105. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  106. uart_write_wakeup(port);
  107. return 1;
  108. }
  109. static irqreturn_t ulite_isr(int irq, void *dev_id)
  110. {
  111. struct uart_port *port = (struct uart_port *)dev_id;
  112. int busy;
  113. do {
  114. int stat = readb(port->membase + ULITE_STATUS);
  115. busy = ulite_receive(port, stat);
  116. busy |= ulite_transmit(port, stat);
  117. } while (busy);
  118. tty_flip_buffer_push(port->info->tty);
  119. return IRQ_HANDLED;
  120. }
  121. static unsigned int ulite_tx_empty(struct uart_port *port)
  122. {
  123. unsigned long flags;
  124. unsigned int ret;
  125. spin_lock_irqsave(&port->lock, flags);
  126. ret = readb(port->membase + ULITE_STATUS);
  127. spin_unlock_irqrestore(&port->lock, flags);
  128. return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
  129. }
  130. static unsigned int ulite_get_mctrl(struct uart_port *port)
  131. {
  132. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  133. }
  134. static void ulite_set_mctrl(struct uart_port *port, unsigned int mctrl)
  135. {
  136. /* N/A */
  137. }
  138. static void ulite_stop_tx(struct uart_port *port)
  139. {
  140. /* N/A */
  141. }
  142. static void ulite_start_tx(struct uart_port *port)
  143. {
  144. ulite_transmit(port, readb(port->membase + ULITE_STATUS));
  145. }
  146. static void ulite_stop_rx(struct uart_port *port)
  147. {
  148. /* don't forward any more data (like !CREAD) */
  149. port->ignore_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
  150. | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
  151. }
  152. static void ulite_enable_ms(struct uart_port *port)
  153. {
  154. /* N/A */
  155. }
  156. static void ulite_break_ctl(struct uart_port *port, int ctl)
  157. {
  158. /* N/A */
  159. }
  160. static int ulite_startup(struct uart_port *port)
  161. {
  162. int ret;
  163. ret = request_irq(port->irq, ulite_isr,
  164. IRQF_DISABLED | IRQF_SAMPLE_RANDOM, "uartlite", port);
  165. if (ret)
  166. return ret;
  167. writeb(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX,
  168. port->membase + ULITE_CONTROL);
  169. writeb(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
  170. return 0;
  171. }
  172. static void ulite_shutdown(struct uart_port *port)
  173. {
  174. writeb(0, port->membase + ULITE_CONTROL);
  175. readb(port->membase + ULITE_CONTROL); /* dummy */
  176. free_irq(port->irq, port);
  177. }
  178. static void ulite_set_termios(struct uart_port *port, struct ktermios *termios,
  179. struct ktermios *old)
  180. {
  181. unsigned long flags;
  182. unsigned int baud;
  183. spin_lock_irqsave(&port->lock, flags);
  184. port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
  185. | ULITE_STATUS_TXFULL;
  186. if (termios->c_iflag & INPCK)
  187. port->read_status_mask |=
  188. ULITE_STATUS_PARITY | ULITE_STATUS_FRAME;
  189. port->ignore_status_mask = 0;
  190. if (termios->c_iflag & IGNPAR)
  191. port->ignore_status_mask |= ULITE_STATUS_PARITY
  192. | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
  193. /* ignore all characters if CREAD is not set */
  194. if ((termios->c_cflag & CREAD) == 0)
  195. port->ignore_status_mask |=
  196. ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
  197. | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
  198. /* update timeout */
  199. baud = uart_get_baud_rate(port, termios, old, 0, 460800);
  200. uart_update_timeout(port, termios->c_cflag, baud);
  201. spin_unlock_irqrestore(&port->lock, flags);
  202. }
  203. static const char *ulite_type(struct uart_port *port)
  204. {
  205. return port->type == PORT_UARTLITE ? "uartlite" : NULL;
  206. }
  207. static void ulite_release_port(struct uart_port *port)
  208. {
  209. release_mem_region(port->mapbase, ULITE_REGION);
  210. iounmap(port->membase);
  211. port->membase = NULL;
  212. }
  213. static int ulite_request_port(struct uart_port *port)
  214. {
  215. if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) {
  216. dev_err(port->dev, "Memory region busy\n");
  217. return -EBUSY;
  218. }
  219. port->membase = ioremap(port->mapbase, ULITE_REGION);
  220. if (!port->membase) {
  221. dev_err(port->dev, "Unable to map registers\n");
  222. release_mem_region(port->mapbase, ULITE_REGION);
  223. return -EBUSY;
  224. }
  225. return 0;
  226. }
  227. static void ulite_config_port(struct uart_port *port, int flags)
  228. {
  229. if (!ulite_request_port(port))
  230. port->type = PORT_UARTLITE;
  231. }
  232. static int ulite_verify_port(struct uart_port *port, struct serial_struct *ser)
  233. {
  234. /* we don't want the core code to modify any port params */
  235. return -EINVAL;
  236. }
  237. static struct uart_ops ulite_ops = {
  238. .tx_empty = ulite_tx_empty,
  239. .set_mctrl = ulite_set_mctrl,
  240. .get_mctrl = ulite_get_mctrl,
  241. .stop_tx = ulite_stop_tx,
  242. .start_tx = ulite_start_tx,
  243. .stop_rx = ulite_stop_rx,
  244. .enable_ms = ulite_enable_ms,
  245. .break_ctl = ulite_break_ctl,
  246. .startup = ulite_startup,
  247. .shutdown = ulite_shutdown,
  248. .set_termios = ulite_set_termios,
  249. .type = ulite_type,
  250. .release_port = ulite_release_port,
  251. .request_port = ulite_request_port,
  252. .config_port = ulite_config_port,
  253. .verify_port = ulite_verify_port
  254. };
  255. /* ---------------------------------------------------------------------
  256. * Console driver operations
  257. */
  258. #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
  259. static void ulite_console_wait_tx(struct uart_port *port)
  260. {
  261. int i;
  262. u8 val;
  263. /* Spin waiting for TX fifo to have space available */
  264. for (i = 0; i < 100000; i++) {
  265. val = readb(port->membase + ULITE_STATUS);
  266. if ((val & ULITE_STATUS_TXFULL) == 0)
  267. break;
  268. cpu_relax();
  269. }
  270. }
  271. static void ulite_console_putchar(struct uart_port *port, int ch)
  272. {
  273. ulite_console_wait_tx(port);
  274. writeb(ch, port->membase + ULITE_TX);
  275. }
  276. static void ulite_console_write(struct console *co, const char *s,
  277. unsigned int count)
  278. {
  279. struct uart_port *port = &ulite_ports[co->index];
  280. unsigned long flags;
  281. unsigned int ier;
  282. int locked = 1;
  283. if (oops_in_progress) {
  284. locked = spin_trylock_irqsave(&port->lock, flags);
  285. } else
  286. spin_lock_irqsave(&port->lock, flags);
  287. /* save and disable interrupt */
  288. ier = readb(port->membase + ULITE_STATUS) & ULITE_STATUS_IE;
  289. writeb(0, port->membase + ULITE_CONTROL);
  290. uart_console_write(port, s, count, ulite_console_putchar);
  291. ulite_console_wait_tx(port);
  292. /* restore interrupt state */
  293. if (ier)
  294. writeb(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
  295. if (locked)
  296. spin_unlock_irqrestore(&port->lock, flags);
  297. }
  298. #if defined(CONFIG_OF)
  299. static inline void __init ulite_console_of_find_device(int id)
  300. {
  301. struct device_node *np;
  302. struct resource res;
  303. const unsigned int *of_id;
  304. int rc;
  305. for_each_compatible_node(np, NULL, "xilinx,uartlite") {
  306. of_id = of_get_property(np, "port-number", NULL);
  307. if ((!of_id) || (*of_id != id))
  308. continue;
  309. rc = of_address_to_resource(np, 0, &res);
  310. if (rc)
  311. continue;
  312. ulite_ports[id].mapbase = res.start;
  313. of_node_put(np);
  314. return;
  315. }
  316. }
  317. #else /* CONFIG_OF */
  318. static inline void __init ulite_console_of_find_device(int id) { /* do nothing */ }
  319. #endif /* CONFIG_OF */
  320. static int __init ulite_console_setup(struct console *co, char *options)
  321. {
  322. struct uart_port *port;
  323. int baud = 9600;
  324. int bits = 8;
  325. int parity = 'n';
  326. int flow = 'n';
  327. if (co->index < 0 || co->index >= ULITE_NR_UARTS)
  328. return -EINVAL;
  329. port = &ulite_ports[co->index];
  330. /* Check if it is an OF device */
  331. if (!port->mapbase)
  332. ulite_console_of_find_device(co->index);
  333. /* Do we have a device now? */
  334. if (!port->mapbase) {
  335. pr_debug("console on ttyUL%i not present\n", co->index);
  336. return -ENODEV;
  337. }
  338. /* not initialized yet? */
  339. if (!port->membase) {
  340. if (ulite_request_port(port))
  341. return -ENODEV;
  342. }
  343. if (options)
  344. uart_parse_options(options, &baud, &parity, &bits, &flow);
  345. return uart_set_options(port, co, baud, parity, bits, flow);
  346. }
  347. static struct uart_driver ulite_uart_driver;
  348. static struct console ulite_console = {
  349. .name = ULITE_NAME,
  350. .write = ulite_console_write,
  351. .device = uart_console_device,
  352. .setup = ulite_console_setup,
  353. .flags = CON_PRINTBUFFER,
  354. .index = -1, /* Specified on the cmdline (e.g. console=ttyUL0 ) */
  355. .data = &ulite_uart_driver,
  356. };
  357. static int __init ulite_console_init(void)
  358. {
  359. register_console(&ulite_console);
  360. return 0;
  361. }
  362. console_initcall(ulite_console_init);
  363. #endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
  364. static struct uart_driver ulite_uart_driver = {
  365. .owner = THIS_MODULE,
  366. .driver_name = "uartlite",
  367. .dev_name = ULITE_NAME,
  368. .major = ULITE_MAJOR,
  369. .minor = ULITE_MINOR,
  370. .nr = ULITE_NR_UARTS,
  371. #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
  372. .cons = &ulite_console,
  373. #endif
  374. };
  375. /* ---------------------------------------------------------------------
  376. * Port assignment functions (mapping devices to uart_port structures)
  377. */
  378. /** ulite_assign: register a uartlite device with the driver
  379. *
  380. * @dev: pointer to device structure
  381. * @id: requested id number. Pass -1 for automatic port assignment
  382. * @base: base address of uartlite registers
  383. * @irq: irq number for uartlite
  384. *
  385. * Returns: 0 on success, <0 otherwise
  386. */
  387. static int __devinit ulite_assign(struct device *dev, int id, u32 base, int irq)
  388. {
  389. struct uart_port *port;
  390. int rc;
  391. /* if id = -1; then scan for a free id and use that */
  392. if (id < 0) {
  393. for (id = 0; id < ULITE_NR_UARTS; id++)
  394. if (ulite_ports[id].mapbase == 0)
  395. break;
  396. }
  397. if (id < 0 || id >= ULITE_NR_UARTS) {
  398. dev_err(dev, "%s%i too large\n", ULITE_NAME, id);
  399. return -EINVAL;
  400. }
  401. if ((ulite_ports[id].mapbase) && (ulite_ports[id].mapbase != base)) {
  402. dev_err(dev, "cannot assign to %s%i; it is already in use\n",
  403. ULITE_NAME, id);
  404. return -EBUSY;
  405. }
  406. port = &ulite_ports[id];
  407. spin_lock_init(&port->lock);
  408. port->fifosize = 16;
  409. port->regshift = 2;
  410. port->iotype = UPIO_MEM;
  411. port->iobase = 1; /* mark port in use */
  412. port->mapbase = base;
  413. port->membase = NULL;
  414. port->ops = &ulite_ops;
  415. port->irq = irq;
  416. port->flags = UPF_BOOT_AUTOCONF;
  417. port->dev = dev;
  418. port->type = PORT_UNKNOWN;
  419. port->line = id;
  420. dev_set_drvdata(dev, port);
  421. /* Register the port */
  422. rc = uart_add_one_port(&ulite_uart_driver, port);
  423. if (rc) {
  424. dev_err(dev, "uart_add_one_port() failed; err=%i\n", rc);
  425. port->mapbase = 0;
  426. dev_set_drvdata(dev, NULL);
  427. return rc;
  428. }
  429. return 0;
  430. }
  431. /** ulite_release: register a uartlite device with the driver
  432. *
  433. * @dev: pointer to device structure
  434. */
  435. static int __devinit ulite_release(struct device *dev)
  436. {
  437. struct uart_port *port = dev_get_drvdata(dev);
  438. int rc = 0;
  439. if (port) {
  440. rc = uart_remove_one_port(&ulite_uart_driver, port);
  441. dev_set_drvdata(dev, NULL);
  442. port->mapbase = 0;
  443. }
  444. return rc;
  445. }
  446. /* ---------------------------------------------------------------------
  447. * Platform bus binding
  448. */
  449. static int __devinit ulite_probe(struct platform_device *pdev)
  450. {
  451. struct resource *res, *res2;
  452. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  453. if (!res)
  454. return -ENODEV;
  455. res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  456. if (!res2)
  457. return -ENODEV;
  458. return ulite_assign(&pdev->dev, pdev->id, res->start, res2->start);
  459. }
  460. static int ulite_remove(struct platform_device *pdev)
  461. {
  462. return ulite_release(&pdev->dev);
  463. }
  464. static struct platform_driver ulite_platform_driver = {
  465. .probe = ulite_probe,
  466. .remove = ulite_remove,
  467. .driver = {
  468. .owner = THIS_MODULE,
  469. .name = "uartlite",
  470. },
  471. };
  472. /* ---------------------------------------------------------------------
  473. * OF bus bindings
  474. */
  475. #if defined(CONFIG_OF)
  476. static int __devinit
  477. ulite_of_probe(struct of_device *op, const struct of_device_id *match)
  478. {
  479. struct resource res;
  480. const unsigned int *id;
  481. int irq, rc;
  482. dev_dbg(&op->dev, "%s(%p, %p)\n", __FUNCTION__, op, match);
  483. rc = of_address_to_resource(op->node, 0, &res);
  484. if (rc) {
  485. dev_err(&op->dev, "invalid address\n");
  486. return rc;
  487. }
  488. irq = irq_of_parse_and_map(op->node, 0);
  489. id = of_get_property(op->node, "port-number", NULL);
  490. return ulite_assign(&op->dev, id ? *id : -1, res.start+3, irq);
  491. }
  492. static int __devexit ulite_of_remove(struct of_device *op)
  493. {
  494. return ulite_release(&op->dev);
  495. }
  496. /* Match table for of_platform binding */
  497. static struct of_device_id __devinit ulite_of_match[] = {
  498. { .type = "serial", .compatible = "xilinx,uartlite", },
  499. {},
  500. };
  501. MODULE_DEVICE_TABLE(of, ulite_of_match);
  502. static struct of_platform_driver ulite_of_driver = {
  503. .owner = THIS_MODULE,
  504. .name = "uartlite",
  505. .match_table = ulite_of_match,
  506. .probe = ulite_of_probe,
  507. .remove = __devexit_p(ulite_of_remove),
  508. .driver = {
  509. .name = "uartlite",
  510. },
  511. };
  512. /* Registration helpers to keep the number of #ifdefs to a minimum */
  513. static inline int __init ulite_of_register(void)
  514. {
  515. pr_debug("uartlite: calling of_register_platform_driver()\n");
  516. return of_register_platform_driver(&ulite_of_driver);
  517. }
  518. static inline void __exit ulite_of_unregister(void)
  519. {
  520. of_unregister_platform_driver(&ulite_of_driver);
  521. }
  522. #else /* CONFIG_OF */
  523. /* CONFIG_OF not enabled; do nothing helpers */
  524. static inline int __init ulite_of_register(void) { return 0; }
  525. static inline void __exit ulite_of_unregister(void) { }
  526. #endif /* CONFIG_OF */
  527. /* ---------------------------------------------------------------------
  528. * Module setup/teardown
  529. */
  530. int __init ulite_init(void)
  531. {
  532. int ret;
  533. pr_debug("uartlite: calling uart_register_driver()\n");
  534. ret = uart_register_driver(&ulite_uart_driver);
  535. if (ret)
  536. goto err_uart;
  537. ret = ulite_of_register();
  538. if (ret)
  539. goto err_of;
  540. pr_debug("uartlite: calling platform_driver_register()\n");
  541. ret = platform_driver_register(&ulite_platform_driver);
  542. if (ret)
  543. goto err_plat;
  544. return 0;
  545. err_plat:
  546. ulite_of_unregister();
  547. err_of:
  548. uart_unregister_driver(&ulite_uart_driver);
  549. err_uart:
  550. printk(KERN_ERR "registering uartlite driver failed: err=%i", ret);
  551. return ret;
  552. }
  553. void __exit ulite_exit(void)
  554. {
  555. platform_driver_unregister(&ulite_platform_driver);
  556. ulite_of_unregister();
  557. uart_unregister_driver(&ulite_uart_driver);
  558. }
  559. module_init(ulite_init);
  560. module_exit(ulite_exit);
  561. MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
  562. MODULE_DESCRIPTION("Xilinx uartlite serial driver");
  563. MODULE_LICENSE("GPL");