aic79xx_reg_print.c_shipped 91 KB

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  1. /*
  2. * DO NOT EDIT - This file is automatically generated
  3. * from the following source files:
  4. *
  5. * $Id: //depot/aic7xxx/aic7xxx/aic79xx.seq#120 $
  6. * $Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#77 $
  7. */
  8. #include "aic79xx_osm.h"
  9. static ahd_reg_parse_entry_t MODE_PTR_parse_table[] = {
  10. { "SRC_MODE", 0x07, 0x07 },
  11. { "DST_MODE", 0x70, 0x70 }
  12. };
  13. int
  14. ahd_mode_ptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  15. {
  16. return (ahd_print_register(MODE_PTR_parse_table, 2, "MODE_PTR",
  17. 0x00, regvalue, cur_col, wrap));
  18. }
  19. static ahd_reg_parse_entry_t INTSTAT_parse_table[] = {
  20. { "SPLTINT", 0x01, 0x01 },
  21. { "CMDCMPLT", 0x02, 0x02 },
  22. { "SEQINT", 0x04, 0x04 },
  23. { "SCSIINT", 0x08, 0x08 },
  24. { "PCIINT", 0x10, 0x10 },
  25. { "SWTMINT", 0x20, 0x20 },
  26. { "BRKADRINT", 0x40, 0x40 },
  27. { "HWERRINT", 0x80, 0x80 },
  28. { "INT_PEND", 0xff, 0xff }
  29. };
  30. int
  31. ahd_intstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
  32. {
  33. return (ahd_print_register(INTSTAT_parse_table, 9, "INTSTAT",
  34. 0x01, regvalue, cur_col, wrap));
  35. }
  36. static ahd_reg_parse_entry_t SEQINTCODE_parse_table[] = {
  37. { "NO_SEQINT", 0x00, 0xff },
  38. { "BAD_PHASE", 0x01, 0xff },
  39. { "SEND_REJECT", 0x02, 0xff },
  40. { "PROTO_VIOLATION", 0x03, 0xff },
  41. { "NO_MATCH", 0x04, 0xff },
  42. { "IGN_WIDE_RES", 0x05, 0xff },
  43. { "PDATA_REINIT", 0x06, 0xff },
  44. { "HOST_MSG_LOOP", 0x07, 0xff },
  45. { "BAD_STATUS", 0x08, 0xff },
  46. { "DATA_OVERRUN", 0x09, 0xff },
  47. { "MKMSG_FAILED", 0x0a, 0xff },
  48. { "MISSED_BUSFREE", 0x0b, 0xff },
  49. { "DUMP_CARD_STATE", 0x0c, 0xff },
  50. { "ILLEGAL_PHASE", 0x0d, 0xff },
  51. { "INVALID_SEQINT", 0x0e, 0xff },
  52. { "CFG4ISTAT_INTR", 0x0f, 0xff },
  53. { "STATUS_OVERRUN", 0x10, 0xff },
  54. { "CFG4OVERRUN", 0x11, 0xff },
  55. { "ENTERING_NONPACK", 0x12, 0xff },
  56. { "TASKMGMT_FUNC_COMPLETE",0x13, 0xff },
  57. { "TASKMGMT_CMD_CMPLT_OKAY",0x14, 0xff },
  58. { "TRACEPOINT0", 0x15, 0xff },
  59. { "TRACEPOINT1", 0x16, 0xff },
  60. { "TRACEPOINT2", 0x17, 0xff },
  61. { "TRACEPOINT3", 0x18, 0xff },
  62. { "SAW_HWERR", 0x19, 0xff },
  63. { "BAD_SCB_STATUS", 0x1a, 0xff }
  64. };
  65. int
  66. ahd_seqintcode_print(u_int regvalue, u_int *cur_col, u_int wrap)
  67. {
  68. return (ahd_print_register(SEQINTCODE_parse_table, 27, "SEQINTCODE",
  69. 0x02, regvalue, cur_col, wrap));
  70. }
  71. static ahd_reg_parse_entry_t CLRINT_parse_table[] = {
  72. { "CLRSPLTINT", 0x01, 0x01 },
  73. { "CLRCMDINT", 0x02, 0x02 },
  74. { "CLRSEQINT", 0x04, 0x04 },
  75. { "CLRSCSIINT", 0x08, 0x08 },
  76. { "CLRPCIINT", 0x10, 0x10 },
  77. { "CLRSWTMINT", 0x20, 0x20 },
  78. { "CLRBRKADRINT", 0x40, 0x40 },
  79. { "CLRHWERRINT", 0x80, 0x80 }
  80. };
  81. int
  82. ahd_clrint_print(u_int regvalue, u_int *cur_col, u_int wrap)
  83. {
  84. return (ahd_print_register(CLRINT_parse_table, 8, "CLRINT",
  85. 0x03, regvalue, cur_col, wrap));
  86. }
  87. static ahd_reg_parse_entry_t ERROR_parse_table[] = {
  88. { "DSCTMOUT", 0x02, 0x02 },
  89. { "ILLOPCODE", 0x04, 0x04 },
  90. { "SQPARERR", 0x08, 0x08 },
  91. { "DPARERR", 0x10, 0x10 },
  92. { "MPARERR", 0x20, 0x20 },
  93. { "CIOACCESFAIL", 0x40, 0x40 },
  94. { "CIOPARERR", 0x80, 0x80 }
  95. };
  96. int
  97. ahd_error_print(u_int regvalue, u_int *cur_col, u_int wrap)
  98. {
  99. return (ahd_print_register(ERROR_parse_table, 7, "ERROR",
  100. 0x04, regvalue, cur_col, wrap));
  101. }
  102. static ahd_reg_parse_entry_t CLRERR_parse_table[] = {
  103. { "CLRDSCTMOUT", 0x02, 0x02 },
  104. { "CLRILLOPCODE", 0x04, 0x04 },
  105. { "CLRSQPARERR", 0x08, 0x08 },
  106. { "CLRDPARERR", 0x10, 0x10 },
  107. { "CLRMPARERR", 0x20, 0x20 },
  108. { "CLRCIOACCESFAIL", 0x40, 0x40 },
  109. { "CLRCIOPARERR", 0x80, 0x80 }
  110. };
  111. int
  112. ahd_clrerr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  113. {
  114. return (ahd_print_register(CLRERR_parse_table, 7, "CLRERR",
  115. 0x04, regvalue, cur_col, wrap));
  116. }
  117. static ahd_reg_parse_entry_t HCNTRL_parse_table[] = {
  118. { "CHIPRST", 0x01, 0x01 },
  119. { "CHIPRSTACK", 0x01, 0x01 },
  120. { "INTEN", 0x02, 0x02 },
  121. { "PAUSE", 0x04, 0x04 },
  122. { "SWTIMER_START_B", 0x08, 0x08 },
  123. { "SWINT", 0x10, 0x10 },
  124. { "POWRDN", 0x40, 0x40 },
  125. { "SEQ_RESET", 0x80, 0x80 }
  126. };
  127. int
  128. ahd_hcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
  129. {
  130. return (ahd_print_register(HCNTRL_parse_table, 8, "HCNTRL",
  131. 0x05, regvalue, cur_col, wrap));
  132. }
  133. int
  134. ahd_hnscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
  135. {
  136. return (ahd_print_register(NULL, 0, "HNSCB_QOFF",
  137. 0x06, regvalue, cur_col, wrap));
  138. }
  139. int
  140. ahd_hescb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
  141. {
  142. return (ahd_print_register(NULL, 0, "HESCB_QOFF",
  143. 0x08, regvalue, cur_col, wrap));
  144. }
  145. static ahd_reg_parse_entry_t HS_MAILBOX_parse_table[] = {
  146. { "ENINT_COALESCE", 0x40, 0x40 },
  147. { "HOST_TQINPOS", 0x80, 0x80 }
  148. };
  149. int
  150. ahd_hs_mailbox_print(u_int regvalue, u_int *cur_col, u_int wrap)
  151. {
  152. return (ahd_print_register(HS_MAILBOX_parse_table, 2, "HS_MAILBOX",
  153. 0x0b, regvalue, cur_col, wrap));
  154. }
  155. static ahd_reg_parse_entry_t SEQINTSTAT_parse_table[] = {
  156. { "SEQ_SPLTINT", 0x01, 0x01 },
  157. { "SEQ_PCIINT", 0x02, 0x02 },
  158. { "SEQ_SCSIINT", 0x04, 0x04 },
  159. { "SEQ_SEQINT", 0x08, 0x08 },
  160. { "SEQ_SWTMRTO", 0x10, 0x10 }
  161. };
  162. int
  163. ahd_seqintstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
  164. {
  165. return (ahd_print_register(SEQINTSTAT_parse_table, 5, "SEQINTSTAT",
  166. 0x0c, regvalue, cur_col, wrap));
  167. }
  168. static ahd_reg_parse_entry_t CLRSEQINTSTAT_parse_table[] = {
  169. { "CLRSEQ_SPLTINT", 0x01, 0x01 },
  170. { "CLRSEQ_PCIINT", 0x02, 0x02 },
  171. { "CLRSEQ_SCSIINT", 0x04, 0x04 },
  172. { "CLRSEQ_SEQINT", 0x08, 0x08 },
  173. { "CLRSEQ_SWTMRTO", 0x10, 0x10 }
  174. };
  175. int
  176. ahd_clrseqintstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
  177. {
  178. return (ahd_print_register(CLRSEQINTSTAT_parse_table, 5, "CLRSEQINTSTAT",
  179. 0x0c, regvalue, cur_col, wrap));
  180. }
  181. int
  182. ahd_swtimer_print(u_int regvalue, u_int *cur_col, u_int wrap)
  183. {
  184. return (ahd_print_register(NULL, 0, "SWTIMER",
  185. 0x0e, regvalue, cur_col, wrap));
  186. }
  187. int
  188. ahd_snscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
  189. {
  190. return (ahd_print_register(NULL, 0, "SNSCB_QOFF",
  191. 0x10, regvalue, cur_col, wrap));
  192. }
  193. int
  194. ahd_sescb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
  195. {
  196. return (ahd_print_register(NULL, 0, "SESCB_QOFF",
  197. 0x12, regvalue, cur_col, wrap));
  198. }
  199. int
  200. ahd_sdscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
  201. {
  202. return (ahd_print_register(NULL, 0, "SDSCB_QOFF",
  203. 0x14, regvalue, cur_col, wrap));
  204. }
  205. static ahd_reg_parse_entry_t QOFF_CTLSTA_parse_table[] = {
  206. { "SCB_QSIZE_4", 0x00, 0x0f },
  207. { "SCB_QSIZE_8", 0x01, 0x0f },
  208. { "SCB_QSIZE_16", 0x02, 0x0f },
  209. { "SCB_QSIZE_32", 0x03, 0x0f },
  210. { "SCB_QSIZE_64", 0x04, 0x0f },
  211. { "SCB_QSIZE_128", 0x05, 0x0f },
  212. { "SCB_QSIZE_256", 0x06, 0x0f },
  213. { "SCB_QSIZE_512", 0x07, 0x0f },
  214. { "SCB_QSIZE_1024", 0x08, 0x0f },
  215. { "SCB_QSIZE_2048", 0x09, 0x0f },
  216. { "SCB_QSIZE_4096", 0x0a, 0x0f },
  217. { "SCB_QSIZE_8192", 0x0b, 0x0f },
  218. { "SCB_QSIZE_16384", 0x0c, 0x0f },
  219. { "SCB_QSIZE", 0x0f, 0x0f },
  220. { "HS_MAILBOX_ACT", 0x10, 0x10 },
  221. { "SDSCB_ROLLOVR", 0x20, 0x20 },
  222. { "NEW_SCB_AVAIL", 0x40, 0x40 },
  223. { "EMPTY_SCB_AVAIL", 0x80, 0x80 }
  224. };
  225. int
  226. ahd_qoff_ctlsta_print(u_int regvalue, u_int *cur_col, u_int wrap)
  227. {
  228. return (ahd_print_register(QOFF_CTLSTA_parse_table, 18, "QOFF_CTLSTA",
  229. 0x16, regvalue, cur_col, wrap));
  230. }
  231. static ahd_reg_parse_entry_t INTCTL_parse_table[] = {
  232. { "SPLTINTEN", 0x01, 0x01 },
  233. { "SEQINTEN", 0x02, 0x02 },
  234. { "SCSIINTEN", 0x04, 0x04 },
  235. { "PCIINTEN", 0x08, 0x08 },
  236. { "AUTOCLRCMDINT", 0x10, 0x10 },
  237. { "SWTIMER_START", 0x20, 0x20 },
  238. { "SWTMINTEN", 0x40, 0x40 },
  239. { "SWTMINTMASK", 0x80, 0x80 }
  240. };
  241. int
  242. ahd_intctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
  243. {
  244. return (ahd_print_register(INTCTL_parse_table, 8, "INTCTL",
  245. 0x18, regvalue, cur_col, wrap));
  246. }
  247. static ahd_reg_parse_entry_t DFCNTRL_parse_table[] = {
  248. { "DIRECTIONEN", 0x01, 0x01 },
  249. { "FIFOFLUSH", 0x02, 0x02 },
  250. { "FIFOFLUSHACK", 0x02, 0x02 },
  251. { "DIRECTION", 0x04, 0x04 },
  252. { "DIRECTIONACK", 0x04, 0x04 },
  253. { "HDMAEN", 0x08, 0x08 },
  254. { "HDMAENACK", 0x08, 0x08 },
  255. { "SCSIEN", 0x20, 0x20 },
  256. { "SCSIENACK", 0x20, 0x20 },
  257. { "SCSIENWRDIS", 0x40, 0x40 },
  258. { "PRELOADEN", 0x80, 0x80 }
  259. };
  260. int
  261. ahd_dfcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
  262. {
  263. return (ahd_print_register(DFCNTRL_parse_table, 11, "DFCNTRL",
  264. 0x19, regvalue, cur_col, wrap));
  265. }
  266. static ahd_reg_parse_entry_t DSCOMMAND0_parse_table[] = {
  267. { "CIOPARCKEN", 0x01, 0x01 },
  268. { "DISABLE_TWATE", 0x02, 0x02 },
  269. { "EXTREQLCK", 0x10, 0x10 },
  270. { "MPARCKEN", 0x20, 0x20 },
  271. { "DPARCKEN", 0x40, 0x40 },
  272. { "CACHETHEN", 0x80, 0x80 }
  273. };
  274. int
  275. ahd_dscommand0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  276. {
  277. return (ahd_print_register(DSCOMMAND0_parse_table, 6, "DSCOMMAND0",
  278. 0x19, regvalue, cur_col, wrap));
  279. }
  280. static ahd_reg_parse_entry_t DFSTATUS_parse_table[] = {
  281. { "FIFOEMP", 0x01, 0x01 },
  282. { "FIFOFULL", 0x02, 0x02 },
  283. { "DFTHRESH", 0x04, 0x04 },
  284. { "HDONE", 0x08, 0x08 },
  285. { "MREQPEND", 0x10, 0x10 },
  286. { "PKT_PRELOAD_AVAIL", 0x40, 0x40 },
  287. { "PRELOAD_AVAIL", 0x80, 0x80 }
  288. };
  289. int
  290. ahd_dfstatus_print(u_int regvalue, u_int *cur_col, u_int wrap)
  291. {
  292. return (ahd_print_register(DFSTATUS_parse_table, 7, "DFSTATUS",
  293. 0x1a, regvalue, cur_col, wrap));
  294. }
  295. static ahd_reg_parse_entry_t SG_CACHE_SHADOW_parse_table[] = {
  296. { "LAST_SEG_DONE", 0x01, 0x01 },
  297. { "LAST_SEG", 0x02, 0x02 },
  298. { "ODD_SEG", 0x04, 0x04 },
  299. { "SG_ADDR_MASK", 0xf8, 0xf8 }
  300. };
  301. int
  302. ahd_sg_cache_shadow_print(u_int regvalue, u_int *cur_col, u_int wrap)
  303. {
  304. return (ahd_print_register(SG_CACHE_SHADOW_parse_table, 4, "SG_CACHE_SHADOW",
  305. 0x1b, regvalue, cur_col, wrap));
  306. }
  307. static ahd_reg_parse_entry_t ARBCTL_parse_table[] = {
  308. { "USE_TIME", 0x07, 0x07 },
  309. { "RETRY_SWEN", 0x08, 0x08 },
  310. { "RESET_HARB", 0x80, 0x80 }
  311. };
  312. int
  313. ahd_arbctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
  314. {
  315. return (ahd_print_register(ARBCTL_parse_table, 3, "ARBCTL",
  316. 0x1b, regvalue, cur_col, wrap));
  317. }
  318. static ahd_reg_parse_entry_t SG_CACHE_PRE_parse_table[] = {
  319. { "LAST_SEG", 0x02, 0x02 },
  320. { "ODD_SEG", 0x04, 0x04 },
  321. { "SG_ADDR_MASK", 0xf8, 0xf8 }
  322. };
  323. int
  324. ahd_sg_cache_pre_print(u_int regvalue, u_int *cur_col, u_int wrap)
  325. {
  326. return (ahd_print_register(SG_CACHE_PRE_parse_table, 3, "SG_CACHE_PRE",
  327. 0x1b, regvalue, cur_col, wrap));
  328. }
  329. int
  330. ahd_lqin_print(u_int regvalue, u_int *cur_col, u_int wrap)
  331. {
  332. return (ahd_print_register(NULL, 0, "LQIN",
  333. 0x20, regvalue, cur_col, wrap));
  334. }
  335. int
  336. ahd_typeptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  337. {
  338. return (ahd_print_register(NULL, 0, "TYPEPTR",
  339. 0x20, regvalue, cur_col, wrap));
  340. }
  341. int
  342. ahd_tagptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  343. {
  344. return (ahd_print_register(NULL, 0, "TAGPTR",
  345. 0x21, regvalue, cur_col, wrap));
  346. }
  347. int
  348. ahd_lunptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  349. {
  350. return (ahd_print_register(NULL, 0, "LUNPTR",
  351. 0x22, regvalue, cur_col, wrap));
  352. }
  353. int
  354. ahd_datalenptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  355. {
  356. return (ahd_print_register(NULL, 0, "DATALENPTR",
  357. 0x23, regvalue, cur_col, wrap));
  358. }
  359. int
  360. ahd_statlenptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  361. {
  362. return (ahd_print_register(NULL, 0, "STATLENPTR",
  363. 0x24, regvalue, cur_col, wrap));
  364. }
  365. int
  366. ahd_cmdlenptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  367. {
  368. return (ahd_print_register(NULL, 0, "CMDLENPTR",
  369. 0x25, regvalue, cur_col, wrap));
  370. }
  371. int
  372. ahd_attrptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  373. {
  374. return (ahd_print_register(NULL, 0, "ATTRPTR",
  375. 0x26, regvalue, cur_col, wrap));
  376. }
  377. int
  378. ahd_flagptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  379. {
  380. return (ahd_print_register(NULL, 0, "FLAGPTR",
  381. 0x27, regvalue, cur_col, wrap));
  382. }
  383. int
  384. ahd_cmdptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  385. {
  386. return (ahd_print_register(NULL, 0, "CMDPTR",
  387. 0x28, regvalue, cur_col, wrap));
  388. }
  389. int
  390. ahd_qnextptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  391. {
  392. return (ahd_print_register(NULL, 0, "QNEXTPTR",
  393. 0x29, regvalue, cur_col, wrap));
  394. }
  395. int
  396. ahd_idptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  397. {
  398. return (ahd_print_register(NULL, 0, "IDPTR",
  399. 0x2a, regvalue, cur_col, wrap));
  400. }
  401. int
  402. ahd_abrtbyteptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  403. {
  404. return (ahd_print_register(NULL, 0, "ABRTBYTEPTR",
  405. 0x2b, regvalue, cur_col, wrap));
  406. }
  407. int
  408. ahd_abrtbitptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  409. {
  410. return (ahd_print_register(NULL, 0, "ABRTBITPTR",
  411. 0x2c, regvalue, cur_col, wrap));
  412. }
  413. int
  414. ahd_maxcmdbytes_print(u_int regvalue, u_int *cur_col, u_int wrap)
  415. {
  416. return (ahd_print_register(NULL, 0, "MAXCMDBYTES",
  417. 0x2d, regvalue, cur_col, wrap));
  418. }
  419. int
  420. ahd_maxcmd2rcv_print(u_int regvalue, u_int *cur_col, u_int wrap)
  421. {
  422. return (ahd_print_register(NULL, 0, "MAXCMD2RCV",
  423. 0x2e, regvalue, cur_col, wrap));
  424. }
  425. int
  426. ahd_shortthresh_print(u_int regvalue, u_int *cur_col, u_int wrap)
  427. {
  428. return (ahd_print_register(NULL, 0, "SHORTTHRESH",
  429. 0x2f, regvalue, cur_col, wrap));
  430. }
  431. static ahd_reg_parse_entry_t LUNLEN_parse_table[] = {
  432. { "ILUNLEN", 0x0f, 0x0f },
  433. { "TLUNLEN", 0xf0, 0xf0 }
  434. };
  435. int
  436. ahd_lunlen_print(u_int regvalue, u_int *cur_col, u_int wrap)
  437. {
  438. return (ahd_print_register(LUNLEN_parse_table, 2, "LUNLEN",
  439. 0x30, regvalue, cur_col, wrap));
  440. }
  441. int
  442. ahd_cdblimit_print(u_int regvalue, u_int *cur_col, u_int wrap)
  443. {
  444. return (ahd_print_register(NULL, 0, "CDBLIMIT",
  445. 0x31, regvalue, cur_col, wrap));
  446. }
  447. int
  448. ahd_maxcmd_print(u_int regvalue, u_int *cur_col, u_int wrap)
  449. {
  450. return (ahd_print_register(NULL, 0, "MAXCMD",
  451. 0x32, regvalue, cur_col, wrap));
  452. }
  453. int
  454. ahd_maxcmdcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
  455. {
  456. return (ahd_print_register(NULL, 0, "MAXCMDCNT",
  457. 0x33, regvalue, cur_col, wrap));
  458. }
  459. int
  460. ahd_lqrsvd01_print(u_int regvalue, u_int *cur_col, u_int wrap)
  461. {
  462. return (ahd_print_register(NULL, 0, "LQRSVD01",
  463. 0x34, regvalue, cur_col, wrap));
  464. }
  465. int
  466. ahd_lqrsvd16_print(u_int regvalue, u_int *cur_col, u_int wrap)
  467. {
  468. return (ahd_print_register(NULL, 0, "LQRSVD16",
  469. 0x35, regvalue, cur_col, wrap));
  470. }
  471. int
  472. ahd_lqrsvd17_print(u_int regvalue, u_int *cur_col, u_int wrap)
  473. {
  474. return (ahd_print_register(NULL, 0, "LQRSVD17",
  475. 0x36, regvalue, cur_col, wrap));
  476. }
  477. int
  478. ahd_cmdrsvd0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  479. {
  480. return (ahd_print_register(NULL, 0, "CMDRSVD0",
  481. 0x37, regvalue, cur_col, wrap));
  482. }
  483. static ahd_reg_parse_entry_t LQCTL0_parse_table[] = {
  484. { "LQ0INITGCLT", 0x03, 0x03 },
  485. { "LQ0TARGCLT", 0x0c, 0x0c },
  486. { "LQIINITGCLT", 0x30, 0x30 },
  487. { "LQITARGCLT", 0xc0, 0xc0 }
  488. };
  489. int
  490. ahd_lqctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  491. {
  492. return (ahd_print_register(LQCTL0_parse_table, 4, "LQCTL0",
  493. 0x38, regvalue, cur_col, wrap));
  494. }
  495. static ahd_reg_parse_entry_t LQCTL1_parse_table[] = {
  496. { "ABORTPENDING", 0x01, 0x01 },
  497. { "SINGLECMD", 0x02, 0x02 },
  498. { "PCI2PCI", 0x04, 0x04 }
  499. };
  500. int
  501. ahd_lqctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  502. {
  503. return (ahd_print_register(LQCTL1_parse_table, 3, "LQCTL1",
  504. 0x38, regvalue, cur_col, wrap));
  505. }
  506. static ahd_reg_parse_entry_t SCSBIST0_parse_table[] = {
  507. { "OSBISTRUN", 0x01, 0x01 },
  508. { "OSBISTDONE", 0x02, 0x02 },
  509. { "OSBISTERR", 0x04, 0x04 },
  510. { "GSBISTRUN", 0x10, 0x10 },
  511. { "GSBISTDONE", 0x20, 0x20 },
  512. { "GSBISTERR", 0x40, 0x40 }
  513. };
  514. int
  515. ahd_scsbist0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  516. {
  517. return (ahd_print_register(SCSBIST0_parse_table, 6, "SCSBIST0",
  518. 0x39, regvalue, cur_col, wrap));
  519. }
  520. static ahd_reg_parse_entry_t LQCTL2_parse_table[] = {
  521. { "LQOPAUSE", 0x01, 0x01 },
  522. { "LQOTOIDLE", 0x02, 0x02 },
  523. { "LQOCONTINUE", 0x04, 0x04 },
  524. { "LQORETRY", 0x08, 0x08 },
  525. { "LQIPAUSE", 0x10, 0x10 },
  526. { "LQITOIDLE", 0x20, 0x20 },
  527. { "LQICONTINUE", 0x40, 0x40 },
  528. { "LQIRETRY", 0x80, 0x80 }
  529. };
  530. int
  531. ahd_lqctl2_print(u_int regvalue, u_int *cur_col, u_int wrap)
  532. {
  533. return (ahd_print_register(LQCTL2_parse_table, 8, "LQCTL2",
  534. 0x39, regvalue, cur_col, wrap));
  535. }
  536. static ahd_reg_parse_entry_t SCSBIST1_parse_table[] = {
  537. { "NTBISTRUN", 0x01, 0x01 },
  538. { "NTBISTDONE", 0x02, 0x02 },
  539. { "NTBISTERR", 0x04, 0x04 }
  540. };
  541. int
  542. ahd_scsbist1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  543. {
  544. return (ahd_print_register(SCSBIST1_parse_table, 3, "SCSBIST1",
  545. 0x3a, regvalue, cur_col, wrap));
  546. }
  547. static ahd_reg_parse_entry_t SCSISEQ0_parse_table[] = {
  548. { "SCSIRSTO", 0x01, 0x01 },
  549. { "FORCEBUSFREE", 0x10, 0x10 },
  550. { "ENARBO", 0x20, 0x20 },
  551. { "ENSELO", 0x40, 0x40 },
  552. { "TEMODEO", 0x80, 0x80 }
  553. };
  554. int
  555. ahd_scsiseq0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  556. {
  557. return (ahd_print_register(SCSISEQ0_parse_table, 5, "SCSISEQ0",
  558. 0x3a, regvalue, cur_col, wrap));
  559. }
  560. static ahd_reg_parse_entry_t SCSISEQ1_parse_table[] = {
  561. { "ALTSTIM", 0x01, 0x01 },
  562. { "ENAUTOATNP", 0x02, 0x02 },
  563. { "MANUALP", 0x0c, 0x0c },
  564. { "ENRSELI", 0x10, 0x10 },
  565. { "ENSELI", 0x20, 0x20 },
  566. { "MANUALCTL", 0x40, 0x40 }
  567. };
  568. int
  569. ahd_scsiseq1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  570. {
  571. return (ahd_print_register(SCSISEQ1_parse_table, 6, "SCSISEQ1",
  572. 0x3b, regvalue, cur_col, wrap));
  573. }
  574. static ahd_reg_parse_entry_t SXFRCTL0_parse_table[] = {
  575. { "SPIOEN", 0x08, 0x08 },
  576. { "BIOSCANCELEN", 0x10, 0x10 },
  577. { "DFPEXP", 0x40, 0x40 },
  578. { "DFON", 0x80, 0x80 }
  579. };
  580. int
  581. ahd_sxfrctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  582. {
  583. return (ahd_print_register(SXFRCTL0_parse_table, 4, "SXFRCTL0",
  584. 0x3c, regvalue, cur_col, wrap));
  585. }
  586. int
  587. ahd_dlcount_print(u_int regvalue, u_int *cur_col, u_int wrap)
  588. {
  589. return (ahd_print_register(NULL, 0, "DLCOUNT",
  590. 0x3c, regvalue, cur_col, wrap));
  591. }
  592. int
  593. ahd_businitid_print(u_int regvalue, u_int *cur_col, u_int wrap)
  594. {
  595. return (ahd_print_register(NULL, 0, "BUSINITID",
  596. 0x3c, regvalue, cur_col, wrap));
  597. }
  598. static ahd_reg_parse_entry_t SXFRCTL1_parse_table[] = {
  599. { "STPWEN", 0x01, 0x01 },
  600. { "ACTNEGEN", 0x02, 0x02 },
  601. { "ENSTIMER", 0x04, 0x04 },
  602. { "STIMESEL", 0x18, 0x18 },
  603. { "ENSPCHK", 0x20, 0x20 },
  604. { "ENSACHK", 0x40, 0x40 },
  605. { "BITBUCKET", 0x80, 0x80 }
  606. };
  607. int
  608. ahd_sxfrctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  609. {
  610. return (ahd_print_register(SXFRCTL1_parse_table, 7, "SXFRCTL1",
  611. 0x3d, regvalue, cur_col, wrap));
  612. }
  613. int
  614. ahd_bustargid_print(u_int regvalue, u_int *cur_col, u_int wrap)
  615. {
  616. return (ahd_print_register(NULL, 0, "BUSTARGID",
  617. 0x3e, regvalue, cur_col, wrap));
  618. }
  619. static ahd_reg_parse_entry_t SXFRCTL2_parse_table[] = {
  620. { "ASU", 0x07, 0x07 },
  621. { "CMDDMAEN", 0x08, 0x08 },
  622. { "AUTORSTDIS", 0x10, 0x10 }
  623. };
  624. int
  625. ahd_sxfrctl2_print(u_int regvalue, u_int *cur_col, u_int wrap)
  626. {
  627. return (ahd_print_register(SXFRCTL2_parse_table, 3, "SXFRCTL2",
  628. 0x3e, regvalue, cur_col, wrap));
  629. }
  630. static ahd_reg_parse_entry_t DFFSTAT_parse_table[] = {
  631. { "CURRFIFO_0", 0x00, 0x03 },
  632. { "CURRFIFO_1", 0x01, 0x03 },
  633. { "CURRFIFO_NONE", 0x03, 0x03 },
  634. { "FIFO0FREE", 0x10, 0x10 },
  635. { "FIFO1FREE", 0x20, 0x20 },
  636. { "CURRFIFO", 0x03, 0x03 }
  637. };
  638. int
  639. ahd_dffstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
  640. {
  641. return (ahd_print_register(DFFSTAT_parse_table, 6, "DFFSTAT",
  642. 0x3f, regvalue, cur_col, wrap));
  643. }
  644. static ahd_reg_parse_entry_t SCSISIGO_parse_table[] = {
  645. { "P_DATAOUT", 0x00, 0xe0 },
  646. { "P_DATAOUT_DT", 0x20, 0xe0 },
  647. { "P_DATAIN", 0x40, 0xe0 },
  648. { "P_DATAIN_DT", 0x60, 0xe0 },
  649. { "P_COMMAND", 0x80, 0xe0 },
  650. { "P_MESGOUT", 0xa0, 0xe0 },
  651. { "P_STATUS", 0xc0, 0xe0 },
  652. { "P_MESGIN", 0xe0, 0xe0 },
  653. { "ACKO", 0x01, 0x01 },
  654. { "REQO", 0x02, 0x02 },
  655. { "BSYO", 0x04, 0x04 },
  656. { "SELO", 0x08, 0x08 },
  657. { "ATNO", 0x10, 0x10 },
  658. { "MSGO", 0x20, 0x20 },
  659. { "IOO", 0x40, 0x40 },
  660. { "CDO", 0x80, 0x80 },
  661. { "PHASE_MASK", 0xe0, 0xe0 }
  662. };
  663. int
  664. ahd_scsisigo_print(u_int regvalue, u_int *cur_col, u_int wrap)
  665. {
  666. return (ahd_print_register(SCSISIGO_parse_table, 17, "SCSISIGO",
  667. 0x40, regvalue, cur_col, wrap));
  668. }
  669. int
  670. ahd_multargid_print(u_int regvalue, u_int *cur_col, u_int wrap)
  671. {
  672. return (ahd_print_register(NULL, 0, "MULTARGID",
  673. 0x40, regvalue, cur_col, wrap));
  674. }
  675. static ahd_reg_parse_entry_t SCSISIGI_parse_table[] = {
  676. { "P_DATAOUT", 0x00, 0xe0 },
  677. { "P_DATAOUT_DT", 0x20, 0xe0 },
  678. { "P_DATAIN", 0x40, 0xe0 },
  679. { "P_DATAIN_DT", 0x60, 0xe0 },
  680. { "P_COMMAND", 0x80, 0xe0 },
  681. { "P_MESGOUT", 0xa0, 0xe0 },
  682. { "P_STATUS", 0xc0, 0xe0 },
  683. { "P_MESGIN", 0xe0, 0xe0 },
  684. { "ACKI", 0x01, 0x01 },
  685. { "REQI", 0x02, 0x02 },
  686. { "BSYI", 0x04, 0x04 },
  687. { "SELI", 0x08, 0x08 },
  688. { "ATNI", 0x10, 0x10 },
  689. { "MSGI", 0x20, 0x20 },
  690. { "IOI", 0x40, 0x40 },
  691. { "CDI", 0x80, 0x80 },
  692. { "PHASE_MASK", 0xe0, 0xe0 }
  693. };
  694. int
  695. ahd_scsisigi_print(u_int regvalue, u_int *cur_col, u_int wrap)
  696. {
  697. return (ahd_print_register(SCSISIGI_parse_table, 17, "SCSISIGI",
  698. 0x41, regvalue, cur_col, wrap));
  699. }
  700. static ahd_reg_parse_entry_t SCSIPHASE_parse_table[] = {
  701. { "DATA_OUT_PHASE", 0x01, 0x03 },
  702. { "DATA_IN_PHASE", 0x02, 0x03 },
  703. { "DATA_PHASE_MASK", 0x03, 0x03 },
  704. { "MSG_OUT_PHASE", 0x04, 0x04 },
  705. { "MSG_IN_PHASE", 0x08, 0x08 },
  706. { "COMMAND_PHASE", 0x10, 0x10 },
  707. { "STATUS_PHASE", 0x20, 0x20 }
  708. };
  709. int
  710. ahd_scsiphase_print(u_int regvalue, u_int *cur_col, u_int wrap)
  711. {
  712. return (ahd_print_register(SCSIPHASE_parse_table, 7, "SCSIPHASE",
  713. 0x42, regvalue, cur_col, wrap));
  714. }
  715. int
  716. ahd_scsidat0_img_print(u_int regvalue, u_int *cur_col, u_int wrap)
  717. {
  718. return (ahd_print_register(NULL, 0, "SCSIDAT0_IMG",
  719. 0x43, regvalue, cur_col, wrap));
  720. }
  721. int
  722. ahd_scsidat_print(u_int regvalue, u_int *cur_col, u_int wrap)
  723. {
  724. return (ahd_print_register(NULL, 0, "SCSIDAT",
  725. 0x44, regvalue, cur_col, wrap));
  726. }
  727. int
  728. ahd_scsibus_print(u_int regvalue, u_int *cur_col, u_int wrap)
  729. {
  730. return (ahd_print_register(NULL, 0, "SCSIBUS",
  731. 0x46, regvalue, cur_col, wrap));
  732. }
  733. static ahd_reg_parse_entry_t TARGIDIN_parse_table[] = {
  734. { "TARGID", 0x0f, 0x0f },
  735. { "CLKOUT", 0x80, 0x80 }
  736. };
  737. int
  738. ahd_targidin_print(u_int regvalue, u_int *cur_col, u_int wrap)
  739. {
  740. return (ahd_print_register(TARGIDIN_parse_table, 2, "TARGIDIN",
  741. 0x48, regvalue, cur_col, wrap));
  742. }
  743. static ahd_reg_parse_entry_t SELID_parse_table[] = {
  744. { "ONEBIT", 0x08, 0x08 },
  745. { "SELID_MASK", 0xf0, 0xf0 }
  746. };
  747. int
  748. ahd_selid_print(u_int regvalue, u_int *cur_col, u_int wrap)
  749. {
  750. return (ahd_print_register(SELID_parse_table, 2, "SELID",
  751. 0x49, regvalue, cur_col, wrap));
  752. }
  753. static ahd_reg_parse_entry_t OPTIONMODE_parse_table[] = {
  754. { "AUTO_MSGOUT_DE", 0x02, 0x02 },
  755. { "ENDGFORMCHK", 0x04, 0x04 },
  756. { "BUSFREEREV", 0x10, 0x10 },
  757. { "BIASCANCTL", 0x20, 0x20 },
  758. { "AUTOACKEN", 0x40, 0x40 },
  759. { "BIOSCANCTL", 0x80, 0x80 },
  760. { "OPTIONMODE_DEFAULTS",0x02, 0x02 }
  761. };
  762. int
  763. ahd_optionmode_print(u_int regvalue, u_int *cur_col, u_int wrap)
  764. {
  765. return (ahd_print_register(OPTIONMODE_parse_table, 7, "OPTIONMODE",
  766. 0x4a, regvalue, cur_col, wrap));
  767. }
  768. static ahd_reg_parse_entry_t SBLKCTL_parse_table[] = {
  769. { "SELWIDE", 0x02, 0x02 },
  770. { "ENAB20", 0x04, 0x04 },
  771. { "ENAB40", 0x08, 0x08 },
  772. { "DIAGLEDON", 0x40, 0x40 },
  773. { "DIAGLEDEN", 0x80, 0x80 }
  774. };
  775. int
  776. ahd_sblkctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
  777. {
  778. return (ahd_print_register(SBLKCTL_parse_table, 5, "SBLKCTL",
  779. 0x4a, regvalue, cur_col, wrap));
  780. }
  781. static ahd_reg_parse_entry_t CLRSINT0_parse_table[] = {
  782. { "CLRARBDO", 0x01, 0x01 },
  783. { "CLRSPIORDY", 0x02, 0x02 },
  784. { "CLROVERRUN", 0x04, 0x04 },
  785. { "CLRIOERR", 0x08, 0x08 },
  786. { "CLRSELINGO", 0x10, 0x10 },
  787. { "CLRSELDI", 0x20, 0x20 },
  788. { "CLRSELDO", 0x40, 0x40 }
  789. };
  790. int
  791. ahd_clrsint0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  792. {
  793. return (ahd_print_register(CLRSINT0_parse_table, 7, "CLRSINT0",
  794. 0x4b, regvalue, cur_col, wrap));
  795. }
  796. static ahd_reg_parse_entry_t SSTAT0_parse_table[] = {
  797. { "ARBDO", 0x01, 0x01 },
  798. { "SPIORDY", 0x02, 0x02 },
  799. { "OVERRUN", 0x04, 0x04 },
  800. { "IOERR", 0x08, 0x08 },
  801. { "SELINGO", 0x10, 0x10 },
  802. { "SELDI", 0x20, 0x20 },
  803. { "SELDO", 0x40, 0x40 },
  804. { "TARGET", 0x80, 0x80 }
  805. };
  806. int
  807. ahd_sstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  808. {
  809. return (ahd_print_register(SSTAT0_parse_table, 8, "SSTAT0",
  810. 0x4b, regvalue, cur_col, wrap));
  811. }
  812. static ahd_reg_parse_entry_t SIMODE0_parse_table[] = {
  813. { "ENARBDO", 0x01, 0x01 },
  814. { "ENSPIORDY", 0x02, 0x02 },
  815. { "ENOVERRUN", 0x04, 0x04 },
  816. { "ENIOERR", 0x08, 0x08 },
  817. { "ENSELINGO", 0x10, 0x10 },
  818. { "ENSELDI", 0x20, 0x20 },
  819. { "ENSELDO", 0x40, 0x40 }
  820. };
  821. int
  822. ahd_simode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  823. {
  824. return (ahd_print_register(SIMODE0_parse_table, 7, "SIMODE0",
  825. 0x4b, regvalue, cur_col, wrap));
  826. }
  827. static ahd_reg_parse_entry_t CLRSINT1_parse_table[] = {
  828. { "CLRREQINIT", 0x01, 0x01 },
  829. { "CLRSTRB2FAST", 0x02, 0x02 },
  830. { "CLRSCSIPERR", 0x04, 0x04 },
  831. { "CLRBUSFREE", 0x08, 0x08 },
  832. { "CLRSCSIRSTI", 0x20, 0x20 },
  833. { "CLRATNO", 0x40, 0x40 },
  834. { "CLRSELTIMEO", 0x80, 0x80 }
  835. };
  836. int
  837. ahd_clrsint1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  838. {
  839. return (ahd_print_register(CLRSINT1_parse_table, 7, "CLRSINT1",
  840. 0x4c, regvalue, cur_col, wrap));
  841. }
  842. static ahd_reg_parse_entry_t SSTAT1_parse_table[] = {
  843. { "REQINIT", 0x01, 0x01 },
  844. { "STRB2FAST", 0x02, 0x02 },
  845. { "SCSIPERR", 0x04, 0x04 },
  846. { "BUSFREE", 0x08, 0x08 },
  847. { "PHASEMIS", 0x10, 0x10 },
  848. { "SCSIRSTI", 0x20, 0x20 },
  849. { "ATNTARG", 0x40, 0x40 },
  850. { "SELTO", 0x80, 0x80 }
  851. };
  852. int
  853. ahd_sstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  854. {
  855. return (ahd_print_register(SSTAT1_parse_table, 8, "SSTAT1",
  856. 0x4c, regvalue, cur_col, wrap));
  857. }
  858. static ahd_reg_parse_entry_t SSTAT2_parse_table[] = {
  859. { "BUSFREE_LQO", 0x40, 0xc0 },
  860. { "BUSFREE_DFF0", 0x80, 0xc0 },
  861. { "BUSFREE_DFF1", 0xc0, 0xc0 },
  862. { "DMADONE", 0x01, 0x01 },
  863. { "SDONE", 0x02, 0x02 },
  864. { "WIDE_RES", 0x04, 0x04 },
  865. { "BSYX", 0x08, 0x08 },
  866. { "EXP_ACTIVE", 0x10, 0x10 },
  867. { "NONPACKREQ", 0x20, 0x20 },
  868. { "BUSFREETIME", 0xc0, 0xc0 }
  869. };
  870. int
  871. ahd_sstat2_print(u_int regvalue, u_int *cur_col, u_int wrap)
  872. {
  873. return (ahd_print_register(SSTAT2_parse_table, 10, "SSTAT2",
  874. 0x4d, regvalue, cur_col, wrap));
  875. }
  876. static ahd_reg_parse_entry_t SIMODE2_parse_table[] = {
  877. { "ENDMADONE", 0x01, 0x01 },
  878. { "ENSDONE", 0x02, 0x02 },
  879. { "ENWIDE_RES", 0x04, 0x04 }
  880. };
  881. int
  882. ahd_simode2_print(u_int regvalue, u_int *cur_col, u_int wrap)
  883. {
  884. return (ahd_print_register(SIMODE2_parse_table, 3, "SIMODE2",
  885. 0x4d, regvalue, cur_col, wrap));
  886. }
  887. static ahd_reg_parse_entry_t CLRSINT2_parse_table[] = {
  888. { "CLRDMADONE", 0x01, 0x01 },
  889. { "CLRSDONE", 0x02, 0x02 },
  890. { "CLRWIDE_RES", 0x04, 0x04 },
  891. { "CLRNONPACKREQ", 0x20, 0x20 }
  892. };
  893. int
  894. ahd_clrsint2_print(u_int regvalue, u_int *cur_col, u_int wrap)
  895. {
  896. return (ahd_print_register(CLRSINT2_parse_table, 4, "CLRSINT2",
  897. 0x4d, regvalue, cur_col, wrap));
  898. }
  899. static ahd_reg_parse_entry_t PERRDIAG_parse_table[] = {
  900. { "DTERR", 0x01, 0x01 },
  901. { "DGFORMERR", 0x02, 0x02 },
  902. { "CRCERR", 0x04, 0x04 },
  903. { "AIPERR", 0x08, 0x08 },
  904. { "PARITYERR", 0x10, 0x10 },
  905. { "PREVPHASE", 0x20, 0x20 },
  906. { "HIPERR", 0x40, 0x40 },
  907. { "HIZERO", 0x80, 0x80 }
  908. };
  909. int
  910. ahd_perrdiag_print(u_int regvalue, u_int *cur_col, u_int wrap)
  911. {
  912. return (ahd_print_register(PERRDIAG_parse_table, 8, "PERRDIAG",
  913. 0x4e, regvalue, cur_col, wrap));
  914. }
  915. int
  916. ahd_lqistate_print(u_int regvalue, u_int *cur_col, u_int wrap)
  917. {
  918. return (ahd_print_register(NULL, 0, "LQISTATE",
  919. 0x4e, regvalue, cur_col, wrap));
  920. }
  921. int
  922. ahd_soffcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
  923. {
  924. return (ahd_print_register(NULL, 0, "SOFFCNT",
  925. 0x4f, regvalue, cur_col, wrap));
  926. }
  927. int
  928. ahd_lqostate_print(u_int regvalue, u_int *cur_col, u_int wrap)
  929. {
  930. return (ahd_print_register(NULL, 0, "LQOSTATE",
  931. 0x4f, regvalue, cur_col, wrap));
  932. }
  933. static ahd_reg_parse_entry_t LQISTAT0_parse_table[] = {
  934. { "LQIATNCMD", 0x01, 0x01 },
  935. { "LQIATNLQ", 0x02, 0x02 },
  936. { "LQIBADLQT", 0x04, 0x04 },
  937. { "LQICRCT2", 0x08, 0x08 },
  938. { "LQICRCT1", 0x10, 0x10 },
  939. { "LQIATNQAS", 0x20, 0x20 }
  940. };
  941. int
  942. ahd_lqistat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  943. {
  944. return (ahd_print_register(LQISTAT0_parse_table, 6, "LQISTAT0",
  945. 0x50, regvalue, cur_col, wrap));
  946. }
  947. static ahd_reg_parse_entry_t CLRLQIINT0_parse_table[] = {
  948. { "CLRLQIATNCMD", 0x01, 0x01 },
  949. { "CLRLQIATNLQ", 0x02, 0x02 },
  950. { "CLRLQIBADLQT", 0x04, 0x04 },
  951. { "CLRLQICRCT2", 0x08, 0x08 },
  952. { "CLRLQICRCT1", 0x10, 0x10 },
  953. { "CLRLQIATNQAS", 0x20, 0x20 }
  954. };
  955. int
  956. ahd_clrlqiint0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  957. {
  958. return (ahd_print_register(CLRLQIINT0_parse_table, 6, "CLRLQIINT0",
  959. 0x50, regvalue, cur_col, wrap));
  960. }
  961. static ahd_reg_parse_entry_t LQIMODE0_parse_table[] = {
  962. { "ENLQIATNCMD", 0x01, 0x01 },
  963. { "ENLQIATNLQ", 0x02, 0x02 },
  964. { "ENLQIBADLQT", 0x04, 0x04 },
  965. { "ENLQICRCT2", 0x08, 0x08 },
  966. { "ENLQICRCT1", 0x10, 0x10 },
  967. { "ENLQIATNQASK", 0x20, 0x20 }
  968. };
  969. int
  970. ahd_lqimode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  971. {
  972. return (ahd_print_register(LQIMODE0_parse_table, 6, "LQIMODE0",
  973. 0x50, regvalue, cur_col, wrap));
  974. }
  975. static ahd_reg_parse_entry_t LQIMODE1_parse_table[] = {
  976. { "ENLQIOVERI_NLQ", 0x01, 0x01 },
  977. { "ENLQIOVERI_LQ", 0x02, 0x02 },
  978. { "ENLQIBADLQI", 0x04, 0x04 },
  979. { "ENLQICRCI_NLQ", 0x08, 0x08 },
  980. { "ENLQICRCI_LQ", 0x10, 0x10 },
  981. { "ENLIQABORT", 0x20, 0x20 },
  982. { "ENLQIPHASE_NLQ", 0x40, 0x40 },
  983. { "ENLQIPHASE_LQ", 0x80, 0x80 }
  984. };
  985. int
  986. ahd_lqimode1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  987. {
  988. return (ahd_print_register(LQIMODE1_parse_table, 8, "LQIMODE1",
  989. 0x51, regvalue, cur_col, wrap));
  990. }
  991. static ahd_reg_parse_entry_t LQISTAT1_parse_table[] = {
  992. { "LQIOVERI_NLQ", 0x01, 0x01 },
  993. { "LQIOVERI_LQ", 0x02, 0x02 },
  994. { "LQIBADLQI", 0x04, 0x04 },
  995. { "LQICRCI_NLQ", 0x08, 0x08 },
  996. { "LQICRCI_LQ", 0x10, 0x10 },
  997. { "LQIABORT", 0x20, 0x20 },
  998. { "LQIPHASE_NLQ", 0x40, 0x40 },
  999. { "LQIPHASE_LQ", 0x80, 0x80 }
  1000. };
  1001. int
  1002. ahd_lqistat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1003. {
  1004. return (ahd_print_register(LQISTAT1_parse_table, 8, "LQISTAT1",
  1005. 0x51, regvalue, cur_col, wrap));
  1006. }
  1007. static ahd_reg_parse_entry_t CLRLQIINT1_parse_table[] = {
  1008. { "CLRLQIOVERI_NLQ", 0x01, 0x01 },
  1009. { "CLRLQIOVERI_LQ", 0x02, 0x02 },
  1010. { "CLRLQIBADLQI", 0x04, 0x04 },
  1011. { "CLRLQICRCI_NLQ", 0x08, 0x08 },
  1012. { "CLRLQICRCI_LQ", 0x10, 0x10 },
  1013. { "CLRLIQABORT", 0x20, 0x20 },
  1014. { "CLRLQIPHASE_NLQ", 0x40, 0x40 },
  1015. { "CLRLQIPHASE_LQ", 0x80, 0x80 }
  1016. };
  1017. int
  1018. ahd_clrlqiint1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1019. {
  1020. return (ahd_print_register(CLRLQIINT1_parse_table, 8, "CLRLQIINT1",
  1021. 0x51, regvalue, cur_col, wrap));
  1022. }
  1023. static ahd_reg_parse_entry_t LQISTAT2_parse_table[] = {
  1024. { "LQIGSAVAIL", 0x01, 0x01 },
  1025. { "LQISTOPCMD", 0x02, 0x02 },
  1026. { "LQISTOPLQ", 0x04, 0x04 },
  1027. { "LQISTOPPKT", 0x08, 0x08 },
  1028. { "LQIWAITFIFO", 0x10, 0x10 },
  1029. { "LQIWORKONLQ", 0x20, 0x20 },
  1030. { "LQIPHASE_OUTPKT", 0x40, 0x40 },
  1031. { "PACKETIZED", 0x80, 0x80 }
  1032. };
  1033. int
  1034. ahd_lqistat2_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1035. {
  1036. return (ahd_print_register(LQISTAT2_parse_table, 8, "LQISTAT2",
  1037. 0x52, regvalue, cur_col, wrap));
  1038. }
  1039. static ahd_reg_parse_entry_t SSTAT3_parse_table[] = {
  1040. { "OSRAMPERR", 0x01, 0x01 },
  1041. { "NTRAMPERR", 0x02, 0x02 }
  1042. };
  1043. int
  1044. ahd_sstat3_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1045. {
  1046. return (ahd_print_register(SSTAT3_parse_table, 2, "SSTAT3",
  1047. 0x53, regvalue, cur_col, wrap));
  1048. }
  1049. static ahd_reg_parse_entry_t SIMODE3_parse_table[] = {
  1050. { "ENOSRAMPERR", 0x01, 0x01 },
  1051. { "ENNTRAMPERR", 0x02, 0x02 }
  1052. };
  1053. int
  1054. ahd_simode3_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1055. {
  1056. return (ahd_print_register(SIMODE3_parse_table, 2, "SIMODE3",
  1057. 0x53, regvalue, cur_col, wrap));
  1058. }
  1059. static ahd_reg_parse_entry_t CLRSINT3_parse_table[] = {
  1060. { "CLROSRAMPERR", 0x01, 0x01 },
  1061. { "CLRNTRAMPERR", 0x02, 0x02 }
  1062. };
  1063. int
  1064. ahd_clrsint3_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1065. {
  1066. return (ahd_print_register(CLRSINT3_parse_table, 2, "CLRSINT3",
  1067. 0x53, regvalue, cur_col, wrap));
  1068. }
  1069. static ahd_reg_parse_entry_t LQOSTAT0_parse_table[] = {
  1070. { "LQOTCRC", 0x01, 0x01 },
  1071. { "LQOATNPKT", 0x02, 0x02 },
  1072. { "LQOATNLQ", 0x04, 0x04 },
  1073. { "LQOSTOPT2", 0x08, 0x08 },
  1074. { "LQOTARGSCBPERR", 0x10, 0x10 }
  1075. };
  1076. int
  1077. ahd_lqostat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1078. {
  1079. return (ahd_print_register(LQOSTAT0_parse_table, 5, "LQOSTAT0",
  1080. 0x54, regvalue, cur_col, wrap));
  1081. }
  1082. static ahd_reg_parse_entry_t CLRLQOINT0_parse_table[] = {
  1083. { "CLRLQOTCRC", 0x01, 0x01 },
  1084. { "CLRLQOATNPKT", 0x02, 0x02 },
  1085. { "CLRLQOATNLQ", 0x04, 0x04 },
  1086. { "CLRLQOSTOPT2", 0x08, 0x08 },
  1087. { "CLRLQOTARGSCBPERR", 0x10, 0x10 }
  1088. };
  1089. int
  1090. ahd_clrlqoint0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1091. {
  1092. return (ahd_print_register(CLRLQOINT0_parse_table, 5, "CLRLQOINT0",
  1093. 0x54, regvalue, cur_col, wrap));
  1094. }
  1095. static ahd_reg_parse_entry_t LQOMODE0_parse_table[] = {
  1096. { "ENLQOTCRC", 0x01, 0x01 },
  1097. { "ENLQOATNPKT", 0x02, 0x02 },
  1098. { "ENLQOATNLQ", 0x04, 0x04 },
  1099. { "ENLQOSTOPT2", 0x08, 0x08 },
  1100. { "ENLQOTARGSCBPERR", 0x10, 0x10 }
  1101. };
  1102. int
  1103. ahd_lqomode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1104. {
  1105. return (ahd_print_register(LQOMODE0_parse_table, 5, "LQOMODE0",
  1106. 0x54, regvalue, cur_col, wrap));
  1107. }
  1108. static ahd_reg_parse_entry_t LQOMODE1_parse_table[] = {
  1109. { "ENLQOPHACHGINPKT", 0x01, 0x01 },
  1110. { "ENLQOBUSFREE", 0x02, 0x02 },
  1111. { "ENLQOBADQAS", 0x04, 0x04 },
  1112. { "ENLQOSTOPI2", 0x08, 0x08 },
  1113. { "ENLQOINITSCBPERR", 0x10, 0x10 }
  1114. };
  1115. int
  1116. ahd_lqomode1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1117. {
  1118. return (ahd_print_register(LQOMODE1_parse_table, 5, "LQOMODE1",
  1119. 0x55, regvalue, cur_col, wrap));
  1120. }
  1121. static ahd_reg_parse_entry_t LQOSTAT1_parse_table[] = {
  1122. { "LQOPHACHGINPKT", 0x01, 0x01 },
  1123. { "LQOBUSFREE", 0x02, 0x02 },
  1124. { "LQOBADQAS", 0x04, 0x04 },
  1125. { "LQOSTOPI2", 0x08, 0x08 },
  1126. { "LQOINITSCBPERR", 0x10, 0x10 }
  1127. };
  1128. int
  1129. ahd_lqostat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1130. {
  1131. return (ahd_print_register(LQOSTAT1_parse_table, 5, "LQOSTAT1",
  1132. 0x55, regvalue, cur_col, wrap));
  1133. }
  1134. static ahd_reg_parse_entry_t CLRLQOINT1_parse_table[] = {
  1135. { "CLRLQOPHACHGINPKT", 0x01, 0x01 },
  1136. { "CLRLQOBUSFREE", 0x02, 0x02 },
  1137. { "CLRLQOBADQAS", 0x04, 0x04 },
  1138. { "CLRLQOSTOPI2", 0x08, 0x08 },
  1139. { "CLRLQOINITSCBPERR", 0x10, 0x10 }
  1140. };
  1141. int
  1142. ahd_clrlqoint1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1143. {
  1144. return (ahd_print_register(CLRLQOINT1_parse_table, 5, "CLRLQOINT1",
  1145. 0x55, regvalue, cur_col, wrap));
  1146. }
  1147. static ahd_reg_parse_entry_t LQOSTAT2_parse_table[] = {
  1148. { "LQOSTOP0", 0x01, 0x01 },
  1149. { "LQOPHACHGOUTPKT", 0x02, 0x02 },
  1150. { "LQOWAITFIFO", 0x10, 0x10 },
  1151. { "LQOPKT", 0xe0, 0xe0 }
  1152. };
  1153. int
  1154. ahd_lqostat2_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1155. {
  1156. return (ahd_print_register(LQOSTAT2_parse_table, 4, "LQOSTAT2",
  1157. 0x56, regvalue, cur_col, wrap));
  1158. }
  1159. int
  1160. ahd_os_space_cnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1161. {
  1162. return (ahd_print_register(NULL, 0, "OS_SPACE_CNT",
  1163. 0x56, regvalue, cur_col, wrap));
  1164. }
  1165. static ahd_reg_parse_entry_t SIMODE1_parse_table[] = {
  1166. { "ENREQINIT", 0x01, 0x01 },
  1167. { "ENSTRB2FAST", 0x02, 0x02 },
  1168. { "ENSCSIPERR", 0x04, 0x04 },
  1169. { "ENBUSFREE", 0x08, 0x08 },
  1170. { "ENPHASEMIS", 0x10, 0x10 },
  1171. { "ENSCSIRST", 0x20, 0x20 },
  1172. { "ENATNTARG", 0x40, 0x40 },
  1173. { "ENSELTIMO", 0x80, 0x80 }
  1174. };
  1175. int
  1176. ahd_simode1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1177. {
  1178. return (ahd_print_register(SIMODE1_parse_table, 8, "SIMODE1",
  1179. 0x57, regvalue, cur_col, wrap));
  1180. }
  1181. int
  1182. ahd_gsfifo_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1183. {
  1184. return (ahd_print_register(NULL, 0, "GSFIFO",
  1185. 0x58, regvalue, cur_col, wrap));
  1186. }
  1187. static ahd_reg_parse_entry_t DFFSXFRCTL_parse_table[] = {
  1188. { "RSTCHN", 0x01, 0x01 },
  1189. { "CLRCHN", 0x02, 0x02 },
  1190. { "CLRSHCNT", 0x04, 0x04 },
  1191. { "DFFBITBUCKET", 0x08, 0x08 }
  1192. };
  1193. int
  1194. ahd_dffsxfrctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1195. {
  1196. return (ahd_print_register(DFFSXFRCTL_parse_table, 4, "DFFSXFRCTL",
  1197. 0x5a, regvalue, cur_col, wrap));
  1198. }
  1199. static ahd_reg_parse_entry_t LQOSCSCTL_parse_table[] = {
  1200. { "LQONOCHKOVER", 0x01, 0x01 },
  1201. { "LQOH2A_VERSION", 0x80, 0x80 }
  1202. };
  1203. int
  1204. ahd_lqoscsctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1205. {
  1206. return (ahd_print_register(LQOSCSCTL_parse_table, 2, "LQOSCSCTL",
  1207. 0x5a, regvalue, cur_col, wrap));
  1208. }
  1209. int
  1210. ahd_nextscb_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1211. {
  1212. return (ahd_print_register(NULL, 0, "NEXTSCB",
  1213. 0x5a, regvalue, cur_col, wrap));
  1214. }
  1215. static ahd_reg_parse_entry_t CLRSEQINTSRC_parse_table[] = {
  1216. { "CLRCFG4TCMD", 0x01, 0x01 },
  1217. { "CLRCFG4ICMD", 0x02, 0x02 },
  1218. { "CLRCFG4TSTAT", 0x04, 0x04 },
  1219. { "CLRCFG4ISTAT", 0x08, 0x08 },
  1220. { "CLRCFG4DATA", 0x10, 0x10 },
  1221. { "CLRSAVEPTRS", 0x20, 0x20 },
  1222. { "CLRCTXTDONE", 0x40, 0x40 }
  1223. };
  1224. int
  1225. ahd_clrseqintsrc_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1226. {
  1227. return (ahd_print_register(CLRSEQINTSRC_parse_table, 7, "CLRSEQINTSRC",
  1228. 0x5b, regvalue, cur_col, wrap));
  1229. }
  1230. static ahd_reg_parse_entry_t SEQINTSRC_parse_table[] = {
  1231. { "CFG4TCMD", 0x01, 0x01 },
  1232. { "CFG4ICMD", 0x02, 0x02 },
  1233. { "CFG4TSTAT", 0x04, 0x04 },
  1234. { "CFG4ISTAT", 0x08, 0x08 },
  1235. { "CFG4DATA", 0x10, 0x10 },
  1236. { "SAVEPTRS", 0x20, 0x20 },
  1237. { "CTXTDONE", 0x40, 0x40 }
  1238. };
  1239. int
  1240. ahd_seqintsrc_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1241. {
  1242. return (ahd_print_register(SEQINTSRC_parse_table, 7, "SEQINTSRC",
  1243. 0x5b, regvalue, cur_col, wrap));
  1244. }
  1245. int
  1246. ahd_currscb_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1247. {
  1248. return (ahd_print_register(NULL, 0, "CURRSCB",
  1249. 0x5c, regvalue, cur_col, wrap));
  1250. }
  1251. static ahd_reg_parse_entry_t SEQIMODE_parse_table[] = {
  1252. { "ENCFG4TCMD", 0x01, 0x01 },
  1253. { "ENCFG4ICMD", 0x02, 0x02 },
  1254. { "ENCFG4TSTAT", 0x04, 0x04 },
  1255. { "ENCFG4ISTAT", 0x08, 0x08 },
  1256. { "ENCFG4DATA", 0x10, 0x10 },
  1257. { "ENSAVEPTRS", 0x20, 0x20 },
  1258. { "ENCTXTDONE", 0x40, 0x40 }
  1259. };
  1260. int
  1261. ahd_seqimode_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1262. {
  1263. return (ahd_print_register(SEQIMODE_parse_table, 7, "SEQIMODE",
  1264. 0x5c, regvalue, cur_col, wrap));
  1265. }
  1266. static ahd_reg_parse_entry_t MDFFSTAT_parse_table[] = {
  1267. { "FIFOFREE", 0x01, 0x01 },
  1268. { "DATAINFIFO", 0x02, 0x02 },
  1269. { "DLZERO", 0x04, 0x04 },
  1270. { "SHVALID", 0x08, 0x08 },
  1271. { "LASTSDONE", 0x10, 0x10 },
  1272. { "SHCNTMINUS1", 0x20, 0x20 },
  1273. { "SHCNTNEGATIVE", 0x40, 0x40 }
  1274. };
  1275. int
  1276. ahd_mdffstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1277. {
  1278. return (ahd_print_register(MDFFSTAT_parse_table, 7, "MDFFSTAT",
  1279. 0x5d, regvalue, cur_col, wrap));
  1280. }
  1281. static ahd_reg_parse_entry_t CRCCONTROL_parse_table[] = {
  1282. { "CRCVALCHKEN", 0x40, 0x40 }
  1283. };
  1284. int
  1285. ahd_crccontrol_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1286. {
  1287. return (ahd_print_register(CRCCONTROL_parse_table, 1, "CRCCONTROL",
  1288. 0x5d, regvalue, cur_col, wrap));
  1289. }
  1290. int
  1291. ahd_dfftag_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1292. {
  1293. return (ahd_print_register(NULL, 0, "DFFTAG",
  1294. 0x5e, regvalue, cur_col, wrap));
  1295. }
  1296. int
  1297. ahd_lastscb_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1298. {
  1299. return (ahd_print_register(NULL, 0, "LASTSCB",
  1300. 0x5e, regvalue, cur_col, wrap));
  1301. }
  1302. static ahd_reg_parse_entry_t SCSITEST_parse_table[] = {
  1303. { "SEL_TXPLL_DEBUG", 0x04, 0x04 },
  1304. { "CNTRTEST", 0x08, 0x08 }
  1305. };
  1306. int
  1307. ahd_scsitest_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1308. {
  1309. return (ahd_print_register(SCSITEST_parse_table, 2, "SCSITEST",
  1310. 0x5e, regvalue, cur_col, wrap));
  1311. }
  1312. static ahd_reg_parse_entry_t IOPDNCTL_parse_table[] = {
  1313. { "PDN_DIFFSENSE", 0x01, 0x01 },
  1314. { "PDN_IDIST", 0x04, 0x04 },
  1315. { "DISABLE_OE", 0x80, 0x80 }
  1316. };
  1317. int
  1318. ahd_iopdnctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1319. {
  1320. return (ahd_print_register(IOPDNCTL_parse_table, 3, "IOPDNCTL",
  1321. 0x5f, regvalue, cur_col, wrap));
  1322. }
  1323. int
  1324. ahd_shaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1325. {
  1326. return (ahd_print_register(NULL, 0, "SHADDR",
  1327. 0x60, regvalue, cur_col, wrap));
  1328. }
  1329. int
  1330. ahd_negoaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1331. {
  1332. return (ahd_print_register(NULL, 0, "NEGOADDR",
  1333. 0x60, regvalue, cur_col, wrap));
  1334. }
  1335. int
  1336. ahd_dgrpcrci_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1337. {
  1338. return (ahd_print_register(NULL, 0, "DGRPCRCI",
  1339. 0x60, regvalue, cur_col, wrap));
  1340. }
  1341. int
  1342. ahd_negperiod_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1343. {
  1344. return (ahd_print_register(NULL, 0, "NEGPERIOD",
  1345. 0x61, regvalue, cur_col, wrap));
  1346. }
  1347. int
  1348. ahd_packcrci_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1349. {
  1350. return (ahd_print_register(NULL, 0, "PACKCRCI",
  1351. 0x62, regvalue, cur_col, wrap));
  1352. }
  1353. int
  1354. ahd_negoffset_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1355. {
  1356. return (ahd_print_register(NULL, 0, "NEGOFFSET",
  1357. 0x62, regvalue, cur_col, wrap));
  1358. }
  1359. static ahd_reg_parse_entry_t NEGPPROPTS_parse_table[] = {
  1360. { "PPROPT_IUT", 0x01, 0x01 },
  1361. { "PPROPT_DT", 0x02, 0x02 },
  1362. { "PPROPT_QAS", 0x04, 0x04 },
  1363. { "PPROPT_PACE", 0x08, 0x08 }
  1364. };
  1365. int
  1366. ahd_negppropts_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1367. {
  1368. return (ahd_print_register(NEGPPROPTS_parse_table, 4, "NEGPPROPTS",
  1369. 0x63, regvalue, cur_col, wrap));
  1370. }
  1371. static ahd_reg_parse_entry_t NEGCONOPTS_parse_table[] = {
  1372. { "WIDEXFER", 0x01, 0x01 },
  1373. { "ENAUTOATNO", 0x02, 0x02 },
  1374. { "ENAUTOATNI", 0x04, 0x04 },
  1375. { "ENSLOWCRC", 0x08, 0x08 },
  1376. { "RTI_OVRDTRN", 0x10, 0x10 },
  1377. { "RTI_WRTDIS", 0x20, 0x20 },
  1378. { "ENSNAPSHOT", 0x40, 0x40 }
  1379. };
  1380. int
  1381. ahd_negconopts_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1382. {
  1383. return (ahd_print_register(NEGCONOPTS_parse_table, 7, "NEGCONOPTS",
  1384. 0x64, regvalue, cur_col, wrap));
  1385. }
  1386. int
  1387. ahd_annexcol_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1388. {
  1389. return (ahd_print_register(NULL, 0, "ANNEXCOL",
  1390. 0x65, regvalue, cur_col, wrap));
  1391. }
  1392. int
  1393. ahd_annexdat_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1394. {
  1395. return (ahd_print_register(NULL, 0, "ANNEXDAT",
  1396. 0x66, regvalue, cur_col, wrap));
  1397. }
  1398. static ahd_reg_parse_entry_t SCSCHKN_parse_table[] = {
  1399. { "LSTSGCLRDIS", 0x01, 0x01 },
  1400. { "SHVALIDSTDIS", 0x02, 0x02 },
  1401. { "DFFACTCLR", 0x04, 0x04 },
  1402. { "SDONEMSKDIS", 0x08, 0x08 },
  1403. { "WIDERESEN", 0x10, 0x10 },
  1404. { "CURRFIFODEF", 0x20, 0x20 },
  1405. { "STSELSKIDDIS", 0x40, 0x40 }
  1406. };
  1407. int
  1408. ahd_scschkn_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1409. {
  1410. return (ahd_print_register(SCSCHKN_parse_table, 7, "SCSCHKN",
  1411. 0x66, regvalue, cur_col, wrap));
  1412. }
  1413. int
  1414. ahd_iownid_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1415. {
  1416. return (ahd_print_register(NULL, 0, "IOWNID",
  1417. 0x67, regvalue, cur_col, wrap));
  1418. }
  1419. static ahd_reg_parse_entry_t PLL960CTL0_parse_table[] = {
  1420. { "PLL_ENFBM", 0x01, 0x01 },
  1421. { "PLL_DLPF", 0x02, 0x02 },
  1422. { "PLL_ENLPF", 0x04, 0x04 },
  1423. { "PLL_ENLUD", 0x08, 0x08 },
  1424. { "PLL_NS", 0x30, 0x30 },
  1425. { "PLL_PWDN", 0x40, 0x40 },
  1426. { "PLL_VCOSEL", 0x80, 0x80 }
  1427. };
  1428. int
  1429. ahd_pll960ctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1430. {
  1431. return (ahd_print_register(PLL960CTL0_parse_table, 7, "PLL960CTL0",
  1432. 0x68, regvalue, cur_col, wrap));
  1433. }
  1434. int
  1435. ahd_shcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1436. {
  1437. return (ahd_print_register(NULL, 0, "SHCNT",
  1438. 0x68, regvalue, cur_col, wrap));
  1439. }
  1440. int
  1441. ahd_townid_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1442. {
  1443. return (ahd_print_register(NULL, 0, "TOWNID",
  1444. 0x69, regvalue, cur_col, wrap));
  1445. }
  1446. static ahd_reg_parse_entry_t PLL960CTL1_parse_table[] = {
  1447. { "PLL_RST", 0x01, 0x01 },
  1448. { "PLL_CNTCLR", 0x40, 0x40 },
  1449. { "PLL_CNTEN", 0x80, 0x80 }
  1450. };
  1451. int
  1452. ahd_pll960ctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1453. {
  1454. return (ahd_print_register(PLL960CTL1_parse_table, 3, "PLL960CTL1",
  1455. 0x69, regvalue, cur_col, wrap));
  1456. }
  1457. int
  1458. ahd_pll960cnt0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1459. {
  1460. return (ahd_print_register(NULL, 0, "PLL960CNT0",
  1461. 0x6a, regvalue, cur_col, wrap));
  1462. }
  1463. int
  1464. ahd_xsig_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1465. {
  1466. return (ahd_print_register(NULL, 0, "XSIG",
  1467. 0x6a, regvalue, cur_col, wrap));
  1468. }
  1469. int
  1470. ahd_seloid_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1471. {
  1472. return (ahd_print_register(NULL, 0, "SELOID",
  1473. 0x6b, regvalue, cur_col, wrap));
  1474. }
  1475. static ahd_reg_parse_entry_t PLL400CTL0_parse_table[] = {
  1476. { "PLL_ENFBM", 0x01, 0x01 },
  1477. { "PLL_DLPF", 0x02, 0x02 },
  1478. { "PLL_ENLPF", 0x04, 0x04 },
  1479. { "PLL_ENLUD", 0x08, 0x08 },
  1480. { "PLL_NS", 0x30, 0x30 },
  1481. { "PLL_PWDN", 0x40, 0x40 },
  1482. { "PLL_VCOSEL", 0x80, 0x80 }
  1483. };
  1484. int
  1485. ahd_pll400ctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1486. {
  1487. return (ahd_print_register(PLL400CTL0_parse_table, 7, "PLL400CTL0",
  1488. 0x6c, regvalue, cur_col, wrap));
  1489. }
  1490. int
  1491. ahd_fairness_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1492. {
  1493. return (ahd_print_register(NULL, 0, "FAIRNESS",
  1494. 0x6c, regvalue, cur_col, wrap));
  1495. }
  1496. static ahd_reg_parse_entry_t PLL400CTL1_parse_table[] = {
  1497. { "PLL_RST", 0x01, 0x01 },
  1498. { "PLL_CNTCLR", 0x40, 0x40 },
  1499. { "PLL_CNTEN", 0x80, 0x80 }
  1500. };
  1501. int
  1502. ahd_pll400ctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1503. {
  1504. return (ahd_print_register(PLL400CTL1_parse_table, 3, "PLL400CTL1",
  1505. 0x6d, regvalue, cur_col, wrap));
  1506. }
  1507. int
  1508. ahd_unfairness_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1509. {
  1510. return (ahd_print_register(NULL, 0, "UNFAIRNESS",
  1511. 0x6e, regvalue, cur_col, wrap));
  1512. }
  1513. int
  1514. ahd_pll400cnt0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1515. {
  1516. return (ahd_print_register(NULL, 0, "PLL400CNT0",
  1517. 0x6e, regvalue, cur_col, wrap));
  1518. }
  1519. int
  1520. ahd_haddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1521. {
  1522. return (ahd_print_register(NULL, 0, "HADDR",
  1523. 0x70, regvalue, cur_col, wrap));
  1524. }
  1525. static ahd_reg_parse_entry_t PLLDELAY_parse_table[] = {
  1526. { "SPLIT_DROP_REQ", 0x80, 0x80 }
  1527. };
  1528. int
  1529. ahd_plldelay_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1530. {
  1531. return (ahd_print_register(PLLDELAY_parse_table, 1, "PLLDELAY",
  1532. 0x70, regvalue, cur_col, wrap));
  1533. }
  1534. int
  1535. ahd_hodmaadr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1536. {
  1537. return (ahd_print_register(NULL, 0, "HODMAADR",
  1538. 0x70, regvalue, cur_col, wrap));
  1539. }
  1540. int
  1541. ahd_hodmacnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1542. {
  1543. return (ahd_print_register(NULL, 0, "HODMACNT",
  1544. 0x78, regvalue, cur_col, wrap));
  1545. }
  1546. int
  1547. ahd_hcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1548. {
  1549. return (ahd_print_register(NULL, 0, "HCNT",
  1550. 0x78, regvalue, cur_col, wrap));
  1551. }
  1552. int
  1553. ahd_hodmaen_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1554. {
  1555. return (ahd_print_register(NULL, 0, "HODMAEN",
  1556. 0x7a, regvalue, cur_col, wrap));
  1557. }
  1558. int
  1559. ahd_scbhaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1560. {
  1561. return (ahd_print_register(NULL, 0, "SCBHADDR",
  1562. 0x7c, regvalue, cur_col, wrap));
  1563. }
  1564. int
  1565. ahd_sghaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1566. {
  1567. return (ahd_print_register(NULL, 0, "SGHADDR",
  1568. 0x7c, regvalue, cur_col, wrap));
  1569. }
  1570. int
  1571. ahd_scbhcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1572. {
  1573. return (ahd_print_register(NULL, 0, "SCBHCNT",
  1574. 0x84, regvalue, cur_col, wrap));
  1575. }
  1576. int
  1577. ahd_sghcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1578. {
  1579. return (ahd_print_register(NULL, 0, "SGHCNT",
  1580. 0x84, regvalue, cur_col, wrap));
  1581. }
  1582. static ahd_reg_parse_entry_t DFF_THRSH_parse_table[] = {
  1583. { "WR_DFTHRSH_MIN", 0x00, 0x70 },
  1584. { "RD_DFTHRSH_MIN", 0x00, 0x07 },
  1585. { "RD_DFTHRSH_25", 0x01, 0x07 },
  1586. { "RD_DFTHRSH_50", 0x02, 0x07 },
  1587. { "RD_DFTHRSH_63", 0x03, 0x07 },
  1588. { "RD_DFTHRSH_75", 0x04, 0x07 },
  1589. { "RD_DFTHRSH_85", 0x05, 0x07 },
  1590. { "RD_DFTHRSH_90", 0x06, 0x07 },
  1591. { "RD_DFTHRSH_MAX", 0x07, 0x07 },
  1592. { "WR_DFTHRSH_25", 0x10, 0x70 },
  1593. { "WR_DFTHRSH_50", 0x20, 0x70 },
  1594. { "WR_DFTHRSH_63", 0x30, 0x70 },
  1595. { "WR_DFTHRSH_75", 0x40, 0x70 },
  1596. { "WR_DFTHRSH_85", 0x50, 0x70 },
  1597. { "WR_DFTHRSH_90", 0x60, 0x70 },
  1598. { "WR_DFTHRSH_MAX", 0x70, 0x70 },
  1599. { "RD_DFTHRSH", 0x07, 0x07 },
  1600. { "WR_DFTHRSH", 0x70, 0x70 }
  1601. };
  1602. int
  1603. ahd_dff_thrsh_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1604. {
  1605. return (ahd_print_register(DFF_THRSH_parse_table, 18, "DFF_THRSH",
  1606. 0x88, regvalue, cur_col, wrap));
  1607. }
  1608. int
  1609. ahd_romaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1610. {
  1611. return (ahd_print_register(NULL, 0, "ROMADDR",
  1612. 0x8a, regvalue, cur_col, wrap));
  1613. }
  1614. static ahd_reg_parse_entry_t ROMCNTRL_parse_table[] = {
  1615. { "RDY", 0x01, 0x01 },
  1616. { "REPEAT", 0x02, 0x02 },
  1617. { "ROMSPD", 0x18, 0x18 },
  1618. { "ROMOP", 0xe0, 0xe0 }
  1619. };
  1620. int
  1621. ahd_romcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1622. {
  1623. return (ahd_print_register(ROMCNTRL_parse_table, 4, "ROMCNTRL",
  1624. 0x8d, regvalue, cur_col, wrap));
  1625. }
  1626. int
  1627. ahd_romdata_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1628. {
  1629. return (ahd_print_register(NULL, 0, "ROMDATA",
  1630. 0x8e, regvalue, cur_col, wrap));
  1631. }
  1632. static ahd_reg_parse_entry_t CMCRXMSG0_parse_table[] = {
  1633. { "CFNUM", 0x07, 0x07 },
  1634. { "CDNUM", 0xf8, 0xf8 }
  1635. };
  1636. int
  1637. ahd_cmcrxmsg0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1638. {
  1639. return (ahd_print_register(CMCRXMSG0_parse_table, 2, "CMCRXMSG0",
  1640. 0x90, regvalue, cur_col, wrap));
  1641. }
  1642. static ahd_reg_parse_entry_t ROENABLE_parse_table[] = {
  1643. { "DCH0ROEN", 0x01, 0x01 },
  1644. { "DCH1ROEN", 0x02, 0x02 },
  1645. { "SGROEN", 0x04, 0x04 },
  1646. { "CMCROEN", 0x08, 0x08 },
  1647. { "OVLYROEN", 0x10, 0x10 },
  1648. { "MSIROEN", 0x20, 0x20 }
  1649. };
  1650. int
  1651. ahd_roenable_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1652. {
  1653. return (ahd_print_register(ROENABLE_parse_table, 6, "ROENABLE",
  1654. 0x90, regvalue, cur_col, wrap));
  1655. }
  1656. static ahd_reg_parse_entry_t OVLYRXMSG0_parse_table[] = {
  1657. { "CFNUM", 0x07, 0x07 },
  1658. { "CDNUM", 0xf8, 0xf8 }
  1659. };
  1660. int
  1661. ahd_ovlyrxmsg0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1662. {
  1663. return (ahd_print_register(OVLYRXMSG0_parse_table, 2, "OVLYRXMSG0",
  1664. 0x90, regvalue, cur_col, wrap));
  1665. }
  1666. static ahd_reg_parse_entry_t DCHRXMSG0_parse_table[] = {
  1667. { "CFNUM", 0x07, 0x07 },
  1668. { "CDNUM", 0xf8, 0xf8 }
  1669. };
  1670. int
  1671. ahd_dchrxmsg0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1672. {
  1673. return (ahd_print_register(DCHRXMSG0_parse_table, 2, "DCHRXMSG0",
  1674. 0x90, regvalue, cur_col, wrap));
  1675. }
  1676. static ahd_reg_parse_entry_t OVLYRXMSG1_parse_table[] = {
  1677. { "CBNUM", 0xff, 0xff }
  1678. };
  1679. int
  1680. ahd_ovlyrxmsg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1681. {
  1682. return (ahd_print_register(OVLYRXMSG1_parse_table, 1, "OVLYRXMSG1",
  1683. 0x91, regvalue, cur_col, wrap));
  1684. }
  1685. static ahd_reg_parse_entry_t NSENABLE_parse_table[] = {
  1686. { "DCH0NSEN", 0x01, 0x01 },
  1687. { "DCH1NSEN", 0x02, 0x02 },
  1688. { "SGNSEN", 0x04, 0x04 },
  1689. { "CMCNSEN", 0x08, 0x08 },
  1690. { "OVLYNSEN", 0x10, 0x10 },
  1691. { "MSINSEN", 0x20, 0x20 }
  1692. };
  1693. int
  1694. ahd_nsenable_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1695. {
  1696. return (ahd_print_register(NSENABLE_parse_table, 6, "NSENABLE",
  1697. 0x91, regvalue, cur_col, wrap));
  1698. }
  1699. static ahd_reg_parse_entry_t CMCRXMSG1_parse_table[] = {
  1700. { "CBNUM", 0xff, 0xff }
  1701. };
  1702. int
  1703. ahd_cmcrxmsg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1704. {
  1705. return (ahd_print_register(CMCRXMSG1_parse_table, 1, "CMCRXMSG1",
  1706. 0x91, regvalue, cur_col, wrap));
  1707. }
  1708. static ahd_reg_parse_entry_t DCHRXMSG1_parse_table[] = {
  1709. { "CBNUM", 0xff, 0xff }
  1710. };
  1711. int
  1712. ahd_dchrxmsg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1713. {
  1714. return (ahd_print_register(DCHRXMSG1_parse_table, 1, "DCHRXMSG1",
  1715. 0x91, regvalue, cur_col, wrap));
  1716. }
  1717. static ahd_reg_parse_entry_t DCHRXMSG2_parse_table[] = {
  1718. { "MINDEX", 0xff, 0xff }
  1719. };
  1720. int
  1721. ahd_dchrxmsg2_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1722. {
  1723. return (ahd_print_register(DCHRXMSG2_parse_table, 1, "DCHRXMSG2",
  1724. 0x92, regvalue, cur_col, wrap));
  1725. }
  1726. static ahd_reg_parse_entry_t CMCRXMSG2_parse_table[] = {
  1727. { "MINDEX", 0xff, 0xff }
  1728. };
  1729. int
  1730. ahd_cmcrxmsg2_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1731. {
  1732. return (ahd_print_register(CMCRXMSG2_parse_table, 1, "CMCRXMSG2",
  1733. 0x92, regvalue, cur_col, wrap));
  1734. }
  1735. int
  1736. ahd_ost_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1737. {
  1738. return (ahd_print_register(NULL, 0, "OST",
  1739. 0x92, regvalue, cur_col, wrap));
  1740. }
  1741. static ahd_reg_parse_entry_t OVLYRXMSG2_parse_table[] = {
  1742. { "MINDEX", 0xff, 0xff }
  1743. };
  1744. int
  1745. ahd_ovlyrxmsg2_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1746. {
  1747. return (ahd_print_register(OVLYRXMSG2_parse_table, 1, "OVLYRXMSG2",
  1748. 0x92, regvalue, cur_col, wrap));
  1749. }
  1750. static ahd_reg_parse_entry_t DCHRXMSG3_parse_table[] = {
  1751. { "MCLASS", 0x0f, 0x0f }
  1752. };
  1753. int
  1754. ahd_dchrxmsg3_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1755. {
  1756. return (ahd_print_register(DCHRXMSG3_parse_table, 1, "DCHRXMSG3",
  1757. 0x93, regvalue, cur_col, wrap));
  1758. }
  1759. static ahd_reg_parse_entry_t OVLYRXMSG3_parse_table[] = {
  1760. { "MCLASS", 0x0f, 0x0f }
  1761. };
  1762. int
  1763. ahd_ovlyrxmsg3_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1764. {
  1765. return (ahd_print_register(OVLYRXMSG3_parse_table, 1, "OVLYRXMSG3",
  1766. 0x93, regvalue, cur_col, wrap));
  1767. }
  1768. static ahd_reg_parse_entry_t CMCRXMSG3_parse_table[] = {
  1769. { "MCLASS", 0x0f, 0x0f }
  1770. };
  1771. int
  1772. ahd_cmcrxmsg3_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1773. {
  1774. return (ahd_print_register(CMCRXMSG3_parse_table, 1, "CMCRXMSG3",
  1775. 0x93, regvalue, cur_col, wrap));
  1776. }
  1777. static ahd_reg_parse_entry_t PCIXCTL_parse_table[] = {
  1778. { "CMPABCDIS", 0x01, 0x01 },
  1779. { "TSCSERREN", 0x02, 0x02 },
  1780. { "SRSPDPEEN", 0x04, 0x04 },
  1781. { "SPLTSTADIS", 0x08, 0x08 },
  1782. { "SPLTSMADIS", 0x10, 0x10 },
  1783. { "UNEXPSCIEN", 0x20, 0x20 },
  1784. { "SERRPULSE", 0x80, 0x80 }
  1785. };
  1786. int
  1787. ahd_pcixctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1788. {
  1789. return (ahd_print_register(PCIXCTL_parse_table, 7, "PCIXCTL",
  1790. 0x93, regvalue, cur_col, wrap));
  1791. }
  1792. int
  1793. ahd_ovlyseqbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1794. {
  1795. return (ahd_print_register(NULL, 0, "OVLYSEQBCNT",
  1796. 0x94, regvalue, cur_col, wrap));
  1797. }
  1798. int
  1799. ahd_dchseqbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1800. {
  1801. return (ahd_print_register(NULL, 0, "DCHSEQBCNT",
  1802. 0x94, regvalue, cur_col, wrap));
  1803. }
  1804. int
  1805. ahd_cmcseqbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1806. {
  1807. return (ahd_print_register(NULL, 0, "CMCSEQBCNT",
  1808. 0x94, regvalue, cur_col, wrap));
  1809. }
  1810. static ahd_reg_parse_entry_t CMCSPLTSTAT0_parse_table[] = {
  1811. { "RXSPLTRSP", 0x01, 0x01 },
  1812. { "RXSCEMSG", 0x02, 0x02 },
  1813. { "RXOVRUN", 0x04, 0x04 },
  1814. { "CNTNOTCMPLT", 0x08, 0x08 },
  1815. { "SCDATBUCKET", 0x10, 0x10 },
  1816. { "SCADERR", 0x20, 0x20 },
  1817. { "SCBCERR", 0x40, 0x40 },
  1818. { "STAETERM", 0x80, 0x80 }
  1819. };
  1820. int
  1821. ahd_cmcspltstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1822. {
  1823. return (ahd_print_register(CMCSPLTSTAT0_parse_table, 8, "CMCSPLTSTAT0",
  1824. 0x96, regvalue, cur_col, wrap));
  1825. }
  1826. static ahd_reg_parse_entry_t DCHSPLTSTAT0_parse_table[] = {
  1827. { "RXSPLTRSP", 0x01, 0x01 },
  1828. { "RXSCEMSG", 0x02, 0x02 },
  1829. { "RXOVRUN", 0x04, 0x04 },
  1830. { "CNTNOTCMPLT", 0x08, 0x08 },
  1831. { "SCDATBUCKET", 0x10, 0x10 },
  1832. { "SCADERR", 0x20, 0x20 },
  1833. { "SCBCERR", 0x40, 0x40 },
  1834. { "STAETERM", 0x80, 0x80 }
  1835. };
  1836. int
  1837. ahd_dchspltstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1838. {
  1839. return (ahd_print_register(DCHSPLTSTAT0_parse_table, 8, "DCHSPLTSTAT0",
  1840. 0x96, regvalue, cur_col, wrap));
  1841. }
  1842. static ahd_reg_parse_entry_t OVLYSPLTSTAT0_parse_table[] = {
  1843. { "RXSPLTRSP", 0x01, 0x01 },
  1844. { "RXSCEMSG", 0x02, 0x02 },
  1845. { "RXOVRUN", 0x04, 0x04 },
  1846. { "CNTNOTCMPLT", 0x08, 0x08 },
  1847. { "SCDATBUCKET", 0x10, 0x10 },
  1848. { "SCADERR", 0x20, 0x20 },
  1849. { "SCBCERR", 0x40, 0x40 },
  1850. { "STAETERM", 0x80, 0x80 }
  1851. };
  1852. int
  1853. ahd_ovlyspltstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1854. {
  1855. return (ahd_print_register(OVLYSPLTSTAT0_parse_table, 8, "OVLYSPLTSTAT0",
  1856. 0x96, regvalue, cur_col, wrap));
  1857. }
  1858. static ahd_reg_parse_entry_t CMCSPLTSTAT1_parse_table[] = {
  1859. { "RXDATABUCKET", 0x01, 0x01 }
  1860. };
  1861. int
  1862. ahd_cmcspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1863. {
  1864. return (ahd_print_register(CMCSPLTSTAT1_parse_table, 1, "CMCSPLTSTAT1",
  1865. 0x97, regvalue, cur_col, wrap));
  1866. }
  1867. static ahd_reg_parse_entry_t OVLYSPLTSTAT1_parse_table[] = {
  1868. { "RXDATABUCKET", 0x01, 0x01 }
  1869. };
  1870. int
  1871. ahd_ovlyspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1872. {
  1873. return (ahd_print_register(OVLYSPLTSTAT1_parse_table, 1, "OVLYSPLTSTAT1",
  1874. 0x97, regvalue, cur_col, wrap));
  1875. }
  1876. static ahd_reg_parse_entry_t DCHSPLTSTAT1_parse_table[] = {
  1877. { "RXDATABUCKET", 0x01, 0x01 }
  1878. };
  1879. int
  1880. ahd_dchspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1881. {
  1882. return (ahd_print_register(DCHSPLTSTAT1_parse_table, 1, "DCHSPLTSTAT1",
  1883. 0x97, regvalue, cur_col, wrap));
  1884. }
  1885. static ahd_reg_parse_entry_t SGRXMSG0_parse_table[] = {
  1886. { "CFNUM", 0x07, 0x07 },
  1887. { "CDNUM", 0xf8, 0xf8 }
  1888. };
  1889. int
  1890. ahd_sgrxmsg0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1891. {
  1892. return (ahd_print_register(SGRXMSG0_parse_table, 2, "SGRXMSG0",
  1893. 0x98, regvalue, cur_col, wrap));
  1894. }
  1895. static ahd_reg_parse_entry_t SLVSPLTOUTADR0_parse_table[] = {
  1896. { "LOWER_ADDR", 0x7f, 0x7f }
  1897. };
  1898. int
  1899. ahd_slvspltoutadr0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1900. {
  1901. return (ahd_print_register(SLVSPLTOUTADR0_parse_table, 1, "SLVSPLTOUTADR0",
  1902. 0x98, regvalue, cur_col, wrap));
  1903. }
  1904. static ahd_reg_parse_entry_t SGRXMSG1_parse_table[] = {
  1905. { "CBNUM", 0xff, 0xff }
  1906. };
  1907. int
  1908. ahd_sgrxmsg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1909. {
  1910. return (ahd_print_register(SGRXMSG1_parse_table, 1, "SGRXMSG1",
  1911. 0x99, regvalue, cur_col, wrap));
  1912. }
  1913. static ahd_reg_parse_entry_t SLVSPLTOUTADR1_parse_table[] = {
  1914. { "REQ_FNUM", 0x07, 0x07 },
  1915. { "REQ_DNUM", 0xf8, 0xf8 }
  1916. };
  1917. int
  1918. ahd_slvspltoutadr1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1919. {
  1920. return (ahd_print_register(SLVSPLTOUTADR1_parse_table, 2, "SLVSPLTOUTADR1",
  1921. 0x99, regvalue, cur_col, wrap));
  1922. }
  1923. static ahd_reg_parse_entry_t SGRXMSG2_parse_table[] = {
  1924. { "MINDEX", 0xff, 0xff }
  1925. };
  1926. int
  1927. ahd_sgrxmsg2_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1928. {
  1929. return (ahd_print_register(SGRXMSG2_parse_table, 1, "SGRXMSG2",
  1930. 0x9a, regvalue, cur_col, wrap));
  1931. }
  1932. static ahd_reg_parse_entry_t SLVSPLTOUTADR2_parse_table[] = {
  1933. { "REQ_BNUM", 0xff, 0xff }
  1934. };
  1935. int
  1936. ahd_slvspltoutadr2_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1937. {
  1938. return (ahd_print_register(SLVSPLTOUTADR2_parse_table, 1, "SLVSPLTOUTADR2",
  1939. 0x9a, regvalue, cur_col, wrap));
  1940. }
  1941. static ahd_reg_parse_entry_t SGRXMSG3_parse_table[] = {
  1942. { "MCLASS", 0x0f, 0x0f }
  1943. };
  1944. int
  1945. ahd_sgrxmsg3_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1946. {
  1947. return (ahd_print_register(SGRXMSG3_parse_table, 1, "SGRXMSG3",
  1948. 0x9b, regvalue, cur_col, wrap));
  1949. }
  1950. static ahd_reg_parse_entry_t SLVSPLTOUTADR3_parse_table[] = {
  1951. { "RLXORD", 0x10, 0x10 },
  1952. { "TAG_NUM", 0x1f, 0x1f }
  1953. };
  1954. int
  1955. ahd_slvspltoutadr3_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1956. {
  1957. return (ahd_print_register(SLVSPLTOUTADR3_parse_table, 2, "SLVSPLTOUTADR3",
  1958. 0x9b, regvalue, cur_col, wrap));
  1959. }
  1960. int
  1961. ahd_sgseqbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1962. {
  1963. return (ahd_print_register(NULL, 0, "SGSEQBCNT",
  1964. 0x9c, regvalue, cur_col, wrap));
  1965. }
  1966. static ahd_reg_parse_entry_t SLVSPLTOUTATTR0_parse_table[] = {
  1967. { "LOWER_BCNT", 0xff, 0xff }
  1968. };
  1969. int
  1970. ahd_slvspltoutattr0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1971. {
  1972. return (ahd_print_register(SLVSPLTOUTATTR0_parse_table, 1, "SLVSPLTOUTATTR0",
  1973. 0x9c, regvalue, cur_col, wrap));
  1974. }
  1975. static ahd_reg_parse_entry_t SLVSPLTOUTATTR1_parse_table[] = {
  1976. { "CMPLT_FNUM", 0x07, 0x07 },
  1977. { "CMPLT_DNUM", 0xf8, 0xf8 }
  1978. };
  1979. int
  1980. ahd_slvspltoutattr1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1981. {
  1982. return (ahd_print_register(SLVSPLTOUTATTR1_parse_table, 2, "SLVSPLTOUTATTR1",
  1983. 0x9d, regvalue, cur_col, wrap));
  1984. }
  1985. static ahd_reg_parse_entry_t SLVSPLTOUTATTR2_parse_table[] = {
  1986. { "CMPLT_BNUM", 0xff, 0xff }
  1987. };
  1988. int
  1989. ahd_slvspltoutattr2_print(u_int regvalue, u_int *cur_col, u_int wrap)
  1990. {
  1991. return (ahd_print_register(SLVSPLTOUTATTR2_parse_table, 1, "SLVSPLTOUTATTR2",
  1992. 0x9e, regvalue, cur_col, wrap));
  1993. }
  1994. static ahd_reg_parse_entry_t SGSPLTSTAT0_parse_table[] = {
  1995. { "RXSPLTRSP", 0x01, 0x01 },
  1996. { "RXSCEMSG", 0x02, 0x02 },
  1997. { "RXOVRUN", 0x04, 0x04 },
  1998. { "CNTNOTCMPLT", 0x08, 0x08 },
  1999. { "SCDATBUCKET", 0x10, 0x10 },
  2000. { "SCADERR", 0x20, 0x20 },
  2001. { "SCBCERR", 0x40, 0x40 },
  2002. { "STAETERM", 0x80, 0x80 }
  2003. };
  2004. int
  2005. ahd_sgspltstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2006. {
  2007. return (ahd_print_register(SGSPLTSTAT0_parse_table, 8, "SGSPLTSTAT0",
  2008. 0x9e, regvalue, cur_col, wrap));
  2009. }
  2010. static ahd_reg_parse_entry_t SGSPLTSTAT1_parse_table[] = {
  2011. { "RXDATABUCKET", 0x01, 0x01 }
  2012. };
  2013. int
  2014. ahd_sgspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2015. {
  2016. return (ahd_print_register(SGSPLTSTAT1_parse_table, 1, "SGSPLTSTAT1",
  2017. 0x9f, regvalue, cur_col, wrap));
  2018. }
  2019. static ahd_reg_parse_entry_t SFUNCT_parse_table[] = {
  2020. { "TEST_NUM", 0x0f, 0x0f },
  2021. { "TEST_GROUP", 0xf0, 0xf0 }
  2022. };
  2023. int
  2024. ahd_sfunct_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2025. {
  2026. return (ahd_print_register(SFUNCT_parse_table, 2, "SFUNCT",
  2027. 0x9f, regvalue, cur_col, wrap));
  2028. }
  2029. static ahd_reg_parse_entry_t DF0PCISTAT_parse_table[] = {
  2030. { "DPR", 0x01, 0x01 },
  2031. { "TWATERR", 0x02, 0x02 },
  2032. { "RDPERR", 0x04, 0x04 },
  2033. { "SCAAPERR", 0x08, 0x08 },
  2034. { "RTA", 0x10, 0x10 },
  2035. { "RMA", 0x20, 0x20 },
  2036. { "SSE", 0x40, 0x40 },
  2037. { "DPE", 0x80, 0x80 }
  2038. };
  2039. int
  2040. ahd_df0pcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2041. {
  2042. return (ahd_print_register(DF0PCISTAT_parse_table, 8, "DF0PCISTAT",
  2043. 0xa0, regvalue, cur_col, wrap));
  2044. }
  2045. int
  2046. ahd_reg0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2047. {
  2048. return (ahd_print_register(NULL, 0, "REG0",
  2049. 0xa0, regvalue, cur_col, wrap));
  2050. }
  2051. static ahd_reg_parse_entry_t DF1PCISTAT_parse_table[] = {
  2052. { "DPR", 0x01, 0x01 },
  2053. { "TWATERR", 0x02, 0x02 },
  2054. { "RDPERR", 0x04, 0x04 },
  2055. { "SCAAPERR", 0x08, 0x08 },
  2056. { "RTA", 0x10, 0x10 },
  2057. { "RMA", 0x20, 0x20 },
  2058. { "SSE", 0x40, 0x40 },
  2059. { "DPE", 0x80, 0x80 }
  2060. };
  2061. int
  2062. ahd_df1pcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2063. {
  2064. return (ahd_print_register(DF1PCISTAT_parse_table, 8, "DF1PCISTAT",
  2065. 0xa1, regvalue, cur_col, wrap));
  2066. }
  2067. static ahd_reg_parse_entry_t SGPCISTAT_parse_table[] = {
  2068. { "DPR", 0x01, 0x01 },
  2069. { "RDPERR", 0x04, 0x04 },
  2070. { "SCAAPERR", 0x08, 0x08 },
  2071. { "RTA", 0x10, 0x10 },
  2072. { "RMA", 0x20, 0x20 },
  2073. { "SSE", 0x40, 0x40 },
  2074. { "DPE", 0x80, 0x80 }
  2075. };
  2076. int
  2077. ahd_sgpcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2078. {
  2079. return (ahd_print_register(SGPCISTAT_parse_table, 7, "SGPCISTAT",
  2080. 0xa2, regvalue, cur_col, wrap));
  2081. }
  2082. int
  2083. ahd_reg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2084. {
  2085. return (ahd_print_register(NULL, 0, "REG1",
  2086. 0xa2, regvalue, cur_col, wrap));
  2087. }
  2088. static ahd_reg_parse_entry_t CMCPCISTAT_parse_table[] = {
  2089. { "DPR", 0x01, 0x01 },
  2090. { "TWATERR", 0x02, 0x02 },
  2091. { "RDPERR", 0x04, 0x04 },
  2092. { "SCAAPERR", 0x08, 0x08 },
  2093. { "RTA", 0x10, 0x10 },
  2094. { "RMA", 0x20, 0x20 },
  2095. { "SSE", 0x40, 0x40 },
  2096. { "DPE", 0x80, 0x80 }
  2097. };
  2098. int
  2099. ahd_cmcpcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2100. {
  2101. return (ahd_print_register(CMCPCISTAT_parse_table, 8, "CMCPCISTAT",
  2102. 0xa3, regvalue, cur_col, wrap));
  2103. }
  2104. static ahd_reg_parse_entry_t OVLYPCISTAT_parse_table[] = {
  2105. { "DPR", 0x01, 0x01 },
  2106. { "RDPERR", 0x04, 0x04 },
  2107. { "SCAAPERR", 0x08, 0x08 },
  2108. { "RTA", 0x10, 0x10 },
  2109. { "RMA", 0x20, 0x20 },
  2110. { "SSE", 0x40, 0x40 },
  2111. { "DPE", 0x80, 0x80 }
  2112. };
  2113. int
  2114. ahd_ovlypcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2115. {
  2116. return (ahd_print_register(OVLYPCISTAT_parse_table, 7, "OVLYPCISTAT",
  2117. 0xa4, regvalue, cur_col, wrap));
  2118. }
  2119. int
  2120. ahd_reg_isr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2121. {
  2122. return (ahd_print_register(NULL, 0, "REG_ISR",
  2123. 0xa4, regvalue, cur_col, wrap));
  2124. }
  2125. static ahd_reg_parse_entry_t SG_STATE_parse_table[] = {
  2126. { "SEGS_AVAIL", 0x01, 0x01 },
  2127. { "LOADING_NEEDED", 0x02, 0x02 },
  2128. { "FETCH_INPROG", 0x04, 0x04 }
  2129. };
  2130. int
  2131. ahd_sg_state_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2132. {
  2133. return (ahd_print_register(SG_STATE_parse_table, 3, "SG_STATE",
  2134. 0xa6, regvalue, cur_col, wrap));
  2135. }
  2136. static ahd_reg_parse_entry_t MSIPCISTAT_parse_table[] = {
  2137. { "DPR", 0x01, 0x01 },
  2138. { "TWATERR", 0x02, 0x02 },
  2139. { "CLRPENDMSI", 0x08, 0x08 },
  2140. { "RTA", 0x10, 0x10 },
  2141. { "RMA", 0x20, 0x20 },
  2142. { "SSE", 0x40, 0x40 }
  2143. };
  2144. int
  2145. ahd_msipcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2146. {
  2147. return (ahd_print_register(MSIPCISTAT_parse_table, 6, "MSIPCISTAT",
  2148. 0xa6, regvalue, cur_col, wrap));
  2149. }
  2150. static ahd_reg_parse_entry_t TARGPCISTAT_parse_table[] = {
  2151. { "TWATERR", 0x02, 0x02 },
  2152. { "STA", 0x08, 0x08 },
  2153. { "SSE", 0x40, 0x40 },
  2154. { "DPE", 0x80, 0x80 }
  2155. };
  2156. int
  2157. ahd_targpcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2158. {
  2159. return (ahd_print_register(TARGPCISTAT_parse_table, 4, "TARGPCISTAT",
  2160. 0xa7, regvalue, cur_col, wrap));
  2161. }
  2162. int
  2163. ahd_data_count_odd_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2164. {
  2165. return (ahd_print_register(NULL, 0, "DATA_COUNT_ODD",
  2166. 0xa7, regvalue, cur_col, wrap));
  2167. }
  2168. int
  2169. ahd_scbptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2170. {
  2171. return (ahd_print_register(NULL, 0, "SCBPTR",
  2172. 0xa8, regvalue, cur_col, wrap));
  2173. }
  2174. int
  2175. ahd_ccscbacnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2176. {
  2177. return (ahd_print_register(NULL, 0, "CCSCBACNT",
  2178. 0xab, regvalue, cur_col, wrap));
  2179. }
  2180. static ahd_reg_parse_entry_t SCBAUTOPTR_parse_table[] = {
  2181. { "SCBPTR_OFF", 0x07, 0x07 },
  2182. { "SCBPTR_ADDR", 0x38, 0x38 },
  2183. { "AUSCBPTR_EN", 0x80, 0x80 }
  2184. };
  2185. int
  2186. ahd_scbautoptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2187. {
  2188. return (ahd_print_register(SCBAUTOPTR_parse_table, 3, "SCBAUTOPTR",
  2189. 0xab, regvalue, cur_col, wrap));
  2190. }
  2191. int
  2192. ahd_ccsgaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2193. {
  2194. return (ahd_print_register(NULL, 0, "CCSGADDR",
  2195. 0xac, regvalue, cur_col, wrap));
  2196. }
  2197. int
  2198. ahd_ccscbadr_bk_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2199. {
  2200. return (ahd_print_register(NULL, 0, "CCSCBADR_BK",
  2201. 0xac, regvalue, cur_col, wrap));
  2202. }
  2203. int
  2204. ahd_ccscbaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2205. {
  2206. return (ahd_print_register(NULL, 0, "CCSCBADDR",
  2207. 0xac, regvalue, cur_col, wrap));
  2208. }
  2209. static ahd_reg_parse_entry_t CMC_RAMBIST_parse_table[] = {
  2210. { "CMC_BUFFER_BIST_EN", 0x01, 0x01 },
  2211. { "CMC_BUFFER_BIST_FAIL",0x02, 0x02 },
  2212. { "SG_BIST_EN", 0x10, 0x10 },
  2213. { "SG_BIST_FAIL", 0x20, 0x20 },
  2214. { "SCBRAMBIST_FAIL", 0x40, 0x40 },
  2215. { "SG_ELEMENT_SIZE", 0x80, 0x80 }
  2216. };
  2217. int
  2218. ahd_cmc_rambist_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2219. {
  2220. return (ahd_print_register(CMC_RAMBIST_parse_table, 6, "CMC_RAMBIST",
  2221. 0xad, regvalue, cur_col, wrap));
  2222. }
  2223. static ahd_reg_parse_entry_t CCSCBCTL_parse_table[] = {
  2224. { "CCSCBRESET", 0x01, 0x01 },
  2225. { "CCSCBDIR", 0x04, 0x04 },
  2226. { "CCSCBEN", 0x08, 0x08 },
  2227. { "CCARREN", 0x10, 0x10 },
  2228. { "ARRDONE", 0x40, 0x40 },
  2229. { "CCSCBDONE", 0x80, 0x80 }
  2230. };
  2231. int
  2232. ahd_ccscbctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2233. {
  2234. return (ahd_print_register(CCSCBCTL_parse_table, 6, "CCSCBCTL",
  2235. 0xad, regvalue, cur_col, wrap));
  2236. }
  2237. static ahd_reg_parse_entry_t CCSGCTL_parse_table[] = {
  2238. { "CCSGRESET", 0x01, 0x01 },
  2239. { "SG_FETCH_REQ", 0x02, 0x02 },
  2240. { "CCSGENACK", 0x08, 0x08 },
  2241. { "SG_CACHE_AVAIL", 0x10, 0x10 },
  2242. { "CCSGDONE", 0x80, 0x80 },
  2243. { "CCSGEN", 0x0c, 0x0c }
  2244. };
  2245. int
  2246. ahd_ccsgctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2247. {
  2248. return (ahd_print_register(CCSGCTL_parse_table, 6, "CCSGCTL",
  2249. 0xad, regvalue, cur_col, wrap));
  2250. }
  2251. int
  2252. ahd_ccsgram_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2253. {
  2254. return (ahd_print_register(NULL, 0, "CCSGRAM",
  2255. 0xb0, regvalue, cur_col, wrap));
  2256. }
  2257. int
  2258. ahd_flexadr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2259. {
  2260. return (ahd_print_register(NULL, 0, "FLEXADR",
  2261. 0xb0, regvalue, cur_col, wrap));
  2262. }
  2263. int
  2264. ahd_ccscbram_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2265. {
  2266. return (ahd_print_register(NULL, 0, "CCSCBRAM",
  2267. 0xb0, regvalue, cur_col, wrap));
  2268. }
  2269. int
  2270. ahd_flexcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2271. {
  2272. return (ahd_print_register(NULL, 0, "FLEXCNT",
  2273. 0xb3, regvalue, cur_col, wrap));
  2274. }
  2275. static ahd_reg_parse_entry_t FLEXDMASTAT_parse_table[] = {
  2276. { "FLEXDMADONE", 0x01, 0x01 },
  2277. { "FLEXDMAERR", 0x02, 0x02 }
  2278. };
  2279. int
  2280. ahd_flexdmastat_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2281. {
  2282. return (ahd_print_register(FLEXDMASTAT_parse_table, 2, "FLEXDMASTAT",
  2283. 0xb5, regvalue, cur_col, wrap));
  2284. }
  2285. int
  2286. ahd_flexdata_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2287. {
  2288. return (ahd_print_register(NULL, 0, "FLEXDATA",
  2289. 0xb6, regvalue, cur_col, wrap));
  2290. }
  2291. int
  2292. ahd_brddat_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2293. {
  2294. return (ahd_print_register(NULL, 0, "BRDDAT",
  2295. 0xb8, regvalue, cur_col, wrap));
  2296. }
  2297. static ahd_reg_parse_entry_t BRDCTL_parse_table[] = {
  2298. { "BRDSTB", 0x01, 0x01 },
  2299. { "BRDRW", 0x02, 0x02 },
  2300. { "BRDEN", 0x04, 0x04 },
  2301. { "BRDADDR", 0x38, 0x38 },
  2302. { "FLXARBREQ", 0x40, 0x40 },
  2303. { "FLXARBACK", 0x80, 0x80 }
  2304. };
  2305. int
  2306. ahd_brdctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2307. {
  2308. return (ahd_print_register(BRDCTL_parse_table, 6, "BRDCTL",
  2309. 0xb9, regvalue, cur_col, wrap));
  2310. }
  2311. int
  2312. ahd_seeadr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2313. {
  2314. return (ahd_print_register(NULL, 0, "SEEADR",
  2315. 0xba, regvalue, cur_col, wrap));
  2316. }
  2317. int
  2318. ahd_seedat_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2319. {
  2320. return (ahd_print_register(NULL, 0, "SEEDAT",
  2321. 0xbc, regvalue, cur_col, wrap));
  2322. }
  2323. static ahd_reg_parse_entry_t SEECTL_parse_table[] = {
  2324. { "SEEOP_ERAL", 0x40, 0x70 },
  2325. { "SEEOP_WRITE", 0x50, 0x70 },
  2326. { "SEEOP_READ", 0x60, 0x70 },
  2327. { "SEEOP_ERASE", 0x70, 0x70 },
  2328. { "SEESTART", 0x01, 0x01 },
  2329. { "SEERST", 0x02, 0x02 },
  2330. { "SEEOPCODE", 0x70, 0x70 },
  2331. { "SEEOP_EWEN", 0x40, 0x40 },
  2332. { "SEEOP_WALL", 0x40, 0x40 },
  2333. { "SEEOP_EWDS", 0x40, 0x40 }
  2334. };
  2335. int
  2336. ahd_seectl_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2337. {
  2338. return (ahd_print_register(SEECTL_parse_table, 10, "SEECTL",
  2339. 0xbe, regvalue, cur_col, wrap));
  2340. }
  2341. static ahd_reg_parse_entry_t SEESTAT_parse_table[] = {
  2342. { "SEESTART", 0x01, 0x01 },
  2343. { "SEEBUSY", 0x02, 0x02 },
  2344. { "SEEARBACK", 0x04, 0x04 },
  2345. { "LDALTID_L", 0x08, 0x08 },
  2346. { "SEEOPCODE", 0x70, 0x70 },
  2347. { "INIT_DONE", 0x80, 0x80 }
  2348. };
  2349. int
  2350. ahd_seestat_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2351. {
  2352. return (ahd_print_register(SEESTAT_parse_table, 6, "SEESTAT",
  2353. 0xbe, regvalue, cur_col, wrap));
  2354. }
  2355. int
  2356. ahd_scbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2357. {
  2358. return (ahd_print_register(NULL, 0, "SCBCNT",
  2359. 0xbf, regvalue, cur_col, wrap));
  2360. }
  2361. int
  2362. ahd_dfwaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2363. {
  2364. return (ahd_print_register(NULL, 0, "DFWADDR",
  2365. 0xc0, regvalue, cur_col, wrap));
  2366. }
  2367. static ahd_reg_parse_entry_t DSPFLTRCTL_parse_table[] = {
  2368. { "DSPFCNTSEL", 0x0f, 0x0f },
  2369. { "EDGESENSE", 0x10, 0x10 },
  2370. { "FLTRDISABLE", 0x20, 0x20 }
  2371. };
  2372. int
  2373. ahd_dspfltrctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2374. {
  2375. return (ahd_print_register(DSPFLTRCTL_parse_table, 3, "DSPFLTRCTL",
  2376. 0xc0, regvalue, cur_col, wrap));
  2377. }
  2378. static ahd_reg_parse_entry_t DSPDATACTL_parse_table[] = {
  2379. { "XMITOFFSTDIS", 0x02, 0x02 },
  2380. { "RCVROFFSTDIS", 0x04, 0x04 },
  2381. { "DESQDIS", 0x10, 0x10 },
  2382. { "BYPASSENAB", 0x80, 0x80 }
  2383. };
  2384. int
  2385. ahd_dspdatactl_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2386. {
  2387. return (ahd_print_register(DSPDATACTL_parse_table, 4, "DSPDATACTL",
  2388. 0xc1, regvalue, cur_col, wrap));
  2389. }
  2390. int
  2391. ahd_dfraddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2392. {
  2393. return (ahd_print_register(NULL, 0, "DFRADDR",
  2394. 0xc2, regvalue, cur_col, wrap));
  2395. }
  2396. static ahd_reg_parse_entry_t DSPREQCTL_parse_table[] = {
  2397. { "MANREQDLY", 0x3f, 0x3f },
  2398. { "MANREQCTL", 0xc0, 0xc0 }
  2399. };
  2400. int
  2401. ahd_dspreqctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2402. {
  2403. return (ahd_print_register(DSPREQCTL_parse_table, 2, "DSPREQCTL",
  2404. 0xc2, regvalue, cur_col, wrap));
  2405. }
  2406. static ahd_reg_parse_entry_t DSPACKCTL_parse_table[] = {
  2407. { "MANACKDLY", 0x3f, 0x3f },
  2408. { "MANACKCTL", 0xc0, 0xc0 }
  2409. };
  2410. int
  2411. ahd_dspackctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2412. {
  2413. return (ahd_print_register(DSPACKCTL_parse_table, 2, "DSPACKCTL",
  2414. 0xc3, regvalue, cur_col, wrap));
  2415. }
  2416. int
  2417. ahd_dfdat_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2418. {
  2419. return (ahd_print_register(NULL, 0, "DFDAT",
  2420. 0xc4, regvalue, cur_col, wrap));
  2421. }
  2422. static ahd_reg_parse_entry_t DSPSELECT_parse_table[] = {
  2423. { "DSPSEL", 0x1f, 0x1f },
  2424. { "AUTOINCEN", 0x80, 0x80 }
  2425. };
  2426. int
  2427. ahd_dspselect_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2428. {
  2429. return (ahd_print_register(DSPSELECT_parse_table, 2, "DSPSELECT",
  2430. 0xc4, regvalue, cur_col, wrap));
  2431. }
  2432. static ahd_reg_parse_entry_t WRTBIASCTL_parse_table[] = {
  2433. { "XMITMANVAL", 0x3f, 0x3f },
  2434. { "AUTOXBCDIS", 0x80, 0x80 }
  2435. };
  2436. int
  2437. ahd_wrtbiasctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2438. {
  2439. return (ahd_print_register(WRTBIASCTL_parse_table, 2, "WRTBIASCTL",
  2440. 0xc5, regvalue, cur_col, wrap));
  2441. }
  2442. static ahd_reg_parse_entry_t RCVRBIOSCTL_parse_table[] = {
  2443. { "RCVRMANVAL", 0x3f, 0x3f },
  2444. { "AUTORBCDIS", 0x80, 0x80 }
  2445. };
  2446. int
  2447. ahd_rcvrbiosctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2448. {
  2449. return (ahd_print_register(RCVRBIOSCTL_parse_table, 2, "RCVRBIOSCTL",
  2450. 0xc6, regvalue, cur_col, wrap));
  2451. }
  2452. int
  2453. ahd_wrtbiascalc_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2454. {
  2455. return (ahd_print_register(NULL, 0, "WRTBIASCALC",
  2456. 0xc7, regvalue, cur_col, wrap));
  2457. }
  2458. int
  2459. ahd_rcvrbiascalc_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2460. {
  2461. return (ahd_print_register(NULL, 0, "RCVRBIASCALC",
  2462. 0xc8, regvalue, cur_col, wrap));
  2463. }
  2464. int
  2465. ahd_dfptrs_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2466. {
  2467. return (ahd_print_register(NULL, 0, "DFPTRS",
  2468. 0xc8, regvalue, cur_col, wrap));
  2469. }
  2470. int
  2471. ahd_skewcalc_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2472. {
  2473. return (ahd_print_register(NULL, 0, "SKEWCALC",
  2474. 0xc9, regvalue, cur_col, wrap));
  2475. }
  2476. int
  2477. ahd_dfbkptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2478. {
  2479. return (ahd_print_register(NULL, 0, "DFBKPTR",
  2480. 0xc9, regvalue, cur_col, wrap));
  2481. }
  2482. static ahd_reg_parse_entry_t DFDBCTL_parse_table[] = {
  2483. { "DFF_RAMBIST_EN", 0x01, 0x01 },
  2484. { "DFF_RAMBIST_DONE", 0x02, 0x02 },
  2485. { "DFF_RAMBIST_FAIL", 0x04, 0x04 },
  2486. { "DFF_DIR_ERR", 0x08, 0x08 },
  2487. { "DFF_CIO_RD_RDY", 0x10, 0x10 },
  2488. { "DFF_CIO_WR_RDY", 0x20, 0x20 }
  2489. };
  2490. int
  2491. ahd_dfdbctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2492. {
  2493. return (ahd_print_register(DFDBCTL_parse_table, 6, "DFDBCTL",
  2494. 0xcb, regvalue, cur_col, wrap));
  2495. }
  2496. int
  2497. ahd_dfscnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2498. {
  2499. return (ahd_print_register(NULL, 0, "DFSCNT",
  2500. 0xcc, regvalue, cur_col, wrap));
  2501. }
  2502. int
  2503. ahd_dfbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2504. {
  2505. return (ahd_print_register(NULL, 0, "DFBCNT",
  2506. 0xce, regvalue, cur_col, wrap));
  2507. }
  2508. int
  2509. ahd_ovlyaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2510. {
  2511. return (ahd_print_register(NULL, 0, "OVLYADDR",
  2512. 0xd4, regvalue, cur_col, wrap));
  2513. }
  2514. static ahd_reg_parse_entry_t SEQCTL0_parse_table[] = {
  2515. { "LOADRAM", 0x01, 0x01 },
  2516. { "SEQRESET", 0x02, 0x02 },
  2517. { "STEP", 0x04, 0x04 },
  2518. { "BRKADRINTEN", 0x08, 0x08 },
  2519. { "FASTMODE", 0x10, 0x10 },
  2520. { "FAILDIS", 0x20, 0x20 },
  2521. { "PAUSEDIS", 0x40, 0x40 },
  2522. { "PERRORDIS", 0x80, 0x80 }
  2523. };
  2524. int
  2525. ahd_seqctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2526. {
  2527. return (ahd_print_register(SEQCTL0_parse_table, 8, "SEQCTL0",
  2528. 0xd6, regvalue, cur_col, wrap));
  2529. }
  2530. static ahd_reg_parse_entry_t SEQCTL1_parse_table[] = {
  2531. { "RAMBIST_EN", 0x01, 0x01 },
  2532. { "RAMBIST_FAIL", 0x02, 0x02 },
  2533. { "RAMBIST_DONE", 0x04, 0x04 },
  2534. { "OVRLAY_DATA_CHK", 0x08, 0x08 }
  2535. };
  2536. int
  2537. ahd_seqctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2538. {
  2539. return (ahd_print_register(SEQCTL1_parse_table, 4, "SEQCTL1",
  2540. 0xd7, regvalue, cur_col, wrap));
  2541. }
  2542. static ahd_reg_parse_entry_t FLAGS_parse_table[] = {
  2543. { "CARRY", 0x01, 0x01 },
  2544. { "ZERO", 0x02, 0x02 }
  2545. };
  2546. int
  2547. ahd_flags_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2548. {
  2549. return (ahd_print_register(FLAGS_parse_table, 2, "FLAGS",
  2550. 0xd8, regvalue, cur_col, wrap));
  2551. }
  2552. static ahd_reg_parse_entry_t SEQINTCTL_parse_table[] = {
  2553. { "IRET", 0x01, 0x01 },
  2554. { "INTMASK1", 0x02, 0x02 },
  2555. { "INTMASK2", 0x04, 0x04 },
  2556. { "SCS_SEQ_INT1M0", 0x08, 0x08 },
  2557. { "SCS_SEQ_INT1M1", 0x10, 0x10 },
  2558. { "INT1_CONTEXT", 0x20, 0x20 },
  2559. { "INTVEC1DSL", 0x80, 0x80 }
  2560. };
  2561. int
  2562. ahd_seqintctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2563. {
  2564. return (ahd_print_register(SEQINTCTL_parse_table, 7, "SEQINTCTL",
  2565. 0xd9, regvalue, cur_col, wrap));
  2566. }
  2567. int
  2568. ahd_seqram_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2569. {
  2570. return (ahd_print_register(NULL, 0, "SEQRAM",
  2571. 0xda, regvalue, cur_col, wrap));
  2572. }
  2573. int
  2574. ahd_prgmcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2575. {
  2576. return (ahd_print_register(NULL, 0, "PRGMCNT",
  2577. 0xde, regvalue, cur_col, wrap));
  2578. }
  2579. int
  2580. ahd_accum_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2581. {
  2582. return (ahd_print_register(NULL, 0, "ACCUM",
  2583. 0xe0, regvalue, cur_col, wrap));
  2584. }
  2585. int
  2586. ahd_sindex_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2587. {
  2588. return (ahd_print_register(NULL, 0, "SINDEX",
  2589. 0xe2, regvalue, cur_col, wrap));
  2590. }
  2591. int
  2592. ahd_dindex_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2593. {
  2594. return (ahd_print_register(NULL, 0, "DINDEX",
  2595. 0xe4, regvalue, cur_col, wrap));
  2596. }
  2597. int
  2598. ahd_brkaddr0_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2599. {
  2600. return (ahd_print_register(NULL, 0, "BRKADDR0",
  2601. 0xe6, regvalue, cur_col, wrap));
  2602. }
  2603. static ahd_reg_parse_entry_t BRKADDR1_parse_table[] = {
  2604. { "BRKDIS", 0x80, 0x80 }
  2605. };
  2606. int
  2607. ahd_brkaddr1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2608. {
  2609. return (ahd_print_register(BRKADDR1_parse_table, 1, "BRKADDR1",
  2610. 0xe6, regvalue, cur_col, wrap));
  2611. }
  2612. int
  2613. ahd_allones_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2614. {
  2615. return (ahd_print_register(NULL, 0, "ALLONES",
  2616. 0xe8, regvalue, cur_col, wrap));
  2617. }
  2618. int
  2619. ahd_allzeros_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2620. {
  2621. return (ahd_print_register(NULL, 0, "ALLZEROS",
  2622. 0xea, regvalue, cur_col, wrap));
  2623. }
  2624. int
  2625. ahd_none_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2626. {
  2627. return (ahd_print_register(NULL, 0, "NONE",
  2628. 0xea, regvalue, cur_col, wrap));
  2629. }
  2630. int
  2631. ahd_sindir_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2632. {
  2633. return (ahd_print_register(NULL, 0, "SINDIR",
  2634. 0xec, regvalue, cur_col, wrap));
  2635. }
  2636. int
  2637. ahd_dindir_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2638. {
  2639. return (ahd_print_register(NULL, 0, "DINDIR",
  2640. 0xed, regvalue, cur_col, wrap));
  2641. }
  2642. int
  2643. ahd_function1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2644. {
  2645. return (ahd_print_register(NULL, 0, "FUNCTION1",
  2646. 0xf0, regvalue, cur_col, wrap));
  2647. }
  2648. int
  2649. ahd_stack_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2650. {
  2651. return (ahd_print_register(NULL, 0, "STACK",
  2652. 0xf2, regvalue, cur_col, wrap));
  2653. }
  2654. int
  2655. ahd_intvec1_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2656. {
  2657. return (ahd_print_register(NULL, 0, "INTVEC1_ADDR",
  2658. 0xf4, regvalue, cur_col, wrap));
  2659. }
  2660. int
  2661. ahd_curaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2662. {
  2663. return (ahd_print_register(NULL, 0, "CURADDR",
  2664. 0xf4, regvalue, cur_col, wrap));
  2665. }
  2666. int
  2667. ahd_lastaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2668. {
  2669. return (ahd_print_register(NULL, 0, "LASTADDR",
  2670. 0xf6, regvalue, cur_col, wrap));
  2671. }
  2672. int
  2673. ahd_intvec2_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2674. {
  2675. return (ahd_print_register(NULL, 0, "INTVEC2_ADDR",
  2676. 0xf6, regvalue, cur_col, wrap));
  2677. }
  2678. int
  2679. ahd_longjmp_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2680. {
  2681. return (ahd_print_register(NULL, 0, "LONGJMP_ADDR",
  2682. 0xf8, regvalue, cur_col, wrap));
  2683. }
  2684. int
  2685. ahd_accum_save_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2686. {
  2687. return (ahd_print_register(NULL, 0, "ACCUM_SAVE",
  2688. 0xfa, regvalue, cur_col, wrap));
  2689. }
  2690. int
  2691. ahd_waiting_scb_tails_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2692. {
  2693. return (ahd_print_register(NULL, 0, "WAITING_SCB_TAILS",
  2694. 0x100, regvalue, cur_col, wrap));
  2695. }
  2696. int
  2697. ahd_ahd_pci_config_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2698. {
  2699. return (ahd_print_register(NULL, 0, "AHD_PCI_CONFIG_BASE",
  2700. 0x100, regvalue, cur_col, wrap));
  2701. }
  2702. int
  2703. ahd_sram_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2704. {
  2705. return (ahd_print_register(NULL, 0, "SRAM_BASE",
  2706. 0x100, regvalue, cur_col, wrap));
  2707. }
  2708. int
  2709. ahd_waiting_tid_head_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2710. {
  2711. return (ahd_print_register(NULL, 0, "WAITING_TID_HEAD",
  2712. 0x120, regvalue, cur_col, wrap));
  2713. }
  2714. int
  2715. ahd_waiting_tid_tail_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2716. {
  2717. return (ahd_print_register(NULL, 0, "WAITING_TID_TAIL",
  2718. 0x122, regvalue, cur_col, wrap));
  2719. }
  2720. int
  2721. ahd_next_queued_scb_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2722. {
  2723. return (ahd_print_register(NULL, 0, "NEXT_QUEUED_SCB_ADDR",
  2724. 0x124, regvalue, cur_col, wrap));
  2725. }
  2726. int
  2727. ahd_complete_scb_head_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2728. {
  2729. return (ahd_print_register(NULL, 0, "COMPLETE_SCB_HEAD",
  2730. 0x128, regvalue, cur_col, wrap));
  2731. }
  2732. int
  2733. ahd_complete_scb_dmainprog_head_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2734. {
  2735. return (ahd_print_register(NULL, 0, "COMPLETE_SCB_DMAINPROG_HEAD",
  2736. 0x12a, regvalue, cur_col, wrap));
  2737. }
  2738. int
  2739. ahd_complete_dma_scb_head_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2740. {
  2741. return (ahd_print_register(NULL, 0, "COMPLETE_DMA_SCB_HEAD",
  2742. 0x12c, regvalue, cur_col, wrap));
  2743. }
  2744. int
  2745. ahd_complete_dma_scb_tail_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2746. {
  2747. return (ahd_print_register(NULL, 0, "COMPLETE_DMA_SCB_TAIL",
  2748. 0x12e, regvalue, cur_col, wrap));
  2749. }
  2750. int
  2751. ahd_complete_on_qfreeze_head_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2752. {
  2753. return (ahd_print_register(NULL, 0, "COMPLETE_ON_QFREEZE_HEAD",
  2754. 0x130, regvalue, cur_col, wrap));
  2755. }
  2756. int
  2757. ahd_qfreeze_count_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2758. {
  2759. return (ahd_print_register(NULL, 0, "QFREEZE_COUNT",
  2760. 0x132, regvalue, cur_col, wrap));
  2761. }
  2762. int
  2763. ahd_kernel_qfreeze_count_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2764. {
  2765. return (ahd_print_register(NULL, 0, "KERNEL_QFREEZE_COUNT",
  2766. 0x134, regvalue, cur_col, wrap));
  2767. }
  2768. int
  2769. ahd_saved_mode_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2770. {
  2771. return (ahd_print_register(NULL, 0, "SAVED_MODE",
  2772. 0x136, regvalue, cur_col, wrap));
  2773. }
  2774. int
  2775. ahd_msg_out_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2776. {
  2777. return (ahd_print_register(NULL, 0, "MSG_OUT",
  2778. 0x137, regvalue, cur_col, wrap));
  2779. }
  2780. static ahd_reg_parse_entry_t DMAPARAMS_parse_table[] = {
  2781. { "FIFORESET", 0x01, 0x01 },
  2782. { "FIFOFLUSH", 0x02, 0x02 },
  2783. { "DIRECTION", 0x04, 0x04 },
  2784. { "HDMAEN", 0x08, 0x08 },
  2785. { "HDMAENACK", 0x08, 0x08 },
  2786. { "SDMAEN", 0x10, 0x10 },
  2787. { "SDMAENACK", 0x10, 0x10 },
  2788. { "SCSIEN", 0x20, 0x20 },
  2789. { "WIDEODD", 0x40, 0x40 },
  2790. { "PRELOADEN", 0x80, 0x80 }
  2791. };
  2792. int
  2793. ahd_dmaparams_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2794. {
  2795. return (ahd_print_register(DMAPARAMS_parse_table, 10, "DMAPARAMS",
  2796. 0x138, regvalue, cur_col, wrap));
  2797. }
  2798. static ahd_reg_parse_entry_t SEQ_FLAGS_parse_table[] = {
  2799. { "NO_DISCONNECT", 0x01, 0x01 },
  2800. { "SPHASE_PENDING", 0x02, 0x02 },
  2801. { "DPHASE_PENDING", 0x04, 0x04 },
  2802. { "CMDPHASE_PENDING", 0x08, 0x08 },
  2803. { "TARG_CMD_PENDING", 0x10, 0x10 },
  2804. { "DPHASE", 0x20, 0x20 },
  2805. { "NO_CDB_SENT", 0x40, 0x40 },
  2806. { "TARGET_CMD_IS_TAGGED",0x40, 0x40 },
  2807. { "NOT_IDENTIFIED", 0x80, 0x80 }
  2808. };
  2809. int
  2810. ahd_seq_flags_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2811. {
  2812. return (ahd_print_register(SEQ_FLAGS_parse_table, 9, "SEQ_FLAGS",
  2813. 0x139, regvalue, cur_col, wrap));
  2814. }
  2815. int
  2816. ahd_saved_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2817. {
  2818. return (ahd_print_register(NULL, 0, "SAVED_SCSIID",
  2819. 0x13a, regvalue, cur_col, wrap));
  2820. }
  2821. int
  2822. ahd_saved_lun_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2823. {
  2824. return (ahd_print_register(NULL, 0, "SAVED_LUN",
  2825. 0x13b, regvalue, cur_col, wrap));
  2826. }
  2827. static ahd_reg_parse_entry_t LASTPHASE_parse_table[] = {
  2828. { "P_DATAOUT", 0x00, 0xe0 },
  2829. { "P_DATAOUT_DT", 0x20, 0xe0 },
  2830. { "P_DATAIN", 0x40, 0xe0 },
  2831. { "P_DATAIN_DT", 0x60, 0xe0 },
  2832. { "P_COMMAND", 0x80, 0xe0 },
  2833. { "P_MESGOUT", 0xa0, 0xe0 },
  2834. { "P_STATUS", 0xc0, 0xe0 },
  2835. { "P_MESGIN", 0xe0, 0xe0 },
  2836. { "P_BUSFREE", 0x01, 0x01 },
  2837. { "MSGI", 0x20, 0x20 },
  2838. { "IOI", 0x40, 0x40 },
  2839. { "CDI", 0x80, 0x80 },
  2840. { "PHASE_MASK", 0xe0, 0xe0 }
  2841. };
  2842. int
  2843. ahd_lastphase_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2844. {
  2845. return (ahd_print_register(LASTPHASE_parse_table, 13, "LASTPHASE",
  2846. 0x13c, regvalue, cur_col, wrap));
  2847. }
  2848. int
  2849. ahd_qoutfifo_entry_valid_tag_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2850. {
  2851. return (ahd_print_register(NULL, 0, "QOUTFIFO_ENTRY_VALID_TAG",
  2852. 0x13d, regvalue, cur_col, wrap));
  2853. }
  2854. int
  2855. ahd_kernel_tqinpos_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2856. {
  2857. return (ahd_print_register(NULL, 0, "KERNEL_TQINPOS",
  2858. 0x13e, regvalue, cur_col, wrap));
  2859. }
  2860. int
  2861. ahd_tqinpos_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2862. {
  2863. return (ahd_print_register(NULL, 0, "TQINPOS",
  2864. 0x13f, regvalue, cur_col, wrap));
  2865. }
  2866. int
  2867. ahd_shared_data_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2868. {
  2869. return (ahd_print_register(NULL, 0, "SHARED_DATA_ADDR",
  2870. 0x140, regvalue, cur_col, wrap));
  2871. }
  2872. int
  2873. ahd_qoutfifo_next_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2874. {
  2875. return (ahd_print_register(NULL, 0, "QOUTFIFO_NEXT_ADDR",
  2876. 0x144, regvalue, cur_col, wrap));
  2877. }
  2878. static ahd_reg_parse_entry_t ARG_1_parse_table[] = {
  2879. { "CONT_MSG_LOOP_TARG", 0x02, 0x02 },
  2880. { "CONT_MSG_LOOP_READ", 0x03, 0x03 },
  2881. { "CONT_MSG_LOOP_WRITE",0x04, 0x04 },
  2882. { "EXIT_MSG_LOOP", 0x08, 0x08 },
  2883. { "MSGOUT_PHASEMIS", 0x10, 0x10 },
  2884. { "SEND_REJ", 0x20, 0x20 },
  2885. { "SEND_SENSE", 0x40, 0x40 },
  2886. { "SEND_MSG", 0x80, 0x80 }
  2887. };
  2888. int
  2889. ahd_arg_1_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2890. {
  2891. return (ahd_print_register(ARG_1_parse_table, 8, "ARG_1",
  2892. 0x148, regvalue, cur_col, wrap));
  2893. }
  2894. int
  2895. ahd_arg_2_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2896. {
  2897. return (ahd_print_register(NULL, 0, "ARG_2",
  2898. 0x149, regvalue, cur_col, wrap));
  2899. }
  2900. int
  2901. ahd_last_msg_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2902. {
  2903. return (ahd_print_register(NULL, 0, "LAST_MSG",
  2904. 0x14a, regvalue, cur_col, wrap));
  2905. }
  2906. static ahd_reg_parse_entry_t SCSISEQ_TEMPLATE_parse_table[] = {
  2907. { "ALTSTIM", 0x01, 0x01 },
  2908. { "ENAUTOATNP", 0x02, 0x02 },
  2909. { "MANUALP", 0x0c, 0x0c },
  2910. { "ENRSELI", 0x10, 0x10 },
  2911. { "ENSELI", 0x20, 0x20 },
  2912. { "MANUALCTL", 0x40, 0x40 }
  2913. };
  2914. int
  2915. ahd_scsiseq_template_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2916. {
  2917. return (ahd_print_register(SCSISEQ_TEMPLATE_parse_table, 6, "SCSISEQ_TEMPLATE",
  2918. 0x14b, regvalue, cur_col, wrap));
  2919. }
  2920. int
  2921. ahd_initiator_tag_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2922. {
  2923. return (ahd_print_register(NULL, 0, "INITIATOR_TAG",
  2924. 0x14c, regvalue, cur_col, wrap));
  2925. }
  2926. static ahd_reg_parse_entry_t SEQ_FLAGS2_parse_table[] = {
  2927. { "PENDING_MK_MESSAGE", 0x01, 0x01 },
  2928. { "TARGET_MSG_PENDING", 0x02, 0x02 },
  2929. { "SELECTOUT_QFROZEN", 0x04, 0x04 }
  2930. };
  2931. int
  2932. ahd_seq_flags2_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2933. {
  2934. return (ahd_print_register(SEQ_FLAGS2_parse_table, 3, "SEQ_FLAGS2",
  2935. 0x14d, regvalue, cur_col, wrap));
  2936. }
  2937. int
  2938. ahd_allocfifo_scbptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2939. {
  2940. return (ahd_print_register(NULL, 0, "ALLOCFIFO_SCBPTR",
  2941. 0x14e, regvalue, cur_col, wrap));
  2942. }
  2943. int
  2944. ahd_int_coalescing_timer_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2945. {
  2946. return (ahd_print_register(NULL, 0, "INT_COALESCING_TIMER",
  2947. 0x150, regvalue, cur_col, wrap));
  2948. }
  2949. int
  2950. ahd_int_coalescing_maxcmds_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2951. {
  2952. return (ahd_print_register(NULL, 0, "INT_COALESCING_MAXCMDS",
  2953. 0x152, regvalue, cur_col, wrap));
  2954. }
  2955. int
  2956. ahd_int_coalescing_mincmds_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2957. {
  2958. return (ahd_print_register(NULL, 0, "INT_COALESCING_MINCMDS",
  2959. 0x153, regvalue, cur_col, wrap));
  2960. }
  2961. int
  2962. ahd_cmds_pending_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2963. {
  2964. return (ahd_print_register(NULL, 0, "CMDS_PENDING",
  2965. 0x154, regvalue, cur_col, wrap));
  2966. }
  2967. int
  2968. ahd_int_coalescing_cmdcount_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2969. {
  2970. return (ahd_print_register(NULL, 0, "INT_COALESCING_CMDCOUNT",
  2971. 0x156, regvalue, cur_col, wrap));
  2972. }
  2973. int
  2974. ahd_local_hs_mailbox_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2975. {
  2976. return (ahd_print_register(NULL, 0, "LOCAL_HS_MAILBOX",
  2977. 0x157, regvalue, cur_col, wrap));
  2978. }
  2979. int
  2980. ahd_cmdsize_table_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2981. {
  2982. return (ahd_print_register(NULL, 0, "CMDSIZE_TABLE",
  2983. 0x158, regvalue, cur_col, wrap));
  2984. }
  2985. int
  2986. ahd_mk_message_scb_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2987. {
  2988. return (ahd_print_register(NULL, 0, "MK_MESSAGE_SCB",
  2989. 0x160, regvalue, cur_col, wrap));
  2990. }
  2991. int
  2992. ahd_mk_message_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2993. {
  2994. return (ahd_print_register(NULL, 0, "MK_MESSAGE_SCSIID",
  2995. 0x162, regvalue, cur_col, wrap));
  2996. }
  2997. int
  2998. ahd_scb_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
  2999. {
  3000. return (ahd_print_register(NULL, 0, "SCB_BASE",
  3001. 0x180, regvalue, cur_col, wrap));
  3002. }
  3003. int
  3004. ahd_scb_residual_datacnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
  3005. {
  3006. return (ahd_print_register(NULL, 0, "SCB_RESIDUAL_DATACNT",
  3007. 0x180, regvalue, cur_col, wrap));
  3008. }
  3009. static ahd_reg_parse_entry_t SCB_RESIDUAL_SGPTR_parse_table[] = {
  3010. { "SG_LIST_NULL", 0x01, 0x01 },
  3011. { "SG_OVERRUN_RESID", 0x02, 0x02 },
  3012. { "SG_ADDR_MASK", 0xf8, 0xf8 }
  3013. };
  3014. int
  3015. ahd_scb_residual_sgptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  3016. {
  3017. return (ahd_print_register(SCB_RESIDUAL_SGPTR_parse_table, 3, "SCB_RESIDUAL_SGPTR",
  3018. 0x184, regvalue, cur_col, wrap));
  3019. }
  3020. int
  3021. ahd_scb_scsi_status_print(u_int regvalue, u_int *cur_col, u_int wrap)
  3022. {
  3023. return (ahd_print_register(NULL, 0, "SCB_SCSI_STATUS",
  3024. 0x188, regvalue, cur_col, wrap));
  3025. }
  3026. int
  3027. ahd_scb_target_phases_print(u_int regvalue, u_int *cur_col, u_int wrap)
  3028. {
  3029. return (ahd_print_register(NULL, 0, "SCB_TARGET_PHASES",
  3030. 0x189, regvalue, cur_col, wrap));
  3031. }
  3032. int
  3033. ahd_scb_target_data_dir_print(u_int regvalue, u_int *cur_col, u_int wrap)
  3034. {
  3035. return (ahd_print_register(NULL, 0, "SCB_TARGET_DATA_DIR",
  3036. 0x18a, regvalue, cur_col, wrap));
  3037. }
  3038. int
  3039. ahd_scb_target_itag_print(u_int regvalue, u_int *cur_col, u_int wrap)
  3040. {
  3041. return (ahd_print_register(NULL, 0, "SCB_TARGET_ITAG",
  3042. 0x18b, regvalue, cur_col, wrap));
  3043. }
  3044. int
  3045. ahd_scb_sense_busaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  3046. {
  3047. return (ahd_print_register(NULL, 0, "SCB_SENSE_BUSADDR",
  3048. 0x18c, regvalue, cur_col, wrap));
  3049. }
  3050. int
  3051. ahd_scb_tag_print(u_int regvalue, u_int *cur_col, u_int wrap)
  3052. {
  3053. return (ahd_print_register(NULL, 0, "SCB_TAG",
  3054. 0x190, regvalue, cur_col, wrap));
  3055. }
  3056. static ahd_reg_parse_entry_t SCB_CONTROL_parse_table[] = {
  3057. { "SCB_TAG_TYPE", 0x03, 0x03 },
  3058. { "DISCONNECTED", 0x04, 0x04 },
  3059. { "STATUS_RCVD", 0x08, 0x08 },
  3060. { "MK_MESSAGE", 0x10, 0x10 },
  3061. { "TAG_ENB", 0x20, 0x20 },
  3062. { "DISCENB", 0x40, 0x40 },
  3063. { "TARGET_SCB", 0x80, 0x80 }
  3064. };
  3065. int
  3066. ahd_scb_control_print(u_int regvalue, u_int *cur_col, u_int wrap)
  3067. {
  3068. return (ahd_print_register(SCB_CONTROL_parse_table, 7, "SCB_CONTROL",
  3069. 0x192, regvalue, cur_col, wrap));
  3070. }
  3071. static ahd_reg_parse_entry_t SCB_SCSIID_parse_table[] = {
  3072. { "OID", 0x0f, 0x0f },
  3073. { "TID", 0xf0, 0xf0 }
  3074. };
  3075. int
  3076. ahd_scb_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
  3077. {
  3078. return (ahd_print_register(SCB_SCSIID_parse_table, 2, "SCB_SCSIID",
  3079. 0x193, regvalue, cur_col, wrap));
  3080. }
  3081. static ahd_reg_parse_entry_t SCB_LUN_parse_table[] = {
  3082. { "LID", 0xff, 0xff }
  3083. };
  3084. int
  3085. ahd_scb_lun_print(u_int regvalue, u_int *cur_col, u_int wrap)
  3086. {
  3087. return (ahd_print_register(SCB_LUN_parse_table, 1, "SCB_LUN",
  3088. 0x194, regvalue, cur_col, wrap));
  3089. }
  3090. static ahd_reg_parse_entry_t SCB_TASK_ATTRIBUTE_parse_table[] = {
  3091. { "SCB_XFERLEN_ODD", 0x01, 0x01 }
  3092. };
  3093. int
  3094. ahd_scb_task_attribute_print(u_int regvalue, u_int *cur_col, u_int wrap)
  3095. {
  3096. return (ahd_print_register(SCB_TASK_ATTRIBUTE_parse_table, 1, "SCB_TASK_ATTRIBUTE",
  3097. 0x195, regvalue, cur_col, wrap));
  3098. }
  3099. static ahd_reg_parse_entry_t SCB_CDB_LEN_parse_table[] = {
  3100. { "SCB_CDB_LEN_PTR", 0x80, 0x80 }
  3101. };
  3102. int
  3103. ahd_scb_cdb_len_print(u_int regvalue, u_int *cur_col, u_int wrap)
  3104. {
  3105. return (ahd_print_register(SCB_CDB_LEN_parse_table, 1, "SCB_CDB_LEN",
  3106. 0x196, regvalue, cur_col, wrap));
  3107. }
  3108. int
  3109. ahd_scb_task_management_print(u_int regvalue, u_int *cur_col, u_int wrap)
  3110. {
  3111. return (ahd_print_register(NULL, 0, "SCB_TASK_MANAGEMENT",
  3112. 0x197, regvalue, cur_col, wrap));
  3113. }
  3114. int
  3115. ahd_scb_dataptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  3116. {
  3117. return (ahd_print_register(NULL, 0, "SCB_DATAPTR",
  3118. 0x198, regvalue, cur_col, wrap));
  3119. }
  3120. static ahd_reg_parse_entry_t SCB_DATACNT_parse_table[] = {
  3121. { "SG_HIGH_ADDR_BITS", 0x7f, 0x7f },
  3122. { "SG_LAST_SEG", 0x80, 0x80 }
  3123. };
  3124. int
  3125. ahd_scb_datacnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
  3126. {
  3127. return (ahd_print_register(SCB_DATACNT_parse_table, 2, "SCB_DATACNT",
  3128. 0x1a0, regvalue, cur_col, wrap));
  3129. }
  3130. static ahd_reg_parse_entry_t SCB_SGPTR_parse_table[] = {
  3131. { "SG_LIST_NULL", 0x01, 0x01 },
  3132. { "SG_FULL_RESID", 0x02, 0x02 },
  3133. { "SG_STATUS_VALID", 0x04, 0x04 }
  3134. };
  3135. int
  3136. ahd_scb_sgptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  3137. {
  3138. return (ahd_print_register(SCB_SGPTR_parse_table, 3, "SCB_SGPTR",
  3139. 0x1a4, regvalue, cur_col, wrap));
  3140. }
  3141. int
  3142. ahd_scb_busaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
  3143. {
  3144. return (ahd_print_register(NULL, 0, "SCB_BUSADDR",
  3145. 0x1a8, regvalue, cur_col, wrap));
  3146. }
  3147. int
  3148. ahd_scb_next_print(u_int regvalue, u_int *cur_col, u_int wrap)
  3149. {
  3150. return (ahd_print_register(NULL, 0, "SCB_NEXT",
  3151. 0x1ac, regvalue, cur_col, wrap));
  3152. }
  3153. int
  3154. ahd_scb_next2_print(u_int regvalue, u_int *cur_col, u_int wrap)
  3155. {
  3156. return (ahd_print_register(NULL, 0, "SCB_NEXT2",
  3157. 0x1ae, regvalue, cur_col, wrap));
  3158. }
  3159. int
  3160. ahd_scb_spare_print(u_int regvalue, u_int *cur_col, u_int wrap)
  3161. {
  3162. return (ahd_print_register(NULL, 0, "SCB_SPARE",
  3163. 0x1b0, regvalue, cur_col, wrap));
  3164. }
  3165. int
  3166. ahd_scb_disconnected_lists_print(u_int regvalue, u_int *cur_col, u_int wrap)
  3167. {
  3168. return (ahd_print_register(NULL, 0, "SCB_DISCONNECTED_LISTS",
  3169. 0x1b8, regvalue, cur_col, wrap));
  3170. }