aic79xx_osm_pci.c 11 KB

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  1. /*
  2. * Linux driver attachment glue for PCI based U320 controllers.
  3. *
  4. * Copyright (c) 2000-2001 Adaptec Inc.
  5. * All rights reserved.
  6. *
  7. * Redistribution and use in source and binary forms, with or without
  8. * modification, are permitted provided that the following conditions
  9. * are met:
  10. * 1. Redistributions of source code must retain the above copyright
  11. * notice, this list of conditions, and the following disclaimer,
  12. * without modification.
  13. * 2. Redistributions in binary form must reproduce at minimum a disclaimer
  14. * substantially similar to the "NO WARRANTY" disclaimer below
  15. * ("Disclaimer") and any redistribution must be conditioned upon
  16. * including a substantially similar Disclaimer requirement for further
  17. * binary redistribution.
  18. * 3. Neither the names of the above-listed copyright holders nor the names
  19. * of any contributors may be used to endorse or promote products derived
  20. * from this software without specific prior written permission.
  21. *
  22. * Alternatively, this software may be distributed under the terms of the
  23. * GNU General Public License ("GPL") version 2 as published by the Free
  24. * Software Foundation.
  25. *
  26. * NO WARRANTY
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
  30. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  31. * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  33. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  34. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  35. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  36. * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  37. * POSSIBILITY OF SUCH DAMAGES.
  38. *
  39. * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic79xx_osm_pci.c#25 $
  40. */
  41. #include "aic79xx_osm.h"
  42. #include "aic79xx_inline.h"
  43. #include "aic79xx_pci.h"
  44. static int ahd_linux_pci_dev_probe(struct pci_dev *pdev,
  45. const struct pci_device_id *ent);
  46. static int ahd_linux_pci_reserve_io_regions(struct ahd_softc *ahd,
  47. u_long *base, u_long *base2);
  48. static int ahd_linux_pci_reserve_mem_region(struct ahd_softc *ahd,
  49. u_long *bus_addr,
  50. uint8_t __iomem **maddr);
  51. static int ahd_linux_pci_dev_suspend(struct pci_dev *pdev, pm_message_t mesg);
  52. static int ahd_linux_pci_dev_resume(struct pci_dev *pdev);
  53. static void ahd_linux_pci_dev_remove(struct pci_dev *pdev);
  54. /* Define the macro locally since it's different for different class of chips.
  55. */
  56. #define ID(x) \
  57. ID2C(x), \
  58. ID2C(IDIROC(x))
  59. static struct pci_device_id ahd_linux_pci_id_table[] = {
  60. /* aic7901 based controllers */
  61. ID(ID_AHA_29320A),
  62. ID(ID_AHA_29320ALP),
  63. ID(ID_AHA_29320LPE),
  64. /* aic7902 based controllers */
  65. ID(ID_AHA_29320),
  66. ID(ID_AHA_29320B),
  67. ID(ID_AHA_29320LP),
  68. ID(ID_AHA_39320),
  69. ID(ID_AHA_39320_B),
  70. ID(ID_AHA_39320A),
  71. ID(ID_AHA_39320D),
  72. ID(ID_AHA_39320D_HP),
  73. ID(ID_AHA_39320D_B),
  74. ID(ID_AHA_39320D_B_HP),
  75. /* Generic chip probes for devices we don't know exactly. */
  76. ID16(ID_AIC7901 & ID_9005_GENERIC_MASK),
  77. ID(ID_AIC7901A & ID_DEV_VENDOR_MASK),
  78. ID16(ID_AIC7902 & ID_9005_GENERIC_MASK),
  79. { 0 }
  80. };
  81. MODULE_DEVICE_TABLE(pci, ahd_linux_pci_id_table);
  82. static struct pci_driver aic79xx_pci_driver = {
  83. .name = "aic79xx",
  84. .probe = ahd_linux_pci_dev_probe,
  85. #ifdef CONFIG_PM
  86. .suspend = ahd_linux_pci_dev_suspend,
  87. .resume = ahd_linux_pci_dev_resume,
  88. #endif
  89. .remove = ahd_linux_pci_dev_remove,
  90. .id_table = ahd_linux_pci_id_table
  91. };
  92. static int
  93. ahd_linux_pci_dev_suspend(struct pci_dev *pdev, pm_message_t mesg)
  94. {
  95. struct ahd_softc *ahd = pci_get_drvdata(pdev);
  96. int rc;
  97. if ((rc = ahd_suspend(ahd)))
  98. return rc;
  99. ahd_pci_suspend(ahd);
  100. pci_save_state(pdev);
  101. pci_disable_device(pdev);
  102. if (mesg.event == PM_EVENT_SUSPEND)
  103. pci_set_power_state(pdev, PCI_D3hot);
  104. return rc;
  105. }
  106. static int
  107. ahd_linux_pci_dev_resume(struct pci_dev *pdev)
  108. {
  109. struct ahd_softc *ahd = pci_get_drvdata(pdev);
  110. int rc;
  111. pci_set_power_state(pdev, PCI_D0);
  112. pci_restore_state(pdev);
  113. if ((rc = pci_enable_device(pdev))) {
  114. dev_printk(KERN_ERR, &pdev->dev,
  115. "failed to enable device after resume (%d)\n", rc);
  116. return rc;
  117. }
  118. pci_set_master(pdev);
  119. ahd_pci_resume(ahd);
  120. ahd_resume(ahd);
  121. return rc;
  122. }
  123. static void
  124. ahd_linux_pci_dev_remove(struct pci_dev *pdev)
  125. {
  126. struct ahd_softc *ahd = pci_get_drvdata(pdev);
  127. u_long s;
  128. if (ahd->platform_data && ahd->platform_data->host)
  129. scsi_remove_host(ahd->platform_data->host);
  130. ahd_lock(ahd, &s);
  131. ahd_intr_enable(ahd, FALSE);
  132. ahd_unlock(ahd, &s);
  133. ahd_free(ahd);
  134. }
  135. static void
  136. ahd_linux_pci_inherit_flags(struct ahd_softc *ahd)
  137. {
  138. struct pci_dev *pdev = ahd->dev_softc, *master_pdev;
  139. unsigned int master_devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0);
  140. master_pdev = pci_get_slot(pdev->bus, master_devfn);
  141. if (master_pdev) {
  142. struct ahd_softc *master = pci_get_drvdata(master_pdev);
  143. if (master) {
  144. ahd->flags &= ~AHD_BIOS_ENABLED;
  145. ahd->flags |= master->flags & AHD_BIOS_ENABLED;
  146. } else
  147. printk(KERN_ERR "aic79xx: no multichannel peer found!\n");
  148. pci_dev_put(master_pdev);
  149. }
  150. }
  151. static int
  152. ahd_linux_pci_dev_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  153. {
  154. char buf[80];
  155. struct ahd_softc *ahd;
  156. ahd_dev_softc_t pci;
  157. struct ahd_pci_identity *entry;
  158. char *name;
  159. int error;
  160. struct device *dev = &pdev->dev;
  161. pci = pdev;
  162. entry = ahd_find_pci_device(pci);
  163. if (entry == NULL)
  164. return (-ENODEV);
  165. /*
  166. * Allocate a softc for this card and
  167. * set it up for attachment by our
  168. * common detect routine.
  169. */
  170. sprintf(buf, "ahd_pci:%d:%d:%d",
  171. ahd_get_pci_bus(pci),
  172. ahd_get_pci_slot(pci),
  173. ahd_get_pci_function(pci));
  174. name = malloc(strlen(buf) + 1, M_DEVBUF, M_NOWAIT);
  175. if (name == NULL)
  176. return (-ENOMEM);
  177. strcpy(name, buf);
  178. ahd = ahd_alloc(NULL, name);
  179. if (ahd == NULL)
  180. return (-ENOMEM);
  181. if (pci_enable_device(pdev)) {
  182. ahd_free(ahd);
  183. return (-ENODEV);
  184. }
  185. pci_set_master(pdev);
  186. if (sizeof(dma_addr_t) > 4) {
  187. const u64 required_mask = dma_get_required_mask(dev);
  188. if (required_mask > DMA_39BIT_MASK &&
  189. dma_set_mask(dev, DMA_64BIT_MASK) == 0)
  190. ahd->flags |= AHD_64BIT_ADDRESSING;
  191. else if (required_mask > DMA_32BIT_MASK &&
  192. dma_set_mask(dev, DMA_39BIT_MASK) == 0)
  193. ahd->flags |= AHD_39BIT_ADDRESSING;
  194. else
  195. dma_set_mask(dev, DMA_32BIT_MASK);
  196. } else {
  197. dma_set_mask(dev, DMA_32BIT_MASK);
  198. }
  199. ahd->dev_softc = pci;
  200. error = ahd_pci_config(ahd, entry);
  201. if (error != 0) {
  202. ahd_free(ahd);
  203. return (-error);
  204. }
  205. /*
  206. * Second Function PCI devices need to inherit some
  207. * * settings from function 0.
  208. */
  209. if ((ahd->features & AHD_MULTI_FUNC) && PCI_FUNC(pdev->devfn) != 0)
  210. ahd_linux_pci_inherit_flags(ahd);
  211. pci_set_drvdata(pdev, ahd);
  212. ahd_linux_register_host(ahd, &aic79xx_driver_template);
  213. return (0);
  214. }
  215. int
  216. ahd_linux_pci_init(void)
  217. {
  218. return pci_register_driver(&aic79xx_pci_driver);
  219. }
  220. void
  221. ahd_linux_pci_exit(void)
  222. {
  223. pci_unregister_driver(&aic79xx_pci_driver);
  224. }
  225. static int
  226. ahd_linux_pci_reserve_io_regions(struct ahd_softc *ahd, u_long *base,
  227. u_long *base2)
  228. {
  229. *base = pci_resource_start(ahd->dev_softc, 0);
  230. /*
  231. * This is really the 3rd bar and should be at index 2,
  232. * but the Linux PCI code doesn't know how to "count" 64bit
  233. * bars.
  234. */
  235. *base2 = pci_resource_start(ahd->dev_softc, 3);
  236. if (*base == 0 || *base2 == 0)
  237. return (ENOMEM);
  238. if (!request_region(*base, 256, "aic79xx"))
  239. return (ENOMEM);
  240. if (!request_region(*base2, 256, "aic79xx")) {
  241. release_region(*base, 256);
  242. return (ENOMEM);
  243. }
  244. return (0);
  245. }
  246. static int
  247. ahd_linux_pci_reserve_mem_region(struct ahd_softc *ahd,
  248. u_long *bus_addr,
  249. uint8_t __iomem **maddr)
  250. {
  251. u_long start;
  252. u_long base_page;
  253. u_long base_offset;
  254. int error = 0;
  255. if (aic79xx_allow_memio == 0)
  256. return (ENOMEM);
  257. if ((ahd->bugs & AHD_PCIX_MMAPIO_BUG) != 0)
  258. return (ENOMEM);
  259. start = pci_resource_start(ahd->dev_softc, 1);
  260. base_page = start & PAGE_MASK;
  261. base_offset = start - base_page;
  262. if (start != 0) {
  263. *bus_addr = start;
  264. if (!request_mem_region(start, 0x1000, "aic79xx"))
  265. error = ENOMEM;
  266. if (!error) {
  267. *maddr = ioremap_nocache(base_page, base_offset + 512);
  268. if (*maddr == NULL) {
  269. error = ENOMEM;
  270. release_mem_region(start, 0x1000);
  271. } else
  272. *maddr += base_offset;
  273. }
  274. } else
  275. error = ENOMEM;
  276. return (error);
  277. }
  278. int
  279. ahd_pci_map_registers(struct ahd_softc *ahd)
  280. {
  281. uint32_t command;
  282. u_long base;
  283. uint8_t __iomem *maddr;
  284. int error;
  285. /*
  286. * If its allowed, we prefer memory mapped access.
  287. */
  288. command = ahd_pci_read_config(ahd->dev_softc, PCIR_COMMAND, 4);
  289. command &= ~(PCIM_CMD_PORTEN|PCIM_CMD_MEMEN);
  290. base = 0;
  291. maddr = NULL;
  292. error = ahd_linux_pci_reserve_mem_region(ahd, &base, &maddr);
  293. if (error == 0) {
  294. ahd->platform_data->mem_busaddr = base;
  295. ahd->tags[0] = BUS_SPACE_MEMIO;
  296. ahd->bshs[0].maddr = maddr;
  297. ahd->tags[1] = BUS_SPACE_MEMIO;
  298. ahd->bshs[1].maddr = maddr + 0x100;
  299. ahd_pci_write_config(ahd->dev_softc, PCIR_COMMAND,
  300. command | PCIM_CMD_MEMEN, 4);
  301. if (ahd_pci_test_register_access(ahd) != 0) {
  302. printf("aic79xx: PCI Device %d:%d:%d "
  303. "failed memory mapped test. Using PIO.\n",
  304. ahd_get_pci_bus(ahd->dev_softc),
  305. ahd_get_pci_slot(ahd->dev_softc),
  306. ahd_get_pci_function(ahd->dev_softc));
  307. iounmap(maddr);
  308. release_mem_region(ahd->platform_data->mem_busaddr,
  309. 0x1000);
  310. ahd->bshs[0].maddr = NULL;
  311. maddr = NULL;
  312. } else
  313. command |= PCIM_CMD_MEMEN;
  314. } else if (bootverbose) {
  315. printf("aic79xx: PCI%d:%d:%d MEM region 0x%lx "
  316. "unavailable. Cannot memory map device.\n",
  317. ahd_get_pci_bus(ahd->dev_softc),
  318. ahd_get_pci_slot(ahd->dev_softc),
  319. ahd_get_pci_function(ahd->dev_softc),
  320. base);
  321. }
  322. if (maddr == NULL) {
  323. u_long base2;
  324. error = ahd_linux_pci_reserve_io_regions(ahd, &base, &base2);
  325. if (error == 0) {
  326. ahd->tags[0] = BUS_SPACE_PIO;
  327. ahd->tags[1] = BUS_SPACE_PIO;
  328. ahd->bshs[0].ioport = base;
  329. ahd->bshs[1].ioport = base2;
  330. command |= PCIM_CMD_PORTEN;
  331. } else {
  332. printf("aic79xx: PCI%d:%d:%d IO regions 0x%lx and 0x%lx"
  333. "unavailable. Cannot map device.\n",
  334. ahd_get_pci_bus(ahd->dev_softc),
  335. ahd_get_pci_slot(ahd->dev_softc),
  336. ahd_get_pci_function(ahd->dev_softc),
  337. base, base2);
  338. }
  339. }
  340. ahd_pci_write_config(ahd->dev_softc, PCIR_COMMAND, command, 4);
  341. return (error);
  342. }
  343. int
  344. ahd_pci_map_int(struct ahd_softc *ahd)
  345. {
  346. int error;
  347. error = request_irq(ahd->dev_softc->irq, ahd_linux_isr,
  348. IRQF_SHARED, "aic79xx", ahd);
  349. if (!error)
  350. ahd->platform_data->irq = ahd->dev_softc->irq;
  351. return (-error);
  352. }
  353. void
  354. ahd_power_state_change(struct ahd_softc *ahd, ahd_power_state new_state)
  355. {
  356. pci_set_power_state(ahd->dev_softc, new_state);
  357. }