cpqphp_core.c 39 KB

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  1. /*
  2. * Compaq Hot Plug Controller Driver
  3. *
  4. * Copyright (C) 1995,2001 Compaq Computer Corporation
  5. * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com>
  6. * Copyright (C) 2001 IBM Corp.
  7. *
  8. * All rights reserved.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or (at
  13. * your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful, but
  16. * WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  18. * NON INFRINGEMENT. See the GNU General Public License for more
  19. * details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24. *
  25. * Send feedback to <greg@kroah.com>
  26. *
  27. * Jan 12, 2003 - Added 66/100/133MHz PCI-X support,
  28. * Torben Mathiasen <torben.mathiasen@hp.com>
  29. *
  30. */
  31. #include <linux/module.h>
  32. #include <linux/moduleparam.h>
  33. #include <linux/kernel.h>
  34. #include <linux/types.h>
  35. #include <linux/proc_fs.h>
  36. #include <linux/slab.h>
  37. #include <linux/workqueue.h>
  38. #include <linux/pci.h>
  39. #include <linux/pci_hotplug.h>
  40. #include <linux/init.h>
  41. #include <linux/interrupt.h>
  42. #include <asm/uaccess.h>
  43. #include "cpqphp.h"
  44. #include "cpqphp_nvram.h"
  45. #include "../../../arch/x86/pci/pci.h" /* horrible hack showing how processor dependent we are... */
  46. /* Global variables */
  47. int cpqhp_debug;
  48. int cpqhp_legacy_mode;
  49. struct controller *cpqhp_ctrl_list; /* = NULL */
  50. struct pci_func *cpqhp_slot_list[256];
  51. /* local variables */
  52. static void __iomem *smbios_table;
  53. static void __iomem *smbios_start;
  54. static void __iomem *cpqhp_rom_start;
  55. static int power_mode;
  56. static int debug;
  57. static int initialized;
  58. #define DRIVER_VERSION "0.9.8"
  59. #define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>"
  60. #define DRIVER_DESC "Compaq Hot Plug PCI Controller Driver"
  61. MODULE_AUTHOR(DRIVER_AUTHOR);
  62. MODULE_DESCRIPTION(DRIVER_DESC);
  63. MODULE_LICENSE("GPL");
  64. module_param(power_mode, bool, 0644);
  65. MODULE_PARM_DESC(power_mode, "Power mode enabled or not");
  66. module_param(debug, bool, 0644);
  67. MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
  68. #define CPQHPC_MODULE_MINOR 208
  69. static int one_time_init (void);
  70. static int set_attention_status (struct hotplug_slot *slot, u8 value);
  71. static int process_SI (struct hotplug_slot *slot);
  72. static int process_SS (struct hotplug_slot *slot);
  73. static int hardware_test (struct hotplug_slot *slot, u32 value);
  74. static int get_power_status (struct hotplug_slot *slot, u8 *value);
  75. static int get_attention_status (struct hotplug_slot *slot, u8 *value);
  76. static int get_latch_status (struct hotplug_slot *slot, u8 *value);
  77. static int get_adapter_status (struct hotplug_slot *slot, u8 *value);
  78. static int get_max_bus_speed (struct hotplug_slot *slot, enum pci_bus_speed *value);
  79. static int get_cur_bus_speed (struct hotplug_slot *slot, enum pci_bus_speed *value);
  80. static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = {
  81. .owner = THIS_MODULE,
  82. .set_attention_status = set_attention_status,
  83. .enable_slot = process_SI,
  84. .disable_slot = process_SS,
  85. .hardware_test = hardware_test,
  86. .get_power_status = get_power_status,
  87. .get_attention_status = get_attention_status,
  88. .get_latch_status = get_latch_status,
  89. .get_adapter_status = get_adapter_status,
  90. .get_max_bus_speed = get_max_bus_speed,
  91. .get_cur_bus_speed = get_cur_bus_speed,
  92. };
  93. static inline int is_slot64bit(struct slot *slot)
  94. {
  95. return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0;
  96. }
  97. static inline int is_slot66mhz(struct slot *slot)
  98. {
  99. return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0;
  100. }
  101. /**
  102. * detect_SMBIOS_pointer - find the System Management BIOS Table in mem region.
  103. * @begin: begin pointer for region to be scanned.
  104. * @end: end pointer for region to be scanned.
  105. *
  106. * Returns pointer to the head of the SMBIOS tables (or %NULL).
  107. */
  108. static void __iomem * detect_SMBIOS_pointer(void __iomem *begin, void __iomem *end)
  109. {
  110. void __iomem *fp;
  111. void __iomem *endp;
  112. u8 temp1, temp2, temp3, temp4;
  113. int status = 0;
  114. endp = (end - sizeof(u32) + 1);
  115. for (fp = begin; fp <= endp; fp += 16) {
  116. temp1 = readb(fp);
  117. temp2 = readb(fp+1);
  118. temp3 = readb(fp+2);
  119. temp4 = readb(fp+3);
  120. if (temp1 == '_' &&
  121. temp2 == 'S' &&
  122. temp3 == 'M' &&
  123. temp4 == '_') {
  124. status = 1;
  125. break;
  126. }
  127. }
  128. if (!status)
  129. fp = NULL;
  130. dbg("Discovered SMBIOS Entry point at %p\n", fp);
  131. return fp;
  132. }
  133. /**
  134. * init_SERR - Initializes the per slot SERR generation.
  135. * @ctrl: controller to use
  136. *
  137. * For unexpected switch opens
  138. */
  139. static int init_SERR(struct controller * ctrl)
  140. {
  141. u32 tempdword;
  142. u32 number_of_slots;
  143. u8 physical_slot;
  144. if (!ctrl)
  145. return 1;
  146. tempdword = ctrl->first_slot;
  147. number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
  148. // Loop through slots
  149. while (number_of_slots) {
  150. physical_slot = tempdword;
  151. writeb(0, ctrl->hpc_reg + SLOT_SERR);
  152. tempdword++;
  153. number_of_slots--;
  154. }
  155. return 0;
  156. }
  157. /* nice debugging output */
  158. static int pci_print_IRQ_route (void)
  159. {
  160. struct irq_routing_table *routing_table;
  161. int len;
  162. int loop;
  163. u8 tbus, tdevice, tslot;
  164. routing_table = pcibios_get_irq_routing_table();
  165. if (routing_table == NULL) {
  166. err("No BIOS Routing Table??? Not good\n");
  167. return -ENOMEM;
  168. }
  169. len = (routing_table->size - sizeof(struct irq_routing_table)) /
  170. sizeof(struct irq_info);
  171. // Make sure I got at least one entry
  172. if (len == 0) {
  173. kfree(routing_table);
  174. return -1;
  175. }
  176. dbg("bus dev func slot\n");
  177. for (loop = 0; loop < len; ++loop) {
  178. tbus = routing_table->slots[loop].bus;
  179. tdevice = routing_table->slots[loop].devfn;
  180. tslot = routing_table->slots[loop].slot;
  181. dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot);
  182. }
  183. kfree(routing_table);
  184. return 0;
  185. }
  186. /**
  187. * get_subsequent_smbios_entry: get the next entry from bios table.
  188. * @smbios_start: where to start in the SMBIOS table
  189. * @smbios_table: location of the SMBIOS table
  190. * @curr: %NULL or pointer to previously returned structure
  191. *
  192. * Gets the first entry if previous == NULL;
  193. * otherwise, returns the next entry.
  194. * Uses global SMBIOS Table pointer.
  195. *
  196. * Returns a pointer to an SMBIOS structure or NULL if none found.
  197. */
  198. static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start,
  199. void __iomem *smbios_table,
  200. void __iomem *curr)
  201. {
  202. u8 bail = 0;
  203. u8 previous_byte = 1;
  204. void __iomem *p_temp;
  205. void __iomem *p_max;
  206. if (!smbios_table || !curr)
  207. return(NULL);
  208. // set p_max to the end of the table
  209. p_max = smbios_start + readw(smbios_table + ST_LENGTH);
  210. p_temp = curr;
  211. p_temp += readb(curr + SMBIOS_GENERIC_LENGTH);
  212. while ((p_temp < p_max) && !bail) {
  213. /* Look for the double NULL terminator
  214. * The first condition is the previous byte
  215. * and the second is the curr */
  216. if (!previous_byte && !(readb(p_temp))) {
  217. bail = 1;
  218. }
  219. previous_byte = readb(p_temp);
  220. p_temp++;
  221. }
  222. if (p_temp < p_max) {
  223. return p_temp;
  224. } else {
  225. return NULL;
  226. }
  227. }
  228. /**
  229. * get_SMBIOS_entry - return the requested SMBIOS entry or %NULL
  230. * @smbios_start: where to start in the SMBIOS table
  231. * @smbios_table: location of the SMBIOS table
  232. * @type: SMBIOS structure type to be returned
  233. * @previous: %NULL or pointer to previously returned structure
  234. *
  235. * Gets the first entry of the specified type if previous == %NULL;
  236. * Otherwise, returns the next entry of the given type.
  237. * Uses global SMBIOS Table pointer.
  238. * Uses get_subsequent_smbios_entry.
  239. *
  240. * Returns a pointer to an SMBIOS structure or %NULL if none found.
  241. */
  242. static void __iomem *get_SMBIOS_entry(void __iomem *smbios_start,
  243. void __iomem *smbios_table,
  244. u8 type,
  245. void __iomem *previous)
  246. {
  247. if (!smbios_table)
  248. return NULL;
  249. if (!previous) {
  250. previous = smbios_start;
  251. } else {
  252. previous = get_subsequent_smbios_entry(smbios_start,
  253. smbios_table, previous);
  254. }
  255. while (previous) {
  256. if (readb(previous + SMBIOS_GENERIC_TYPE) != type) {
  257. previous = get_subsequent_smbios_entry(smbios_start,
  258. smbios_table, previous);
  259. } else {
  260. break;
  261. }
  262. }
  263. return previous;
  264. }
  265. static void release_slot(struct hotplug_slot *hotplug_slot)
  266. {
  267. struct slot *slot = hotplug_slot->private;
  268. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  269. kfree(slot->hotplug_slot->info);
  270. kfree(slot->hotplug_slot->name);
  271. kfree(slot->hotplug_slot);
  272. kfree(slot);
  273. }
  274. static int ctrl_slot_setup(struct controller *ctrl,
  275. void __iomem *smbios_start,
  276. void __iomem *smbios_table)
  277. {
  278. struct slot *slot;
  279. struct hotplug_slot *hotplug_slot;
  280. struct hotplug_slot_info *hotplug_slot_info;
  281. u8 number_of_slots;
  282. u8 slot_device;
  283. u8 slot_number;
  284. u8 ctrl_slot;
  285. u32 tempdword;
  286. void __iomem *slot_entry= NULL;
  287. int result = -ENOMEM;
  288. dbg("%s\n", __FUNCTION__);
  289. tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
  290. number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
  291. slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
  292. slot_number = ctrl->first_slot;
  293. while (number_of_slots) {
  294. slot = kzalloc(sizeof(*slot), GFP_KERNEL);
  295. if (!slot)
  296. goto error;
  297. slot->hotplug_slot = kzalloc(sizeof(*(slot->hotplug_slot)),
  298. GFP_KERNEL);
  299. if (!slot->hotplug_slot)
  300. goto error_slot;
  301. hotplug_slot = slot->hotplug_slot;
  302. hotplug_slot->info =
  303. kzalloc(sizeof(*(hotplug_slot->info)),
  304. GFP_KERNEL);
  305. if (!hotplug_slot->info)
  306. goto error_hpslot;
  307. hotplug_slot_info = hotplug_slot->info;
  308. hotplug_slot->name = kmalloc(SLOT_NAME_SIZE, GFP_KERNEL);
  309. if (!hotplug_slot->name)
  310. goto error_info;
  311. slot->ctrl = ctrl;
  312. slot->bus = ctrl->bus;
  313. slot->device = slot_device;
  314. slot->number = slot_number;
  315. dbg("slot->number = %d\n", slot->number);
  316. slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9,
  317. slot_entry);
  318. while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) !=
  319. slot->number)) {
  320. slot_entry = get_SMBIOS_entry(smbios_start,
  321. smbios_table, 9, slot_entry);
  322. }
  323. slot->p_sm_slot = slot_entry;
  324. init_timer(&slot->task_event);
  325. slot->task_event.expires = jiffies + 5 * HZ;
  326. slot->task_event.function = cpqhp_pushbutton_thread;
  327. //FIXME: these capabilities aren't used but if they are
  328. // they need to be correctly implemented
  329. slot->capabilities |= PCISLOT_REPLACE_SUPPORTED;
  330. slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED;
  331. if (is_slot64bit(slot))
  332. slot->capabilities |= PCISLOT_64_BIT_SUPPORTED;
  333. if (is_slot66mhz(slot))
  334. slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED;
  335. if (ctrl->speed == PCI_SPEED_66MHz)
  336. slot->capabilities |= PCISLOT_66_MHZ_OPERATION;
  337. ctrl_slot =
  338. slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4);
  339. // Check presence
  340. slot->capabilities |=
  341. ((((~tempdword) >> 23) |
  342. ((~tempdword) >> 15)) >> ctrl_slot) & 0x02;
  343. // Check the switch state
  344. slot->capabilities |=
  345. ((~tempdword & 0xFF) >> ctrl_slot) & 0x01;
  346. // Check the slot enable
  347. slot->capabilities |=
  348. ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04;
  349. /* register this slot with the hotplug pci core */
  350. hotplug_slot->release = &release_slot;
  351. hotplug_slot->private = slot;
  352. make_slot_name(hotplug_slot->name, SLOT_NAME_SIZE, slot);
  353. hotplug_slot->ops = &cpqphp_hotplug_slot_ops;
  354. hotplug_slot_info->power_status = get_slot_enabled(ctrl, slot);
  355. hotplug_slot_info->attention_status =
  356. cpq_get_attention_status(ctrl, slot);
  357. hotplug_slot_info->latch_status =
  358. cpq_get_latch_status(ctrl, slot);
  359. hotplug_slot_info->adapter_status =
  360. get_presence_status(ctrl, slot);
  361. dbg("registering bus %d, dev %d, number %d, "
  362. "ctrl->slot_device_offset %d, slot %d\n",
  363. slot->bus, slot->device,
  364. slot->number, ctrl->slot_device_offset,
  365. slot_number);
  366. result = pci_hp_register(hotplug_slot);
  367. if (result) {
  368. err("pci_hp_register failed with error %d\n", result);
  369. goto error_name;
  370. }
  371. slot->next = ctrl->slot;
  372. ctrl->slot = slot;
  373. number_of_slots--;
  374. slot_device++;
  375. slot_number++;
  376. }
  377. return 0;
  378. error_name:
  379. kfree(hotplug_slot->name);
  380. error_info:
  381. kfree(hotplug_slot_info);
  382. error_hpslot:
  383. kfree(hotplug_slot);
  384. error_slot:
  385. kfree(slot);
  386. error:
  387. return result;
  388. }
  389. static int ctrl_slot_cleanup (struct controller * ctrl)
  390. {
  391. struct slot *old_slot, *next_slot;
  392. old_slot = ctrl->slot;
  393. ctrl->slot = NULL;
  394. while (old_slot) {
  395. /* memory will be freed by the release_slot callback */
  396. next_slot = old_slot->next;
  397. pci_hp_deregister (old_slot->hotplug_slot);
  398. old_slot = next_slot;
  399. }
  400. cpqhp_remove_debugfs_files(ctrl);
  401. //Free IRQ associated with hot plug device
  402. free_irq(ctrl->interrupt, ctrl);
  403. //Unmap the memory
  404. iounmap(ctrl->hpc_reg);
  405. //Finally reclaim PCI mem
  406. release_mem_region(pci_resource_start(ctrl->pci_dev, 0),
  407. pci_resource_len(ctrl->pci_dev, 0));
  408. return(0);
  409. }
  410. //============================================================================
  411. // function: get_slot_mapping
  412. //
  413. // Description: Attempts to determine a logical slot mapping for a PCI
  414. // device. Won't work for more than one PCI-PCI bridge
  415. // in a slot.
  416. //
  417. // Input: u8 bus_num - bus number of PCI device
  418. // u8 dev_num - device number of PCI device
  419. // u8 *slot - Pointer to u8 where slot number will
  420. // be returned
  421. //
  422. // Output: SUCCESS or FAILURE
  423. //=============================================================================
  424. static int
  425. get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
  426. {
  427. struct irq_routing_table *PCIIRQRoutingInfoLength;
  428. u32 work;
  429. long len;
  430. long loop;
  431. u8 tbus, tdevice, tslot, bridgeSlot;
  432. dbg("%s: %p, %d, %d, %p\n", __FUNCTION__, bus, bus_num, dev_num, slot);
  433. bridgeSlot = 0xFF;
  434. PCIIRQRoutingInfoLength = pcibios_get_irq_routing_table();
  435. if (!PCIIRQRoutingInfoLength)
  436. return -1;
  437. len = (PCIIRQRoutingInfoLength->size -
  438. sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
  439. // Make sure I got at least one entry
  440. if (len == 0) {
  441. kfree(PCIIRQRoutingInfoLength);
  442. return -1;
  443. }
  444. for (loop = 0; loop < len; ++loop) {
  445. tbus = PCIIRQRoutingInfoLength->slots[loop].bus;
  446. tdevice = PCIIRQRoutingInfoLength->slots[loop].devfn >> 3;
  447. tslot = PCIIRQRoutingInfoLength->slots[loop].slot;
  448. if ((tbus == bus_num) && (tdevice == dev_num)) {
  449. *slot = tslot;
  450. kfree(PCIIRQRoutingInfoLength);
  451. return 0;
  452. } else {
  453. /* Did not get a match on the target PCI device. Check
  454. * if the current IRQ table entry is a PCI-to-PCI bridge
  455. * device. If so, and it's secondary bus matches the
  456. * bus number for the target device, I need to save the
  457. * bridge's slot number. If I can not find an entry for
  458. * the target device, I will have to assume it's on the
  459. * other side of the bridge, and assign it the bridge's
  460. * slot. */
  461. bus->number = tbus;
  462. pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0),
  463. PCI_CLASS_REVISION, &work);
  464. if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
  465. pci_bus_read_config_dword(bus,
  466. PCI_DEVFN(tdevice, 0),
  467. PCI_PRIMARY_BUS, &work);
  468. // See if bridge's secondary bus matches target bus.
  469. if (((work >> 8) & 0x000000FF) == (long) bus_num) {
  470. bridgeSlot = tslot;
  471. }
  472. }
  473. }
  474. }
  475. // If we got here, we didn't find an entry in the IRQ mapping table
  476. // for the target PCI device. If we did determine that the target
  477. // device is on the other side of a PCI-to-PCI bridge, return the
  478. // slot number for the bridge.
  479. if (bridgeSlot != 0xFF) {
  480. *slot = bridgeSlot;
  481. kfree(PCIIRQRoutingInfoLength);
  482. return 0;
  483. }
  484. kfree(PCIIRQRoutingInfoLength);
  485. // Couldn't find an entry in the routing table for this PCI device
  486. return -1;
  487. }
  488. /**
  489. * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off
  490. * @ctrl: struct controller to use
  491. * @func: PCI device/function info
  492. * @status: LED control flag: 1 = LED on, 0 = LED off
  493. */
  494. static int
  495. cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func,
  496. u32 status)
  497. {
  498. u8 hp_slot;
  499. if (func == NULL)
  500. return(1);
  501. hp_slot = func->device - ctrl->slot_device_offset;
  502. // Wait for exclusive access to hardware
  503. mutex_lock(&ctrl->crit_sect);
  504. if (status == 1) {
  505. amber_LED_on (ctrl, hp_slot);
  506. } else if (status == 0) {
  507. amber_LED_off (ctrl, hp_slot);
  508. } else {
  509. // Done with exclusive hardware access
  510. mutex_unlock(&ctrl->crit_sect);
  511. return(1);
  512. }
  513. set_SOGO(ctrl);
  514. // Wait for SOBS to be unset
  515. wait_for_ctrl_irq (ctrl);
  516. // Done with exclusive hardware access
  517. mutex_unlock(&ctrl->crit_sect);
  518. return(0);
  519. }
  520. /**
  521. * set_attention_status - Turns the Amber LED for a slot on or off
  522. * @hotplug_slot: slot to change LED on
  523. * @status: LED control flag
  524. */
  525. static int set_attention_status (struct hotplug_slot *hotplug_slot, u8 status)
  526. {
  527. struct pci_func *slot_func;
  528. struct slot *slot = hotplug_slot->private;
  529. struct controller *ctrl = slot->ctrl;
  530. u8 bus;
  531. u8 devfn;
  532. u8 device;
  533. u8 function;
  534. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  535. if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
  536. return -ENODEV;
  537. device = devfn >> 3;
  538. function = devfn & 0x7;
  539. dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
  540. slot_func = cpqhp_slot_find(bus, device, function);
  541. if (!slot_func)
  542. return -ENODEV;
  543. return cpqhp_set_attention_status(ctrl, slot_func, status);
  544. }
  545. static int process_SI(struct hotplug_slot *hotplug_slot)
  546. {
  547. struct pci_func *slot_func;
  548. struct slot *slot = hotplug_slot->private;
  549. struct controller *ctrl = slot->ctrl;
  550. u8 bus;
  551. u8 devfn;
  552. u8 device;
  553. u8 function;
  554. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  555. if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
  556. return -ENODEV;
  557. device = devfn >> 3;
  558. function = devfn & 0x7;
  559. dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
  560. slot_func = cpqhp_slot_find(bus, device, function);
  561. if (!slot_func)
  562. return -ENODEV;
  563. slot_func->bus = bus;
  564. slot_func->device = device;
  565. slot_func->function = function;
  566. slot_func->configured = 0;
  567. dbg("board_added(%p, %p)\n", slot_func, ctrl);
  568. return cpqhp_process_SI(ctrl, slot_func);
  569. }
  570. static int process_SS(struct hotplug_slot *hotplug_slot)
  571. {
  572. struct pci_func *slot_func;
  573. struct slot *slot = hotplug_slot->private;
  574. struct controller *ctrl = slot->ctrl;
  575. u8 bus;
  576. u8 devfn;
  577. u8 device;
  578. u8 function;
  579. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  580. if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
  581. return -ENODEV;
  582. device = devfn >> 3;
  583. function = devfn & 0x7;
  584. dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
  585. slot_func = cpqhp_slot_find(bus, device, function);
  586. if (!slot_func)
  587. return -ENODEV;
  588. dbg("In %s, slot_func = %p, ctrl = %p\n", __FUNCTION__, slot_func, ctrl);
  589. return cpqhp_process_SS(ctrl, slot_func);
  590. }
  591. static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value)
  592. {
  593. struct slot *slot = hotplug_slot->private;
  594. struct controller *ctrl = slot->ctrl;
  595. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  596. return cpqhp_hardware_test(ctrl, value);
  597. }
  598. static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value)
  599. {
  600. struct slot *slot = hotplug_slot->private;
  601. struct controller *ctrl = slot->ctrl;
  602. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  603. *value = get_slot_enabled(ctrl, slot);
  604. return 0;
  605. }
  606. static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value)
  607. {
  608. struct slot *slot = hotplug_slot->private;
  609. struct controller *ctrl = slot->ctrl;
  610. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  611. *value = cpq_get_attention_status(ctrl, slot);
  612. return 0;
  613. }
  614. static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value)
  615. {
  616. struct slot *slot = hotplug_slot->private;
  617. struct controller *ctrl = slot->ctrl;
  618. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  619. *value = cpq_get_latch_status(ctrl, slot);
  620. return 0;
  621. }
  622. static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
  623. {
  624. struct slot *slot = hotplug_slot->private;
  625. struct controller *ctrl = slot->ctrl;
  626. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  627. *value = get_presence_status(ctrl, slot);
  628. return 0;
  629. }
  630. static int get_max_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
  631. {
  632. struct slot *slot = hotplug_slot->private;
  633. struct controller *ctrl = slot->ctrl;
  634. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  635. *value = ctrl->speed_capability;
  636. return 0;
  637. }
  638. static int get_cur_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
  639. {
  640. struct slot *slot = hotplug_slot->private;
  641. struct controller *ctrl = slot->ctrl;
  642. dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
  643. *value = ctrl->speed;
  644. return 0;
  645. }
  646. static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  647. {
  648. u8 num_of_slots = 0;
  649. u8 hp_slot = 0;
  650. u8 device;
  651. u8 bus_cap;
  652. u16 temp_word;
  653. u16 vendor_id;
  654. u16 subsystem_vid;
  655. u16 subsystem_deviceid;
  656. u32 rc;
  657. struct controller *ctrl;
  658. struct pci_func *func;
  659. int err;
  660. err = pci_enable_device(pdev);
  661. if (err) {
  662. printk(KERN_ERR MY_NAME ": cannot enable PCI device %s (%d)\n",
  663. pci_name(pdev), err);
  664. return err;
  665. }
  666. // Need to read VID early b/c it's used to differentiate CPQ and INTC discovery
  667. rc = pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id);
  668. if (rc || ((vendor_id != PCI_VENDOR_ID_COMPAQ) && (vendor_id != PCI_VENDOR_ID_INTEL))) {
  669. err(msg_HPC_non_compaq_or_intel);
  670. rc = -ENODEV;
  671. goto err_disable_device;
  672. }
  673. dbg("Vendor ID: %x\n", vendor_id);
  674. dbg("revision: %d\n", pdev->revision);
  675. if ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!pdev->revision)) {
  676. err(msg_HPC_rev_error);
  677. rc = -ENODEV;
  678. goto err_disable_device;
  679. }
  680. /* Check for the proper subsytem ID's
  681. * Intel uses a different SSID programming model than Compaq.
  682. * For Intel, each SSID bit identifies a PHP capability.
  683. * Also Intel HPC's may have RID=0.
  684. */
  685. if ((pdev->revision > 2) || (vendor_id == PCI_VENDOR_ID_INTEL)) {
  686. // TODO: This code can be made to support non-Compaq or Intel subsystem IDs
  687. rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid);
  688. if (rc) {
  689. err("%s : pci_read_config_word failed\n", __FUNCTION__);
  690. goto err_disable_device;
  691. }
  692. dbg("Subsystem Vendor ID: %x\n", subsystem_vid);
  693. if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) {
  694. err(msg_HPC_non_compaq_or_intel);
  695. rc = -ENODEV;
  696. goto err_disable_device;
  697. }
  698. ctrl = kzalloc(sizeof(struct controller), GFP_KERNEL);
  699. if (!ctrl) {
  700. err("%s : out of memory\n", __FUNCTION__);
  701. rc = -ENOMEM;
  702. goto err_disable_device;
  703. }
  704. rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &subsystem_deviceid);
  705. if (rc) {
  706. err("%s : pci_read_config_word failed\n", __FUNCTION__);
  707. goto err_free_ctrl;
  708. }
  709. info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid);
  710. /* Set Vendor ID, so it can be accessed later from other functions */
  711. ctrl->vendor_id = vendor_id;
  712. switch (subsystem_vid) {
  713. case PCI_VENDOR_ID_COMPAQ:
  714. if (pdev->revision >= 0x13) { /* CIOBX */
  715. ctrl->push_flag = 1;
  716. ctrl->slot_switch_type = 1;
  717. ctrl->push_button = 1;
  718. ctrl->pci_config_space = 1;
  719. ctrl->defeature_PHP = 1;
  720. ctrl->pcix_support = 1;
  721. ctrl->pcix_speed_capability = 1;
  722. pci_read_config_byte(pdev, 0x41, &bus_cap);
  723. if (bus_cap & 0x80) {
  724. dbg("bus max supports 133MHz PCI-X\n");
  725. ctrl->speed_capability = PCI_SPEED_133MHz_PCIX;
  726. break;
  727. }
  728. if (bus_cap & 0x40) {
  729. dbg("bus max supports 100MHz PCI-X\n");
  730. ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
  731. break;
  732. }
  733. if (bus_cap & 20) {
  734. dbg("bus max supports 66MHz PCI-X\n");
  735. ctrl->speed_capability = PCI_SPEED_66MHz_PCIX;
  736. break;
  737. }
  738. if (bus_cap & 10) {
  739. dbg("bus max supports 66MHz PCI\n");
  740. ctrl->speed_capability = PCI_SPEED_66MHz;
  741. break;
  742. }
  743. break;
  744. }
  745. switch (subsystem_deviceid) {
  746. case PCI_SUB_HPC_ID:
  747. /* Original 6500/7000 implementation */
  748. ctrl->slot_switch_type = 1;
  749. ctrl->speed_capability = PCI_SPEED_33MHz;
  750. ctrl->push_button = 0;
  751. ctrl->pci_config_space = 1;
  752. ctrl->defeature_PHP = 1;
  753. ctrl->pcix_support = 0;
  754. ctrl->pcix_speed_capability = 0;
  755. break;
  756. case PCI_SUB_HPC_ID2:
  757. /* First Pushbutton implementation */
  758. ctrl->push_flag = 1;
  759. ctrl->slot_switch_type = 1;
  760. ctrl->speed_capability = PCI_SPEED_33MHz;
  761. ctrl->push_button = 1;
  762. ctrl->pci_config_space = 1;
  763. ctrl->defeature_PHP = 1;
  764. ctrl->pcix_support = 0;
  765. ctrl->pcix_speed_capability = 0;
  766. break;
  767. case PCI_SUB_HPC_ID_INTC:
  768. /* Third party (6500/7000) */
  769. ctrl->slot_switch_type = 1;
  770. ctrl->speed_capability = PCI_SPEED_33MHz;
  771. ctrl->push_button = 0;
  772. ctrl->pci_config_space = 1;
  773. ctrl->defeature_PHP = 1;
  774. ctrl->pcix_support = 0;
  775. ctrl->pcix_speed_capability = 0;
  776. break;
  777. case PCI_SUB_HPC_ID3:
  778. /* First 66 Mhz implementation */
  779. ctrl->push_flag = 1;
  780. ctrl->slot_switch_type = 1;
  781. ctrl->speed_capability = PCI_SPEED_66MHz;
  782. ctrl->push_button = 1;
  783. ctrl->pci_config_space = 1;
  784. ctrl->defeature_PHP = 1;
  785. ctrl->pcix_support = 0;
  786. ctrl->pcix_speed_capability = 0;
  787. break;
  788. case PCI_SUB_HPC_ID4:
  789. /* First PCI-X implementation, 100MHz */
  790. ctrl->push_flag = 1;
  791. ctrl->slot_switch_type = 1;
  792. ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
  793. ctrl->push_button = 1;
  794. ctrl->pci_config_space = 1;
  795. ctrl->defeature_PHP = 1;
  796. ctrl->pcix_support = 1;
  797. ctrl->pcix_speed_capability = 0;
  798. break;
  799. default:
  800. err(msg_HPC_not_supported);
  801. rc = -ENODEV;
  802. goto err_free_ctrl;
  803. }
  804. break;
  805. case PCI_VENDOR_ID_INTEL:
  806. /* Check for speed capability (0=33, 1=66) */
  807. if (subsystem_deviceid & 0x0001) {
  808. ctrl->speed_capability = PCI_SPEED_66MHz;
  809. } else {
  810. ctrl->speed_capability = PCI_SPEED_33MHz;
  811. }
  812. /* Check for push button */
  813. if (subsystem_deviceid & 0x0002) {
  814. /* no push button */
  815. ctrl->push_button = 0;
  816. } else {
  817. /* push button supported */
  818. ctrl->push_button = 1;
  819. }
  820. /* Check for slot switch type (0=mechanical, 1=not mechanical) */
  821. if (subsystem_deviceid & 0x0004) {
  822. /* no switch */
  823. ctrl->slot_switch_type = 0;
  824. } else {
  825. /* switch */
  826. ctrl->slot_switch_type = 1;
  827. }
  828. /* PHP Status (0=De-feature PHP, 1=Normal operation) */
  829. if (subsystem_deviceid & 0x0008) {
  830. ctrl->defeature_PHP = 1; // PHP supported
  831. } else {
  832. ctrl->defeature_PHP = 0; // PHP not supported
  833. }
  834. /* Alternate Base Address Register Interface (0=not supported, 1=supported) */
  835. if (subsystem_deviceid & 0x0010) {
  836. ctrl->alternate_base_address = 1; // supported
  837. } else {
  838. ctrl->alternate_base_address = 0; // not supported
  839. }
  840. /* PCI Config Space Index (0=not supported, 1=supported) */
  841. if (subsystem_deviceid & 0x0020) {
  842. ctrl->pci_config_space = 1; // supported
  843. } else {
  844. ctrl->pci_config_space = 0; // not supported
  845. }
  846. /* PCI-X support */
  847. if (subsystem_deviceid & 0x0080) {
  848. /* PCI-X capable */
  849. ctrl->pcix_support = 1;
  850. /* Frequency of operation in PCI-X mode */
  851. if (subsystem_deviceid & 0x0040) {
  852. /* 133MHz PCI-X if bit 7 is 1 */
  853. ctrl->pcix_speed_capability = 1;
  854. } else {
  855. /* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */
  856. /* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */
  857. ctrl->pcix_speed_capability = 0;
  858. }
  859. } else {
  860. /* Conventional PCI */
  861. ctrl->pcix_support = 0;
  862. ctrl->pcix_speed_capability = 0;
  863. }
  864. break;
  865. default:
  866. err(msg_HPC_not_supported);
  867. rc = -ENODEV;
  868. goto err_free_ctrl;
  869. }
  870. } else {
  871. err(msg_HPC_not_supported);
  872. return -ENODEV;
  873. }
  874. // Tell the user that we found one.
  875. info("Initializing the PCI hot plug controller residing on PCI bus %d\n",
  876. pdev->bus->number);
  877. dbg("Hotplug controller capabilities:\n");
  878. dbg(" speed_capability %d\n", ctrl->speed_capability);
  879. dbg(" slot_switch_type %s\n", ctrl->slot_switch_type ?
  880. "switch present" : "no switch");
  881. dbg(" defeature_PHP %s\n", ctrl->defeature_PHP ?
  882. "PHP supported" : "PHP not supported");
  883. dbg(" alternate_base_address %s\n", ctrl->alternate_base_address ?
  884. "supported" : "not supported");
  885. dbg(" pci_config_space %s\n", ctrl->pci_config_space ?
  886. "supported" : "not supported");
  887. dbg(" pcix_speed_capability %s\n", ctrl->pcix_speed_capability ?
  888. "supported" : "not supported");
  889. dbg(" pcix_support %s\n", ctrl->pcix_support ?
  890. "supported" : "not supported");
  891. ctrl->pci_dev = pdev;
  892. pci_set_drvdata(pdev, ctrl);
  893. /* make our own copy of the pci bus structure,
  894. * as we like tweaking it a lot */
  895. ctrl->pci_bus = kmalloc(sizeof(*ctrl->pci_bus), GFP_KERNEL);
  896. if (!ctrl->pci_bus) {
  897. err("out of memory\n");
  898. rc = -ENOMEM;
  899. goto err_free_ctrl;
  900. }
  901. memcpy(ctrl->pci_bus, pdev->bus, sizeof(*ctrl->pci_bus));
  902. ctrl->bus = pdev->bus->number;
  903. ctrl->rev = pdev->revision;
  904. dbg("bus device function rev: %d %d %d %d\n", ctrl->bus,
  905. PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev);
  906. mutex_init(&ctrl->crit_sect);
  907. init_waitqueue_head(&ctrl->queue);
  908. /* initialize our threads if they haven't already been started up */
  909. rc = one_time_init();
  910. if (rc) {
  911. goto err_free_bus;
  912. }
  913. dbg("pdev = %p\n", pdev);
  914. dbg("pci resource start %llx\n", (unsigned long long)pci_resource_start(pdev, 0));
  915. dbg("pci resource len %llx\n", (unsigned long long)pci_resource_len(pdev, 0));
  916. if (!request_mem_region(pci_resource_start(pdev, 0),
  917. pci_resource_len(pdev, 0), MY_NAME)) {
  918. err("cannot reserve MMIO region\n");
  919. rc = -ENOMEM;
  920. goto err_free_bus;
  921. }
  922. ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0),
  923. pci_resource_len(pdev, 0));
  924. if (!ctrl->hpc_reg) {
  925. err("cannot remap MMIO region %llx @ %llx\n",
  926. (unsigned long long)pci_resource_len(pdev, 0),
  927. (unsigned long long)pci_resource_start(pdev, 0));
  928. rc = -ENODEV;
  929. goto err_free_mem_region;
  930. }
  931. // Check for 66Mhz operation
  932. ctrl->speed = get_controller_speed(ctrl);
  933. /********************************************************
  934. *
  935. * Save configuration headers for this and
  936. * subordinate PCI buses
  937. *
  938. ********************************************************/
  939. // find the physical slot number of the first hot plug slot
  940. /* Get slot won't work for devices behind bridges, but
  941. * in this case it will always be called for the "base"
  942. * bus/dev/func of a slot.
  943. * CS: this is leveraging the PCIIRQ routing code from the kernel
  944. * (pci-pc.c: get_irq_routing_table) */
  945. rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number,
  946. (readb(ctrl->hpc_reg + SLOT_MASK) >> 4),
  947. &(ctrl->first_slot));
  948. dbg("get_slot_mapping: first_slot = %d, returned = %d\n",
  949. ctrl->first_slot, rc);
  950. if (rc) {
  951. err(msg_initialization_err, rc);
  952. goto err_iounmap;
  953. }
  954. // Store PCI Config Space for all devices on this bus
  955. rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK));
  956. if (rc) {
  957. err("%s: unable to save PCI configuration data, error %d\n",
  958. __FUNCTION__, rc);
  959. goto err_iounmap;
  960. }
  961. /*
  962. * Get IO, memory, and IRQ resources for new devices
  963. */
  964. // The next line is required for cpqhp_find_available_resources
  965. ctrl->interrupt = pdev->irq;
  966. if (ctrl->interrupt < 0x10) {
  967. cpqhp_legacy_mode = 1;
  968. dbg("System seems to be configured for Full Table Mapped MPS mode\n");
  969. }
  970. ctrl->cfgspc_irq = 0;
  971. pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq);
  972. rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start);
  973. ctrl->add_support = !rc;
  974. if (rc) {
  975. dbg("cpqhp_find_available_resources = 0x%x\n", rc);
  976. err("unable to locate PCI configuration resources for hot plug add.\n");
  977. goto err_iounmap;
  978. }
  979. /*
  980. * Finish setting up the hot plug ctrl device
  981. */
  982. ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
  983. dbg("NumSlots %d \n", ctrl->slot_device_offset);
  984. ctrl->next_event = 0;
  985. /* Setup the slot information structures */
  986. rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table);
  987. if (rc) {
  988. err(msg_initialization_err, 6);
  989. err("%s: unable to save PCI configuration data, error %d\n",
  990. __FUNCTION__, rc);
  991. goto err_iounmap;
  992. }
  993. /* Mask all general input interrupts */
  994. writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK);
  995. /* set up the interrupt */
  996. dbg("HPC interrupt = %d \n", ctrl->interrupt);
  997. if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr,
  998. IRQF_SHARED, MY_NAME, ctrl)) {
  999. err("Can't get irq %d for the hotplug pci controller\n",
  1000. ctrl->interrupt);
  1001. rc = -ENODEV;
  1002. goto err_iounmap;
  1003. }
  1004. /* Enable Shift Out interrupt and clear it, also enable SERR on power fault */
  1005. temp_word = readw(ctrl->hpc_reg + MISC);
  1006. temp_word |= 0x4006;
  1007. writew(temp_word, ctrl->hpc_reg + MISC);
  1008. // Changed 05/05/97 to clear all interrupts at start
  1009. writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR);
  1010. ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
  1011. writel(0x0L, ctrl->hpc_reg + INT_MASK);
  1012. if (!cpqhp_ctrl_list) {
  1013. cpqhp_ctrl_list = ctrl;
  1014. ctrl->next = NULL;
  1015. } else {
  1016. ctrl->next = cpqhp_ctrl_list;
  1017. cpqhp_ctrl_list = ctrl;
  1018. }
  1019. // turn off empty slots here unless command line option "ON" set
  1020. // Wait for exclusive access to hardware
  1021. mutex_lock(&ctrl->crit_sect);
  1022. num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
  1023. // find first device number for the ctrl
  1024. device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
  1025. while (num_of_slots) {
  1026. dbg("num_of_slots: %d\n", num_of_slots);
  1027. func = cpqhp_slot_find(ctrl->bus, device, 0);
  1028. if (!func)
  1029. break;
  1030. hp_slot = func->device - ctrl->slot_device_offset;
  1031. dbg("hp_slot: %d\n", hp_slot);
  1032. // We have to save the presence info for these slots
  1033. temp_word = ctrl->ctrl_int_comp >> 16;
  1034. func->presence_save = (temp_word >> hp_slot) & 0x01;
  1035. func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
  1036. if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
  1037. func->switch_save = 0;
  1038. } else {
  1039. func->switch_save = 0x10;
  1040. }
  1041. if (!power_mode) {
  1042. if (!func->is_a_board) {
  1043. green_LED_off(ctrl, hp_slot);
  1044. slot_disable(ctrl, hp_slot);
  1045. }
  1046. }
  1047. device++;
  1048. num_of_slots--;
  1049. }
  1050. if (!power_mode) {
  1051. set_SOGO(ctrl);
  1052. // Wait for SOBS to be unset
  1053. wait_for_ctrl_irq(ctrl);
  1054. }
  1055. rc = init_SERR(ctrl);
  1056. if (rc) {
  1057. err("init_SERR failed\n");
  1058. mutex_unlock(&ctrl->crit_sect);
  1059. goto err_free_irq;
  1060. }
  1061. // Done with exclusive hardware access
  1062. mutex_unlock(&ctrl->crit_sect);
  1063. cpqhp_create_debugfs_files(ctrl);
  1064. return 0;
  1065. err_free_irq:
  1066. free_irq(ctrl->interrupt, ctrl);
  1067. err_iounmap:
  1068. iounmap(ctrl->hpc_reg);
  1069. err_free_mem_region:
  1070. release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
  1071. err_free_bus:
  1072. kfree(ctrl->pci_bus);
  1073. err_free_ctrl:
  1074. kfree(ctrl);
  1075. err_disable_device:
  1076. pci_disable_device(pdev);
  1077. return rc;
  1078. }
  1079. static int one_time_init(void)
  1080. {
  1081. int loop;
  1082. int retval = 0;
  1083. if (initialized)
  1084. return 0;
  1085. power_mode = 0;
  1086. retval = pci_print_IRQ_route();
  1087. if (retval)
  1088. goto error;
  1089. dbg("Initialize + Start the notification mechanism \n");
  1090. retval = cpqhp_event_start_thread();
  1091. if (retval)
  1092. goto error;
  1093. dbg("Initialize slot lists\n");
  1094. for (loop = 0; loop < 256; loop++) {
  1095. cpqhp_slot_list[loop] = NULL;
  1096. }
  1097. // FIXME: We also need to hook the NMI handler eventually.
  1098. // this also needs to be worked with Christoph
  1099. // register_NMI_handler();
  1100. // Map rom address
  1101. cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
  1102. if (!cpqhp_rom_start) {
  1103. err ("Could not ioremap memory region for ROM\n");
  1104. retval = -EIO;
  1105. goto error;
  1106. }
  1107. /* Now, map the int15 entry point if we are on compaq specific hardware */
  1108. compaq_nvram_init(cpqhp_rom_start);
  1109. /* Map smbios table entry point structure */
  1110. smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start,
  1111. cpqhp_rom_start + ROM_PHY_LEN);
  1112. if (!smbios_table) {
  1113. err ("Could not find the SMBIOS pointer in memory\n");
  1114. retval = -EIO;
  1115. goto error_rom_start;
  1116. }
  1117. smbios_start = ioremap(readl(smbios_table + ST_ADDRESS),
  1118. readw(smbios_table + ST_LENGTH));
  1119. if (!smbios_start) {
  1120. err ("Could not ioremap memory region taken from SMBIOS values\n");
  1121. retval = -EIO;
  1122. goto error_smbios_start;
  1123. }
  1124. initialized = 1;
  1125. return retval;
  1126. error_smbios_start:
  1127. iounmap(smbios_start);
  1128. error_rom_start:
  1129. iounmap(cpqhp_rom_start);
  1130. error:
  1131. return retval;
  1132. }
  1133. static void __exit unload_cpqphpd(void)
  1134. {
  1135. struct pci_func *next;
  1136. struct pci_func *TempSlot;
  1137. int loop;
  1138. u32 rc;
  1139. struct controller *ctrl;
  1140. struct controller *tctrl;
  1141. struct pci_resource *res;
  1142. struct pci_resource *tres;
  1143. rc = compaq_nvram_store(cpqhp_rom_start);
  1144. ctrl = cpqhp_ctrl_list;
  1145. while (ctrl) {
  1146. if (ctrl->hpc_reg) {
  1147. u16 misc;
  1148. rc = read_slot_enable (ctrl);
  1149. writeb(0, ctrl->hpc_reg + SLOT_SERR);
  1150. writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK);
  1151. misc = readw(ctrl->hpc_reg + MISC);
  1152. misc &= 0xFFFD;
  1153. writew(misc, ctrl->hpc_reg + MISC);
  1154. }
  1155. ctrl_slot_cleanup(ctrl);
  1156. res = ctrl->io_head;
  1157. while (res) {
  1158. tres = res;
  1159. res = res->next;
  1160. kfree(tres);
  1161. }
  1162. res = ctrl->mem_head;
  1163. while (res) {
  1164. tres = res;
  1165. res = res->next;
  1166. kfree(tres);
  1167. }
  1168. res = ctrl->p_mem_head;
  1169. while (res) {
  1170. tres = res;
  1171. res = res->next;
  1172. kfree(tres);
  1173. }
  1174. res = ctrl->bus_head;
  1175. while (res) {
  1176. tres = res;
  1177. res = res->next;
  1178. kfree(tres);
  1179. }
  1180. kfree (ctrl->pci_bus);
  1181. tctrl = ctrl;
  1182. ctrl = ctrl->next;
  1183. kfree(tctrl);
  1184. }
  1185. for (loop = 0; loop < 256; loop++) {
  1186. next = cpqhp_slot_list[loop];
  1187. while (next != NULL) {
  1188. res = next->io_head;
  1189. while (res) {
  1190. tres = res;
  1191. res = res->next;
  1192. kfree(tres);
  1193. }
  1194. res = next->mem_head;
  1195. while (res) {
  1196. tres = res;
  1197. res = res->next;
  1198. kfree(tres);
  1199. }
  1200. res = next->p_mem_head;
  1201. while (res) {
  1202. tres = res;
  1203. res = res->next;
  1204. kfree(tres);
  1205. }
  1206. res = next->bus_head;
  1207. while (res) {
  1208. tres = res;
  1209. res = res->next;
  1210. kfree(tres);
  1211. }
  1212. TempSlot = next;
  1213. next = next->next;
  1214. kfree(TempSlot);
  1215. }
  1216. }
  1217. // Stop the notification mechanism
  1218. if (initialized)
  1219. cpqhp_event_stop_thread();
  1220. //unmap the rom address
  1221. if (cpqhp_rom_start)
  1222. iounmap(cpqhp_rom_start);
  1223. if (smbios_start)
  1224. iounmap(smbios_start);
  1225. }
  1226. static struct pci_device_id hpcd_pci_tbl[] = {
  1227. {
  1228. /* handle any PCI Hotplug controller */
  1229. .class = ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00),
  1230. .class_mask = ~0,
  1231. /* no matter who makes it */
  1232. .vendor = PCI_ANY_ID,
  1233. .device = PCI_ANY_ID,
  1234. .subvendor = PCI_ANY_ID,
  1235. .subdevice = PCI_ANY_ID,
  1236. }, { /* end: all zeroes */ }
  1237. };
  1238. MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl);
  1239. static struct pci_driver cpqhpc_driver = {
  1240. .name = "compaq_pci_hotplug",
  1241. .id_table = hpcd_pci_tbl,
  1242. .probe = cpqhpc_probe,
  1243. /* remove: cpqhpc_remove_one, */
  1244. };
  1245. static int __init cpqhpc_init(void)
  1246. {
  1247. int result;
  1248. cpqhp_debug = debug;
  1249. info (DRIVER_DESC " version: " DRIVER_VERSION "\n");
  1250. cpqhp_initialize_debugfs();
  1251. result = pci_register_driver(&cpqhpc_driver);
  1252. dbg("pci_register_driver = %d\n", result);
  1253. return result;
  1254. }
  1255. static void __exit cpqhpc_cleanup(void)
  1256. {
  1257. dbg("unload_cpqphpd()\n");
  1258. unload_cpqphpd();
  1259. dbg("pci_unregister_driver\n");
  1260. pci_unregister_driver(&cpqhpc_driver);
  1261. cpqhp_shutdown_debugfs();
  1262. }
  1263. module_init(cpqhpc_init);
  1264. module_exit(cpqhpc_cleanup);