rt2x00pci.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486
  1. /*
  2. Copyright (C) 2004 - 2007 rt2x00 SourceForge Project
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the
  14. Free Software Foundation, Inc.,
  15. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  16. */
  17. /*
  18. Module: rt2x00pci
  19. Abstract: rt2x00 generic pci device routines.
  20. */
  21. /*
  22. * Set enviroment defines for rt2x00.h
  23. */
  24. #define DRV_NAME "rt2x00pci"
  25. #include <linux/dma-mapping.h>
  26. #include <linux/kernel.h>
  27. #include <linux/module.h>
  28. #include <linux/pci.h>
  29. #include "rt2x00.h"
  30. #include "rt2x00pci.h"
  31. /*
  32. * Beacon handlers.
  33. */
  34. int rt2x00pci_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  35. struct ieee80211_tx_control *control)
  36. {
  37. struct rt2x00_dev *rt2x00dev = hw->priv;
  38. struct data_ring *ring =
  39. rt2x00lib_get_ring(rt2x00dev, IEEE80211_TX_QUEUE_BEACON);
  40. struct data_entry *entry = rt2x00_get_data_entry(ring);
  41. /*
  42. * Just in case mac80211 doesn't set this correctly,
  43. * but we need this queue set for the descriptor
  44. * initialization.
  45. */
  46. control->queue = IEEE80211_TX_QUEUE_BEACON;
  47. /*
  48. * Update the beacon entry.
  49. */
  50. memcpy(entry->data_addr, skb->data, skb->len);
  51. rt2x00lib_write_tx_desc(rt2x00dev, entry->priv,
  52. (struct ieee80211_hdr *)skb->data,
  53. skb->len, control);
  54. /*
  55. * Enable beacon generation.
  56. */
  57. rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, control->queue);
  58. return 0;
  59. }
  60. EXPORT_SYMBOL_GPL(rt2x00pci_beacon_update);
  61. /*
  62. * TX data handlers.
  63. */
  64. int rt2x00pci_write_tx_data(struct rt2x00_dev *rt2x00dev,
  65. struct data_ring *ring, struct sk_buff *skb,
  66. struct ieee80211_tx_control *control)
  67. {
  68. struct ieee80211_hdr *ieee80211hdr = (struct ieee80211_hdr *)skb->data;
  69. struct data_entry *entry = rt2x00_get_data_entry(ring);
  70. struct data_desc *txd = entry->priv;
  71. u32 word;
  72. if (rt2x00_ring_full(ring)) {
  73. ieee80211_stop_queue(rt2x00dev->hw, control->queue);
  74. return -EINVAL;
  75. }
  76. rt2x00_desc_read(txd, 0, &word);
  77. if (rt2x00_get_field32(word, TXD_ENTRY_OWNER_NIC) ||
  78. rt2x00_get_field32(word, TXD_ENTRY_VALID)) {
  79. ERROR(rt2x00dev,
  80. "Arrived at non-free entry in the non-full queue %d.\n"
  81. "Please file bug report to %s.\n",
  82. control->queue, DRV_PROJECT);
  83. ieee80211_stop_queue(rt2x00dev->hw, control->queue);
  84. return -EINVAL;
  85. }
  86. entry->skb = skb;
  87. memcpy(&entry->tx_status.control, control, sizeof(*control));
  88. memcpy(entry->data_addr, skb->data, skb->len);
  89. rt2x00lib_write_tx_desc(rt2x00dev, txd, ieee80211hdr,
  90. skb->len, control);
  91. rt2x00_ring_index_inc(ring);
  92. if (rt2x00_ring_full(ring))
  93. ieee80211_stop_queue(rt2x00dev->hw, control->queue);
  94. return 0;
  95. }
  96. EXPORT_SYMBOL_GPL(rt2x00pci_write_tx_data);
  97. /*
  98. * RX data handlers.
  99. */
  100. void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev)
  101. {
  102. struct data_ring *ring = rt2x00dev->rx;
  103. struct data_entry *entry;
  104. struct data_desc *rxd;
  105. struct sk_buff *skb;
  106. struct ieee80211_hdr *hdr;
  107. struct rxdata_entry_desc desc;
  108. int header_size;
  109. int align;
  110. u32 word;
  111. while (1) {
  112. entry = rt2x00_get_data_entry(ring);
  113. rxd = entry->priv;
  114. rt2x00_desc_read(rxd, 0, &word);
  115. if (rt2x00_get_field32(word, RXD_ENTRY_OWNER_NIC))
  116. break;
  117. memset(&desc, 0x00, sizeof(desc));
  118. rt2x00dev->ops->lib->fill_rxdone(entry, &desc);
  119. hdr = (struct ieee80211_hdr *)entry->data_addr;
  120. header_size =
  121. ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_control));
  122. /*
  123. * The data behind the ieee80211 header must be
  124. * aligned on a 4 byte boundary.
  125. */
  126. align = header_size % 4;
  127. /*
  128. * Allocate the sk_buffer, initialize it and copy
  129. * all data into it.
  130. */
  131. skb = dev_alloc_skb(desc.size + align);
  132. if (!skb)
  133. return;
  134. skb_reserve(skb, align);
  135. memcpy(skb_put(skb, desc.size), entry->data_addr, desc.size);
  136. /*
  137. * Send the frame to rt2x00lib for further processing.
  138. */
  139. rt2x00lib_rxdone(entry, skb, &desc);
  140. if (test_bit(DEVICE_ENABLED_RADIO, &ring->rt2x00dev->flags)) {
  141. rt2x00_set_field32(&word, RXD_ENTRY_OWNER_NIC, 1);
  142. rt2x00_desc_write(rxd, 0, word);
  143. }
  144. rt2x00_ring_index_inc(ring);
  145. }
  146. }
  147. EXPORT_SYMBOL_GPL(rt2x00pci_rxdone);
  148. /*
  149. * Device initialization handlers.
  150. */
  151. #define priv_offset(__ring, __i) \
  152. ({ \
  153. ring->data_addr + (i * ring->desc_size); \
  154. })
  155. #define data_addr_offset(__ring, __i) \
  156. ({ \
  157. (__ring)->data_addr + \
  158. ((__ring)->stats.limit * (__ring)->desc_size) + \
  159. ((__i) * (__ring)->data_size); \
  160. })
  161. #define data_dma_offset(__ring, __i) \
  162. ({ \
  163. (__ring)->data_dma + \
  164. ((__ring)->stats.limit * (__ring)->desc_size) + \
  165. ((__i) * (__ring)->data_size); \
  166. })
  167. static int rt2x00pci_alloc_dma(struct rt2x00_dev *rt2x00dev,
  168. struct data_ring *ring)
  169. {
  170. unsigned int i;
  171. /*
  172. * Allocate DMA memory for descriptor and buffer.
  173. */
  174. ring->data_addr = pci_alloc_consistent(rt2x00dev_pci(rt2x00dev),
  175. rt2x00_get_ring_size(ring),
  176. &ring->data_dma);
  177. if (!ring->data_addr)
  178. return -ENOMEM;
  179. /*
  180. * Initialize all ring entries to contain valid
  181. * addresses.
  182. */
  183. for (i = 0; i < ring->stats.limit; i++) {
  184. ring->entry[i].priv = priv_offset(ring, i);
  185. ring->entry[i].data_addr = data_addr_offset(ring, i);
  186. ring->entry[i].data_dma = data_dma_offset(ring, i);
  187. }
  188. return 0;
  189. }
  190. static void rt2x00pci_free_dma(struct rt2x00_dev *rt2x00dev,
  191. struct data_ring *ring)
  192. {
  193. if (ring->data_addr)
  194. pci_free_consistent(rt2x00dev_pci(rt2x00dev),
  195. rt2x00_get_ring_size(ring),
  196. ring->data_addr, ring->data_dma);
  197. ring->data_addr = NULL;
  198. }
  199. int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev)
  200. {
  201. struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev);
  202. struct data_ring *ring;
  203. int status;
  204. /*
  205. * Allocate DMA
  206. */
  207. ring_for_each(rt2x00dev, ring) {
  208. status = rt2x00pci_alloc_dma(rt2x00dev, ring);
  209. if (status)
  210. goto exit;
  211. }
  212. /*
  213. * Register interrupt handler.
  214. */
  215. status = request_irq(pci_dev->irq, rt2x00dev->ops->lib->irq_handler,
  216. IRQF_SHARED, pci_name(pci_dev), rt2x00dev);
  217. if (status) {
  218. ERROR(rt2x00dev, "IRQ %d allocation failed (error %d).\n",
  219. pci_dev->irq, status);
  220. return status;
  221. }
  222. return 0;
  223. exit:
  224. rt2x00pci_uninitialize(rt2x00dev);
  225. return status;
  226. }
  227. EXPORT_SYMBOL_GPL(rt2x00pci_initialize);
  228. void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev)
  229. {
  230. struct data_ring *ring;
  231. /*
  232. * Free irq line.
  233. */
  234. free_irq(rt2x00dev_pci(rt2x00dev)->irq, rt2x00dev);
  235. /*
  236. * Free DMA
  237. */
  238. ring_for_each(rt2x00dev, ring)
  239. rt2x00pci_free_dma(rt2x00dev, ring);
  240. }
  241. EXPORT_SYMBOL_GPL(rt2x00pci_uninitialize);
  242. /*
  243. * PCI driver handlers.
  244. */
  245. static void rt2x00pci_free_reg(struct rt2x00_dev *rt2x00dev)
  246. {
  247. kfree(rt2x00dev->rf);
  248. rt2x00dev->rf = NULL;
  249. kfree(rt2x00dev->eeprom);
  250. rt2x00dev->eeprom = NULL;
  251. if (rt2x00dev->csr_addr) {
  252. iounmap(rt2x00dev->csr_addr);
  253. rt2x00dev->csr_addr = NULL;
  254. }
  255. }
  256. static int rt2x00pci_alloc_reg(struct rt2x00_dev *rt2x00dev)
  257. {
  258. struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev);
  259. rt2x00dev->csr_addr = ioremap(pci_resource_start(pci_dev, 0),
  260. pci_resource_len(pci_dev, 0));
  261. if (!rt2x00dev->csr_addr)
  262. goto exit;
  263. rt2x00dev->eeprom = kzalloc(rt2x00dev->ops->eeprom_size, GFP_KERNEL);
  264. if (!rt2x00dev->eeprom)
  265. goto exit;
  266. rt2x00dev->rf = kzalloc(rt2x00dev->ops->rf_size, GFP_KERNEL);
  267. if (!rt2x00dev->rf)
  268. goto exit;
  269. return 0;
  270. exit:
  271. ERROR_PROBE("Failed to allocate registers.\n");
  272. rt2x00pci_free_reg(rt2x00dev);
  273. return -ENOMEM;
  274. }
  275. int rt2x00pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
  276. {
  277. struct rt2x00_ops *ops = (struct rt2x00_ops *)id->driver_data;
  278. struct ieee80211_hw *hw;
  279. struct rt2x00_dev *rt2x00dev;
  280. int retval;
  281. retval = pci_request_regions(pci_dev, pci_name(pci_dev));
  282. if (retval) {
  283. ERROR_PROBE("PCI request regions failed.\n");
  284. return retval;
  285. }
  286. retval = pci_enable_device(pci_dev);
  287. if (retval) {
  288. ERROR_PROBE("Enable device failed.\n");
  289. goto exit_release_regions;
  290. }
  291. pci_set_master(pci_dev);
  292. if (pci_set_mwi(pci_dev))
  293. ERROR_PROBE("MWI not available.\n");
  294. if (pci_set_dma_mask(pci_dev, DMA_64BIT_MASK) &&
  295. pci_set_dma_mask(pci_dev, DMA_32BIT_MASK)) {
  296. ERROR_PROBE("PCI DMA not supported.\n");
  297. retval = -EIO;
  298. goto exit_disable_device;
  299. }
  300. hw = ieee80211_alloc_hw(sizeof(struct rt2x00_dev), ops->hw);
  301. if (!hw) {
  302. ERROR_PROBE("Failed to allocate hardware.\n");
  303. retval = -ENOMEM;
  304. goto exit_disable_device;
  305. }
  306. pci_set_drvdata(pci_dev, hw);
  307. rt2x00dev = hw->priv;
  308. rt2x00dev->dev = pci_dev;
  309. rt2x00dev->ops = ops;
  310. rt2x00dev->hw = hw;
  311. retval = rt2x00pci_alloc_reg(rt2x00dev);
  312. if (retval)
  313. goto exit_free_device;
  314. retval = rt2x00lib_probe_dev(rt2x00dev);
  315. if (retval)
  316. goto exit_free_reg;
  317. return 0;
  318. exit_free_reg:
  319. rt2x00pci_free_reg(rt2x00dev);
  320. exit_free_device:
  321. ieee80211_free_hw(hw);
  322. exit_disable_device:
  323. if (retval != -EBUSY)
  324. pci_disable_device(pci_dev);
  325. exit_release_regions:
  326. pci_release_regions(pci_dev);
  327. pci_set_drvdata(pci_dev, NULL);
  328. return retval;
  329. }
  330. EXPORT_SYMBOL_GPL(rt2x00pci_probe);
  331. void rt2x00pci_remove(struct pci_dev *pci_dev)
  332. {
  333. struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
  334. struct rt2x00_dev *rt2x00dev = hw->priv;
  335. /*
  336. * Free all allocated data.
  337. */
  338. rt2x00lib_remove_dev(rt2x00dev);
  339. rt2x00pci_free_reg(rt2x00dev);
  340. ieee80211_free_hw(hw);
  341. /*
  342. * Free the PCI device data.
  343. */
  344. pci_set_drvdata(pci_dev, NULL);
  345. pci_disable_device(pci_dev);
  346. pci_release_regions(pci_dev);
  347. }
  348. EXPORT_SYMBOL_GPL(rt2x00pci_remove);
  349. #ifdef CONFIG_PM
  350. int rt2x00pci_suspend(struct pci_dev *pci_dev, pm_message_t state)
  351. {
  352. struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
  353. struct rt2x00_dev *rt2x00dev = hw->priv;
  354. int retval;
  355. retval = rt2x00lib_suspend(rt2x00dev, state);
  356. if (retval)
  357. return retval;
  358. rt2x00pci_free_reg(rt2x00dev);
  359. pci_save_state(pci_dev);
  360. pci_disable_device(pci_dev);
  361. return pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state));
  362. }
  363. EXPORT_SYMBOL_GPL(rt2x00pci_suspend);
  364. int rt2x00pci_resume(struct pci_dev *pci_dev)
  365. {
  366. struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
  367. struct rt2x00_dev *rt2x00dev = hw->priv;
  368. int retval;
  369. if (pci_set_power_state(pci_dev, PCI_D0) ||
  370. pci_enable_device(pci_dev) ||
  371. pci_restore_state(pci_dev)) {
  372. ERROR(rt2x00dev, "Failed to resume device.\n");
  373. return -EIO;
  374. }
  375. retval = rt2x00pci_alloc_reg(rt2x00dev);
  376. if (retval)
  377. return retval;
  378. retval = rt2x00lib_resume(rt2x00dev);
  379. if (retval)
  380. goto exit_free_reg;
  381. return 0;
  382. exit_free_reg:
  383. rt2x00pci_free_reg(rt2x00dev);
  384. return retval;
  385. }
  386. EXPORT_SYMBOL_GPL(rt2x00pci_resume);
  387. #endif /* CONFIG_PM */
  388. /*
  389. * rt2x00pci module information.
  390. */
  391. MODULE_AUTHOR(DRV_PROJECT);
  392. MODULE_VERSION(DRV_VERSION);
  393. MODULE_DESCRIPTION("rt2x00 library");
  394. MODULE_LICENSE("GPL");