p54common.c 28 KB

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  1. /*
  2. * Common code for mac80211 Prism54 drivers
  3. *
  4. * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
  5. * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
  6. *
  7. * Based on the islsm (softmac prism54) driver, which is:
  8. * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/init.h>
  15. #include <linux/firmware.h>
  16. #include <linux/etherdevice.h>
  17. #include <net/mac80211.h>
  18. #include "p54.h"
  19. #include "p54common.h"
  20. MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  21. MODULE_DESCRIPTION("Softmac Prism54 common code");
  22. MODULE_LICENSE("GPL");
  23. MODULE_ALIAS("prism54common");
  24. void p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
  25. {
  26. struct p54_common *priv = dev->priv;
  27. struct bootrec_exp_if *exp_if;
  28. struct bootrec *bootrec;
  29. u32 *data = (u32 *)fw->data;
  30. u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
  31. u8 *fw_version = NULL;
  32. size_t len;
  33. int i;
  34. if (priv->rx_start)
  35. return;
  36. while (data < end_data && *data)
  37. data++;
  38. while (data < end_data && !*data)
  39. data++;
  40. bootrec = (struct bootrec *) data;
  41. while (bootrec->data <= end_data &&
  42. (bootrec->data + (len = le32_to_cpu(bootrec->len))) <= end_data) {
  43. u32 code = le32_to_cpu(bootrec->code);
  44. switch (code) {
  45. case BR_CODE_COMPONENT_ID:
  46. switch (be32_to_cpu(*bootrec->data)) {
  47. case FW_FMAC:
  48. printk(KERN_INFO "p54: FreeMAC firmware\n");
  49. break;
  50. case FW_LM20:
  51. printk(KERN_INFO "p54: LM20 firmware\n");
  52. break;
  53. case FW_LM86:
  54. printk(KERN_INFO "p54: LM86 firmware\n");
  55. break;
  56. case FW_LM87:
  57. printk(KERN_INFO "p54: LM87 firmware - not supported yet!\n");
  58. break;
  59. default:
  60. printk(KERN_INFO "p54: unknown firmware\n");
  61. break;
  62. }
  63. break;
  64. case BR_CODE_COMPONENT_VERSION:
  65. /* 24 bytes should be enough for all firmwares */
  66. if (strnlen((unsigned char*)bootrec->data, 24) < 24)
  67. fw_version = (unsigned char*)bootrec->data;
  68. break;
  69. case BR_CODE_DESCR:
  70. priv->rx_start = le32_to_cpu(bootrec->data[1]);
  71. /* FIXME add sanity checking */
  72. priv->rx_end = le32_to_cpu(bootrec->data[2]) - 0x3500;
  73. break;
  74. case BR_CODE_EXPOSED_IF:
  75. exp_if = (struct bootrec_exp_if *) bootrec->data;
  76. for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
  77. if (exp_if[i].if_id == 0x1a)
  78. priv->fw_var = le16_to_cpu(exp_if[i].variant);
  79. break;
  80. case BR_CODE_DEPENDENT_IF:
  81. break;
  82. case BR_CODE_END_OF_BRA:
  83. case LEGACY_BR_CODE_END_OF_BRA:
  84. end_data = NULL;
  85. break;
  86. default:
  87. break;
  88. }
  89. bootrec = (struct bootrec *)&bootrec->data[len];
  90. }
  91. if (fw_version)
  92. printk(KERN_INFO "p54: FW rev %s - Softmac protocol %x.%x\n",
  93. fw_version, priv->fw_var >> 8, priv->fw_var & 0xff);
  94. if (priv->fw_var >= 0x300) {
  95. /* Firmware supports QoS, use it! */
  96. priv->tx_stats.data[0].limit = 3;
  97. priv->tx_stats.data[1].limit = 4;
  98. priv->tx_stats.data[2].limit = 3;
  99. priv->tx_stats.data[3].limit = 1;
  100. dev->queues = 4;
  101. }
  102. }
  103. EXPORT_SYMBOL_GPL(p54_parse_firmware);
  104. static int p54_convert_rev0_to_rev1(struct ieee80211_hw *dev,
  105. struct pda_pa_curve_data *curve_data)
  106. {
  107. struct p54_common *priv = dev->priv;
  108. struct pda_pa_curve_data_sample_rev1 *rev1;
  109. struct pda_pa_curve_data_sample_rev0 *rev0;
  110. size_t cd_len = sizeof(*curve_data) +
  111. (curve_data->points_per_channel*sizeof(*rev1) + 2) *
  112. curve_data->channels;
  113. unsigned int i, j;
  114. void *source, *target;
  115. priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
  116. if (!priv->curve_data)
  117. return -ENOMEM;
  118. memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
  119. source = curve_data->data;
  120. target = priv->curve_data->data;
  121. for (i = 0; i < curve_data->channels; i++) {
  122. __le16 *freq = source;
  123. source += sizeof(__le16);
  124. *((__le16 *)target) = *freq;
  125. target += sizeof(__le16);
  126. for (j = 0; j < curve_data->points_per_channel; j++) {
  127. rev1 = target;
  128. rev0 = source;
  129. rev1->rf_power = rev0->rf_power;
  130. rev1->pa_detector = rev0->pa_detector;
  131. rev1->data_64qam = rev0->pcv;
  132. /* "invent" the points for the other modulations */
  133. #define SUB(x,y) (u8)((x) - (y)) > (x) ? 0 : (x) - (y)
  134. rev1->data_16qam = SUB(rev0->pcv, 12);
  135. rev1->data_qpsk = SUB(rev1->data_16qam, 12);
  136. rev1->data_bpsk = SUB(rev1->data_qpsk, 12);
  137. rev1->data_barker= SUB(rev1->data_bpsk, 14);
  138. #undef SUB
  139. target += sizeof(*rev1);
  140. source += sizeof(*rev0);
  141. }
  142. }
  143. return 0;
  144. }
  145. int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
  146. {
  147. struct p54_common *priv = dev->priv;
  148. struct eeprom_pda_wrap *wrap = NULL;
  149. struct pda_entry *entry;
  150. int i = 0;
  151. unsigned int data_len, entry_len;
  152. void *tmp;
  153. int err;
  154. wrap = (struct eeprom_pda_wrap *) eeprom;
  155. entry = (void *)wrap->data + wrap->len;
  156. i += 2;
  157. i += le16_to_cpu(entry->len)*2;
  158. while (i < len) {
  159. entry_len = le16_to_cpu(entry->len);
  160. data_len = ((entry_len - 1) << 1);
  161. switch (le16_to_cpu(entry->code)) {
  162. case PDR_MAC_ADDRESS:
  163. SET_IEEE80211_PERM_ADDR(dev, entry->data);
  164. break;
  165. case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS:
  166. if (data_len < 2) {
  167. err = -EINVAL;
  168. goto err;
  169. }
  170. if (2 + entry->data[1]*sizeof(*priv->output_limit) > data_len) {
  171. err = -EINVAL;
  172. goto err;
  173. }
  174. priv->output_limit = kmalloc(entry->data[1] *
  175. sizeof(*priv->output_limit), GFP_KERNEL);
  176. if (!priv->output_limit) {
  177. err = -ENOMEM;
  178. goto err;
  179. }
  180. memcpy(priv->output_limit, &entry->data[2],
  181. entry->data[1]*sizeof(*priv->output_limit));
  182. priv->output_limit_len = entry->data[1];
  183. break;
  184. case PDR_PRISM_PA_CAL_CURVE_DATA:
  185. if (data_len < sizeof(struct pda_pa_curve_data)) {
  186. err = -EINVAL;
  187. goto err;
  188. }
  189. if (((struct pda_pa_curve_data *)entry->data)->cal_method_rev) {
  190. priv->curve_data = kmalloc(data_len, GFP_KERNEL);
  191. if (!priv->curve_data) {
  192. err = -ENOMEM;
  193. goto err;
  194. }
  195. memcpy(priv->curve_data, entry->data, data_len);
  196. } else {
  197. err = p54_convert_rev0_to_rev1(dev, (struct pda_pa_curve_data *)entry->data);
  198. if (err)
  199. goto err;
  200. }
  201. break;
  202. case PDR_PRISM_ZIF_TX_IQ_CALIBRATION:
  203. priv->iq_autocal = kmalloc(data_len, GFP_KERNEL);
  204. if (!priv->iq_autocal) {
  205. err = -ENOMEM;
  206. goto err;
  207. }
  208. memcpy(priv->iq_autocal, entry->data, data_len);
  209. priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry);
  210. break;
  211. case PDR_INTERFACE_LIST:
  212. tmp = entry->data;
  213. while ((u8 *)tmp < entry->data + data_len) {
  214. struct bootrec_exp_if *exp_if = tmp;
  215. if (le16_to_cpu(exp_if->if_id) == 0xF)
  216. priv->rxhw = exp_if->variant & cpu_to_le16(0x07);
  217. tmp += sizeof(struct bootrec_exp_if);
  218. }
  219. break;
  220. case PDR_HARDWARE_PLATFORM_COMPONENT_ID:
  221. priv->version = *(u8 *)(entry->data + 1);
  222. break;
  223. case PDR_END:
  224. i = len;
  225. break;
  226. }
  227. entry = (void *)entry + (entry_len + 1)*2;
  228. i += 2;
  229. i += entry_len*2;
  230. }
  231. if (!priv->iq_autocal || !priv->output_limit || !priv->curve_data) {
  232. printk(KERN_ERR "p54: not all required entries found in eeprom!\n");
  233. err = -EINVAL;
  234. goto err;
  235. }
  236. return 0;
  237. err:
  238. if (priv->iq_autocal) {
  239. kfree(priv->iq_autocal);
  240. priv->iq_autocal = NULL;
  241. }
  242. if (priv->output_limit) {
  243. kfree(priv->output_limit);
  244. priv->output_limit = NULL;
  245. }
  246. if (priv->curve_data) {
  247. kfree(priv->curve_data);
  248. priv->curve_data = NULL;
  249. }
  250. printk(KERN_ERR "p54: eeprom parse failed!\n");
  251. return err;
  252. }
  253. EXPORT_SYMBOL_GPL(p54_parse_eeprom);
  254. void p54_fill_eeprom_readback(struct p54_control_hdr *hdr)
  255. {
  256. struct p54_eeprom_lm86 *eeprom_hdr;
  257. hdr->magic1 = cpu_to_le16(0x8000);
  258. hdr->len = cpu_to_le16(sizeof(*eeprom_hdr) + 0x2000);
  259. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_EEPROM_READBACK);
  260. hdr->retry1 = hdr->retry2 = 0;
  261. eeprom_hdr = (struct p54_eeprom_lm86 *) hdr->data;
  262. eeprom_hdr->offset = 0x0;
  263. eeprom_hdr->len = cpu_to_le16(0x2000);
  264. }
  265. EXPORT_SYMBOL_GPL(p54_fill_eeprom_readback);
  266. static void p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
  267. {
  268. struct p54_rx_hdr *hdr = (struct p54_rx_hdr *) skb->data;
  269. struct ieee80211_rx_status rx_status = {0};
  270. u16 freq = le16_to_cpu(hdr->freq);
  271. rx_status.ssi = hdr->rssi;
  272. rx_status.rate = hdr->rate & 0x1f; /* report short preambles & CCK too */
  273. rx_status.channel = freq == 2484 ? 14 : (freq - 2407)/5;
  274. rx_status.freq = freq;
  275. rx_status.phymode = MODE_IEEE80211G;
  276. rx_status.antenna = hdr->antenna;
  277. rx_status.mactime = le64_to_cpu(hdr->timestamp);
  278. skb_pull(skb, sizeof(*hdr));
  279. skb_trim(skb, le16_to_cpu(hdr->len));
  280. ieee80211_rx_irqsafe(dev, skb, &rx_status);
  281. }
  282. static void inline p54_wake_free_queues(struct ieee80211_hw *dev)
  283. {
  284. struct p54_common *priv = dev->priv;
  285. int i;
  286. /* ieee80211_start_queues is great if all queues are really empty.
  287. * But, what if some are full? */
  288. for (i = 0; i < dev->queues; i++)
  289. if (priv->tx_stats.data[i].len < priv->tx_stats.data[i].limit)
  290. ieee80211_wake_queue(dev, i);
  291. }
  292. static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
  293. {
  294. struct p54_common *priv = dev->priv;
  295. struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
  296. struct p54_frame_sent_hdr *payload = (struct p54_frame_sent_hdr *) hdr->data;
  297. struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next;
  298. u32 addr = le32_to_cpu(hdr->req_id) - 0x70;
  299. struct memrecord *range = NULL;
  300. u32 freed = 0;
  301. u32 last_addr = priv->rx_start;
  302. while (entry != (struct sk_buff *)&priv->tx_queue) {
  303. range = (struct memrecord *)&entry->cb;
  304. if (range->start_addr == addr) {
  305. struct ieee80211_tx_status status = {{0}};
  306. struct p54_control_hdr *entry_hdr;
  307. struct p54_tx_control_allocdata *entry_data;
  308. int pad = 0;
  309. if (entry->next != (struct sk_buff *)&priv->tx_queue)
  310. freed = ((struct memrecord *)&entry->next->cb)->start_addr - last_addr;
  311. else
  312. freed = priv->rx_end - last_addr;
  313. last_addr = range->end_addr;
  314. __skb_unlink(entry, &priv->tx_queue);
  315. if (!range->control) {
  316. kfree_skb(entry);
  317. break;
  318. }
  319. memcpy(&status.control, range->control,
  320. sizeof(status.control));
  321. kfree(range->control);
  322. priv->tx_stats.data[status.control.queue].len--;
  323. entry_hdr = (struct p54_control_hdr *) entry->data;
  324. entry_data = (struct p54_tx_control_allocdata *) entry_hdr->data;
  325. if ((entry_hdr->magic1 & cpu_to_le16(0x4000)) != 0)
  326. pad = entry_data->align[0];
  327. if (!status.control.flags & IEEE80211_TXCTL_NO_ACK) {
  328. if (!(payload->status & 0x01))
  329. status.flags |= IEEE80211_TX_STATUS_ACK;
  330. else
  331. status.excessive_retries = 1;
  332. }
  333. status.retry_count = payload->retries - 1;
  334. status.ack_signal = le16_to_cpu(payload->ack_rssi);
  335. skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
  336. ieee80211_tx_status_irqsafe(dev, entry, &status);
  337. break;
  338. } else
  339. last_addr = range->end_addr;
  340. entry = entry->next;
  341. }
  342. if (freed >= IEEE80211_MAX_RTS_THRESHOLD + 0x170 +
  343. sizeof(struct p54_control_hdr))
  344. p54_wake_free_queues(dev);
  345. }
  346. static void p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb)
  347. {
  348. struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
  349. switch (le16_to_cpu(hdr->type)) {
  350. case P54_CONTROL_TYPE_TXDONE:
  351. p54_rx_frame_sent(dev, skb);
  352. break;
  353. case P54_CONTROL_TYPE_BBP:
  354. break;
  355. default:
  356. printk(KERN_DEBUG "%s: not handling 0x%02x type control frame\n",
  357. wiphy_name(dev->wiphy), le16_to_cpu(hdr->type));
  358. break;
  359. }
  360. }
  361. /* returns zero if skb can be reused */
  362. int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb)
  363. {
  364. u8 type = le16_to_cpu(*((__le16 *)skb->data)) >> 8;
  365. switch (type) {
  366. case 0x00:
  367. case 0x01:
  368. p54_rx_data(dev, skb);
  369. return -1;
  370. case 0x4d:
  371. /* TODO: do something better... but then again, I've never seen this happen */
  372. printk(KERN_ERR "%s: Received fault. Probably need to restart hardware now..\n",
  373. wiphy_name(dev->wiphy));
  374. break;
  375. case 0x80:
  376. p54_rx_control(dev, skb);
  377. break;
  378. default:
  379. printk(KERN_ERR "%s: unknown frame RXed (0x%02x)\n",
  380. wiphy_name(dev->wiphy), type);
  381. break;
  382. }
  383. return 0;
  384. }
  385. EXPORT_SYMBOL_GPL(p54_rx);
  386. /*
  387. * So, the firmware is somewhat stupid and doesn't know what places in its
  388. * memory incoming data should go to. By poking around in the firmware, we
  389. * can find some unused memory to upload our packets to. However, data that we
  390. * want the card to TX needs to stay intact until the card has told us that
  391. * it is done with it. This function finds empty places we can upload to and
  392. * marks allocated areas as reserved if necessary. p54_rx_frame_sent frees
  393. * allocated areas.
  394. */
  395. static void p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
  396. struct p54_control_hdr *data, u32 len,
  397. struct ieee80211_tx_control *control)
  398. {
  399. struct p54_common *priv = dev->priv;
  400. struct sk_buff *entry = priv->tx_queue.next;
  401. struct sk_buff *target_skb = NULL;
  402. struct memrecord *range;
  403. u32 last_addr = priv->rx_start;
  404. u32 largest_hole = 0;
  405. u32 target_addr = priv->rx_start;
  406. unsigned long flags;
  407. unsigned int left;
  408. len = (len + 0x170 + 3) & ~0x3; /* 0x70 headroom, 0x100 tailroom */
  409. spin_lock_irqsave(&priv->tx_queue.lock, flags);
  410. left = skb_queue_len(&priv->tx_queue);
  411. while (left--) {
  412. u32 hole_size;
  413. range = (struct memrecord *)&entry->cb;
  414. hole_size = range->start_addr - last_addr;
  415. if (!target_skb && hole_size >= len) {
  416. target_skb = entry->prev;
  417. hole_size -= len;
  418. target_addr = last_addr;
  419. }
  420. largest_hole = max(largest_hole, hole_size);
  421. last_addr = range->end_addr;
  422. entry = entry->next;
  423. }
  424. if (!target_skb && priv->rx_end - last_addr >= len) {
  425. target_skb = priv->tx_queue.prev;
  426. largest_hole = max(largest_hole, priv->rx_end - last_addr - len);
  427. if (!skb_queue_empty(&priv->tx_queue)) {
  428. range = (struct memrecord *)&target_skb->cb;
  429. target_addr = range->end_addr;
  430. }
  431. } else
  432. largest_hole = max(largest_hole, priv->rx_end - last_addr);
  433. if (skb) {
  434. range = (struct memrecord *)&skb->cb;
  435. range->start_addr = target_addr;
  436. range->end_addr = target_addr + len;
  437. range->control = control;
  438. __skb_queue_after(&priv->tx_queue, target_skb, skb);
  439. if (largest_hole < IEEE80211_MAX_RTS_THRESHOLD + 0x170 +
  440. sizeof(struct p54_control_hdr))
  441. ieee80211_stop_queues(dev);
  442. }
  443. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  444. data->req_id = cpu_to_le32(target_addr + 0x70);
  445. }
  446. static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
  447. struct ieee80211_tx_control *control)
  448. {
  449. struct ieee80211_tx_queue_stats_data *current_queue;
  450. struct p54_common *priv = dev->priv;
  451. struct p54_control_hdr *hdr;
  452. struct p54_tx_control_allocdata *txhdr;
  453. struct ieee80211_tx_control *control_copy;
  454. size_t padding, len;
  455. u8 rate;
  456. current_queue = &priv->tx_stats.data[control->queue];
  457. if (unlikely(current_queue->len > current_queue->limit))
  458. return NETDEV_TX_BUSY;
  459. current_queue->len++;
  460. current_queue->count++;
  461. if (current_queue->len == current_queue->limit)
  462. ieee80211_stop_queue(dev, control->queue);
  463. padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
  464. len = skb->len;
  465. control_copy = kmalloc(sizeof(*control), GFP_ATOMIC);
  466. if (control_copy)
  467. memcpy(control_copy, control, sizeof(*control));
  468. txhdr = (struct p54_tx_control_allocdata *)
  469. skb_push(skb, sizeof(*txhdr) + padding);
  470. hdr = (struct p54_control_hdr *) skb_push(skb, sizeof(*hdr));
  471. if (padding)
  472. hdr->magic1 = cpu_to_le16(0x4010);
  473. else
  474. hdr->magic1 = cpu_to_le16(0x0010);
  475. hdr->len = cpu_to_le16(len);
  476. hdr->type = (control->flags & IEEE80211_TXCTL_NO_ACK) ? 0 : cpu_to_le16(1);
  477. hdr->retry1 = hdr->retry2 = control->retry_limit;
  478. p54_assign_address(dev, skb, hdr, skb->len, control_copy);
  479. memset(txhdr->wep_key, 0x0, 16);
  480. txhdr->padding = 0;
  481. txhdr->padding2 = 0;
  482. /* TODO: add support for alternate retry TX rates */
  483. rate = control->tx_rate;
  484. if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS)
  485. rate |= 0x40;
  486. else if (control->flags & IEEE80211_TXCTL_USE_CTS_PROTECT)
  487. rate |= 0x20;
  488. memset(txhdr->rateset, rate, 8);
  489. txhdr->wep_key_present = 0;
  490. txhdr->wep_key_len = 0;
  491. txhdr->frame_type = cpu_to_le32(control->queue + 4);
  492. txhdr->magic4 = 0;
  493. txhdr->antenna = (control->antenna_sel_tx == 0) ?
  494. 2 : control->antenna_sel_tx - 1;
  495. txhdr->output_power = 0x7f; // HW Maximum
  496. txhdr->magic5 = (control->flags & IEEE80211_TXCTL_NO_ACK) ?
  497. 0 : ((rate > 0x3) ? cpu_to_le32(0x33) : cpu_to_le32(0x23));
  498. if (padding)
  499. txhdr->align[0] = padding;
  500. priv->tx(dev, hdr, skb->len, 0);
  501. return 0;
  502. }
  503. static int p54_set_filter(struct ieee80211_hw *dev, u16 filter_type,
  504. const u8 *dst, const u8 *src, u8 antenna,
  505. u32 magic3, u32 magic8, u32 magic9)
  506. {
  507. struct p54_common *priv = dev->priv;
  508. struct p54_control_hdr *hdr;
  509. struct p54_tx_control_filter *filter;
  510. hdr = kzalloc(sizeof(*hdr) + sizeof(*filter) +
  511. priv->tx_hdr_len, GFP_ATOMIC);
  512. if (!hdr)
  513. return -ENOMEM;
  514. hdr = (void *)hdr + priv->tx_hdr_len;
  515. filter = (struct p54_tx_control_filter *) hdr->data;
  516. hdr->magic1 = cpu_to_le16(0x8001);
  517. hdr->len = cpu_to_le16(sizeof(*filter));
  518. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*filter), NULL);
  519. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_FILTER_SET);
  520. filter->filter_type = cpu_to_le16(filter_type);
  521. memcpy(filter->dst, dst, ETH_ALEN);
  522. if (!src)
  523. memset(filter->src, ~0, ETH_ALEN);
  524. else
  525. memcpy(filter->src, src, ETH_ALEN);
  526. filter->antenna = antenna;
  527. filter->magic3 = cpu_to_le32(magic3);
  528. filter->rx_addr = cpu_to_le32(priv->rx_end);
  529. filter->max_rx = cpu_to_le16(0x0620); /* FIXME: for usb ver 1.. maybe */
  530. filter->rxhw = priv->rxhw;
  531. filter->magic8 = cpu_to_le16(magic8);
  532. filter->magic9 = cpu_to_le16(magic9);
  533. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*filter), 1);
  534. return 0;
  535. }
  536. static int p54_set_freq(struct ieee80211_hw *dev, __le16 freq)
  537. {
  538. struct p54_common *priv = dev->priv;
  539. struct p54_control_hdr *hdr;
  540. struct p54_tx_control_channel *chan;
  541. unsigned int i;
  542. size_t payload_len = sizeof(*chan) + sizeof(u32)*2 +
  543. sizeof(*chan->curve_data) *
  544. priv->curve_data->points_per_channel;
  545. void *entry;
  546. hdr = kzalloc(sizeof(*hdr) + payload_len +
  547. priv->tx_hdr_len, GFP_KERNEL);
  548. if (!hdr)
  549. return -ENOMEM;
  550. hdr = (void *)hdr + priv->tx_hdr_len;
  551. chan = (struct p54_tx_control_channel *) hdr->data;
  552. hdr->magic1 = cpu_to_le16(0x8001);
  553. hdr->len = cpu_to_le16(sizeof(*chan));
  554. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_CHANNEL_CHANGE);
  555. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + payload_len, NULL);
  556. chan->magic1 = cpu_to_le16(0x1);
  557. chan->magic2 = cpu_to_le16(0x0);
  558. for (i = 0; i < priv->iq_autocal_len; i++) {
  559. if (priv->iq_autocal[i].freq != freq)
  560. continue;
  561. memcpy(&chan->iq_autocal, &priv->iq_autocal[i],
  562. sizeof(*priv->iq_autocal));
  563. break;
  564. }
  565. if (i == priv->iq_autocal_len)
  566. goto err;
  567. for (i = 0; i < priv->output_limit_len; i++) {
  568. if (priv->output_limit[i].freq != freq)
  569. continue;
  570. chan->val_barker = 0x38;
  571. chan->val_bpsk = priv->output_limit[i].val_bpsk;
  572. chan->val_qpsk = priv->output_limit[i].val_qpsk;
  573. chan->val_16qam = priv->output_limit[i].val_16qam;
  574. chan->val_64qam = priv->output_limit[i].val_64qam;
  575. break;
  576. }
  577. if (i == priv->output_limit_len)
  578. goto err;
  579. chan->pa_points_per_curve = priv->curve_data->points_per_channel;
  580. entry = priv->curve_data->data;
  581. for (i = 0; i < priv->curve_data->channels; i++) {
  582. if (*((__le16 *)entry) != freq) {
  583. entry += sizeof(__le16);
  584. entry += sizeof(struct pda_pa_curve_data_sample_rev1) *
  585. chan->pa_points_per_curve;
  586. continue;
  587. }
  588. entry += sizeof(__le16);
  589. memcpy(chan->curve_data, entry, sizeof(*chan->curve_data) *
  590. chan->pa_points_per_curve);
  591. break;
  592. }
  593. memcpy(hdr->data + payload_len - 4, &chan->val_bpsk, 4);
  594. priv->tx(dev, hdr, sizeof(*hdr) + payload_len, 1);
  595. return 0;
  596. err:
  597. printk(KERN_ERR "%s: frequency change failed\n", wiphy_name(dev->wiphy));
  598. kfree(hdr);
  599. return -EINVAL;
  600. }
  601. static int p54_set_leds(struct ieee80211_hw *dev, int mode, int link, int act)
  602. {
  603. struct p54_common *priv = dev->priv;
  604. struct p54_control_hdr *hdr;
  605. struct p54_tx_control_led *led;
  606. hdr = kzalloc(sizeof(*hdr) + sizeof(*led) +
  607. priv->tx_hdr_len, GFP_KERNEL);
  608. if (!hdr)
  609. return -ENOMEM;
  610. hdr = (void *)hdr + priv->tx_hdr_len;
  611. hdr->magic1 = cpu_to_le16(0x8001);
  612. hdr->len = cpu_to_le16(sizeof(*led));
  613. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_LED);
  614. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*led), NULL);
  615. led = (struct p54_tx_control_led *) hdr->data;
  616. led->mode = cpu_to_le16(mode);
  617. led->led_permanent = cpu_to_le16(link);
  618. led->led_temporary = cpu_to_le16(act);
  619. led->duration = cpu_to_le16(1000);
  620. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*led), 1);
  621. return 0;
  622. }
  623. #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, burst) \
  624. do { \
  625. queue.aifs = cpu_to_le16(ai_fs); \
  626. queue.cwmin = cpu_to_le16(cw_min); \
  627. queue.cwmax = cpu_to_le16(cw_max); \
  628. queue.txop = (burst == 0) ? \
  629. 0 : cpu_to_le16((burst * 100) / 32 + 1); \
  630. } while(0)
  631. static void p54_init_vdcf(struct ieee80211_hw *dev)
  632. {
  633. struct p54_common *priv = dev->priv;
  634. struct p54_control_hdr *hdr;
  635. struct p54_tx_control_vdcf *vdcf;
  636. /* all USB V1 adapters need a extra headroom */
  637. hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
  638. hdr->magic1 = cpu_to_le16(0x8001);
  639. hdr->len = cpu_to_le16(sizeof(*vdcf));
  640. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_DCFINIT);
  641. hdr->req_id = cpu_to_le32(priv->rx_start);
  642. vdcf = (struct p54_tx_control_vdcf *) hdr->data;
  643. P54_SET_QUEUE(vdcf->queue[0], 0x0002, 0x0003, 0x0007, 0x000f);
  644. P54_SET_QUEUE(vdcf->queue[1], 0x0002, 0x0007, 0x000f, 0x001e);
  645. P54_SET_QUEUE(vdcf->queue[2], 0x0002, 0x000f, 0x03ff, 0x0014);
  646. P54_SET_QUEUE(vdcf->queue[3], 0x0007, 0x000f, 0x03ff, 0x0000);
  647. }
  648. static void p54_set_vdcf(struct ieee80211_hw *dev)
  649. {
  650. struct p54_common *priv = dev->priv;
  651. struct p54_control_hdr *hdr;
  652. struct p54_tx_control_vdcf *vdcf;
  653. hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
  654. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*vdcf), NULL);
  655. vdcf = (struct p54_tx_control_vdcf *) hdr->data;
  656. if (dev->conf.flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
  657. vdcf->slottime = 9;
  658. vdcf->magic1 = 0x00;
  659. vdcf->magic2 = 0x10;
  660. } else {
  661. vdcf->slottime = 20;
  662. vdcf->magic1 = 0x0a;
  663. vdcf->magic2 = 0x06;
  664. }
  665. /* (see prism54/isl_oid.h for further details) */
  666. vdcf->frameburst = cpu_to_le16(0);
  667. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*vdcf), 0);
  668. }
  669. static int p54_start(struct ieee80211_hw *dev)
  670. {
  671. struct p54_common *priv = dev->priv;
  672. int err;
  673. err = priv->open(dev);
  674. if (!err)
  675. priv->mode = IEEE80211_IF_TYPE_MNTR;
  676. return err;
  677. }
  678. static void p54_stop(struct ieee80211_hw *dev)
  679. {
  680. struct p54_common *priv = dev->priv;
  681. struct sk_buff *skb;
  682. while ((skb = skb_dequeue(&priv->tx_queue))) {
  683. struct memrecord *range = (struct memrecord *)&skb->cb;
  684. if (range->control)
  685. kfree(range->control);
  686. kfree_skb(skb);
  687. }
  688. priv->stop(dev);
  689. priv->mode = IEEE80211_IF_TYPE_INVALID;
  690. }
  691. static int p54_add_interface(struct ieee80211_hw *dev,
  692. struct ieee80211_if_init_conf *conf)
  693. {
  694. struct p54_common *priv = dev->priv;
  695. if (priv->mode != IEEE80211_IF_TYPE_MNTR)
  696. return -EOPNOTSUPP;
  697. switch (conf->type) {
  698. case IEEE80211_IF_TYPE_STA:
  699. priv->mode = conf->type;
  700. break;
  701. default:
  702. return -EOPNOTSUPP;
  703. }
  704. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  705. p54_set_filter(dev, 0, priv->mac_addr, NULL, 0, 1, 0, 0xF642);
  706. p54_set_filter(dev, 0, priv->mac_addr, NULL, 1, 0, 0, 0xF642);
  707. switch (conf->type) {
  708. case IEEE80211_IF_TYPE_STA:
  709. p54_set_filter(dev, 1, priv->mac_addr, NULL, 0, 0x15F, 0x1F4, 0);
  710. break;
  711. default:
  712. BUG(); /* impossible */
  713. break;
  714. }
  715. p54_set_leds(dev, 1, 0, 0);
  716. return 0;
  717. }
  718. static void p54_remove_interface(struct ieee80211_hw *dev,
  719. struct ieee80211_if_init_conf *conf)
  720. {
  721. struct p54_common *priv = dev->priv;
  722. priv->mode = IEEE80211_IF_TYPE_MNTR;
  723. memset(priv->mac_addr, 0, ETH_ALEN);
  724. p54_set_filter(dev, 0, priv->mac_addr, NULL, 2, 0, 0, 0);
  725. }
  726. static int p54_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
  727. {
  728. int ret;
  729. ret = p54_set_freq(dev, cpu_to_le16(conf->freq));
  730. p54_set_vdcf(dev);
  731. return ret;
  732. }
  733. static int p54_config_interface(struct ieee80211_hw *dev, int if_id,
  734. struct ieee80211_if_conf *conf)
  735. {
  736. struct p54_common *priv = dev->priv;
  737. p54_set_filter(dev, 0, priv->mac_addr, conf->bssid, 0, 1, 0, 0xF642);
  738. p54_set_filter(dev, 0, priv->mac_addr, conf->bssid, 2, 0, 0, 0);
  739. p54_set_leds(dev, 1, !is_multicast_ether_addr(conf->bssid), 0);
  740. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  741. return 0;
  742. }
  743. static void p54_configure_filter(struct ieee80211_hw *dev,
  744. unsigned int changed_flags,
  745. unsigned int *total_flags,
  746. int mc_count, struct dev_mc_list *mclist)
  747. {
  748. struct p54_common *priv = dev->priv;
  749. *total_flags &= FIF_BCN_PRBRESP_PROMISC;
  750. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  751. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  752. p54_set_filter(dev, 0, priv->mac_addr,
  753. NULL, 2, 0, 0, 0);
  754. else
  755. p54_set_filter(dev, 0, priv->mac_addr,
  756. priv->bssid, 2, 0, 0, 0);
  757. }
  758. }
  759. static int p54_conf_tx(struct ieee80211_hw *dev, int queue,
  760. const struct ieee80211_tx_queue_params *params)
  761. {
  762. struct p54_common *priv = dev->priv;
  763. struct p54_tx_control_vdcf *vdcf;
  764. vdcf = (struct p54_tx_control_vdcf *)(((struct p54_control_hdr *)
  765. ((void *)priv->cached_vdcf + priv->tx_hdr_len))->data);
  766. if ((params) && !((queue < 0) || (queue > 4))) {
  767. P54_SET_QUEUE(vdcf->queue[queue], params->aifs,
  768. params->cw_min, params->cw_max, params->burst_time);
  769. } else
  770. return -EINVAL;
  771. p54_set_vdcf(dev);
  772. return 0;
  773. }
  774. static int p54_get_stats(struct ieee80211_hw *dev,
  775. struct ieee80211_low_level_stats *stats)
  776. {
  777. /* TODO */
  778. return 0;
  779. }
  780. static int p54_get_tx_stats(struct ieee80211_hw *dev,
  781. struct ieee80211_tx_queue_stats *stats)
  782. {
  783. struct p54_common *priv = dev->priv;
  784. unsigned int i;
  785. for (i = 0; i < dev->queues; i++)
  786. memcpy(&stats->data[i], &priv->tx_stats.data[i],
  787. sizeof(stats->data[i]));
  788. return 0;
  789. }
  790. static const struct ieee80211_ops p54_ops = {
  791. .tx = p54_tx,
  792. .start = p54_start,
  793. .stop = p54_stop,
  794. .add_interface = p54_add_interface,
  795. .remove_interface = p54_remove_interface,
  796. .config = p54_config,
  797. .config_interface = p54_config_interface,
  798. .configure_filter = p54_configure_filter,
  799. .conf_tx = p54_conf_tx,
  800. .get_stats = p54_get_stats,
  801. .get_tx_stats = p54_get_tx_stats
  802. };
  803. struct ieee80211_hw *p54_init_common(size_t priv_data_len)
  804. {
  805. struct ieee80211_hw *dev;
  806. struct p54_common *priv;
  807. int i;
  808. dev = ieee80211_alloc_hw(priv_data_len, &p54_ops);
  809. if (!dev)
  810. return NULL;
  811. priv = dev->priv;
  812. priv->mode = IEEE80211_IF_TYPE_INVALID;
  813. skb_queue_head_init(&priv->tx_queue);
  814. memcpy(priv->channels, p54_channels, sizeof(p54_channels));
  815. memcpy(priv->rates, p54_rates, sizeof(p54_rates));
  816. priv->modes[1].mode = MODE_IEEE80211B;
  817. priv->modes[1].num_rates = 4;
  818. priv->modes[1].rates = priv->rates;
  819. priv->modes[1].num_channels = ARRAY_SIZE(p54_channels);
  820. priv->modes[1].channels = priv->channels;
  821. priv->modes[0].mode = MODE_IEEE80211G;
  822. priv->modes[0].num_rates = ARRAY_SIZE(p54_rates);
  823. priv->modes[0].rates = priv->rates;
  824. priv->modes[0].num_channels = ARRAY_SIZE(p54_channels);
  825. priv->modes[0].channels = priv->channels;
  826. dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | /* not sure */
  827. IEEE80211_HW_RX_INCLUDES_FCS;
  828. dev->channel_change_time = 1000; /* TODO: find actual value */
  829. dev->max_rssi = 127;
  830. priv->tx_stats.data[0].limit = 5;
  831. dev->queues = 1;
  832. dev->extra_tx_headroom = sizeof(struct p54_control_hdr) + 4 +
  833. sizeof(struct p54_tx_control_allocdata);
  834. priv->cached_vdcf = kzalloc(sizeof(struct p54_tx_control_vdcf) +
  835. priv->tx_hdr_len + sizeof(struct p54_control_hdr), GFP_KERNEL);
  836. if (!priv->cached_vdcf) {
  837. ieee80211_free_hw(dev);
  838. return NULL;
  839. }
  840. p54_init_vdcf(dev);
  841. for (i = 0; i < 2; i++) {
  842. if (ieee80211_register_hwmode(dev, &priv->modes[i])) {
  843. kfree(priv->cached_vdcf);
  844. ieee80211_free_hw(dev);
  845. return NULL;
  846. }
  847. }
  848. return dev;
  849. }
  850. EXPORT_SYMBOL_GPL(p54_init_common);
  851. void p54_free_common(struct ieee80211_hw *dev)
  852. {
  853. struct p54_common *priv = dev->priv;
  854. kfree(priv->iq_autocal);
  855. kfree(priv->output_limit);
  856. kfree(priv->curve_data);
  857. kfree(priv->cached_vdcf);
  858. }
  859. EXPORT_SYMBOL_GPL(p54_free_common);
  860. static int __init p54_init(void)
  861. {
  862. return 0;
  863. }
  864. static void __exit p54_exit(void)
  865. {
  866. }
  867. module_init(p54_init);
  868. module_exit(p54_exit);