phy.c 65 KB

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  1. /*
  2. Broadcom B43legacy wireless driver
  3. Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
  4. Stefano Brivio <st3@riseup.net>
  5. Michael Buesch <mbuesch@freenet.de>
  6. Danny van Dyk <kugelfang@gentoo.org>
  7. Andreas Jaggi <andreas.jaggi@waterwave.ch>
  8. Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
  9. Some parts of the code in this file are derived from the ipw2200
  10. driver Copyright(c) 2003 - 2004 Intel Corporation.
  11. This program is free software; you can redistribute it and/or modify
  12. it under the terms of the GNU General Public License as published by
  13. the Free Software Foundation; either version 2 of the License, or
  14. (at your option) any later version.
  15. This program is distributed in the hope that it will be useful,
  16. but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. GNU General Public License for more details.
  19. You should have received a copy of the GNU General Public License
  20. along with this program; see the file COPYING. If not, write to
  21. the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  22. Boston, MA 02110-1301, USA.
  23. */
  24. #include <linux/delay.h>
  25. #include <linux/pci.h>
  26. #include <linux/types.h>
  27. #include "b43legacy.h"
  28. #include "phy.h"
  29. #include "main.h"
  30. #include "radio.h"
  31. #include "ilt.h"
  32. static const s8 b43legacy_tssi2dbm_b_table[] = {
  33. 0x4D, 0x4C, 0x4B, 0x4A,
  34. 0x4A, 0x49, 0x48, 0x47,
  35. 0x47, 0x46, 0x45, 0x45,
  36. 0x44, 0x43, 0x42, 0x42,
  37. 0x41, 0x40, 0x3F, 0x3E,
  38. 0x3D, 0x3C, 0x3B, 0x3A,
  39. 0x39, 0x38, 0x37, 0x36,
  40. 0x35, 0x34, 0x32, 0x31,
  41. 0x30, 0x2F, 0x2D, 0x2C,
  42. 0x2B, 0x29, 0x28, 0x26,
  43. 0x25, 0x23, 0x21, 0x1F,
  44. 0x1D, 0x1A, 0x17, 0x14,
  45. 0x10, 0x0C, 0x06, 0x00,
  46. -7, -7, -7, -7,
  47. -7, -7, -7, -7,
  48. -7, -7, -7, -7,
  49. };
  50. static const s8 b43legacy_tssi2dbm_g_table[] = {
  51. 77, 77, 77, 76,
  52. 76, 76, 75, 75,
  53. 74, 74, 73, 73,
  54. 73, 72, 72, 71,
  55. 71, 70, 70, 69,
  56. 68, 68, 67, 67,
  57. 66, 65, 65, 64,
  58. 63, 63, 62, 61,
  59. 60, 59, 58, 57,
  60. 56, 55, 54, 53,
  61. 52, 50, 49, 47,
  62. 45, 43, 40, 37,
  63. 33, 28, 22, 14,
  64. 5, -7, -20, -20,
  65. -20, -20, -20, -20,
  66. -20, -20, -20, -20,
  67. };
  68. static void b43legacy_phy_initg(struct b43legacy_wldev *dev);
  69. static inline
  70. void b43legacy_voluntary_preempt(void)
  71. {
  72. B43legacy_BUG_ON(!(!in_atomic() && !in_irq() &&
  73. !in_interrupt() && !irqs_disabled()));
  74. #ifndef CONFIG_PREEMPT
  75. cond_resched();
  76. #endif /* CONFIG_PREEMPT */
  77. }
  78. void b43legacy_raw_phy_lock(struct b43legacy_wldev *dev)
  79. {
  80. struct b43legacy_phy *phy = &dev->phy;
  81. B43legacy_WARN_ON(!irqs_disabled());
  82. if (b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD) == 0) {
  83. phy->locked = 0;
  84. return;
  85. }
  86. if (dev->dev->id.revision < 3) {
  87. b43legacy_mac_suspend(dev);
  88. spin_lock(&phy->lock);
  89. } else {
  90. if (!b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
  91. b43legacy_power_saving_ctl_bits(dev, -1, 1);
  92. }
  93. phy->locked = 1;
  94. }
  95. void b43legacy_raw_phy_unlock(struct b43legacy_wldev *dev)
  96. {
  97. struct b43legacy_phy *phy = &dev->phy;
  98. B43legacy_WARN_ON(!irqs_disabled());
  99. if (dev->dev->id.revision < 3) {
  100. if (phy->locked) {
  101. spin_unlock(&phy->lock);
  102. b43legacy_mac_enable(dev);
  103. }
  104. } else {
  105. if (!b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
  106. b43legacy_power_saving_ctl_bits(dev, -1, -1);
  107. }
  108. phy->locked = 0;
  109. }
  110. u16 b43legacy_phy_read(struct b43legacy_wldev *dev, u16 offset)
  111. {
  112. b43legacy_write16(dev, B43legacy_MMIO_PHY_CONTROL, offset);
  113. return b43legacy_read16(dev, B43legacy_MMIO_PHY_DATA);
  114. }
  115. void b43legacy_phy_write(struct b43legacy_wldev *dev, u16 offset, u16 val)
  116. {
  117. b43legacy_write16(dev, B43legacy_MMIO_PHY_CONTROL, offset);
  118. mmiowb();
  119. b43legacy_write16(dev, B43legacy_MMIO_PHY_DATA, val);
  120. }
  121. void b43legacy_phy_calibrate(struct b43legacy_wldev *dev)
  122. {
  123. struct b43legacy_phy *phy = &dev->phy;
  124. b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD); /* Dummy read. */
  125. if (phy->calibrated)
  126. return;
  127. if (phy->type == B43legacy_PHYTYPE_G && phy->rev == 1) {
  128. b43legacy_wireless_core_reset(dev, 0);
  129. b43legacy_phy_initg(dev);
  130. b43legacy_wireless_core_reset(dev, B43legacy_TMSLOW_GMODE);
  131. }
  132. phy->calibrated = 1;
  133. }
  134. /* intialize B PHY power control
  135. * as described in http://bcm-specs.sipsolutions.net/InitPowerControl
  136. */
  137. static void b43legacy_phy_init_pctl(struct b43legacy_wldev *dev)
  138. {
  139. struct b43legacy_phy *phy = &dev->phy;
  140. u16 saved_batt = 0;
  141. u16 saved_ratt = 0;
  142. u16 saved_txctl1 = 0;
  143. int must_reset_txpower = 0;
  144. B43legacy_BUG_ON(!(phy->type == B43legacy_PHYTYPE_B ||
  145. phy->type == B43legacy_PHYTYPE_G));
  146. if (is_bcm_board_vendor(dev) &&
  147. (dev->dev->bus->boardinfo.type == 0x0416))
  148. return;
  149. b43legacy_phy_write(dev, 0x0028, 0x8018);
  150. b43legacy_write16(dev, 0x03E6, b43legacy_read16(dev, 0x03E6) & 0xFFDF);
  151. if (phy->type == B43legacy_PHYTYPE_G) {
  152. if (!phy->gmode)
  153. return;
  154. b43legacy_phy_write(dev, 0x047A, 0xC111);
  155. }
  156. if (phy->savedpctlreg != 0xFFFF)
  157. return;
  158. #ifdef CONFIG_B43LEGACY_DEBUG
  159. if (phy->manual_txpower_control)
  160. return;
  161. #endif
  162. if (phy->type == B43legacy_PHYTYPE_B &&
  163. phy->rev >= 2 &&
  164. phy->radio_ver == 0x2050)
  165. b43legacy_radio_write16(dev, 0x0076,
  166. b43legacy_radio_read16(dev, 0x0076)
  167. | 0x0084);
  168. else {
  169. saved_batt = phy->bbatt;
  170. saved_ratt = phy->rfatt;
  171. saved_txctl1 = phy->txctl1;
  172. if ((phy->radio_rev >= 6) && (phy->radio_rev <= 8)
  173. && /*FIXME: incomplete specs for 5 < revision < 9 */ 0)
  174. b43legacy_radio_set_txpower_bg(dev, 0xB, 0x1F, 0);
  175. else
  176. b43legacy_radio_set_txpower_bg(dev, 0xB, 9, 0);
  177. must_reset_txpower = 1;
  178. }
  179. b43legacy_dummy_transmission(dev);
  180. phy->savedpctlreg = b43legacy_phy_read(dev, B43legacy_PHY_G_PCTL);
  181. if (must_reset_txpower)
  182. b43legacy_radio_set_txpower_bg(dev, saved_batt, saved_ratt,
  183. saved_txctl1);
  184. else
  185. b43legacy_radio_write16(dev, 0x0076, b43legacy_radio_read16(dev,
  186. 0x0076) & 0xFF7B);
  187. b43legacy_radio_clear_tssi(dev);
  188. }
  189. static void b43legacy_phy_agcsetup(struct b43legacy_wldev *dev)
  190. {
  191. struct b43legacy_phy *phy = &dev->phy;
  192. u16 offset = 0x0000;
  193. if (phy->rev == 1)
  194. offset = 0x4C00;
  195. b43legacy_ilt_write(dev, offset, 0x00FE);
  196. b43legacy_ilt_write(dev, offset + 1, 0x000D);
  197. b43legacy_ilt_write(dev, offset + 2, 0x0013);
  198. b43legacy_ilt_write(dev, offset + 3, 0x0019);
  199. if (phy->rev == 1) {
  200. b43legacy_ilt_write(dev, 0x1800, 0x2710);
  201. b43legacy_ilt_write(dev, 0x1801, 0x9B83);
  202. b43legacy_ilt_write(dev, 0x1802, 0x9B83);
  203. b43legacy_ilt_write(dev, 0x1803, 0x0F8D);
  204. b43legacy_phy_write(dev, 0x0455, 0x0004);
  205. }
  206. b43legacy_phy_write(dev, 0x04A5, (b43legacy_phy_read(dev, 0x04A5)
  207. & 0x00FF) | 0x5700);
  208. b43legacy_phy_write(dev, 0x041A, (b43legacy_phy_read(dev, 0x041A)
  209. & 0xFF80) | 0x000F);
  210. b43legacy_phy_write(dev, 0x041A, (b43legacy_phy_read(dev, 0x041A)
  211. & 0xC07F) | 0x2B80);
  212. b43legacy_phy_write(dev, 0x048C, (b43legacy_phy_read(dev, 0x048C)
  213. & 0xF0FF) | 0x0300);
  214. b43legacy_radio_write16(dev, 0x007A,
  215. b43legacy_radio_read16(dev, 0x007A)
  216. | 0x0008);
  217. b43legacy_phy_write(dev, 0x04A0, (b43legacy_phy_read(dev, 0x04A0)
  218. & 0xFFF0) | 0x0008);
  219. b43legacy_phy_write(dev, 0x04A1, (b43legacy_phy_read(dev, 0x04A1)
  220. & 0xF0FF) | 0x0600);
  221. b43legacy_phy_write(dev, 0x04A2, (b43legacy_phy_read(dev, 0x04A2)
  222. & 0xF0FF) | 0x0700);
  223. b43legacy_phy_write(dev, 0x04A0, (b43legacy_phy_read(dev, 0x04A0)
  224. & 0xF0FF) | 0x0100);
  225. if (phy->rev == 1)
  226. b43legacy_phy_write(dev, 0x04A2,
  227. (b43legacy_phy_read(dev, 0x04A2)
  228. & 0xFFF0) | 0x0007);
  229. b43legacy_phy_write(dev, 0x0488, (b43legacy_phy_read(dev, 0x0488)
  230. & 0xFF00) | 0x001C);
  231. b43legacy_phy_write(dev, 0x0488, (b43legacy_phy_read(dev, 0x0488)
  232. & 0xC0FF) | 0x0200);
  233. b43legacy_phy_write(dev, 0x0496, (b43legacy_phy_read(dev, 0x0496)
  234. & 0xFF00) | 0x001C);
  235. b43legacy_phy_write(dev, 0x0489, (b43legacy_phy_read(dev, 0x0489)
  236. & 0xFF00) | 0x0020);
  237. b43legacy_phy_write(dev, 0x0489, (b43legacy_phy_read(dev, 0x0489)
  238. & 0xC0FF) | 0x0200);
  239. b43legacy_phy_write(dev, 0x0482, (b43legacy_phy_read(dev, 0x0482)
  240. & 0xFF00) | 0x002E);
  241. b43legacy_phy_write(dev, 0x0496, (b43legacy_phy_read(dev, 0x0496)
  242. & 0x00FF) | 0x1A00);
  243. b43legacy_phy_write(dev, 0x0481, (b43legacy_phy_read(dev, 0x0481)
  244. & 0xFF00) | 0x0028);
  245. b43legacy_phy_write(dev, 0x0481, (b43legacy_phy_read(dev, 0x0481)
  246. & 0x00FF) | 0x2C00);
  247. if (phy->rev == 1) {
  248. b43legacy_phy_write(dev, 0x0430, 0x092B);
  249. b43legacy_phy_write(dev, 0x041B,
  250. (b43legacy_phy_read(dev, 0x041B)
  251. & 0xFFE1) | 0x0002);
  252. } else {
  253. b43legacy_phy_write(dev, 0x041B,
  254. b43legacy_phy_read(dev, 0x041B) & 0xFFE1);
  255. b43legacy_phy_write(dev, 0x041F, 0x287A);
  256. b43legacy_phy_write(dev, 0x0420,
  257. (b43legacy_phy_read(dev, 0x0420)
  258. & 0xFFF0) | 0x0004);
  259. }
  260. if (phy->rev > 2) {
  261. b43legacy_phy_write(dev, 0x0422, 0x287A);
  262. b43legacy_phy_write(dev, 0x0420,
  263. (b43legacy_phy_read(dev, 0x0420)
  264. & 0x0FFF) | 0x3000);
  265. }
  266. b43legacy_phy_write(dev, 0x04A8, (b43legacy_phy_read(dev, 0x04A8)
  267. & 0x8080) | 0x7874);
  268. b43legacy_phy_write(dev, 0x048E, 0x1C00);
  269. if (phy->rev == 1) {
  270. b43legacy_phy_write(dev, 0x04AB,
  271. (b43legacy_phy_read(dev, 0x04AB)
  272. & 0xF0FF) | 0x0600);
  273. b43legacy_phy_write(dev, 0x048B, 0x005E);
  274. b43legacy_phy_write(dev, 0x048C,
  275. (b43legacy_phy_read(dev, 0x048C) & 0xFF00)
  276. | 0x001E);
  277. b43legacy_phy_write(dev, 0x048D, 0x0002);
  278. }
  279. b43legacy_ilt_write(dev, offset + 0x0800, 0);
  280. b43legacy_ilt_write(dev, offset + 0x0801, 7);
  281. b43legacy_ilt_write(dev, offset + 0x0802, 16);
  282. b43legacy_ilt_write(dev, offset + 0x0803, 28);
  283. if (phy->rev >= 6) {
  284. b43legacy_phy_write(dev, 0x0426,
  285. (b43legacy_phy_read(dev, 0x0426) & 0xFFFC));
  286. b43legacy_phy_write(dev, 0x0426,
  287. (b43legacy_phy_read(dev, 0x0426) & 0xEFFF));
  288. }
  289. }
  290. static void b43legacy_phy_setupg(struct b43legacy_wldev *dev)
  291. {
  292. struct b43legacy_phy *phy = &dev->phy;
  293. u16 i;
  294. B43legacy_BUG_ON(phy->type != B43legacy_PHYTYPE_G);
  295. if (phy->rev == 1) {
  296. b43legacy_phy_write(dev, 0x0406, 0x4F19);
  297. b43legacy_phy_write(dev, B43legacy_PHY_G_CRS,
  298. (b43legacy_phy_read(dev,
  299. B43legacy_PHY_G_CRS) & 0xFC3F) | 0x0340);
  300. b43legacy_phy_write(dev, 0x042C, 0x005A);
  301. b43legacy_phy_write(dev, 0x0427, 0x001A);
  302. for (i = 0; i < B43legacy_ILT_FINEFREQG_SIZE; i++)
  303. b43legacy_ilt_write(dev, 0x5800 + i,
  304. b43legacy_ilt_finefreqg[i]);
  305. for (i = 0; i < B43legacy_ILT_NOISEG1_SIZE; i++)
  306. b43legacy_ilt_write(dev, 0x1800 + i,
  307. b43legacy_ilt_noiseg1[i]);
  308. for (i = 0; i < B43legacy_ILT_ROTOR_SIZE; i++)
  309. b43legacy_ilt_write32(dev, 0x2000 + i,
  310. b43legacy_ilt_rotor[i]);
  311. } else {
  312. /* nrssi values are signed 6-bit values. Why 0x7654 here? */
  313. b43legacy_nrssi_hw_write(dev, 0xBA98, (s16)0x7654);
  314. if (phy->rev == 2) {
  315. b43legacy_phy_write(dev, 0x04C0, 0x1861);
  316. b43legacy_phy_write(dev, 0x04C1, 0x0271);
  317. } else if (phy->rev > 2) {
  318. b43legacy_phy_write(dev, 0x04C0, 0x0098);
  319. b43legacy_phy_write(dev, 0x04C1, 0x0070);
  320. b43legacy_phy_write(dev, 0x04C9, 0x0080);
  321. }
  322. b43legacy_phy_write(dev, 0x042B, b43legacy_phy_read(dev,
  323. 0x042B) | 0x800);
  324. for (i = 0; i < 64; i++)
  325. b43legacy_ilt_write(dev, 0x4000 + i, i);
  326. for (i = 0; i < B43legacy_ILT_NOISEG2_SIZE; i++)
  327. b43legacy_ilt_write(dev, 0x1800 + i,
  328. b43legacy_ilt_noiseg2[i]);
  329. }
  330. if (phy->rev <= 2)
  331. for (i = 0; i < B43legacy_ILT_NOISESCALEG_SIZE; i++)
  332. b43legacy_ilt_write(dev, 0x1400 + i,
  333. b43legacy_ilt_noisescaleg1[i]);
  334. else if ((phy->rev >= 7) && (b43legacy_phy_read(dev, 0x0449) & 0x0200))
  335. for (i = 0; i < B43legacy_ILT_NOISESCALEG_SIZE; i++)
  336. b43legacy_ilt_write(dev, 0x1400 + i,
  337. b43legacy_ilt_noisescaleg3[i]);
  338. else
  339. for (i = 0; i < B43legacy_ILT_NOISESCALEG_SIZE; i++)
  340. b43legacy_ilt_write(dev, 0x1400 + i,
  341. b43legacy_ilt_noisescaleg2[i]);
  342. if (phy->rev == 2)
  343. for (i = 0; i < B43legacy_ILT_SIGMASQR_SIZE; i++)
  344. b43legacy_ilt_write(dev, 0x5000 + i,
  345. b43legacy_ilt_sigmasqr1[i]);
  346. else if ((phy->rev > 2) && (phy->rev <= 8))
  347. for (i = 0; i < B43legacy_ILT_SIGMASQR_SIZE; i++)
  348. b43legacy_ilt_write(dev, 0x5000 + i,
  349. b43legacy_ilt_sigmasqr2[i]);
  350. if (phy->rev == 1) {
  351. for (i = 0; i < B43legacy_ILT_RETARD_SIZE; i++)
  352. b43legacy_ilt_write32(dev, 0x2400 + i,
  353. b43legacy_ilt_retard[i]);
  354. for (i = 4; i < 20; i++)
  355. b43legacy_ilt_write(dev, 0x5400 + i, 0x0020);
  356. b43legacy_phy_agcsetup(dev);
  357. if (is_bcm_board_vendor(dev) &&
  358. (dev->dev->bus->boardinfo.type == 0x0416) &&
  359. (dev->dev->bus->boardinfo.rev == 0x0017))
  360. return;
  361. b43legacy_ilt_write(dev, 0x5001, 0x0002);
  362. b43legacy_ilt_write(dev, 0x5002, 0x0001);
  363. } else {
  364. for (i = 0; i <= 0x20; i++)
  365. b43legacy_ilt_write(dev, 0x1000 + i, 0x0820);
  366. b43legacy_phy_agcsetup(dev);
  367. b43legacy_phy_read(dev, 0x0400); /* dummy read */
  368. b43legacy_phy_write(dev, 0x0403, 0x1000);
  369. b43legacy_ilt_write(dev, 0x3C02, 0x000F);
  370. b43legacy_ilt_write(dev, 0x3C03, 0x0014);
  371. if (is_bcm_board_vendor(dev) &&
  372. (dev->dev->bus->boardinfo.type == 0x0416) &&
  373. (dev->dev->bus->boardinfo.rev == 0x0017))
  374. return;
  375. b43legacy_ilt_write(dev, 0x0401, 0x0002);
  376. b43legacy_ilt_write(dev, 0x0402, 0x0001);
  377. }
  378. }
  379. /* Initialize the APHY portion of a GPHY. */
  380. static void b43legacy_phy_inita(struct b43legacy_wldev *dev)
  381. {
  382. might_sleep();
  383. b43legacy_phy_setupg(dev);
  384. if (dev->dev->bus->sprom.r1.boardflags_lo & B43legacy_BFL_PACTRL)
  385. b43legacy_phy_write(dev, 0x046E, 0x03CF);
  386. }
  387. static void b43legacy_phy_initb2(struct b43legacy_wldev *dev)
  388. {
  389. struct b43legacy_phy *phy = &dev->phy;
  390. u16 offset;
  391. int val;
  392. b43legacy_write16(dev, 0x03EC, 0x3F22);
  393. b43legacy_phy_write(dev, 0x0020, 0x301C);
  394. b43legacy_phy_write(dev, 0x0026, 0x0000);
  395. b43legacy_phy_write(dev, 0x0030, 0x00C6);
  396. b43legacy_phy_write(dev, 0x0088, 0x3E00);
  397. val = 0x3C3D;
  398. for (offset = 0x0089; offset < 0x00A7; offset++) {
  399. b43legacy_phy_write(dev, offset, val);
  400. val -= 0x0202;
  401. }
  402. b43legacy_phy_write(dev, 0x03E4, 0x3000);
  403. b43legacy_radio_selectchannel(dev, phy->channel, 0);
  404. if (phy->radio_ver != 0x2050) {
  405. b43legacy_radio_write16(dev, 0x0075, 0x0080);
  406. b43legacy_radio_write16(dev, 0x0079, 0x0081);
  407. }
  408. b43legacy_radio_write16(dev, 0x0050, 0x0020);
  409. b43legacy_radio_write16(dev, 0x0050, 0x0023);
  410. if (phy->radio_ver == 0x2050) {
  411. b43legacy_radio_write16(dev, 0x0050, 0x0020);
  412. b43legacy_radio_write16(dev, 0x005A, 0x0070);
  413. b43legacy_radio_write16(dev, 0x005B, 0x007B);
  414. b43legacy_radio_write16(dev, 0x005C, 0x00B0);
  415. b43legacy_radio_write16(dev, 0x007A, 0x000F);
  416. b43legacy_phy_write(dev, 0x0038, 0x0677);
  417. b43legacy_radio_init2050(dev);
  418. }
  419. b43legacy_phy_write(dev, 0x0014, 0x0080);
  420. b43legacy_phy_write(dev, 0x0032, 0x00CA);
  421. b43legacy_phy_write(dev, 0x0032, 0x00CC);
  422. b43legacy_phy_write(dev, 0x0035, 0x07C2);
  423. b43legacy_phy_lo_b_measure(dev);
  424. b43legacy_phy_write(dev, 0x0026, 0xCC00);
  425. if (phy->radio_ver != 0x2050)
  426. b43legacy_phy_write(dev, 0x0026, 0xCE00);
  427. b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, 0x1000);
  428. b43legacy_phy_write(dev, 0x002A, 0x88A3);
  429. if (phy->radio_ver != 0x2050)
  430. b43legacy_phy_write(dev, 0x002A, 0x88C2);
  431. b43legacy_radio_set_txpower_bg(dev, 0xFFFF, 0xFFFF, 0xFFFF);
  432. b43legacy_phy_init_pctl(dev);
  433. }
  434. static void b43legacy_phy_initb4(struct b43legacy_wldev *dev)
  435. {
  436. struct b43legacy_phy *phy = &dev->phy;
  437. u16 offset;
  438. u16 val;
  439. b43legacy_write16(dev, 0x03EC, 0x3F22);
  440. b43legacy_phy_write(dev, 0x0020, 0x301C);
  441. b43legacy_phy_write(dev, 0x0026, 0x0000);
  442. b43legacy_phy_write(dev, 0x0030, 0x00C6);
  443. b43legacy_phy_write(dev, 0x0088, 0x3E00);
  444. val = 0x3C3D;
  445. for (offset = 0x0089; offset < 0x00A7; offset++) {
  446. b43legacy_phy_write(dev, offset, val);
  447. val -= 0x0202;
  448. }
  449. b43legacy_phy_write(dev, 0x03E4, 0x3000);
  450. b43legacy_radio_selectchannel(dev, phy->channel, 0);
  451. if (phy->radio_ver != 0x2050) {
  452. b43legacy_radio_write16(dev, 0x0075, 0x0080);
  453. b43legacy_radio_write16(dev, 0x0079, 0x0081);
  454. }
  455. b43legacy_radio_write16(dev, 0x0050, 0x0020);
  456. b43legacy_radio_write16(dev, 0x0050, 0x0023);
  457. if (phy->radio_ver == 0x2050) {
  458. b43legacy_radio_write16(dev, 0x0050, 0x0020);
  459. b43legacy_radio_write16(dev, 0x005A, 0x0070);
  460. b43legacy_radio_write16(dev, 0x005B, 0x007B);
  461. b43legacy_radio_write16(dev, 0x005C, 0x00B0);
  462. b43legacy_radio_write16(dev, 0x007A, 0x000F);
  463. b43legacy_phy_write(dev, 0x0038, 0x0677);
  464. b43legacy_radio_init2050(dev);
  465. }
  466. b43legacy_phy_write(dev, 0x0014, 0x0080);
  467. b43legacy_phy_write(dev, 0x0032, 0x00CA);
  468. if (phy->radio_ver == 0x2050)
  469. b43legacy_phy_write(dev, 0x0032, 0x00E0);
  470. b43legacy_phy_write(dev, 0x0035, 0x07C2);
  471. b43legacy_phy_lo_b_measure(dev);
  472. b43legacy_phy_write(dev, 0x0026, 0xCC00);
  473. if (phy->radio_ver == 0x2050)
  474. b43legacy_phy_write(dev, 0x0026, 0xCE00);
  475. b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, 0x1100);
  476. b43legacy_phy_write(dev, 0x002A, 0x88A3);
  477. if (phy->radio_ver == 0x2050)
  478. b43legacy_phy_write(dev, 0x002A, 0x88C2);
  479. b43legacy_radio_set_txpower_bg(dev, 0xFFFF, 0xFFFF, 0xFFFF);
  480. if (dev->dev->bus->sprom.r1.boardflags_lo & B43legacy_BFL_RSSI) {
  481. b43legacy_calc_nrssi_slope(dev);
  482. b43legacy_calc_nrssi_threshold(dev);
  483. }
  484. b43legacy_phy_init_pctl(dev);
  485. }
  486. static void b43legacy_phy_initb5(struct b43legacy_wldev *dev)
  487. {
  488. struct b43legacy_phy *phy = &dev->phy;
  489. u16 offset;
  490. u16 value;
  491. u8 old_channel;
  492. if (phy->analog == 1)
  493. b43legacy_radio_write16(dev, 0x007A,
  494. b43legacy_radio_read16(dev, 0x007A)
  495. | 0x0050);
  496. if (!is_bcm_board_vendor(dev) &&
  497. (dev->dev->bus->boardinfo.type != 0x0416)) {
  498. value = 0x2120;
  499. for (offset = 0x00A8 ; offset < 0x00C7; offset++) {
  500. b43legacy_phy_write(dev, offset, value);
  501. value += 0x0202;
  502. }
  503. }
  504. b43legacy_phy_write(dev, 0x0035,
  505. (b43legacy_phy_read(dev, 0x0035) & 0xF0FF)
  506. | 0x0700);
  507. if (phy->radio_ver == 0x2050)
  508. b43legacy_phy_write(dev, 0x0038, 0x0667);
  509. if (phy->gmode) {
  510. if (phy->radio_ver == 0x2050) {
  511. b43legacy_radio_write16(dev, 0x007A,
  512. b43legacy_radio_read16(dev, 0x007A)
  513. | 0x0020);
  514. b43legacy_radio_write16(dev, 0x0051,
  515. b43legacy_radio_read16(dev, 0x0051)
  516. | 0x0004);
  517. }
  518. b43legacy_write16(dev, B43legacy_MMIO_PHY_RADIO, 0x0000);
  519. b43legacy_phy_write(dev, 0x0802, b43legacy_phy_read(dev, 0x0802)
  520. | 0x0100);
  521. b43legacy_phy_write(dev, 0x042B, b43legacy_phy_read(dev, 0x042B)
  522. | 0x2000);
  523. b43legacy_phy_write(dev, 0x001C, 0x186A);
  524. b43legacy_phy_write(dev, 0x0013, (b43legacy_phy_read(dev,
  525. 0x0013) & 0x00FF) | 0x1900);
  526. b43legacy_phy_write(dev, 0x0035, (b43legacy_phy_read(dev,
  527. 0x0035) & 0xFFC0) | 0x0064);
  528. b43legacy_phy_write(dev, 0x005D, (b43legacy_phy_read(dev,
  529. 0x005D) & 0xFF80) | 0x000A);
  530. }
  531. if (dev->bad_frames_preempt)
  532. b43legacy_phy_write(dev, B43legacy_PHY_RADIO_BITFIELD,
  533. b43legacy_phy_read(dev,
  534. B43legacy_PHY_RADIO_BITFIELD) | (1 << 11));
  535. if (phy->analog == 1) {
  536. b43legacy_phy_write(dev, 0x0026, 0xCE00);
  537. b43legacy_phy_write(dev, 0x0021, 0x3763);
  538. b43legacy_phy_write(dev, 0x0022, 0x1BC3);
  539. b43legacy_phy_write(dev, 0x0023, 0x06F9);
  540. b43legacy_phy_write(dev, 0x0024, 0x037E);
  541. } else
  542. b43legacy_phy_write(dev, 0x0026, 0xCC00);
  543. b43legacy_phy_write(dev, 0x0030, 0x00C6);
  544. b43legacy_write16(dev, 0x03EC, 0x3F22);
  545. if (phy->analog == 1)
  546. b43legacy_phy_write(dev, 0x0020, 0x3E1C);
  547. else
  548. b43legacy_phy_write(dev, 0x0020, 0x301C);
  549. if (phy->analog == 0)
  550. b43legacy_write16(dev, 0x03E4, 0x3000);
  551. old_channel = (phy->channel == 0xFF) ? 1 : phy->channel;
  552. /* Force to channel 7, even if not supported. */
  553. b43legacy_radio_selectchannel(dev, 7, 0);
  554. if (phy->radio_ver != 0x2050) {
  555. b43legacy_radio_write16(dev, 0x0075, 0x0080);
  556. b43legacy_radio_write16(dev, 0x0079, 0x0081);
  557. }
  558. b43legacy_radio_write16(dev, 0x0050, 0x0020);
  559. b43legacy_radio_write16(dev, 0x0050, 0x0023);
  560. if (phy->radio_ver == 0x2050) {
  561. b43legacy_radio_write16(dev, 0x0050, 0x0020);
  562. b43legacy_radio_write16(dev, 0x005A, 0x0070);
  563. }
  564. b43legacy_radio_write16(dev, 0x005B, 0x007B);
  565. b43legacy_radio_write16(dev, 0x005C, 0x00B0);
  566. b43legacy_radio_write16(dev, 0x007A, b43legacy_radio_read16(dev,
  567. 0x007A) | 0x0007);
  568. b43legacy_radio_selectchannel(dev, old_channel, 0);
  569. b43legacy_phy_write(dev, 0x0014, 0x0080);
  570. b43legacy_phy_write(dev, 0x0032, 0x00CA);
  571. b43legacy_phy_write(dev, 0x002A, 0x88A3);
  572. b43legacy_radio_set_txpower_bg(dev, 0xFFFF, 0xFFFF, 0xFFFF);
  573. if (phy->radio_ver == 0x2050)
  574. b43legacy_radio_write16(dev, 0x005D, 0x000D);
  575. b43legacy_write16(dev, 0x03E4, (b43legacy_read16(dev, 0x03E4) &
  576. 0xFFC0) | 0x0004);
  577. }
  578. static void b43legacy_phy_initb6(struct b43legacy_wldev *dev)
  579. {
  580. struct b43legacy_phy *phy = &dev->phy;
  581. u16 offset;
  582. u16 val;
  583. u8 old_channel;
  584. b43legacy_phy_write(dev, 0x003E, 0x817A);
  585. b43legacy_radio_write16(dev, 0x007A,
  586. (b43legacy_radio_read16(dev, 0x007A) | 0x0058));
  587. if (phy->radio_rev == 4 ||
  588. phy->radio_rev == 5) {
  589. b43legacy_radio_write16(dev, 0x0051, 0x0037);
  590. b43legacy_radio_write16(dev, 0x0052, 0x0070);
  591. b43legacy_radio_write16(dev, 0x0053, 0x00B3);
  592. b43legacy_radio_write16(dev, 0x0054, 0x009B);
  593. b43legacy_radio_write16(dev, 0x005A, 0x0088);
  594. b43legacy_radio_write16(dev, 0x005B, 0x0088);
  595. b43legacy_radio_write16(dev, 0x005D, 0x0088);
  596. b43legacy_radio_write16(dev, 0x005E, 0x0088);
  597. b43legacy_radio_write16(dev, 0x007D, 0x0088);
  598. b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
  599. B43legacy_UCODEFLAGS_OFFSET,
  600. (b43legacy_shm_read32(dev,
  601. B43legacy_SHM_SHARED,
  602. B43legacy_UCODEFLAGS_OFFSET)
  603. | 0x00000200));
  604. }
  605. if (phy->radio_rev == 8) {
  606. b43legacy_radio_write16(dev, 0x0051, 0x0000);
  607. b43legacy_radio_write16(dev, 0x0052, 0x0040);
  608. b43legacy_radio_write16(dev, 0x0053, 0x00B7);
  609. b43legacy_radio_write16(dev, 0x0054, 0x0098);
  610. b43legacy_radio_write16(dev, 0x005A, 0x0088);
  611. b43legacy_radio_write16(dev, 0x005B, 0x006B);
  612. b43legacy_radio_write16(dev, 0x005C, 0x000F);
  613. if (dev->dev->bus->sprom.r1.boardflags_lo & 0x8000) {
  614. b43legacy_radio_write16(dev, 0x005D, 0x00FA);
  615. b43legacy_radio_write16(dev, 0x005E, 0x00D8);
  616. } else {
  617. b43legacy_radio_write16(dev, 0x005D, 0x00F5);
  618. b43legacy_radio_write16(dev, 0x005E, 0x00B8);
  619. }
  620. b43legacy_radio_write16(dev, 0x0073, 0x0003);
  621. b43legacy_radio_write16(dev, 0x007D, 0x00A8);
  622. b43legacy_radio_write16(dev, 0x007C, 0x0001);
  623. b43legacy_radio_write16(dev, 0x007E, 0x0008);
  624. }
  625. val = 0x1E1F;
  626. for (offset = 0x0088; offset < 0x0098; offset++) {
  627. b43legacy_phy_write(dev, offset, val);
  628. val -= 0x0202;
  629. }
  630. val = 0x3E3F;
  631. for (offset = 0x0098; offset < 0x00A8; offset++) {
  632. b43legacy_phy_write(dev, offset, val);
  633. val -= 0x0202;
  634. }
  635. val = 0x2120;
  636. for (offset = 0x00A8; offset < 0x00C8; offset++) {
  637. b43legacy_phy_write(dev, offset, (val & 0x3F3F));
  638. val += 0x0202;
  639. }
  640. if (phy->type == B43legacy_PHYTYPE_G) {
  641. b43legacy_radio_write16(dev, 0x007A,
  642. b43legacy_radio_read16(dev, 0x007A) |
  643. 0x0020);
  644. b43legacy_radio_write16(dev, 0x0051,
  645. b43legacy_radio_read16(dev, 0x0051) |
  646. 0x0004);
  647. b43legacy_phy_write(dev, 0x0802,
  648. b43legacy_phy_read(dev, 0x0802) | 0x0100);
  649. b43legacy_phy_write(dev, 0x042B,
  650. b43legacy_phy_read(dev, 0x042B) | 0x2000);
  651. b43legacy_phy_write(dev, 0x5B, 0x0000);
  652. b43legacy_phy_write(dev, 0x5C, 0x0000);
  653. }
  654. old_channel = phy->channel;
  655. if (old_channel >= 8)
  656. b43legacy_radio_selectchannel(dev, 1, 0);
  657. else
  658. b43legacy_radio_selectchannel(dev, 13, 0);
  659. b43legacy_radio_write16(dev, 0x0050, 0x0020);
  660. b43legacy_radio_write16(dev, 0x0050, 0x0023);
  661. udelay(40);
  662. if (phy->radio_rev < 6 || phy->radio_rev == 8) {
  663. b43legacy_radio_write16(dev, 0x007C,
  664. (b43legacy_radio_read16(dev, 0x007C)
  665. | 0x0002));
  666. b43legacy_radio_write16(dev, 0x0050, 0x0020);
  667. }
  668. if (phy->radio_rev <= 2) {
  669. b43legacy_radio_write16(dev, 0x007C, 0x0020);
  670. b43legacy_radio_write16(dev, 0x005A, 0x0070);
  671. b43legacy_radio_write16(dev, 0x005B, 0x007B);
  672. b43legacy_radio_write16(dev, 0x005C, 0x00B0);
  673. }
  674. b43legacy_radio_write16(dev, 0x007A,
  675. (b43legacy_radio_read16(dev,
  676. 0x007A) & 0x00F8) | 0x0007);
  677. b43legacy_radio_selectchannel(dev, old_channel, 0);
  678. b43legacy_phy_write(dev, 0x0014, 0x0200);
  679. if (phy->radio_rev >= 6)
  680. b43legacy_phy_write(dev, 0x002A, 0x88C2);
  681. else
  682. b43legacy_phy_write(dev, 0x002A, 0x8AC0);
  683. b43legacy_phy_write(dev, 0x0038, 0x0668);
  684. b43legacy_radio_set_txpower_bg(dev, 0xFFFF, 0xFFFF, 0xFFFF);
  685. if (phy->radio_rev <= 5)
  686. b43legacy_phy_write(dev, 0x005D, (b43legacy_phy_read(dev,
  687. 0x005D) & 0xFF80) | 0x0003);
  688. if (phy->radio_rev <= 2)
  689. b43legacy_radio_write16(dev, 0x005D, 0x000D);
  690. if (phy->analog == 4) {
  691. b43legacy_write16(dev, 0x03E4, 0x0009);
  692. b43legacy_phy_write(dev, 0x61, b43legacy_phy_read(dev, 0x61)
  693. & 0xFFF);
  694. } else
  695. b43legacy_phy_write(dev, 0x0002, (b43legacy_phy_read(dev,
  696. 0x0002) & 0xFFC0) | 0x0004);
  697. if (phy->type == B43legacy_PHYTYPE_G)
  698. b43legacy_write16(dev, 0x03E6, 0x0);
  699. if (phy->type == B43legacy_PHYTYPE_B) {
  700. b43legacy_write16(dev, 0x03E6, 0x8140);
  701. b43legacy_phy_write(dev, 0x0016, 0x0410);
  702. b43legacy_phy_write(dev, 0x0017, 0x0820);
  703. b43legacy_phy_write(dev, 0x0062, 0x0007);
  704. b43legacy_radio_init2050(dev);
  705. b43legacy_phy_lo_g_measure(dev);
  706. if (dev->dev->bus->sprom.r1.boardflags_lo &
  707. B43legacy_BFL_RSSI) {
  708. b43legacy_calc_nrssi_slope(dev);
  709. b43legacy_calc_nrssi_threshold(dev);
  710. }
  711. b43legacy_phy_init_pctl(dev);
  712. }
  713. }
  714. static void b43legacy_calc_loopback_gain(struct b43legacy_wldev *dev)
  715. {
  716. struct b43legacy_phy *phy = &dev->phy;
  717. u16 backup_phy[15] = {0};
  718. u16 backup_radio[3];
  719. u16 backup_bband;
  720. u16 i;
  721. u16 loop1_cnt;
  722. u16 loop1_done;
  723. u16 loop1_omitted;
  724. u16 loop2_done;
  725. backup_phy[0] = b43legacy_phy_read(dev, 0x0429);
  726. backup_phy[1] = b43legacy_phy_read(dev, 0x0001);
  727. backup_phy[2] = b43legacy_phy_read(dev, 0x0811);
  728. backup_phy[3] = b43legacy_phy_read(dev, 0x0812);
  729. if (phy->rev != 1) {
  730. backup_phy[4] = b43legacy_phy_read(dev, 0x0814);
  731. backup_phy[5] = b43legacy_phy_read(dev, 0x0815);
  732. }
  733. backup_phy[6] = b43legacy_phy_read(dev, 0x005A);
  734. backup_phy[7] = b43legacy_phy_read(dev, 0x0059);
  735. backup_phy[8] = b43legacy_phy_read(dev, 0x0058);
  736. backup_phy[9] = b43legacy_phy_read(dev, 0x000A);
  737. backup_phy[10] = b43legacy_phy_read(dev, 0x0003);
  738. backup_phy[11] = b43legacy_phy_read(dev, 0x080F);
  739. backup_phy[12] = b43legacy_phy_read(dev, 0x0810);
  740. backup_phy[13] = b43legacy_phy_read(dev, 0x002B);
  741. backup_phy[14] = b43legacy_phy_read(dev, 0x0015);
  742. b43legacy_phy_read(dev, 0x002D); /* dummy read */
  743. backup_bband = phy->bbatt;
  744. backup_radio[0] = b43legacy_radio_read16(dev, 0x0052);
  745. backup_radio[1] = b43legacy_radio_read16(dev, 0x0043);
  746. backup_radio[2] = b43legacy_radio_read16(dev, 0x007A);
  747. b43legacy_phy_write(dev, 0x0429,
  748. b43legacy_phy_read(dev, 0x0429) & 0x3FFF);
  749. b43legacy_phy_write(dev, 0x0001,
  750. b43legacy_phy_read(dev, 0x0001) & 0x8000);
  751. b43legacy_phy_write(dev, 0x0811,
  752. b43legacy_phy_read(dev, 0x0811) | 0x0002);
  753. b43legacy_phy_write(dev, 0x0812,
  754. b43legacy_phy_read(dev, 0x0812) & 0xFFFD);
  755. b43legacy_phy_write(dev, 0x0811,
  756. b43legacy_phy_read(dev, 0x0811) | 0x0001);
  757. b43legacy_phy_write(dev, 0x0812,
  758. b43legacy_phy_read(dev, 0x0812) & 0xFFFE);
  759. if (phy->rev != 1) {
  760. b43legacy_phy_write(dev, 0x0814,
  761. b43legacy_phy_read(dev, 0x0814) | 0x0001);
  762. b43legacy_phy_write(dev, 0x0815,
  763. b43legacy_phy_read(dev, 0x0815) & 0xFFFE);
  764. b43legacy_phy_write(dev, 0x0814,
  765. b43legacy_phy_read(dev, 0x0814) | 0x0002);
  766. b43legacy_phy_write(dev, 0x0815,
  767. b43legacy_phy_read(dev, 0x0815) & 0xFFFD);
  768. }
  769. b43legacy_phy_write(dev, 0x0811, b43legacy_phy_read(dev, 0x0811) |
  770. 0x000C);
  771. b43legacy_phy_write(dev, 0x0812, b43legacy_phy_read(dev, 0x0812) |
  772. 0x000C);
  773. b43legacy_phy_write(dev, 0x0811, (b43legacy_phy_read(dev, 0x0811)
  774. & 0xFFCF) | 0x0030);
  775. b43legacy_phy_write(dev, 0x0812, (b43legacy_phy_read(dev, 0x0812)
  776. & 0xFFCF) | 0x0010);
  777. b43legacy_phy_write(dev, 0x005A, 0x0780);
  778. b43legacy_phy_write(dev, 0x0059, 0xC810);
  779. b43legacy_phy_write(dev, 0x0058, 0x000D);
  780. if (phy->analog == 0)
  781. b43legacy_phy_write(dev, 0x0003, 0x0122);
  782. else
  783. b43legacy_phy_write(dev, 0x000A,
  784. b43legacy_phy_read(dev, 0x000A)
  785. | 0x2000);
  786. if (phy->rev != 1) {
  787. b43legacy_phy_write(dev, 0x0814,
  788. b43legacy_phy_read(dev, 0x0814) | 0x0004);
  789. b43legacy_phy_write(dev, 0x0815,
  790. b43legacy_phy_read(dev, 0x0815) & 0xFFFB);
  791. }
  792. b43legacy_phy_write(dev, 0x0003,
  793. (b43legacy_phy_read(dev, 0x0003)
  794. & 0xFF9F) | 0x0040);
  795. if (phy->radio_ver == 0x2050 && phy->radio_rev == 2) {
  796. b43legacy_radio_write16(dev, 0x0052, 0x0000);
  797. b43legacy_radio_write16(dev, 0x0043,
  798. (b43legacy_radio_read16(dev, 0x0043)
  799. & 0xFFF0) | 0x0009);
  800. loop1_cnt = 9;
  801. } else if (phy->radio_rev == 8) {
  802. b43legacy_radio_write16(dev, 0x0043, 0x000F);
  803. loop1_cnt = 15;
  804. } else
  805. loop1_cnt = 0;
  806. b43legacy_phy_set_baseband_attenuation(dev, 11);
  807. if (phy->rev >= 3)
  808. b43legacy_phy_write(dev, 0x080F, 0xC020);
  809. else
  810. b43legacy_phy_write(dev, 0x080F, 0x8020);
  811. b43legacy_phy_write(dev, 0x0810, 0x0000);
  812. b43legacy_phy_write(dev, 0x002B,
  813. (b43legacy_phy_read(dev, 0x002B)
  814. & 0xFFC0) | 0x0001);
  815. b43legacy_phy_write(dev, 0x002B,
  816. (b43legacy_phy_read(dev, 0x002B)
  817. & 0xC0FF) | 0x0800);
  818. b43legacy_phy_write(dev, 0x0811,
  819. b43legacy_phy_read(dev, 0x0811) | 0x0100);
  820. b43legacy_phy_write(dev, 0x0812,
  821. b43legacy_phy_read(dev, 0x0812) & 0xCFFF);
  822. if (dev->dev->bus->sprom.r1.boardflags_lo & B43legacy_BFL_EXTLNA) {
  823. if (phy->rev >= 7) {
  824. b43legacy_phy_write(dev, 0x0811,
  825. b43legacy_phy_read(dev, 0x0811)
  826. | 0x0800);
  827. b43legacy_phy_write(dev, 0x0812,
  828. b43legacy_phy_read(dev, 0x0812)
  829. | 0x8000);
  830. }
  831. }
  832. b43legacy_radio_write16(dev, 0x007A,
  833. b43legacy_radio_read16(dev, 0x007A)
  834. & 0x00F7);
  835. for (i = 0; i < loop1_cnt; i++) {
  836. b43legacy_radio_write16(dev, 0x0043, loop1_cnt);
  837. b43legacy_phy_write(dev, 0x0812,
  838. (b43legacy_phy_read(dev, 0x0812)
  839. & 0xF0FF) | (i << 8));
  840. b43legacy_phy_write(dev, 0x0015,
  841. (b43legacy_phy_read(dev, 0x0015)
  842. & 0x0FFF) | 0xA000);
  843. b43legacy_phy_write(dev, 0x0015,
  844. (b43legacy_phy_read(dev, 0x0015)
  845. & 0x0FFF) | 0xF000);
  846. udelay(20);
  847. if (b43legacy_phy_read(dev, 0x002D) >= 0x0DFC)
  848. break;
  849. }
  850. loop1_done = i;
  851. loop1_omitted = loop1_cnt - loop1_done;
  852. loop2_done = 0;
  853. if (loop1_done >= 8) {
  854. b43legacy_phy_write(dev, 0x0812,
  855. b43legacy_phy_read(dev, 0x0812)
  856. | 0x0030);
  857. for (i = loop1_done - 8; i < 16; i++) {
  858. b43legacy_phy_write(dev, 0x0812,
  859. (b43legacy_phy_read(dev, 0x0812)
  860. & 0xF0FF) | (i << 8));
  861. b43legacy_phy_write(dev, 0x0015,
  862. (b43legacy_phy_read(dev, 0x0015)
  863. & 0x0FFF) | 0xA000);
  864. b43legacy_phy_write(dev, 0x0015,
  865. (b43legacy_phy_read(dev, 0x0015)
  866. & 0x0FFF) | 0xF000);
  867. udelay(20);
  868. if (b43legacy_phy_read(dev, 0x002D) >= 0x0DFC)
  869. break;
  870. }
  871. }
  872. if (phy->rev != 1) {
  873. b43legacy_phy_write(dev, 0x0814, backup_phy[4]);
  874. b43legacy_phy_write(dev, 0x0815, backup_phy[5]);
  875. }
  876. b43legacy_phy_write(dev, 0x005A, backup_phy[6]);
  877. b43legacy_phy_write(dev, 0x0059, backup_phy[7]);
  878. b43legacy_phy_write(dev, 0x0058, backup_phy[8]);
  879. b43legacy_phy_write(dev, 0x000A, backup_phy[9]);
  880. b43legacy_phy_write(dev, 0x0003, backup_phy[10]);
  881. b43legacy_phy_write(dev, 0x080F, backup_phy[11]);
  882. b43legacy_phy_write(dev, 0x0810, backup_phy[12]);
  883. b43legacy_phy_write(dev, 0x002B, backup_phy[13]);
  884. b43legacy_phy_write(dev, 0x0015, backup_phy[14]);
  885. b43legacy_phy_set_baseband_attenuation(dev, backup_bband);
  886. b43legacy_radio_write16(dev, 0x0052, backup_radio[0]);
  887. b43legacy_radio_write16(dev, 0x0043, backup_radio[1]);
  888. b43legacy_radio_write16(dev, 0x007A, backup_radio[2]);
  889. b43legacy_phy_write(dev, 0x0811, backup_phy[2] | 0x0003);
  890. udelay(10);
  891. b43legacy_phy_write(dev, 0x0811, backup_phy[2]);
  892. b43legacy_phy_write(dev, 0x0812, backup_phy[3]);
  893. b43legacy_phy_write(dev, 0x0429, backup_phy[0]);
  894. b43legacy_phy_write(dev, 0x0001, backup_phy[1]);
  895. phy->loopback_gain[0] = ((loop1_done * 6) - (loop1_omitted * 4)) - 11;
  896. phy->loopback_gain[1] = (24 - (3 * loop2_done)) * 2;
  897. }
  898. static void b43legacy_phy_initg(struct b43legacy_wldev *dev)
  899. {
  900. struct b43legacy_phy *phy = &dev->phy;
  901. u16 tmp;
  902. if (phy->rev == 1)
  903. b43legacy_phy_initb5(dev);
  904. else
  905. b43legacy_phy_initb6(dev);
  906. if (phy->rev >= 2 || phy->gmode)
  907. b43legacy_phy_inita(dev);
  908. if (phy->rev >= 2) {
  909. b43legacy_phy_write(dev, 0x0814, 0x0000);
  910. b43legacy_phy_write(dev, 0x0815, 0x0000);
  911. }
  912. if (phy->rev == 2) {
  913. b43legacy_phy_write(dev, 0x0811, 0x0000);
  914. b43legacy_phy_write(dev, 0x0015, 0x00C0);
  915. }
  916. if (phy->rev > 5) {
  917. b43legacy_phy_write(dev, 0x0811, 0x0400);
  918. b43legacy_phy_write(dev, 0x0015, 0x00C0);
  919. }
  920. if (phy->rev >= 2 || phy->gmode) {
  921. tmp = b43legacy_phy_read(dev, 0x0400) & 0xFF;
  922. if (tmp == 3 || tmp == 5) {
  923. b43legacy_phy_write(dev, 0x04C2, 0x1816);
  924. b43legacy_phy_write(dev, 0x04C3, 0x8006);
  925. if (tmp == 5)
  926. b43legacy_phy_write(dev, 0x04CC,
  927. (b43legacy_phy_read(dev,
  928. 0x04CC) & 0x00FF) |
  929. 0x1F00);
  930. }
  931. b43legacy_phy_write(dev, 0x047E, 0x0078);
  932. }
  933. if (phy->radio_rev == 8) {
  934. b43legacy_phy_write(dev, 0x0801, b43legacy_phy_read(dev, 0x0801)
  935. | 0x0080);
  936. b43legacy_phy_write(dev, 0x043E, b43legacy_phy_read(dev, 0x043E)
  937. | 0x0004);
  938. }
  939. if (phy->rev >= 2 && phy->gmode)
  940. b43legacy_calc_loopback_gain(dev);
  941. if (phy->radio_rev != 8) {
  942. if (phy->initval == 0xFFFF)
  943. phy->initval = b43legacy_radio_init2050(dev);
  944. else
  945. b43legacy_radio_write16(dev, 0x0078, phy->initval);
  946. }
  947. if (phy->txctl2 == 0xFFFF)
  948. b43legacy_phy_lo_g_measure(dev);
  949. else {
  950. if (phy->radio_ver == 0x2050 && phy->radio_rev == 8)
  951. b43legacy_radio_write16(dev, 0x0052,
  952. (phy->txctl1 << 4) |
  953. phy->txctl2);
  954. else
  955. b43legacy_radio_write16(dev, 0x0052,
  956. (b43legacy_radio_read16(dev,
  957. 0x0052) & 0xFFF0) |
  958. phy->txctl1);
  959. if (phy->rev >= 6)
  960. b43legacy_phy_write(dev, 0x0036,
  961. (b43legacy_phy_read(dev, 0x0036)
  962. & 0x0FFF) | (phy->txctl2 << 12));
  963. if (dev->dev->bus->sprom.r1.boardflags_lo &
  964. B43legacy_BFL_PACTRL)
  965. b43legacy_phy_write(dev, 0x002E, 0x8075);
  966. else
  967. b43legacy_phy_write(dev, 0x002E, 0x807F);
  968. if (phy->rev < 2)
  969. b43legacy_phy_write(dev, 0x002F, 0x0101);
  970. else
  971. b43legacy_phy_write(dev, 0x002F, 0x0202);
  972. }
  973. if (phy->gmode || phy->rev >= 2) {
  974. b43legacy_phy_lo_adjust(dev, 0);
  975. b43legacy_phy_write(dev, 0x080F, 0x8078);
  976. }
  977. if (!(dev->dev->bus->sprom.r1.boardflags_lo & B43legacy_BFL_RSSI)) {
  978. /* The specs state to update the NRSSI LT with
  979. * the value 0x7FFFFFFF here. I think that is some weird
  980. * compiler optimization in the original driver.
  981. * Essentially, what we do here is resetting all NRSSI LT
  982. * entries to -32 (see the limit_value() in nrssi_hw_update())
  983. */
  984. b43legacy_nrssi_hw_update(dev, 0xFFFF);
  985. b43legacy_calc_nrssi_threshold(dev);
  986. } else if (phy->gmode || phy->rev >= 2) {
  987. if (phy->nrssi[0] == -1000) {
  988. B43legacy_WARN_ON(phy->nrssi[1] != -1000);
  989. b43legacy_calc_nrssi_slope(dev);
  990. } else {
  991. B43legacy_WARN_ON(phy->nrssi[1] == -1000);
  992. b43legacy_calc_nrssi_threshold(dev);
  993. }
  994. }
  995. if (phy->radio_rev == 8)
  996. b43legacy_phy_write(dev, 0x0805, 0x3230);
  997. b43legacy_phy_init_pctl(dev);
  998. if (dev->dev->bus->chip_id == 0x4306
  999. && dev->dev->bus->chip_package == 2) {
  1000. b43legacy_phy_write(dev, 0x0429,
  1001. b43legacy_phy_read(dev, 0x0429) & 0xBFFF);
  1002. b43legacy_phy_write(dev, 0x04C3,
  1003. b43legacy_phy_read(dev, 0x04C3) & 0x7FFF);
  1004. }
  1005. }
  1006. static u16 b43legacy_phy_lo_b_r15_loop(struct b43legacy_wldev *dev)
  1007. {
  1008. int i;
  1009. u16 ret = 0;
  1010. unsigned long flags;
  1011. local_irq_save(flags);
  1012. for (i = 0; i < 10; i++) {
  1013. b43legacy_phy_write(dev, 0x0015, 0xAFA0);
  1014. udelay(1);
  1015. b43legacy_phy_write(dev, 0x0015, 0xEFA0);
  1016. udelay(10);
  1017. b43legacy_phy_write(dev, 0x0015, 0xFFA0);
  1018. udelay(40);
  1019. ret += b43legacy_phy_read(dev, 0x002C);
  1020. }
  1021. local_irq_restore(flags);
  1022. b43legacy_voluntary_preempt();
  1023. return ret;
  1024. }
  1025. void b43legacy_phy_lo_b_measure(struct b43legacy_wldev *dev)
  1026. {
  1027. struct b43legacy_phy *phy = &dev->phy;
  1028. u16 regstack[12] = { 0 };
  1029. u16 mls;
  1030. u16 fval;
  1031. int i;
  1032. int j;
  1033. regstack[0] = b43legacy_phy_read(dev, 0x0015);
  1034. regstack[1] = b43legacy_radio_read16(dev, 0x0052) & 0xFFF0;
  1035. if (phy->radio_ver == 0x2053) {
  1036. regstack[2] = b43legacy_phy_read(dev, 0x000A);
  1037. regstack[3] = b43legacy_phy_read(dev, 0x002A);
  1038. regstack[4] = b43legacy_phy_read(dev, 0x0035);
  1039. regstack[5] = b43legacy_phy_read(dev, 0x0003);
  1040. regstack[6] = b43legacy_phy_read(dev, 0x0001);
  1041. regstack[7] = b43legacy_phy_read(dev, 0x0030);
  1042. regstack[8] = b43legacy_radio_read16(dev, 0x0043);
  1043. regstack[9] = b43legacy_radio_read16(dev, 0x007A);
  1044. regstack[10] = b43legacy_read16(dev, 0x03EC);
  1045. regstack[11] = b43legacy_radio_read16(dev, 0x0052) & 0x00F0;
  1046. b43legacy_phy_write(dev, 0x0030, 0x00FF);
  1047. b43legacy_write16(dev, 0x03EC, 0x3F3F);
  1048. b43legacy_phy_write(dev, 0x0035, regstack[4] & 0xFF7F);
  1049. b43legacy_radio_write16(dev, 0x007A, regstack[9] & 0xFFF0);
  1050. }
  1051. b43legacy_phy_write(dev, 0x0015, 0xB000);
  1052. b43legacy_phy_write(dev, 0x002B, 0x0004);
  1053. if (phy->radio_ver == 0x2053) {
  1054. b43legacy_phy_write(dev, 0x002B, 0x0203);
  1055. b43legacy_phy_write(dev, 0x002A, 0x08A3);
  1056. }
  1057. phy->minlowsig[0] = 0xFFFF;
  1058. for (i = 0; i < 4; i++) {
  1059. b43legacy_radio_write16(dev, 0x0052, regstack[1] | i);
  1060. b43legacy_phy_lo_b_r15_loop(dev);
  1061. }
  1062. for (i = 0; i < 10; i++) {
  1063. b43legacy_radio_write16(dev, 0x0052, regstack[1] | i);
  1064. mls = b43legacy_phy_lo_b_r15_loop(dev) / 10;
  1065. if (mls < phy->minlowsig[0]) {
  1066. phy->minlowsig[0] = mls;
  1067. phy->minlowsigpos[0] = i;
  1068. }
  1069. }
  1070. b43legacy_radio_write16(dev, 0x0052, regstack[1]
  1071. | phy->minlowsigpos[0]);
  1072. phy->minlowsig[1] = 0xFFFF;
  1073. for (i = -4; i < 5; i += 2) {
  1074. for (j = -4; j < 5; j += 2) {
  1075. if (j < 0)
  1076. fval = (0x0100 * i) + j + 0x0100;
  1077. else
  1078. fval = (0x0100 * i) + j;
  1079. b43legacy_phy_write(dev, 0x002F, fval);
  1080. mls = b43legacy_phy_lo_b_r15_loop(dev) / 10;
  1081. if (mls < phy->minlowsig[1]) {
  1082. phy->minlowsig[1] = mls;
  1083. phy->minlowsigpos[1] = fval;
  1084. }
  1085. }
  1086. }
  1087. phy->minlowsigpos[1] += 0x0101;
  1088. b43legacy_phy_write(dev, 0x002F, phy->minlowsigpos[1]);
  1089. if (phy->radio_ver == 0x2053) {
  1090. b43legacy_phy_write(dev, 0x000A, regstack[2]);
  1091. b43legacy_phy_write(dev, 0x002A, regstack[3]);
  1092. b43legacy_phy_write(dev, 0x0035, regstack[4]);
  1093. b43legacy_phy_write(dev, 0x0003, regstack[5]);
  1094. b43legacy_phy_write(dev, 0x0001, regstack[6]);
  1095. b43legacy_phy_write(dev, 0x0030, regstack[7]);
  1096. b43legacy_radio_write16(dev, 0x0043, regstack[8]);
  1097. b43legacy_radio_write16(dev, 0x007A, regstack[9]);
  1098. b43legacy_radio_write16(dev, 0x0052,
  1099. (b43legacy_radio_read16(dev, 0x0052)
  1100. & 0x000F) | regstack[11]);
  1101. b43legacy_write16(dev, 0x03EC, regstack[10]);
  1102. }
  1103. b43legacy_phy_write(dev, 0x0015, regstack[0]);
  1104. }
  1105. static inline
  1106. u16 b43legacy_phy_lo_g_deviation_subval(struct b43legacy_wldev *dev,
  1107. u16 control)
  1108. {
  1109. struct b43legacy_phy *phy = &dev->phy;
  1110. u16 ret;
  1111. unsigned long flags;
  1112. local_irq_save(flags);
  1113. if (phy->gmode) {
  1114. b43legacy_phy_write(dev, 0x15, 0xE300);
  1115. control <<= 8;
  1116. b43legacy_phy_write(dev, 0x0812, control | 0x00B0);
  1117. udelay(5);
  1118. b43legacy_phy_write(dev, 0x0812, control | 0x00B2);
  1119. udelay(2);
  1120. b43legacy_phy_write(dev, 0x0812, control | 0x00B3);
  1121. udelay(4);
  1122. b43legacy_phy_write(dev, 0x0015, 0xF300);
  1123. udelay(8);
  1124. } else {
  1125. b43legacy_phy_write(dev, 0x0015, control | 0xEFA0);
  1126. udelay(2);
  1127. b43legacy_phy_write(dev, 0x0015, control | 0xEFE0);
  1128. udelay(4);
  1129. b43legacy_phy_write(dev, 0x0015, control | 0xFFE0);
  1130. udelay(8);
  1131. }
  1132. ret = b43legacy_phy_read(dev, 0x002D);
  1133. local_irq_restore(flags);
  1134. b43legacy_voluntary_preempt();
  1135. return ret;
  1136. }
  1137. static u32 b43legacy_phy_lo_g_singledeviation(struct b43legacy_wldev *dev,
  1138. u16 control)
  1139. {
  1140. int i;
  1141. u32 ret = 0;
  1142. for (i = 0; i < 8; i++)
  1143. ret += b43legacy_phy_lo_g_deviation_subval(dev, control);
  1144. return ret;
  1145. }
  1146. /* Write the LocalOscillator CONTROL */
  1147. static inline
  1148. void b43legacy_lo_write(struct b43legacy_wldev *dev,
  1149. struct b43legacy_lopair *pair)
  1150. {
  1151. u16 value;
  1152. value = (u8)(pair->low);
  1153. value |= ((u8)(pair->high)) << 8;
  1154. #ifdef CONFIG_B43LEGACY_DEBUG
  1155. /* Sanity check. */
  1156. if (pair->low < -8 || pair->low > 8 ||
  1157. pair->high < -8 || pair->high > 8) {
  1158. struct b43legacy_phy *phy = &dev->phy;
  1159. b43legacydbg(dev->wl,
  1160. "WARNING: Writing invalid LOpair "
  1161. "(low: %d, high: %d, index: %lu)\n",
  1162. pair->low, pair->high,
  1163. (unsigned long)(pair - phy->_lo_pairs));
  1164. dump_stack();
  1165. }
  1166. #endif
  1167. b43legacy_phy_write(dev, B43legacy_PHY_G_LO_CONTROL, value);
  1168. }
  1169. static inline
  1170. struct b43legacy_lopair *b43legacy_find_lopair(struct b43legacy_wldev *dev,
  1171. u16 bbatt,
  1172. u16 rfatt,
  1173. u16 tx)
  1174. {
  1175. static const u8 dict[10] = { 11, 10, 11, 12, 13, 12, 13, 12, 13, 12 };
  1176. struct b43legacy_phy *phy = &dev->phy;
  1177. if (bbatt > 6)
  1178. bbatt = 6;
  1179. B43legacy_WARN_ON(rfatt >= 10);
  1180. if (tx == 3)
  1181. return b43legacy_get_lopair(phy, rfatt, bbatt);
  1182. return b43legacy_get_lopair(phy, dict[rfatt], bbatt);
  1183. }
  1184. static inline
  1185. struct b43legacy_lopair *b43legacy_current_lopair(struct b43legacy_wldev *dev)
  1186. {
  1187. struct b43legacy_phy *phy = &dev->phy;
  1188. return b43legacy_find_lopair(dev, phy->bbatt,
  1189. phy->rfatt, phy->txctl1);
  1190. }
  1191. /* Adjust B/G LO */
  1192. void b43legacy_phy_lo_adjust(struct b43legacy_wldev *dev, int fixed)
  1193. {
  1194. struct b43legacy_lopair *pair;
  1195. if (fixed) {
  1196. /* Use fixed values. Only for initialization. */
  1197. pair = b43legacy_find_lopair(dev, 2, 3, 0);
  1198. } else
  1199. pair = b43legacy_current_lopair(dev);
  1200. b43legacy_lo_write(dev, pair);
  1201. }
  1202. static void b43legacy_phy_lo_g_measure_txctl2(struct b43legacy_wldev *dev)
  1203. {
  1204. struct b43legacy_phy *phy = &dev->phy;
  1205. u16 txctl2 = 0;
  1206. u16 i;
  1207. u32 smallest;
  1208. u32 tmp;
  1209. b43legacy_radio_write16(dev, 0x0052, 0x0000);
  1210. udelay(10);
  1211. smallest = b43legacy_phy_lo_g_singledeviation(dev, 0);
  1212. for (i = 0; i < 16; i++) {
  1213. b43legacy_radio_write16(dev, 0x0052, i);
  1214. udelay(10);
  1215. tmp = b43legacy_phy_lo_g_singledeviation(dev, 0);
  1216. if (tmp < smallest) {
  1217. smallest = tmp;
  1218. txctl2 = i;
  1219. }
  1220. }
  1221. phy->txctl2 = txctl2;
  1222. }
  1223. static
  1224. void b43legacy_phy_lo_g_state(struct b43legacy_wldev *dev,
  1225. const struct b43legacy_lopair *in_pair,
  1226. struct b43legacy_lopair *out_pair,
  1227. u16 r27)
  1228. {
  1229. static const struct b43legacy_lopair transitions[8] = {
  1230. { .high = 1, .low = 1, },
  1231. { .high = 1, .low = 0, },
  1232. { .high = 1, .low = -1, },
  1233. { .high = 0, .low = -1, },
  1234. { .high = -1, .low = -1, },
  1235. { .high = -1, .low = 0, },
  1236. { .high = -1, .low = 1, },
  1237. { .high = 0, .low = 1, },
  1238. };
  1239. struct b43legacy_lopair lowest_transition = {
  1240. .high = in_pair->high,
  1241. .low = in_pair->low,
  1242. };
  1243. struct b43legacy_lopair tmp_pair;
  1244. struct b43legacy_lopair transition;
  1245. int i = 12;
  1246. int state = 0;
  1247. int found_lower;
  1248. int j;
  1249. int begin;
  1250. int end;
  1251. u32 lowest_deviation;
  1252. u32 tmp;
  1253. /* Note that in_pair and out_pair can point to the same pair.
  1254. * Be careful. */
  1255. b43legacy_lo_write(dev, &lowest_transition);
  1256. lowest_deviation = b43legacy_phy_lo_g_singledeviation(dev, r27);
  1257. do {
  1258. found_lower = 0;
  1259. B43legacy_WARN_ON(!(state >= 0 && state <= 8));
  1260. if (state == 0) {
  1261. begin = 1;
  1262. end = 8;
  1263. } else if (state % 2 == 0) {
  1264. begin = state - 1;
  1265. end = state + 1;
  1266. } else {
  1267. begin = state - 2;
  1268. end = state + 2;
  1269. }
  1270. if (begin < 1)
  1271. begin += 8;
  1272. if (end > 8)
  1273. end -= 8;
  1274. j = begin;
  1275. tmp_pair.high = lowest_transition.high;
  1276. tmp_pair.low = lowest_transition.low;
  1277. while (1) {
  1278. B43legacy_WARN_ON(!(j >= 1 && j <= 8));
  1279. transition.high = tmp_pair.high +
  1280. transitions[j - 1].high;
  1281. transition.low = tmp_pair.low + transitions[j - 1].low;
  1282. if ((abs(transition.low) < 9)
  1283. && (abs(transition.high) < 9)) {
  1284. b43legacy_lo_write(dev, &transition);
  1285. tmp = b43legacy_phy_lo_g_singledeviation(dev,
  1286. r27);
  1287. if (tmp < lowest_deviation) {
  1288. lowest_deviation = tmp;
  1289. state = j;
  1290. found_lower = 1;
  1291. lowest_transition.high =
  1292. transition.high;
  1293. lowest_transition.low = transition.low;
  1294. }
  1295. }
  1296. if (j == end)
  1297. break;
  1298. if (j == 8)
  1299. j = 1;
  1300. else
  1301. j++;
  1302. }
  1303. } while (i-- && found_lower);
  1304. out_pair->high = lowest_transition.high;
  1305. out_pair->low = lowest_transition.low;
  1306. }
  1307. /* Set the baseband attenuation value on chip. */
  1308. void b43legacy_phy_set_baseband_attenuation(struct b43legacy_wldev *dev,
  1309. u16 bbatt)
  1310. {
  1311. struct b43legacy_phy *phy = &dev->phy;
  1312. u16 value;
  1313. if (phy->analog == 0) {
  1314. value = (b43legacy_read16(dev, 0x03E6) & 0xFFF0);
  1315. value |= (bbatt & 0x000F);
  1316. b43legacy_write16(dev, 0x03E6, value);
  1317. return;
  1318. }
  1319. if (phy->analog > 1) {
  1320. value = b43legacy_phy_read(dev, 0x0060) & 0xFFC3;
  1321. value |= (bbatt << 2) & 0x003C;
  1322. } else {
  1323. value = b43legacy_phy_read(dev, 0x0060) & 0xFF87;
  1324. value |= (bbatt << 3) & 0x0078;
  1325. }
  1326. b43legacy_phy_write(dev, 0x0060, value);
  1327. }
  1328. /* http://bcm-specs.sipsolutions.net/LocalOscillator/Measure */
  1329. void b43legacy_phy_lo_g_measure(struct b43legacy_wldev *dev)
  1330. {
  1331. static const u8 pairorder[10] = { 3, 1, 5, 7, 9, 2, 0, 4, 6, 8 };
  1332. const int is_initializing = (b43legacy_status(dev)
  1333. < B43legacy_STAT_STARTED);
  1334. struct b43legacy_phy *phy = &dev->phy;
  1335. u16 h;
  1336. u16 i;
  1337. u16 oldi = 0;
  1338. u16 j;
  1339. struct b43legacy_lopair control;
  1340. struct b43legacy_lopair *tmp_control;
  1341. u16 tmp;
  1342. u16 regstack[16] = { 0 };
  1343. u8 oldchannel;
  1344. /* XXX: What are these? */
  1345. u8 r27 = 0;
  1346. u16 r31;
  1347. oldchannel = phy->channel;
  1348. /* Setup */
  1349. if (phy->gmode) {
  1350. regstack[0] = b43legacy_phy_read(dev, B43legacy_PHY_G_CRS);
  1351. regstack[1] = b43legacy_phy_read(dev, 0x0802);
  1352. b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, regstack[0]
  1353. & 0x7FFF);
  1354. b43legacy_phy_write(dev, 0x0802, regstack[1] & 0xFFFC);
  1355. }
  1356. regstack[3] = b43legacy_read16(dev, 0x03E2);
  1357. b43legacy_write16(dev, 0x03E2, regstack[3] | 0x8000);
  1358. regstack[4] = b43legacy_read16(dev, B43legacy_MMIO_CHANNEL_EXT);
  1359. regstack[5] = b43legacy_phy_read(dev, 0x15);
  1360. regstack[6] = b43legacy_phy_read(dev, 0x2A);
  1361. regstack[7] = b43legacy_phy_read(dev, 0x35);
  1362. regstack[8] = b43legacy_phy_read(dev, 0x60);
  1363. regstack[9] = b43legacy_radio_read16(dev, 0x43);
  1364. regstack[10] = b43legacy_radio_read16(dev, 0x7A);
  1365. regstack[11] = b43legacy_radio_read16(dev, 0x52);
  1366. if (phy->gmode) {
  1367. regstack[12] = b43legacy_phy_read(dev, 0x0811);
  1368. regstack[13] = b43legacy_phy_read(dev, 0x0812);
  1369. regstack[14] = b43legacy_phy_read(dev, 0x0814);
  1370. regstack[15] = b43legacy_phy_read(dev, 0x0815);
  1371. }
  1372. b43legacy_radio_selectchannel(dev, 6, 0);
  1373. if (phy->gmode) {
  1374. b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, regstack[0]
  1375. & 0x7FFF);
  1376. b43legacy_phy_write(dev, 0x0802, regstack[1] & 0xFFFC);
  1377. b43legacy_dummy_transmission(dev);
  1378. }
  1379. b43legacy_radio_write16(dev, 0x0043, 0x0006);
  1380. b43legacy_phy_set_baseband_attenuation(dev, 2);
  1381. b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, 0x0000);
  1382. b43legacy_phy_write(dev, 0x002E, 0x007F);
  1383. b43legacy_phy_write(dev, 0x080F, 0x0078);
  1384. b43legacy_phy_write(dev, 0x0035, regstack[7] & ~(1 << 7));
  1385. b43legacy_radio_write16(dev, 0x007A, regstack[10] & 0xFFF0);
  1386. b43legacy_phy_write(dev, 0x002B, 0x0203);
  1387. b43legacy_phy_write(dev, 0x002A, 0x08A3);
  1388. if (phy->gmode) {
  1389. b43legacy_phy_write(dev, 0x0814, regstack[14] | 0x0003);
  1390. b43legacy_phy_write(dev, 0x0815, regstack[15] & 0xFFFC);
  1391. b43legacy_phy_write(dev, 0x0811, 0x01B3);
  1392. b43legacy_phy_write(dev, 0x0812, 0x00B2);
  1393. }
  1394. if (is_initializing)
  1395. b43legacy_phy_lo_g_measure_txctl2(dev);
  1396. b43legacy_phy_write(dev, 0x080F, 0x8078);
  1397. /* Measure */
  1398. control.low = 0;
  1399. control.high = 0;
  1400. for (h = 0; h < 10; h++) {
  1401. /* Loop over each possible RadioAttenuation (0-9) */
  1402. i = pairorder[h];
  1403. if (is_initializing) {
  1404. if (i == 3) {
  1405. control.low = 0;
  1406. control.high = 0;
  1407. } else if (((i % 2 == 1) && (oldi % 2 == 1)) ||
  1408. ((i % 2 == 0) && (oldi % 2 == 0))) {
  1409. tmp_control = b43legacy_get_lopair(phy, oldi,
  1410. 0);
  1411. memcpy(&control, tmp_control, sizeof(control));
  1412. } else {
  1413. tmp_control = b43legacy_get_lopair(phy, 3, 0);
  1414. memcpy(&control, tmp_control, sizeof(control));
  1415. }
  1416. }
  1417. /* Loop over each possible BasebandAttenuation/2 */
  1418. for (j = 0; j < 4; j++) {
  1419. if (is_initializing) {
  1420. tmp = i * 2 + j;
  1421. r27 = 0;
  1422. r31 = 0;
  1423. if (tmp > 14) {
  1424. r31 = 1;
  1425. if (tmp > 17)
  1426. r27 = 1;
  1427. if (tmp > 19)
  1428. r27 = 2;
  1429. }
  1430. } else {
  1431. tmp_control = b43legacy_get_lopair(phy, i,
  1432. j * 2);
  1433. if (!tmp_control->used)
  1434. continue;
  1435. memcpy(&control, tmp_control, sizeof(control));
  1436. r27 = 3;
  1437. r31 = 0;
  1438. }
  1439. b43legacy_radio_write16(dev, 0x43, i);
  1440. b43legacy_radio_write16(dev, 0x52, phy->txctl2);
  1441. udelay(10);
  1442. b43legacy_voluntary_preempt();
  1443. b43legacy_phy_set_baseband_attenuation(dev, j * 2);
  1444. tmp = (regstack[10] & 0xFFF0);
  1445. if (r31)
  1446. tmp |= 0x0008;
  1447. b43legacy_radio_write16(dev, 0x007A, tmp);
  1448. tmp_control = b43legacy_get_lopair(phy, i, j * 2);
  1449. b43legacy_phy_lo_g_state(dev, &control, tmp_control,
  1450. r27);
  1451. }
  1452. oldi = i;
  1453. }
  1454. /* Loop over each possible RadioAttenuation (10-13) */
  1455. for (i = 10; i < 14; i++) {
  1456. /* Loop over each possible BasebandAttenuation/2 */
  1457. for (j = 0; j < 4; j++) {
  1458. if (is_initializing) {
  1459. tmp_control = b43legacy_get_lopair(phy, i - 9,
  1460. j * 2);
  1461. memcpy(&control, tmp_control, sizeof(control));
  1462. /* FIXME: The next line is wrong, as the
  1463. * following if statement can never trigger. */
  1464. tmp = (i - 9) * 2 + j - 5;
  1465. r27 = 0;
  1466. r31 = 0;
  1467. if (tmp > 14) {
  1468. r31 = 1;
  1469. if (tmp > 17)
  1470. r27 = 1;
  1471. if (tmp > 19)
  1472. r27 = 2;
  1473. }
  1474. } else {
  1475. tmp_control = b43legacy_get_lopair(phy, i - 9,
  1476. j * 2);
  1477. if (!tmp_control->used)
  1478. continue;
  1479. memcpy(&control, tmp_control, sizeof(control));
  1480. r27 = 3;
  1481. r31 = 0;
  1482. }
  1483. b43legacy_radio_write16(dev, 0x43, i - 9);
  1484. /* FIXME: shouldn't txctl1 be zero in the next line
  1485. * and 3 in the loop above? */
  1486. b43legacy_radio_write16(dev, 0x52,
  1487. phy->txctl2
  1488. | (3/*txctl1*/ << 4));
  1489. udelay(10);
  1490. b43legacy_voluntary_preempt();
  1491. b43legacy_phy_set_baseband_attenuation(dev, j * 2);
  1492. tmp = (regstack[10] & 0xFFF0);
  1493. if (r31)
  1494. tmp |= 0x0008;
  1495. b43legacy_radio_write16(dev, 0x7A, tmp);
  1496. tmp_control = b43legacy_get_lopair(phy, i, j * 2);
  1497. b43legacy_phy_lo_g_state(dev, &control, tmp_control,
  1498. r27);
  1499. }
  1500. }
  1501. /* Restoration */
  1502. if (phy->gmode) {
  1503. b43legacy_phy_write(dev, 0x0015, 0xE300);
  1504. b43legacy_phy_write(dev, 0x0812, (r27 << 8) | 0xA0);
  1505. udelay(5);
  1506. b43legacy_phy_write(dev, 0x0812, (r27 << 8) | 0xA2);
  1507. udelay(2);
  1508. b43legacy_phy_write(dev, 0x0812, (r27 << 8) | 0xA3);
  1509. b43legacy_voluntary_preempt();
  1510. } else
  1511. b43legacy_phy_write(dev, 0x0015, r27 | 0xEFA0);
  1512. b43legacy_phy_lo_adjust(dev, is_initializing);
  1513. b43legacy_phy_write(dev, 0x002E, 0x807F);
  1514. if (phy->gmode)
  1515. b43legacy_phy_write(dev, 0x002F, 0x0202);
  1516. else
  1517. b43legacy_phy_write(dev, 0x002F, 0x0101);
  1518. b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, regstack[4]);
  1519. b43legacy_phy_write(dev, 0x0015, regstack[5]);
  1520. b43legacy_phy_write(dev, 0x002A, regstack[6]);
  1521. b43legacy_phy_write(dev, 0x0035, regstack[7]);
  1522. b43legacy_phy_write(dev, 0x0060, regstack[8]);
  1523. b43legacy_radio_write16(dev, 0x0043, regstack[9]);
  1524. b43legacy_radio_write16(dev, 0x007A, regstack[10]);
  1525. regstack[11] &= 0x00F0;
  1526. regstack[11] |= (b43legacy_radio_read16(dev, 0x52) & 0x000F);
  1527. b43legacy_radio_write16(dev, 0x52, regstack[11]);
  1528. b43legacy_write16(dev, 0x03E2, regstack[3]);
  1529. if (phy->gmode) {
  1530. b43legacy_phy_write(dev, 0x0811, regstack[12]);
  1531. b43legacy_phy_write(dev, 0x0812, regstack[13]);
  1532. b43legacy_phy_write(dev, 0x0814, regstack[14]);
  1533. b43legacy_phy_write(dev, 0x0815, regstack[15]);
  1534. b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, regstack[0]);
  1535. b43legacy_phy_write(dev, 0x0802, regstack[1]);
  1536. }
  1537. b43legacy_radio_selectchannel(dev, oldchannel, 1);
  1538. #ifdef CONFIG_B43LEGACY_DEBUG
  1539. {
  1540. /* Sanity check for all lopairs. */
  1541. for (i = 0; i < B43legacy_LO_COUNT; i++) {
  1542. tmp_control = phy->_lo_pairs + i;
  1543. if (tmp_control->low < -8 || tmp_control->low > 8 ||
  1544. tmp_control->high < -8 || tmp_control->high > 8)
  1545. b43legacywarn(dev->wl,
  1546. "WARNING: Invalid LOpair (low: %d, high:"
  1547. " %d, index: %d)\n",
  1548. tmp_control->low, tmp_control->high, i);
  1549. }
  1550. }
  1551. #endif /* CONFIG_B43LEGACY_DEBUG */
  1552. }
  1553. static
  1554. void b43legacy_phy_lo_mark_current_used(struct b43legacy_wldev *dev)
  1555. {
  1556. struct b43legacy_lopair *pair;
  1557. pair = b43legacy_current_lopair(dev);
  1558. pair->used = 1;
  1559. }
  1560. void b43legacy_phy_lo_mark_all_unused(struct b43legacy_wldev *dev)
  1561. {
  1562. struct b43legacy_phy *phy = &dev->phy;
  1563. struct b43legacy_lopair *pair;
  1564. int i;
  1565. for (i = 0; i < B43legacy_LO_COUNT; i++) {
  1566. pair = phy->_lo_pairs + i;
  1567. pair->used = 0;
  1568. }
  1569. }
  1570. /* http://bcm-specs.sipsolutions.net/EstimatePowerOut
  1571. * This function converts a TSSI value to dBm in Q5.2
  1572. */
  1573. static s8 b43legacy_phy_estimate_power_out(struct b43legacy_wldev *dev, s8 tssi)
  1574. {
  1575. struct b43legacy_phy *phy = &dev->phy;
  1576. s8 dbm = 0;
  1577. s32 tmp;
  1578. tmp = phy->idle_tssi;
  1579. tmp += tssi;
  1580. tmp -= phy->savedpctlreg;
  1581. switch (phy->type) {
  1582. case B43legacy_PHYTYPE_B:
  1583. case B43legacy_PHYTYPE_G:
  1584. tmp = limit_value(tmp, 0x00, 0x3F);
  1585. dbm = phy->tssi2dbm[tmp];
  1586. break;
  1587. default:
  1588. B43legacy_BUG_ON(1);
  1589. }
  1590. return dbm;
  1591. }
  1592. /* http://bcm-specs.sipsolutions.net/RecalculateTransmissionPower */
  1593. void b43legacy_phy_xmitpower(struct b43legacy_wldev *dev)
  1594. {
  1595. struct b43legacy_phy *phy = &dev->phy;
  1596. u16 tmp;
  1597. u16 txpower;
  1598. s8 v0;
  1599. s8 v1;
  1600. s8 v2;
  1601. s8 v3;
  1602. s8 average;
  1603. int max_pwr;
  1604. s16 desired_pwr;
  1605. s16 estimated_pwr;
  1606. s16 pwr_adjust;
  1607. s16 radio_att_delta;
  1608. s16 baseband_att_delta;
  1609. s16 radio_attenuation;
  1610. s16 baseband_attenuation;
  1611. unsigned long phylock_flags;
  1612. if (phy->savedpctlreg == 0xFFFF)
  1613. return;
  1614. if ((dev->dev->bus->boardinfo.type == 0x0416) &&
  1615. is_bcm_board_vendor(dev))
  1616. return;
  1617. #ifdef CONFIG_B43LEGACY_DEBUG
  1618. if (phy->manual_txpower_control)
  1619. return;
  1620. #endif
  1621. B43legacy_BUG_ON(!(phy->type == B43legacy_PHYTYPE_B ||
  1622. phy->type == B43legacy_PHYTYPE_G));
  1623. tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x0058);
  1624. v0 = (s8)(tmp & 0x00FF);
  1625. v1 = (s8)((tmp & 0xFF00) >> 8);
  1626. tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x005A);
  1627. v2 = (s8)(tmp & 0x00FF);
  1628. v3 = (s8)((tmp & 0xFF00) >> 8);
  1629. tmp = 0;
  1630. if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F) {
  1631. tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
  1632. 0x0070);
  1633. v0 = (s8)(tmp & 0x00FF);
  1634. v1 = (s8)((tmp & 0xFF00) >> 8);
  1635. tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
  1636. 0x0072);
  1637. v2 = (s8)(tmp & 0x00FF);
  1638. v3 = (s8)((tmp & 0xFF00) >> 8);
  1639. if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F)
  1640. return;
  1641. v0 = (v0 + 0x20) & 0x3F;
  1642. v1 = (v1 + 0x20) & 0x3F;
  1643. v2 = (v2 + 0x20) & 0x3F;
  1644. v3 = (v3 + 0x20) & 0x3F;
  1645. tmp = 1;
  1646. }
  1647. b43legacy_radio_clear_tssi(dev);
  1648. average = (v0 + v1 + v2 + v3 + 2) / 4;
  1649. if (tmp && (b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x005E)
  1650. & 0x8))
  1651. average -= 13;
  1652. estimated_pwr = b43legacy_phy_estimate_power_out(dev, average);
  1653. max_pwr = dev->dev->bus->sprom.r1.maxpwr_bg;
  1654. if ((dev->dev->bus->sprom.r1.boardflags_lo
  1655. & B43legacy_BFL_PACTRL) &&
  1656. (phy->type == B43legacy_PHYTYPE_G))
  1657. max_pwr -= 0x3;
  1658. if (unlikely(max_pwr <= 0)) {
  1659. b43legacywarn(dev->wl, "Invalid max-TX-power value in SPROM."
  1660. "\n");
  1661. max_pwr = 74; /* fake it */
  1662. dev->dev->bus->sprom.r1.maxpwr_bg = max_pwr;
  1663. }
  1664. /* Use regulatory information to get the maximum power.
  1665. * In the absence of such data from mac80211, we will use 20 dBm, which
  1666. * is the value for the EU, US, Canada, and most of the world.
  1667. * The regulatory maximum is reduced by the antenna gain (from sprom)
  1668. * and 1.5 dBm (a safety factor??). The result is in Q5.2 format
  1669. * which accounts for the factor of 4 */
  1670. #define REG_MAX_PWR 20
  1671. max_pwr = min(REG_MAX_PWR * 4 - dev->dev->bus->sprom.r1.antenna_gain_bg
  1672. - 0x6, max_pwr);
  1673. /* find the desired power in Q5.2 - power_level is in dBm
  1674. * and limit it - max_pwr is already in Q5.2 */
  1675. desired_pwr = limit_value(phy->power_level << 2, 0, max_pwr);
  1676. if (b43legacy_debug(dev, B43legacy_DBG_XMITPOWER))
  1677. b43legacydbg(dev->wl, "Current TX power output: " Q52_FMT
  1678. " dBm, Desired TX power output: " Q52_FMT
  1679. " dBm\n", Q52_ARG(estimated_pwr),
  1680. Q52_ARG(desired_pwr));
  1681. /* Check if we need to adjust the current power. The factor of 2 is
  1682. * for damping */
  1683. pwr_adjust = (desired_pwr - estimated_pwr) / 2;
  1684. /* RF attenuation delta
  1685. * The minus sign is because lower attenuation => more power */
  1686. radio_att_delta = -(pwr_adjust + 7) >> 3;
  1687. /* Baseband attenuation delta */
  1688. baseband_att_delta = -(pwr_adjust >> 1) - (4 * radio_att_delta);
  1689. /* Do we need to adjust anything? */
  1690. if ((radio_att_delta == 0) && (baseband_att_delta == 0)) {
  1691. b43legacy_phy_lo_mark_current_used(dev);
  1692. return;
  1693. }
  1694. /* Calculate the new attenuation values. */
  1695. baseband_attenuation = phy->bbatt;
  1696. baseband_attenuation += baseband_att_delta;
  1697. radio_attenuation = phy->rfatt;
  1698. radio_attenuation += radio_att_delta;
  1699. /* Get baseband and radio attenuation values into permitted ranges.
  1700. * baseband 0-11, radio 0-9.
  1701. * Radio attenuation affects power level 4 times as much as baseband.
  1702. */
  1703. if (radio_attenuation < 0) {
  1704. baseband_attenuation -= (4 * -radio_attenuation);
  1705. radio_attenuation = 0;
  1706. } else if (radio_attenuation > 9) {
  1707. baseband_attenuation += (4 * (radio_attenuation - 9));
  1708. radio_attenuation = 9;
  1709. } else {
  1710. while (baseband_attenuation < 0 && radio_attenuation > 0) {
  1711. baseband_attenuation += 4;
  1712. radio_attenuation--;
  1713. }
  1714. while (baseband_attenuation > 11 && radio_attenuation < 9) {
  1715. baseband_attenuation -= 4;
  1716. radio_attenuation++;
  1717. }
  1718. }
  1719. baseband_attenuation = limit_value(baseband_attenuation, 0, 11);
  1720. txpower = phy->txctl1;
  1721. if ((phy->radio_ver == 0x2050) && (phy->radio_rev == 2)) {
  1722. if (radio_attenuation <= 1) {
  1723. if (txpower == 0) {
  1724. txpower = 3;
  1725. radio_attenuation += 2;
  1726. baseband_attenuation += 2;
  1727. } else if (dev->dev->bus->sprom.r1.boardflags_lo
  1728. & B43legacy_BFL_PACTRL) {
  1729. baseband_attenuation += 4 *
  1730. (radio_attenuation - 2);
  1731. radio_attenuation = 2;
  1732. }
  1733. } else if (radio_attenuation > 4 && txpower != 0) {
  1734. txpower = 0;
  1735. if (baseband_attenuation < 3) {
  1736. radio_attenuation -= 3;
  1737. baseband_attenuation += 2;
  1738. } else {
  1739. radio_attenuation -= 2;
  1740. baseband_attenuation -= 2;
  1741. }
  1742. }
  1743. }
  1744. /* Save the control values */
  1745. phy->txctl1 = txpower;
  1746. baseband_attenuation = limit_value(baseband_attenuation, 0, 11);
  1747. radio_attenuation = limit_value(radio_attenuation, 0, 9);
  1748. phy->rfatt = radio_attenuation;
  1749. phy->bbatt = baseband_attenuation;
  1750. /* Adjust the hardware */
  1751. b43legacy_phy_lock(dev, phylock_flags);
  1752. b43legacy_radio_lock(dev);
  1753. b43legacy_radio_set_txpower_bg(dev, baseband_attenuation,
  1754. radio_attenuation, txpower);
  1755. b43legacy_phy_lo_mark_current_used(dev);
  1756. b43legacy_radio_unlock(dev);
  1757. b43legacy_phy_unlock(dev, phylock_flags);
  1758. }
  1759. static inline
  1760. s32 b43legacy_tssi2dbm_ad(s32 num, s32 den)
  1761. {
  1762. if (num < 0)
  1763. return num/den;
  1764. else
  1765. return (num+den/2)/den;
  1766. }
  1767. static inline
  1768. s8 b43legacy_tssi2dbm_entry(s8 entry [], u8 index, s16 pab0, s16 pab1, s16 pab2)
  1769. {
  1770. s32 m1;
  1771. s32 m2;
  1772. s32 f = 256;
  1773. s32 q;
  1774. s32 delta;
  1775. s8 i = 0;
  1776. m1 = b43legacy_tssi2dbm_ad(16 * pab0 + index * pab1, 32);
  1777. m2 = max(b43legacy_tssi2dbm_ad(32768 + index * pab2, 256), 1);
  1778. do {
  1779. if (i > 15)
  1780. return -EINVAL;
  1781. q = b43legacy_tssi2dbm_ad(f * 4096 -
  1782. b43legacy_tssi2dbm_ad(m2 * f, 16) *
  1783. f, 2048);
  1784. delta = abs(q - f);
  1785. f = q;
  1786. i++;
  1787. } while (delta >= 2);
  1788. entry[index] = limit_value(b43legacy_tssi2dbm_ad(m1 * f, 8192),
  1789. -127, 128);
  1790. return 0;
  1791. }
  1792. /* http://bcm-specs.sipsolutions.net/TSSI_to_DBM_Table */
  1793. int b43legacy_phy_init_tssi2dbm_table(struct b43legacy_wldev *dev)
  1794. {
  1795. struct b43legacy_phy *phy = &dev->phy;
  1796. s16 pab0;
  1797. s16 pab1;
  1798. s16 pab2;
  1799. u8 idx;
  1800. s8 *dyn_tssi2dbm;
  1801. B43legacy_WARN_ON(!(phy->type == B43legacy_PHYTYPE_B ||
  1802. phy->type == B43legacy_PHYTYPE_G));
  1803. pab0 = (s16)(dev->dev->bus->sprom.r1.pa0b0);
  1804. pab1 = (s16)(dev->dev->bus->sprom.r1.pa0b1);
  1805. pab2 = (s16)(dev->dev->bus->sprom.r1.pa0b2);
  1806. if ((dev->dev->bus->chip_id == 0x4301) && (phy->radio_ver != 0x2050)) {
  1807. phy->idle_tssi = 0x34;
  1808. phy->tssi2dbm = b43legacy_tssi2dbm_b_table;
  1809. return 0;
  1810. }
  1811. if (pab0 != 0 && pab1 != 0 && pab2 != 0 &&
  1812. pab0 != -1 && pab1 != -1 && pab2 != -1) {
  1813. /* The pabX values are set in SPROM. Use them. */
  1814. if ((s8)dev->dev->bus->sprom.r1.itssi_bg != 0 &&
  1815. (s8)dev->dev->bus->sprom.r1.itssi_bg != -1)
  1816. phy->idle_tssi = (s8)(dev->dev->bus->sprom.r1.itssi_bg);
  1817. else
  1818. phy->idle_tssi = 62;
  1819. dyn_tssi2dbm = kmalloc(64, GFP_KERNEL);
  1820. if (dyn_tssi2dbm == NULL) {
  1821. b43legacyerr(dev->wl, "Could not allocate memory "
  1822. "for tssi2dbm table\n");
  1823. return -ENOMEM;
  1824. }
  1825. for (idx = 0; idx < 64; idx++)
  1826. if (b43legacy_tssi2dbm_entry(dyn_tssi2dbm, idx, pab0,
  1827. pab1, pab2)) {
  1828. phy->tssi2dbm = NULL;
  1829. b43legacyerr(dev->wl, "Could not generate "
  1830. "tssi2dBm table\n");
  1831. kfree(dyn_tssi2dbm);
  1832. return -ENODEV;
  1833. }
  1834. phy->tssi2dbm = dyn_tssi2dbm;
  1835. phy->dyn_tssi_tbl = 1;
  1836. } else {
  1837. /* pabX values not set in SPROM. */
  1838. switch (phy->type) {
  1839. case B43legacy_PHYTYPE_B:
  1840. phy->idle_tssi = 0x34;
  1841. phy->tssi2dbm = b43legacy_tssi2dbm_b_table;
  1842. break;
  1843. case B43legacy_PHYTYPE_G:
  1844. phy->idle_tssi = 0x34;
  1845. phy->tssi2dbm = b43legacy_tssi2dbm_g_table;
  1846. break;
  1847. }
  1848. }
  1849. return 0;
  1850. }
  1851. int b43legacy_phy_init(struct b43legacy_wldev *dev)
  1852. {
  1853. struct b43legacy_phy *phy = &dev->phy;
  1854. int err = -ENODEV;
  1855. switch (phy->type) {
  1856. case B43legacy_PHYTYPE_B:
  1857. switch (phy->rev) {
  1858. case 2:
  1859. b43legacy_phy_initb2(dev);
  1860. err = 0;
  1861. break;
  1862. case 4:
  1863. b43legacy_phy_initb4(dev);
  1864. err = 0;
  1865. break;
  1866. case 5:
  1867. b43legacy_phy_initb5(dev);
  1868. err = 0;
  1869. break;
  1870. case 6:
  1871. b43legacy_phy_initb6(dev);
  1872. err = 0;
  1873. break;
  1874. }
  1875. break;
  1876. case B43legacy_PHYTYPE_G:
  1877. b43legacy_phy_initg(dev);
  1878. err = 0;
  1879. break;
  1880. }
  1881. if (err)
  1882. b43legacyerr(dev->wl, "Unknown PHYTYPE found\n");
  1883. return err;
  1884. }
  1885. void b43legacy_phy_set_antenna_diversity(struct b43legacy_wldev *dev)
  1886. {
  1887. struct b43legacy_phy *phy = &dev->phy;
  1888. u16 antennadiv;
  1889. u16 offset;
  1890. u16 value;
  1891. u32 ucodeflags;
  1892. antennadiv = phy->antenna_diversity;
  1893. if (antennadiv == 0xFFFF)
  1894. antennadiv = 3;
  1895. B43legacy_WARN_ON(antennadiv > 3);
  1896. ucodeflags = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED,
  1897. B43legacy_UCODEFLAGS_OFFSET);
  1898. b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
  1899. B43legacy_UCODEFLAGS_OFFSET,
  1900. ucodeflags & ~B43legacy_UCODEFLAG_AUTODIV);
  1901. switch (phy->type) {
  1902. case B43legacy_PHYTYPE_G:
  1903. offset = 0x0400;
  1904. if (antennadiv == 2)
  1905. value = (3/*automatic*/ << 7);
  1906. else
  1907. value = (antennadiv << 7);
  1908. b43legacy_phy_write(dev, offset + 1,
  1909. (b43legacy_phy_read(dev, offset + 1)
  1910. & 0x7E7F) | value);
  1911. if (antennadiv >= 2) {
  1912. if (antennadiv == 2)
  1913. value = (antennadiv << 7);
  1914. else
  1915. value = (0/*force0*/ << 7);
  1916. b43legacy_phy_write(dev, offset + 0x2B,
  1917. (b43legacy_phy_read(dev,
  1918. offset + 0x2B)
  1919. & 0xFEFF) | value);
  1920. }
  1921. if (phy->type == B43legacy_PHYTYPE_G) {
  1922. if (antennadiv >= 2)
  1923. b43legacy_phy_write(dev, 0x048C,
  1924. b43legacy_phy_read(dev,
  1925. 0x048C) | 0x2000);
  1926. else
  1927. b43legacy_phy_write(dev, 0x048C,
  1928. b43legacy_phy_read(dev,
  1929. 0x048C) & ~0x2000);
  1930. if (phy->rev >= 2) {
  1931. b43legacy_phy_write(dev, 0x0461,
  1932. b43legacy_phy_read(dev,
  1933. 0x0461) | 0x0010);
  1934. b43legacy_phy_write(dev, 0x04AD,
  1935. (b43legacy_phy_read(dev,
  1936. 0x04AD)
  1937. & 0x00FF) | 0x0015);
  1938. if (phy->rev == 2)
  1939. b43legacy_phy_write(dev, 0x0427,
  1940. 0x0008);
  1941. else
  1942. b43legacy_phy_write(dev, 0x0427,
  1943. (b43legacy_phy_read(dev, 0x0427)
  1944. & 0x00FF) | 0x0008);
  1945. } else if (phy->rev >= 6)
  1946. b43legacy_phy_write(dev, 0x049B, 0x00DC);
  1947. } else {
  1948. if (phy->rev < 3)
  1949. b43legacy_phy_write(dev, 0x002B,
  1950. (b43legacy_phy_read(dev,
  1951. 0x002B) & 0x00FF)
  1952. | 0x0024);
  1953. else {
  1954. b43legacy_phy_write(dev, 0x0061,
  1955. b43legacy_phy_read(dev,
  1956. 0x0061) | 0x0010);
  1957. if (phy->rev == 3) {
  1958. b43legacy_phy_write(dev, 0x0093,
  1959. 0x001D);
  1960. b43legacy_phy_write(dev, 0x0027,
  1961. 0x0008);
  1962. } else {
  1963. b43legacy_phy_write(dev, 0x0093,
  1964. 0x003A);
  1965. b43legacy_phy_write(dev, 0x0027,
  1966. (b43legacy_phy_read(dev, 0x0027)
  1967. & 0x00FF) | 0x0008);
  1968. }
  1969. }
  1970. }
  1971. break;
  1972. case B43legacy_PHYTYPE_B:
  1973. if (dev->dev->id.revision == 2)
  1974. value = (3/*automatic*/ << 7);
  1975. else
  1976. value = (antennadiv << 7);
  1977. b43legacy_phy_write(dev, 0x03E2,
  1978. (b43legacy_phy_read(dev, 0x03E2)
  1979. & 0xFE7F) | value);
  1980. break;
  1981. default:
  1982. B43legacy_WARN_ON(1);
  1983. }
  1984. if (antennadiv >= 2) {
  1985. ucodeflags = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED,
  1986. B43legacy_UCODEFLAGS_OFFSET);
  1987. b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
  1988. B43legacy_UCODEFLAGS_OFFSET,
  1989. ucodeflags | B43legacy_UCODEFLAG_AUTODIV);
  1990. }
  1991. phy->antenna_diversity = antennadiv;
  1992. }
  1993. /* Set the PowerSavingControlBits.
  1994. * Bitvalues:
  1995. * 0 => unset the bit
  1996. * 1 => set the bit
  1997. * -1 => calculate the bit
  1998. */
  1999. void b43legacy_power_saving_ctl_bits(struct b43legacy_wldev *dev,
  2000. int bit25, int bit26)
  2001. {
  2002. int i;
  2003. u32 status;
  2004. /* FIXME: Force 25 to off and 26 to on for now: */
  2005. bit25 = 0;
  2006. bit26 = 1;
  2007. if (bit25 == -1) {
  2008. /* TODO: If powersave is not off and FIXME is not set and we
  2009. * are not in adhoc and thus is not an AP and we arei
  2010. * associated, set bit 25 */
  2011. }
  2012. if (bit26 == -1) {
  2013. /* TODO: If the device is awake or this is an AP, or we are
  2014. * scanning, or FIXME, or we are associated, or FIXME,
  2015. * or the latest PS-Poll packet sent was successful,
  2016. * set bit26 */
  2017. }
  2018. status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
  2019. if (bit25)
  2020. status |= B43legacy_SBF_PS1;
  2021. else
  2022. status &= ~B43legacy_SBF_PS1;
  2023. if (bit26)
  2024. status |= B43legacy_SBF_PS2;
  2025. else
  2026. status &= ~B43legacy_SBF_PS2;
  2027. b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, status);
  2028. if (bit26 && dev->dev->id.revision >= 5) {
  2029. for (i = 0; i < 100; i++) {
  2030. if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED,
  2031. 0x0040) != 4)
  2032. break;
  2033. udelay(10);
  2034. }
  2035. }
  2036. }