bfin_mac.c 25 KB

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  1. /*
  2. * File: drivers/net/bfin_mac.c
  3. * Based on:
  4. * Maintainer:
  5. * Bryan Wu <bryan.wu@analog.com>
  6. *
  7. * Original author:
  8. * Luke Yang <luke.yang@analog.com>
  9. *
  10. * Created:
  11. * Description:
  12. *
  13. * Modified:
  14. * Copyright 2004-2006 Analog Devices Inc.
  15. *
  16. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  17. *
  18. * This program is free software ; you can redistribute it and/or modify
  19. * it under the terms of the GNU General Public License as published by
  20. * the Free Software Foundation ; either version 2, or (at your option)
  21. * any later version.
  22. *
  23. * This program is distributed in the hope that it will be useful,
  24. * but WITHOUT ANY WARRANTY ; without even the implied warranty of
  25. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  26. * GNU General Public License for more details.
  27. *
  28. * You should have received a copy of the GNU General Public License
  29. * along with this program ; see the file COPYING.
  30. * If not, write to the Free Software Foundation,
  31. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  32. */
  33. #include <linux/init.h>
  34. #include <linux/module.h>
  35. #include <linux/kernel.h>
  36. #include <linux/sched.h>
  37. #include <linux/slab.h>
  38. #include <linux/delay.h>
  39. #include <linux/timer.h>
  40. #include <linux/errno.h>
  41. #include <linux/irq.h>
  42. #include <linux/io.h>
  43. #include <linux/ioport.h>
  44. #include <linux/crc32.h>
  45. #include <linux/device.h>
  46. #include <linux/spinlock.h>
  47. #include <linux/ethtool.h>
  48. #include <linux/mii.h>
  49. #include <linux/phy.h>
  50. #include <linux/netdevice.h>
  51. #include <linux/etherdevice.h>
  52. #include <linux/skbuff.h>
  53. #include <linux/platform_device.h>
  54. #include <asm/dma.h>
  55. #include <linux/dma-mapping.h>
  56. #include <asm/blackfin.h>
  57. #include <asm/cacheflush.h>
  58. #include <asm/portmux.h>
  59. #include "bfin_mac.h"
  60. #define DRV_NAME "bfin_mac"
  61. #define DRV_VERSION "1.1"
  62. #define DRV_AUTHOR "Bryan Wu, Luke Yang"
  63. #define DRV_DESC "Blackfin BF53[67] on-chip Ethernet MAC driver"
  64. MODULE_AUTHOR(DRV_AUTHOR);
  65. MODULE_LICENSE("GPL");
  66. MODULE_DESCRIPTION(DRV_DESC);
  67. #if defined(CONFIG_BFIN_MAC_USE_L1)
  68. # define bfin_mac_alloc(dma_handle, size) l1_data_sram_zalloc(size)
  69. # define bfin_mac_free(dma_handle, ptr) l1_data_sram_free(ptr)
  70. #else
  71. # define bfin_mac_alloc(dma_handle, size) \
  72. dma_alloc_coherent(NULL, size, dma_handle, GFP_KERNEL)
  73. # define bfin_mac_free(dma_handle, ptr) \
  74. dma_free_coherent(NULL, sizeof(*ptr), ptr, dma_handle)
  75. #endif
  76. #define PKT_BUF_SZ 1580
  77. #define MAX_TIMEOUT_CNT 500
  78. /* pointers to maintain transmit list */
  79. static struct net_dma_desc_tx *tx_list_head;
  80. static struct net_dma_desc_tx *tx_list_tail;
  81. static struct net_dma_desc_rx *rx_list_head;
  82. static struct net_dma_desc_rx *rx_list_tail;
  83. static struct net_dma_desc_rx *current_rx_ptr;
  84. static struct net_dma_desc_tx *current_tx_ptr;
  85. static struct net_dma_desc_tx *tx_desc;
  86. static struct net_dma_desc_rx *rx_desc;
  87. static void bf537mac_disable(void);
  88. static void bf537mac_enable(void);
  89. static void desc_list_free(void)
  90. {
  91. struct net_dma_desc_rx *r;
  92. struct net_dma_desc_tx *t;
  93. int i;
  94. #if !defined(CONFIG_BFIN_MAC_USE_L1)
  95. dma_addr_t dma_handle = 0;
  96. #endif
  97. if (tx_desc) {
  98. t = tx_list_head;
  99. for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) {
  100. if (t) {
  101. if (t->skb) {
  102. dev_kfree_skb(t->skb);
  103. t->skb = NULL;
  104. }
  105. t = t->next;
  106. }
  107. }
  108. bfin_mac_free(dma_handle, tx_desc);
  109. }
  110. if (rx_desc) {
  111. r = rx_list_head;
  112. for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) {
  113. if (r) {
  114. if (r->skb) {
  115. dev_kfree_skb(r->skb);
  116. r->skb = NULL;
  117. }
  118. r = r->next;
  119. }
  120. }
  121. bfin_mac_free(dma_handle, rx_desc);
  122. }
  123. }
  124. static int desc_list_init(void)
  125. {
  126. int i;
  127. struct sk_buff *new_skb;
  128. #if !defined(CONFIG_BFIN_MAC_USE_L1)
  129. /*
  130. * This dma_handle is useless in Blackfin dma_alloc_coherent().
  131. * The real dma handler is the return value of dma_alloc_coherent().
  132. */
  133. dma_addr_t dma_handle;
  134. #endif
  135. tx_desc = bfin_mac_alloc(&dma_handle,
  136. sizeof(struct net_dma_desc_tx) *
  137. CONFIG_BFIN_TX_DESC_NUM);
  138. if (tx_desc == NULL)
  139. goto init_error;
  140. rx_desc = bfin_mac_alloc(&dma_handle,
  141. sizeof(struct net_dma_desc_rx) *
  142. CONFIG_BFIN_RX_DESC_NUM);
  143. if (rx_desc == NULL)
  144. goto init_error;
  145. /* init tx_list */
  146. tx_list_head = tx_list_tail = tx_desc;
  147. for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) {
  148. struct net_dma_desc_tx *t = tx_desc + i;
  149. struct dma_descriptor *a = &(t->desc_a);
  150. struct dma_descriptor *b = &(t->desc_b);
  151. /*
  152. * disable DMA
  153. * read from memory WNR = 0
  154. * wordsize is 32 bits
  155. * 6 half words is desc size
  156. * large desc flow
  157. */
  158. a->config = WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
  159. a->start_addr = (unsigned long)t->packet;
  160. a->x_count = 0;
  161. a->next_dma_desc = b;
  162. /*
  163. * enabled DMA
  164. * write to memory WNR = 1
  165. * wordsize is 32 bits
  166. * disable interrupt
  167. * 6 half words is desc size
  168. * large desc flow
  169. */
  170. b->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
  171. b->start_addr = (unsigned long)(&(t->status));
  172. b->x_count = 0;
  173. t->skb = NULL;
  174. tx_list_tail->desc_b.next_dma_desc = a;
  175. tx_list_tail->next = t;
  176. tx_list_tail = t;
  177. }
  178. tx_list_tail->next = tx_list_head; /* tx_list is a circle */
  179. tx_list_tail->desc_b.next_dma_desc = &(tx_list_head->desc_a);
  180. current_tx_ptr = tx_list_head;
  181. /* init rx_list */
  182. rx_list_head = rx_list_tail = rx_desc;
  183. for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) {
  184. struct net_dma_desc_rx *r = rx_desc + i;
  185. struct dma_descriptor *a = &(r->desc_a);
  186. struct dma_descriptor *b = &(r->desc_b);
  187. /* allocate a new skb for next time receive */
  188. new_skb = dev_alloc_skb(PKT_BUF_SZ + 2);
  189. if (!new_skb) {
  190. printk(KERN_NOTICE DRV_NAME
  191. ": init: low on mem - packet dropped\n");
  192. goto init_error;
  193. }
  194. skb_reserve(new_skb, 2);
  195. r->skb = new_skb;
  196. /*
  197. * enabled DMA
  198. * write to memory WNR = 1
  199. * wordsize is 32 bits
  200. * disable interrupt
  201. * 6 half words is desc size
  202. * large desc flow
  203. */
  204. a->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
  205. /* since RXDWA is enabled */
  206. a->start_addr = (unsigned long)new_skb->data - 2;
  207. a->x_count = 0;
  208. a->next_dma_desc = b;
  209. /*
  210. * enabled DMA
  211. * write to memory WNR = 1
  212. * wordsize is 32 bits
  213. * enable interrupt
  214. * 6 half words is desc size
  215. * large desc flow
  216. */
  217. b->config = DMAEN | WNR | WDSIZE_32 | DI_EN |
  218. NDSIZE_6 | DMAFLOW_LARGE;
  219. b->start_addr = (unsigned long)(&(r->status));
  220. b->x_count = 0;
  221. rx_list_tail->desc_b.next_dma_desc = a;
  222. rx_list_tail->next = r;
  223. rx_list_tail = r;
  224. }
  225. rx_list_tail->next = rx_list_head; /* rx_list is a circle */
  226. rx_list_tail->desc_b.next_dma_desc = &(rx_list_head->desc_a);
  227. current_rx_ptr = rx_list_head;
  228. return 0;
  229. init_error:
  230. desc_list_free();
  231. printk(KERN_ERR DRV_NAME ": kmalloc failed\n");
  232. return -ENOMEM;
  233. }
  234. /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
  235. /* Set FER regs to MUX in Ethernet pins */
  236. static int setup_pin_mux(int action)
  237. {
  238. #if defined(CONFIG_BFIN_MAC_RMII)
  239. u16 pin_req[] = P_RMII0;
  240. #else
  241. u16 pin_req[] = P_MII0;
  242. #endif
  243. if (action) {
  244. if (peripheral_request_list(pin_req, DRV_NAME)) {
  245. printk(KERN_ERR DRV_NAME
  246. ": Requesting Peripherals failed\n");
  247. return -EFAULT;
  248. }
  249. } else
  250. peripheral_free_list(pin_req);
  251. return 0;
  252. }
  253. /*
  254. * MII operations
  255. */
  256. /* Wait until the previous MDC/MDIO transaction has completed */
  257. static void mdio_poll(void)
  258. {
  259. int timeout_cnt = MAX_TIMEOUT_CNT;
  260. /* poll the STABUSY bit */
  261. while ((bfin_read_EMAC_STAADD()) & STABUSY) {
  262. mdelay(10);
  263. if (timeout_cnt-- < 0) {
  264. printk(KERN_ERR DRV_NAME
  265. ": wait MDC/MDIO transaction to complete timeout\n");
  266. break;
  267. }
  268. }
  269. }
  270. /* Read an off-chip register in a PHY through the MDC/MDIO port */
  271. static int mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
  272. {
  273. mdio_poll();
  274. /* read mode */
  275. bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |
  276. SET_REGAD((u16) regnum) |
  277. STABUSY);
  278. mdio_poll();
  279. return (int) bfin_read_EMAC_STADAT();
  280. }
  281. /* Write an off-chip register in a PHY through the MDC/MDIO port */
  282. static int mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
  283. u16 value)
  284. {
  285. mdio_poll();
  286. bfin_write_EMAC_STADAT((u32) value);
  287. /* write mode */
  288. bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |
  289. SET_REGAD((u16) regnum) |
  290. STAOP |
  291. STABUSY);
  292. mdio_poll();
  293. return 0;
  294. }
  295. static int mdiobus_reset(struct mii_bus *bus)
  296. {
  297. return 0;
  298. }
  299. static void bf537_adjust_link(struct net_device *dev)
  300. {
  301. struct bf537mac_local *lp = netdev_priv(dev);
  302. struct phy_device *phydev = lp->phydev;
  303. unsigned long flags;
  304. int new_state = 0;
  305. spin_lock_irqsave(&lp->lock, flags);
  306. if (phydev->link) {
  307. /* Now we make sure that we can be in full duplex mode.
  308. * If not, we operate in half-duplex mode. */
  309. if (phydev->duplex != lp->old_duplex) {
  310. u32 opmode = bfin_read_EMAC_OPMODE();
  311. new_state = 1;
  312. if (phydev->duplex)
  313. opmode |= FDMODE;
  314. else
  315. opmode &= ~(FDMODE);
  316. bfin_write_EMAC_OPMODE(opmode);
  317. lp->old_duplex = phydev->duplex;
  318. }
  319. if (phydev->speed != lp->old_speed) {
  320. #if defined(CONFIG_BFIN_MAC_RMII)
  321. u32 opmode = bfin_read_EMAC_OPMODE();
  322. switch (phydev->speed) {
  323. case 10:
  324. opmode |= RMII_10;
  325. break;
  326. case 100:
  327. opmode &= ~(RMII_10);
  328. break;
  329. default:
  330. printk(KERN_WARNING
  331. "%s: Ack! Speed (%d) is not 10/100!\n",
  332. DRV_NAME, phydev->speed);
  333. break;
  334. }
  335. bfin_write_EMAC_OPMODE(opmode);
  336. #endif
  337. new_state = 1;
  338. lp->old_speed = phydev->speed;
  339. }
  340. if (!lp->old_link) {
  341. new_state = 1;
  342. lp->old_link = 1;
  343. netif_schedule(dev);
  344. }
  345. } else if (lp->old_link) {
  346. new_state = 1;
  347. lp->old_link = 0;
  348. lp->old_speed = 0;
  349. lp->old_duplex = -1;
  350. }
  351. if (new_state) {
  352. u32 opmode = bfin_read_EMAC_OPMODE();
  353. phy_print_status(phydev);
  354. pr_debug("EMAC_OPMODE = 0x%08x\n", opmode);
  355. }
  356. spin_unlock_irqrestore(&lp->lock, flags);
  357. }
  358. static int mii_probe(struct net_device *dev)
  359. {
  360. struct bf537mac_local *lp = netdev_priv(dev);
  361. struct phy_device *phydev = NULL;
  362. unsigned short sysctl;
  363. int i;
  364. /* Enable PHY output early */
  365. if (!(bfin_read_VR_CTL() & PHYCLKOE))
  366. bfin_write_VR_CTL(bfin_read_VR_CTL() | PHYCLKOE);
  367. /* MDC = 2.5 MHz */
  368. sysctl = bfin_read_EMAC_SYSCTL();
  369. sysctl |= SET_MDCDIV(24);
  370. bfin_write_EMAC_SYSCTL(sysctl);
  371. /* search for connect PHY device */
  372. for (i = 0; i < PHY_MAX_ADDR; i++) {
  373. struct phy_device *const tmp_phydev = lp->mii_bus.phy_map[i];
  374. if (!tmp_phydev)
  375. continue; /* no PHY here... */
  376. phydev = tmp_phydev;
  377. break; /* found it */
  378. }
  379. /* now we are supposed to have a proper phydev, to attach to... */
  380. if (!phydev) {
  381. printk(KERN_INFO "%s: Don't found any phy device at all\n",
  382. dev->name);
  383. return -ENODEV;
  384. }
  385. #if defined(CONFIG_BFIN_MAC_RMII)
  386. phydev = phy_connect(dev, phydev->dev.bus_id, &bf537_adjust_link, 0,
  387. PHY_INTERFACE_MODE_RMII);
  388. #else
  389. phydev = phy_connect(dev, phydev->dev.bus_id, &bf537_adjust_link, 0,
  390. PHY_INTERFACE_MODE_MII);
  391. #endif
  392. if (IS_ERR(phydev)) {
  393. printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
  394. return PTR_ERR(phydev);
  395. }
  396. /* mask with MAC supported features */
  397. phydev->supported &= (SUPPORTED_10baseT_Half
  398. | SUPPORTED_10baseT_Full
  399. | SUPPORTED_100baseT_Half
  400. | SUPPORTED_100baseT_Full
  401. | SUPPORTED_Autoneg
  402. | SUPPORTED_Pause | SUPPORTED_Asym_Pause
  403. | SUPPORTED_MII
  404. | SUPPORTED_TP);
  405. phydev->advertising = phydev->supported;
  406. lp->old_link = 0;
  407. lp->old_speed = 0;
  408. lp->old_duplex = -1;
  409. lp->phydev = phydev;
  410. printk(KERN_INFO "%s: attached PHY driver [%s] "
  411. "(mii_bus:phy_addr=%s, irq=%d)\n",
  412. DRV_NAME, phydev->drv->name, phydev->dev.bus_id, phydev->irq);
  413. return 0;
  414. }
  415. /**************************************************************************/
  416. void setup_system_regs(struct net_device *dev)
  417. {
  418. unsigned short sysctl;
  419. /*
  420. * Odd word alignment for Receive Frame DMA word
  421. * Configure checksum support and rcve frame word alignment
  422. */
  423. sysctl = bfin_read_EMAC_SYSCTL();
  424. #if defined(BFIN_MAC_CSUM_OFFLOAD)
  425. sysctl |= RXDWA | RXCKS;
  426. #else
  427. sysctl |= RXDWA;
  428. #endif
  429. bfin_write_EMAC_SYSCTL(sysctl);
  430. bfin_write_EMAC_MMC_CTL(RSTC | CROLL);
  431. /* Initialize the TX DMA channel registers */
  432. bfin_write_DMA2_X_COUNT(0);
  433. bfin_write_DMA2_X_MODIFY(4);
  434. bfin_write_DMA2_Y_COUNT(0);
  435. bfin_write_DMA2_Y_MODIFY(0);
  436. /* Initialize the RX DMA channel registers */
  437. bfin_write_DMA1_X_COUNT(0);
  438. bfin_write_DMA1_X_MODIFY(4);
  439. bfin_write_DMA1_Y_COUNT(0);
  440. bfin_write_DMA1_Y_MODIFY(0);
  441. }
  442. static void setup_mac_addr(u8 *mac_addr)
  443. {
  444. u32 addr_low = le32_to_cpu(*(__le32 *) & mac_addr[0]);
  445. u16 addr_hi = le16_to_cpu(*(__le16 *) & mac_addr[4]);
  446. /* this depends on a little-endian machine */
  447. bfin_write_EMAC_ADDRLO(addr_low);
  448. bfin_write_EMAC_ADDRHI(addr_hi);
  449. }
  450. static int bf537mac_set_mac_address(struct net_device *dev, void *p)
  451. {
  452. struct sockaddr *addr = p;
  453. if (netif_running(dev))
  454. return -EBUSY;
  455. memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
  456. setup_mac_addr(dev->dev_addr);
  457. return 0;
  458. }
  459. static void adjust_tx_list(void)
  460. {
  461. int timeout_cnt = MAX_TIMEOUT_CNT;
  462. if (tx_list_head->status.status_word != 0
  463. && current_tx_ptr != tx_list_head) {
  464. goto adjust_head; /* released something, just return; */
  465. }
  466. /*
  467. * if nothing released, check wait condition
  468. * current's next can not be the head,
  469. * otherwise the dma will not stop as we want
  470. */
  471. if (current_tx_ptr->next->next == tx_list_head) {
  472. while (tx_list_head->status.status_word == 0) {
  473. mdelay(10);
  474. if (tx_list_head->status.status_word != 0
  475. || !(bfin_read_DMA2_IRQ_STATUS() & 0x08)) {
  476. goto adjust_head;
  477. }
  478. if (timeout_cnt-- < 0) {
  479. printk(KERN_ERR DRV_NAME
  480. ": wait for adjust tx list head timeout\n");
  481. break;
  482. }
  483. }
  484. if (tx_list_head->status.status_word != 0) {
  485. goto adjust_head;
  486. }
  487. }
  488. return;
  489. adjust_head:
  490. do {
  491. tx_list_head->desc_a.config &= ~DMAEN;
  492. tx_list_head->status.status_word = 0;
  493. if (tx_list_head->skb) {
  494. dev_kfree_skb(tx_list_head->skb);
  495. tx_list_head->skb = NULL;
  496. } else {
  497. printk(KERN_ERR DRV_NAME
  498. ": no sk_buff in a transmitted frame!\n");
  499. }
  500. tx_list_head = tx_list_head->next;
  501. } while (tx_list_head->status.status_word != 0
  502. && current_tx_ptr != tx_list_head);
  503. return;
  504. }
  505. static int bf537mac_hard_start_xmit(struct sk_buff *skb,
  506. struct net_device *dev)
  507. {
  508. struct bf537mac_local *lp = netdev_priv(dev);
  509. unsigned int data;
  510. current_tx_ptr->skb = skb;
  511. /*
  512. * Is skb->data always 16-bit aligned?
  513. * Do we need to memcpy((char *)(tail->packet + 2), skb->data, len)?
  514. */
  515. if ((((unsigned int)(skb->data)) & 0x02) == 2) {
  516. /* move skb->data to current_tx_ptr payload */
  517. data = (unsigned int)(skb->data) - 2;
  518. *((unsigned short *)data) = (unsigned short)(skb->len);
  519. current_tx_ptr->desc_a.start_addr = (unsigned long)data;
  520. /* this is important! */
  521. blackfin_dcache_flush_range(data, (data + (skb->len)) + 2);
  522. } else {
  523. *((unsigned short *)(current_tx_ptr->packet)) =
  524. (unsigned short)(skb->len);
  525. memcpy((char *)(current_tx_ptr->packet + 2), skb->data,
  526. (skb->len));
  527. current_tx_ptr->desc_a.start_addr =
  528. (unsigned long)current_tx_ptr->packet;
  529. if (current_tx_ptr->status.status_word != 0)
  530. current_tx_ptr->status.status_word = 0;
  531. blackfin_dcache_flush_range((unsigned int)current_tx_ptr->
  532. packet,
  533. (unsigned int)(current_tx_ptr->
  534. packet + skb->len) +
  535. 2);
  536. }
  537. /* enable this packet's dma */
  538. current_tx_ptr->desc_a.config |= DMAEN;
  539. /* tx dma is running, just return */
  540. if (bfin_read_DMA2_IRQ_STATUS() & 0x08)
  541. goto out;
  542. /* tx dma is not running */
  543. bfin_write_DMA2_NEXT_DESC_PTR(&(current_tx_ptr->desc_a));
  544. /* dma enabled, read from memory, size is 6 */
  545. bfin_write_DMA2_CONFIG(current_tx_ptr->desc_a.config);
  546. /* Turn on the EMAC tx */
  547. bfin_write_EMAC_OPMODE(bfin_read_EMAC_OPMODE() | TE);
  548. out:
  549. adjust_tx_list();
  550. current_tx_ptr = current_tx_ptr->next;
  551. dev->trans_start = jiffies;
  552. dev->stats.tx_packets++;
  553. dev->stats.tx_bytes += (skb->len);
  554. return 0;
  555. }
  556. static void bf537mac_rx(struct net_device *dev)
  557. {
  558. struct sk_buff *skb, *new_skb;
  559. struct bf537mac_local *lp = netdev_priv(dev);
  560. unsigned short len;
  561. /* allocate a new skb for next time receive */
  562. skb = current_rx_ptr->skb;
  563. new_skb = dev_alloc_skb(PKT_BUF_SZ + 2);
  564. if (!new_skb) {
  565. printk(KERN_NOTICE DRV_NAME
  566. ": rx: low on mem - packet dropped\n");
  567. dev->stats.rx_dropped++;
  568. goto out;
  569. }
  570. /* reserve 2 bytes for RXDWA padding */
  571. skb_reserve(new_skb, 2);
  572. current_rx_ptr->skb = new_skb;
  573. current_rx_ptr->desc_a.start_addr = (unsigned long)new_skb->data - 2;
  574. len = (unsigned short)((current_rx_ptr->status.status_word) & RX_FRLEN);
  575. skb_put(skb, len);
  576. blackfin_dcache_invalidate_range((unsigned long)skb->head,
  577. (unsigned long)skb->tail);
  578. dev->last_rx = jiffies;
  579. skb->dev = dev;
  580. skb->protocol = eth_type_trans(skb, dev);
  581. #if defined(BFIN_MAC_CSUM_OFFLOAD)
  582. skb->csum = current_rx_ptr->status.ip_payload_csum;
  583. skb->ip_summed = CHECKSUM_COMPLETE;
  584. #endif
  585. netif_rx(skb);
  586. dev->stats.rx_packets++;
  587. dev->stats.rx_bytes += len;
  588. current_rx_ptr->status.status_word = 0x00000000;
  589. current_rx_ptr = current_rx_ptr->next;
  590. out:
  591. return;
  592. }
  593. /* interrupt routine to handle rx and error signal */
  594. static irqreturn_t bf537mac_interrupt(int irq, void *dev_id)
  595. {
  596. struct net_device *dev = dev_id;
  597. int number = 0;
  598. get_one_packet:
  599. if (current_rx_ptr->status.status_word == 0) {
  600. /* no more new packet received */
  601. if (number == 0) {
  602. if (current_rx_ptr->next->status.status_word != 0) {
  603. current_rx_ptr = current_rx_ptr->next;
  604. goto real_rx;
  605. }
  606. }
  607. bfin_write_DMA1_IRQ_STATUS(bfin_read_DMA1_IRQ_STATUS() |
  608. DMA_DONE | DMA_ERR);
  609. return IRQ_HANDLED;
  610. }
  611. real_rx:
  612. bf537mac_rx(dev);
  613. number++;
  614. goto get_one_packet;
  615. }
  616. #ifdef CONFIG_NET_POLL_CONTROLLER
  617. static void bf537mac_poll(struct net_device *dev)
  618. {
  619. disable_irq(IRQ_MAC_RX);
  620. bf537mac_interrupt(IRQ_MAC_RX, dev);
  621. enable_irq(IRQ_MAC_RX);
  622. }
  623. #endif /* CONFIG_NET_POLL_CONTROLLER */
  624. static void bf537mac_disable(void)
  625. {
  626. unsigned int opmode;
  627. opmode = bfin_read_EMAC_OPMODE();
  628. opmode &= (~RE);
  629. opmode &= (~TE);
  630. /* Turn off the EMAC */
  631. bfin_write_EMAC_OPMODE(opmode);
  632. }
  633. /*
  634. * Enable Interrupts, Receive, and Transmit
  635. */
  636. static void bf537mac_enable(void)
  637. {
  638. u32 opmode;
  639. pr_debug("%s: %s\n", DRV_NAME, __FUNCTION__);
  640. /* Set RX DMA */
  641. bfin_write_DMA1_NEXT_DESC_PTR(&(rx_list_head->desc_a));
  642. bfin_write_DMA1_CONFIG(rx_list_head->desc_a.config);
  643. /* Wait MII done */
  644. mdio_poll();
  645. /* We enable only RX here */
  646. /* ASTP : Enable Automatic Pad Stripping
  647. PR : Promiscuous Mode for test
  648. PSF : Receive frames with total length less than 64 bytes.
  649. FDMODE : Full Duplex Mode
  650. LB : Internal Loopback for test
  651. RE : Receiver Enable */
  652. opmode = bfin_read_EMAC_OPMODE();
  653. if (opmode & FDMODE)
  654. opmode |= PSF;
  655. else
  656. opmode |= DRO | DC | PSF;
  657. opmode |= RE;
  658. #if defined(CONFIG_BFIN_MAC_RMII)
  659. opmode |= RMII; /* For Now only 100MBit are supported */
  660. #ifdef CONFIG_BF_REV_0_2
  661. opmode |= TE;
  662. #endif
  663. #endif
  664. /* Turn on the EMAC rx */
  665. bfin_write_EMAC_OPMODE(opmode);
  666. }
  667. /* Our watchdog timed out. Called by the networking layer */
  668. static void bf537mac_timeout(struct net_device *dev)
  669. {
  670. pr_debug("%s: %s\n", dev->name, __FUNCTION__);
  671. bf537mac_disable();
  672. /* reset tx queue */
  673. tx_list_tail = tx_list_head->next;
  674. bf537mac_enable();
  675. /* We can accept TX packets again */
  676. dev->trans_start = jiffies;
  677. netif_wake_queue(dev);
  678. }
  679. /*
  680. * This routine will, depending on the values passed to it,
  681. * either make it accept multicast packets, go into
  682. * promiscuous mode (for TCPDUMP and cousins) or accept
  683. * a select set of multicast packets
  684. */
  685. static void bf537mac_set_multicast_list(struct net_device *dev)
  686. {
  687. u32 sysctl;
  688. if (dev->flags & IFF_PROMISC) {
  689. printk(KERN_INFO "%s: set to promisc mode\n", dev->name);
  690. sysctl = bfin_read_EMAC_OPMODE();
  691. sysctl |= RAF;
  692. bfin_write_EMAC_OPMODE(sysctl);
  693. } else if (dev->flags & IFF_ALLMULTI || dev->mc_count) {
  694. /* accept all multicast */
  695. sysctl = bfin_read_EMAC_OPMODE();
  696. sysctl |= PAM;
  697. bfin_write_EMAC_OPMODE(sysctl);
  698. } else {
  699. /* clear promisc or multicast mode */
  700. sysctl = bfin_read_EMAC_OPMODE();
  701. sysctl &= ~(RAF | PAM);
  702. bfin_write_EMAC_OPMODE(sysctl);
  703. }
  704. }
  705. /*
  706. * this puts the device in an inactive state
  707. */
  708. static void bf537mac_shutdown(struct net_device *dev)
  709. {
  710. /* Turn off the EMAC */
  711. bfin_write_EMAC_OPMODE(0x00000000);
  712. /* Turn off the EMAC RX DMA */
  713. bfin_write_DMA1_CONFIG(0x0000);
  714. bfin_write_DMA2_CONFIG(0x0000);
  715. }
  716. /*
  717. * Open and Initialize the interface
  718. *
  719. * Set up everything, reset the card, etc..
  720. */
  721. static int bf537mac_open(struct net_device *dev)
  722. {
  723. struct bf537mac_local *lp = netdev_priv(dev);
  724. int retval;
  725. pr_debug("%s: %s\n", dev->name, __FUNCTION__);
  726. /*
  727. * Check that the address is valid. If its not, refuse
  728. * to bring the device up. The user must specify an
  729. * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
  730. */
  731. if (!is_valid_ether_addr(dev->dev_addr)) {
  732. printk(KERN_WARNING DRV_NAME ": no valid ethernet hw addr\n");
  733. return -EINVAL;
  734. }
  735. /* initial rx and tx list */
  736. retval = desc_list_init();
  737. if (retval)
  738. return retval;
  739. phy_start(lp->phydev);
  740. setup_system_regs(dev);
  741. bf537mac_disable();
  742. bf537mac_enable();
  743. pr_debug("hardware init finished\n");
  744. netif_start_queue(dev);
  745. netif_carrier_on(dev);
  746. return 0;
  747. }
  748. /*
  749. *
  750. * this makes the board clean up everything that it can
  751. * and not talk to the outside world. Caused by
  752. * an 'ifconfig ethX down'
  753. */
  754. static int bf537mac_close(struct net_device *dev)
  755. {
  756. struct bf537mac_local *lp = netdev_priv(dev);
  757. pr_debug("%s: %s\n", dev->name, __FUNCTION__);
  758. netif_stop_queue(dev);
  759. netif_carrier_off(dev);
  760. phy_stop(lp->phydev);
  761. /* clear everything */
  762. bf537mac_shutdown(dev);
  763. /* free the rx/tx buffers */
  764. desc_list_free();
  765. return 0;
  766. }
  767. static int __init bf537mac_probe(struct net_device *dev)
  768. {
  769. struct bf537mac_local *lp = netdev_priv(dev);
  770. int retval;
  771. int i;
  772. /* Grab the MAC address in the MAC */
  773. *(__le32 *) (&(dev->dev_addr[0])) = cpu_to_le32(bfin_read_EMAC_ADDRLO());
  774. *(__le16 *) (&(dev->dev_addr[4])) = cpu_to_le16((u16) bfin_read_EMAC_ADDRHI());
  775. /* probe mac */
  776. /*todo: how to proble? which is revision_register */
  777. bfin_write_EMAC_ADDRLO(0x12345678);
  778. if (bfin_read_EMAC_ADDRLO() != 0x12345678) {
  779. pr_debug("can't detect bf537 mac!\n");
  780. retval = -ENODEV;
  781. goto err_out;
  782. }
  783. /* set the GPIO pins to Ethernet mode */
  784. retval = setup_pin_mux(1);
  785. if (retval)
  786. return retval;
  787. /*Is it valid? (Did bootloader initialize it?) */
  788. if (!is_valid_ether_addr(dev->dev_addr)) {
  789. /* Grab the MAC from the board somehow - this is done in the
  790. arch/blackfin/mach-bf537/boards/eth_mac.c */
  791. bfin_get_ether_addr(dev->dev_addr);
  792. }
  793. /* If still not valid, get a random one */
  794. if (!is_valid_ether_addr(dev->dev_addr)) {
  795. random_ether_addr(dev->dev_addr);
  796. }
  797. setup_mac_addr(dev->dev_addr);
  798. /* MDIO bus initial */
  799. lp->mii_bus.priv = dev;
  800. lp->mii_bus.read = mdiobus_read;
  801. lp->mii_bus.write = mdiobus_write;
  802. lp->mii_bus.reset = mdiobus_reset;
  803. lp->mii_bus.name = "bfin_mac_mdio";
  804. lp->mii_bus.id = 0;
  805. lp->mii_bus.irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
  806. for (i = 0; i < PHY_MAX_ADDR; ++i)
  807. lp->mii_bus.irq[i] = PHY_POLL;
  808. mdiobus_register(&lp->mii_bus);
  809. retval = mii_probe(dev);
  810. if (retval)
  811. return retval;
  812. /* Fill in the fields of the device structure with ethernet values. */
  813. ether_setup(dev);
  814. dev->open = bf537mac_open;
  815. dev->stop = bf537mac_close;
  816. dev->hard_start_xmit = bf537mac_hard_start_xmit;
  817. dev->set_mac_address = bf537mac_set_mac_address;
  818. dev->tx_timeout = bf537mac_timeout;
  819. dev->set_multicast_list = bf537mac_set_multicast_list;
  820. #ifdef CONFIG_NET_POLL_CONTROLLER
  821. dev->poll_controller = bf537mac_poll;
  822. #endif
  823. spin_lock_init(&lp->lock);
  824. /* now, enable interrupts */
  825. /* register irq handler */
  826. if (request_irq
  827. (IRQ_MAC_RX, bf537mac_interrupt, IRQF_DISABLED | IRQF_SHARED,
  828. "BFIN537_MAC_RX", dev)) {
  829. printk(KERN_WARNING DRV_NAME
  830. ": Unable to attach BlackFin MAC RX interrupt\n");
  831. return -EBUSY;
  832. }
  833. retval = register_netdev(dev);
  834. if (retval == 0) {
  835. /* now, print out the card info, in a short format.. */
  836. printk(KERN_INFO "%s: Version %s, %s\n",
  837. DRV_NAME, DRV_VERSION, DRV_DESC);
  838. }
  839. err_out:
  840. return retval;
  841. }
  842. static int bfin_mac_probe(struct platform_device *pdev)
  843. {
  844. struct net_device *ndev;
  845. ndev = alloc_etherdev(sizeof(struct bf537mac_local));
  846. if (!ndev) {
  847. printk(KERN_WARNING DRV_NAME ": could not allocate device\n");
  848. return -ENOMEM;
  849. }
  850. SET_NETDEV_DEV(ndev, &pdev->dev);
  851. platform_set_drvdata(pdev, ndev);
  852. if (bf537mac_probe(ndev) != 0) {
  853. platform_set_drvdata(pdev, NULL);
  854. free_netdev(ndev);
  855. printk(KERN_WARNING DRV_NAME ": not found\n");
  856. return -ENODEV;
  857. }
  858. return 0;
  859. }
  860. static int bfin_mac_remove(struct platform_device *pdev)
  861. {
  862. struct net_device *ndev = platform_get_drvdata(pdev);
  863. platform_set_drvdata(pdev, NULL);
  864. unregister_netdev(ndev);
  865. free_irq(IRQ_MAC_RX, ndev);
  866. free_netdev(ndev);
  867. setup_pin_mux(0);
  868. return 0;
  869. }
  870. #ifdef CONFIG_PM
  871. static int bfin_mac_suspend(struct platform_device *pdev, pm_message_t mesg)
  872. {
  873. struct net_device *net_dev = platform_get_drvdata(pdev);
  874. if (netif_running(net_dev))
  875. bf537mac_close(net_dev);
  876. return 0;
  877. }
  878. static int bfin_mac_resume(struct platform_device *pdev)
  879. {
  880. struct net_device *net_dev = platform_get_drvdata(pdev);
  881. if (netif_running(net_dev))
  882. bf537mac_open(net_dev);
  883. return 0;
  884. }
  885. #else
  886. #define bfin_mac_suspend NULL
  887. #define bfin_mac_resume NULL
  888. #endif /* CONFIG_PM */
  889. static struct platform_driver bfin_mac_driver = {
  890. .probe = bfin_mac_probe,
  891. .remove = bfin_mac_remove,
  892. .resume = bfin_mac_resume,
  893. .suspend = bfin_mac_suspend,
  894. .driver = {
  895. .name = DRV_NAME,
  896. },
  897. };
  898. static int __init bfin_mac_init(void)
  899. {
  900. return platform_driver_register(&bfin_mac_driver);
  901. }
  902. module_init(bfin_mac_init);
  903. static void __exit bfin_mac_cleanup(void)
  904. {
  905. platform_driver_unregister(&bfin_mac_driver);
  906. }
  907. module_exit(bfin_mac_cleanup);