i8042.c 28 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253
  1. /*
  2. * i8042 keyboard and mouse controller driver for Linux
  3. *
  4. * Copyright (c) 1999-2004 Vojtech Pavlik
  5. */
  6. /*
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation.
  10. */
  11. #include <linux/delay.h>
  12. #include <linux/module.h>
  13. #include <linux/moduleparam.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/ioport.h>
  16. #include <linux/init.h>
  17. #include <linux/serio.h>
  18. #include <linux/err.h>
  19. #include <linux/rcupdate.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/i8042.h>
  22. #include <asm/io.h>
  23. MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
  24. MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
  25. MODULE_LICENSE("GPL");
  26. static unsigned int i8042_nokbd;
  27. module_param_named(nokbd, i8042_nokbd, bool, 0);
  28. MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
  29. static unsigned int i8042_noaux;
  30. module_param_named(noaux, i8042_noaux, bool, 0);
  31. MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
  32. static unsigned int i8042_nomux;
  33. module_param_named(nomux, i8042_nomux, bool, 0);
  34. MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing conrtoller is present.");
  35. static unsigned int i8042_unlock;
  36. module_param_named(unlock, i8042_unlock, bool, 0);
  37. MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
  38. static unsigned int i8042_reset;
  39. module_param_named(reset, i8042_reset, bool, 0);
  40. MODULE_PARM_DESC(reset, "Reset controller during init and cleanup.");
  41. static unsigned int i8042_direct;
  42. module_param_named(direct, i8042_direct, bool, 0);
  43. MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
  44. static unsigned int i8042_dumbkbd;
  45. module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
  46. MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
  47. static unsigned int i8042_noloop;
  48. module_param_named(noloop, i8042_noloop, bool, 0);
  49. MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
  50. static unsigned int i8042_blink_frequency = 500;
  51. module_param_named(panicblink, i8042_blink_frequency, uint, 0600);
  52. MODULE_PARM_DESC(panicblink, "Frequency with which keyboard LEDs should blink when kernel panics");
  53. #ifdef CONFIG_PNP
  54. static int i8042_nopnp;
  55. module_param_named(nopnp, i8042_nopnp, bool, 0);
  56. MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
  57. #endif
  58. #define DEBUG
  59. #ifdef DEBUG
  60. static int i8042_debug;
  61. module_param_named(debug, i8042_debug, bool, 0600);
  62. MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
  63. #endif
  64. #include "i8042.h"
  65. static DEFINE_SPINLOCK(i8042_lock);
  66. struct i8042_port {
  67. struct serio *serio;
  68. int irq;
  69. unsigned char exists;
  70. signed char mux;
  71. };
  72. #define I8042_KBD_PORT_NO 0
  73. #define I8042_AUX_PORT_NO 1
  74. #define I8042_MUX_PORT_NO 2
  75. #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
  76. static struct i8042_port i8042_ports[I8042_NUM_PORTS];
  77. static unsigned char i8042_initial_ctr;
  78. static unsigned char i8042_ctr;
  79. static unsigned char i8042_mux_present;
  80. static unsigned char i8042_kbd_irq_registered;
  81. static unsigned char i8042_aux_irq_registered;
  82. static unsigned char i8042_suppress_kbd_ack;
  83. static struct platform_device *i8042_platform_device;
  84. static irqreturn_t i8042_interrupt(int irq, void *dev_id);
  85. /*
  86. * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
  87. * be ready for reading values from it / writing values to it.
  88. * Called always with i8042_lock held.
  89. */
  90. static int i8042_wait_read(void)
  91. {
  92. int i = 0;
  93. while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
  94. udelay(50);
  95. i++;
  96. }
  97. return -(i == I8042_CTL_TIMEOUT);
  98. }
  99. static int i8042_wait_write(void)
  100. {
  101. int i = 0;
  102. while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
  103. udelay(50);
  104. i++;
  105. }
  106. return -(i == I8042_CTL_TIMEOUT);
  107. }
  108. /*
  109. * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
  110. * of the i8042 down the toilet.
  111. */
  112. static int i8042_flush(void)
  113. {
  114. unsigned long flags;
  115. unsigned char data, str;
  116. int i = 0;
  117. spin_lock_irqsave(&i8042_lock, flags);
  118. while (((str = i8042_read_status()) & I8042_STR_OBF) && (i < I8042_BUFFER_SIZE)) {
  119. udelay(50);
  120. data = i8042_read_data();
  121. i++;
  122. dbg("%02x <- i8042 (flush, %s)", data,
  123. str & I8042_STR_AUXDATA ? "aux" : "kbd");
  124. }
  125. spin_unlock_irqrestore(&i8042_lock, flags);
  126. return i;
  127. }
  128. /*
  129. * i8042_command() executes a command on the i8042. It also sends the input
  130. * parameter(s) of the commands to it, and receives the output value(s). The
  131. * parameters are to be stored in the param array, and the output is placed
  132. * into the same array. The number of the parameters and output values is
  133. * encoded in bits 8-11 of the command number.
  134. */
  135. static int __i8042_command(unsigned char *param, int command)
  136. {
  137. int i, error;
  138. if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
  139. return -1;
  140. error = i8042_wait_write();
  141. if (error)
  142. return error;
  143. dbg("%02x -> i8042 (command)", command & 0xff);
  144. i8042_write_command(command & 0xff);
  145. for (i = 0; i < ((command >> 12) & 0xf); i++) {
  146. error = i8042_wait_write();
  147. if (error)
  148. return error;
  149. dbg("%02x -> i8042 (parameter)", param[i]);
  150. i8042_write_data(param[i]);
  151. }
  152. for (i = 0; i < ((command >> 8) & 0xf); i++) {
  153. error = i8042_wait_read();
  154. if (error) {
  155. dbg(" -- i8042 (timeout)");
  156. return error;
  157. }
  158. if (command == I8042_CMD_AUX_LOOP &&
  159. !(i8042_read_status() & I8042_STR_AUXDATA)) {
  160. dbg(" -- i8042 (auxerr)");
  161. return -1;
  162. }
  163. param[i] = i8042_read_data();
  164. dbg("%02x <- i8042 (return)", param[i]);
  165. }
  166. return 0;
  167. }
  168. int i8042_command(unsigned char *param, int command)
  169. {
  170. unsigned long flags;
  171. int retval;
  172. spin_lock_irqsave(&i8042_lock, flags);
  173. retval = __i8042_command(param, command);
  174. spin_unlock_irqrestore(&i8042_lock, flags);
  175. return retval;
  176. }
  177. EXPORT_SYMBOL(i8042_command);
  178. /*
  179. * i8042_kbd_write() sends a byte out through the keyboard interface.
  180. */
  181. static int i8042_kbd_write(struct serio *port, unsigned char c)
  182. {
  183. unsigned long flags;
  184. int retval = 0;
  185. spin_lock_irqsave(&i8042_lock, flags);
  186. if (!(retval = i8042_wait_write())) {
  187. dbg("%02x -> i8042 (kbd-data)", c);
  188. i8042_write_data(c);
  189. }
  190. spin_unlock_irqrestore(&i8042_lock, flags);
  191. return retval;
  192. }
  193. /*
  194. * i8042_aux_write() sends a byte out through the aux interface.
  195. */
  196. static int i8042_aux_write(struct serio *serio, unsigned char c)
  197. {
  198. struct i8042_port *port = serio->port_data;
  199. return i8042_command(&c, port->mux == -1 ?
  200. I8042_CMD_AUX_SEND :
  201. I8042_CMD_MUX_SEND + port->mux);
  202. }
  203. /*
  204. * i8042_start() is called by serio core when port is about to finish
  205. * registering. It will mark port as existing so i8042_interrupt can
  206. * start sending data through it.
  207. */
  208. static int i8042_start(struct serio *serio)
  209. {
  210. struct i8042_port *port = serio->port_data;
  211. port->exists = 1;
  212. mb();
  213. return 0;
  214. }
  215. /*
  216. * i8042_stop() marks serio port as non-existing so i8042_interrupt
  217. * will not try to send data to the port that is about to go away.
  218. * The function is called by serio core as part of unregister procedure.
  219. */
  220. static void i8042_stop(struct serio *serio)
  221. {
  222. struct i8042_port *port = serio->port_data;
  223. port->exists = 0;
  224. synchronize_sched();
  225. port->serio = NULL;
  226. }
  227. /*
  228. * i8042_interrupt() is the most important function in this driver -
  229. * it handles the interrupts from the i8042, and sends incoming bytes
  230. * to the upper layers.
  231. */
  232. static irqreturn_t i8042_interrupt(int irq, void *dev_id)
  233. {
  234. struct i8042_port *port;
  235. unsigned long flags;
  236. unsigned char str, data;
  237. unsigned int dfl;
  238. unsigned int port_no;
  239. int ret = 1;
  240. spin_lock_irqsave(&i8042_lock, flags);
  241. str = i8042_read_status();
  242. if (unlikely(~str & I8042_STR_OBF)) {
  243. spin_unlock_irqrestore(&i8042_lock, flags);
  244. if (irq) dbg("Interrupt %d, without any data", irq);
  245. ret = 0;
  246. goto out;
  247. }
  248. data = i8042_read_data();
  249. spin_unlock_irqrestore(&i8042_lock, flags);
  250. if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
  251. static unsigned long last_transmit;
  252. static unsigned char last_str;
  253. dfl = 0;
  254. if (str & I8042_STR_MUXERR) {
  255. dbg("MUX error, status is %02x, data is %02x", str, data);
  256. /*
  257. * When MUXERR condition is signalled the data register can only contain
  258. * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
  259. * it is not always the case. Some KBCs also report 0xfc when there is
  260. * nothing connected to the port while others sometimes get confused which
  261. * port the data came from and signal error leaving the data intact. They
  262. * _do not_ revert to legacy mode (actually I've never seen KBC reverting
  263. * to legacy mode yet, when we see one we'll add proper handling).
  264. * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
  265. * rest assume that the data came from the same serio last byte
  266. * was transmitted (if transmission happened not too long ago).
  267. */
  268. switch (data) {
  269. default:
  270. if (time_before(jiffies, last_transmit + HZ/10)) {
  271. str = last_str;
  272. break;
  273. }
  274. /* fall through - report timeout */
  275. case 0xfc:
  276. case 0xfd:
  277. case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
  278. case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
  279. }
  280. }
  281. port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
  282. last_str = str;
  283. last_transmit = jiffies;
  284. } else {
  285. dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
  286. ((str & I8042_STR_TIMEOUT) ? SERIO_TIMEOUT : 0);
  287. port_no = (str & I8042_STR_AUXDATA) ?
  288. I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
  289. }
  290. port = &i8042_ports[port_no];
  291. dbg("%02x <- i8042 (interrupt, %d, %d%s%s)",
  292. data, port_no, irq,
  293. dfl & SERIO_PARITY ? ", bad parity" : "",
  294. dfl & SERIO_TIMEOUT ? ", timeout" : "");
  295. if (unlikely(i8042_suppress_kbd_ack))
  296. if (port_no == I8042_KBD_PORT_NO &&
  297. (data == 0xfa || data == 0xfe)) {
  298. i8042_suppress_kbd_ack--;
  299. goto out;
  300. }
  301. if (likely(port->exists))
  302. serio_interrupt(port->serio, data, dfl);
  303. out:
  304. return IRQ_RETVAL(ret);
  305. }
  306. /*
  307. * i8042_enable_kbd_port enables keybaord port on chip
  308. */
  309. static int i8042_enable_kbd_port(void)
  310. {
  311. i8042_ctr &= ~I8042_CTR_KBDDIS;
  312. i8042_ctr |= I8042_CTR_KBDINT;
  313. if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
  314. i8042_ctr &= ~I8042_CTR_KBDINT;
  315. i8042_ctr |= I8042_CTR_KBDDIS;
  316. printk(KERN_ERR "i8042.c: Failed to enable KBD port.\n");
  317. return -EIO;
  318. }
  319. return 0;
  320. }
  321. /*
  322. * i8042_enable_aux_port enables AUX (mouse) port on chip
  323. */
  324. static int i8042_enable_aux_port(void)
  325. {
  326. i8042_ctr &= ~I8042_CTR_AUXDIS;
  327. i8042_ctr |= I8042_CTR_AUXINT;
  328. if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
  329. i8042_ctr &= ~I8042_CTR_AUXINT;
  330. i8042_ctr |= I8042_CTR_AUXDIS;
  331. printk(KERN_ERR "i8042.c: Failed to enable AUX port.\n");
  332. return -EIO;
  333. }
  334. return 0;
  335. }
  336. /*
  337. * i8042_enable_mux_ports enables 4 individual AUX ports after
  338. * the controller has been switched into Multiplexed mode
  339. */
  340. static int i8042_enable_mux_ports(void)
  341. {
  342. unsigned char param;
  343. int i;
  344. for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
  345. i8042_command(&param, I8042_CMD_MUX_PFX + i);
  346. i8042_command(&param, I8042_CMD_AUX_ENABLE);
  347. }
  348. return i8042_enable_aux_port();
  349. }
  350. /*
  351. * i8042_set_mux_mode checks whether the controller has an active
  352. * multiplexor and puts the chip into Multiplexed (1) or Legacy (0) mode.
  353. */
  354. static int i8042_set_mux_mode(unsigned int mode, unsigned char *mux_version)
  355. {
  356. unsigned char param;
  357. /*
  358. * Get rid of bytes in the queue.
  359. */
  360. i8042_flush();
  361. /*
  362. * Internal loopback test - send three bytes, they should come back from the
  363. * mouse interface, the last should be version.
  364. */
  365. param = 0xf0;
  366. if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param != 0xf0)
  367. return -1;
  368. param = mode ? 0x56 : 0xf6;
  369. if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param != (mode ? 0x56 : 0xf6))
  370. return -1;
  371. param = mode ? 0xa4 : 0xa5;
  372. if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param == (mode ? 0xa4 : 0xa5))
  373. return -1;
  374. if (mux_version)
  375. *mux_version = param;
  376. return 0;
  377. }
  378. /*
  379. * i8042_check_mux() checks whether the controller supports the PS/2 Active
  380. * Multiplexing specification by Synaptics, Phoenix, Insyde and
  381. * LCS/Telegraphics.
  382. */
  383. static int __devinit i8042_check_mux(void)
  384. {
  385. unsigned char mux_version;
  386. if (i8042_set_mux_mode(1, &mux_version))
  387. return -1;
  388. /*
  389. * Workaround for interference with USB Legacy emulation
  390. * that causes a v10.12 MUX to be found.
  391. */
  392. if (mux_version == 0xAC)
  393. return -1;
  394. printk(KERN_INFO "i8042.c: Detected active multiplexing controller, rev %d.%d.\n",
  395. (mux_version >> 4) & 0xf, mux_version & 0xf);
  396. /*
  397. * Disable all muxed ports by disabling AUX.
  398. */
  399. i8042_ctr |= I8042_CTR_AUXDIS;
  400. i8042_ctr &= ~I8042_CTR_AUXINT;
  401. if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
  402. printk(KERN_ERR "i8042.c: Failed to disable AUX port, can't use MUX.\n");
  403. return -EIO;
  404. }
  405. i8042_mux_present = 1;
  406. return 0;
  407. }
  408. /*
  409. * The following is used to test AUX IRQ delivery.
  410. */
  411. static struct completion i8042_aux_irq_delivered __devinitdata;
  412. static int i8042_irq_being_tested __devinitdata;
  413. static irqreturn_t __devinit i8042_aux_test_irq(int irq, void *dev_id)
  414. {
  415. unsigned long flags;
  416. unsigned char str, data;
  417. int ret = 0;
  418. spin_lock_irqsave(&i8042_lock, flags);
  419. str = i8042_read_status();
  420. if (str & I8042_STR_OBF) {
  421. data = i8042_read_data();
  422. if (i8042_irq_being_tested &&
  423. data == 0xa5 && (str & I8042_STR_AUXDATA))
  424. complete(&i8042_aux_irq_delivered);
  425. ret = 1;
  426. }
  427. spin_unlock_irqrestore(&i8042_lock, flags);
  428. return IRQ_RETVAL(ret);
  429. }
  430. /*
  431. * i8042_toggle_aux - enables or disables AUX port on i8042 via command and
  432. * verifies success by readinng CTR. Used when testing for presence of AUX
  433. * port.
  434. */
  435. static int __devinit i8042_toggle_aux(int on)
  436. {
  437. unsigned char param;
  438. int i;
  439. if (i8042_command(&param,
  440. on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE))
  441. return -1;
  442. /* some chips need some time to set the I8042_CTR_AUXDIS bit */
  443. for (i = 0; i < 100; i++) {
  444. udelay(50);
  445. if (i8042_command(&param, I8042_CMD_CTL_RCTR))
  446. return -1;
  447. if (!(param & I8042_CTR_AUXDIS) == on)
  448. return 0;
  449. }
  450. return -1;
  451. }
  452. /*
  453. * i8042_check_aux() applies as much paranoia as it can at detecting
  454. * the presence of an AUX interface.
  455. */
  456. static int __devinit i8042_check_aux(void)
  457. {
  458. int retval = -1;
  459. int irq_registered = 0;
  460. int aux_loop_broken = 0;
  461. unsigned long flags;
  462. unsigned char param;
  463. /*
  464. * Get rid of bytes in the queue.
  465. */
  466. i8042_flush();
  467. /*
  468. * Internal loopback test - filters out AT-type i8042's. Unfortunately
  469. * SiS screwed up and their 5597 doesn't support the LOOP command even
  470. * though it has an AUX port.
  471. */
  472. param = 0x5a;
  473. retval = i8042_command(&param, I8042_CMD_AUX_LOOP);
  474. if (retval || param != 0x5a) {
  475. /*
  476. * External connection test - filters out AT-soldered PS/2 i8042's
  477. * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
  478. * 0xfa - no error on some notebooks which ignore the spec
  479. * Because it's common for chipsets to return error on perfectly functioning
  480. * AUX ports, we test for this only when the LOOP command failed.
  481. */
  482. if (i8042_command(&param, I8042_CMD_AUX_TEST) ||
  483. (param && param != 0xfa && param != 0xff))
  484. return -1;
  485. /*
  486. * If AUX_LOOP completed without error but returned unexpected data
  487. * mark it as broken
  488. */
  489. if (!retval)
  490. aux_loop_broken = 1;
  491. }
  492. /*
  493. * Bit assignment test - filters out PS/2 i8042's in AT mode
  494. */
  495. if (i8042_toggle_aux(0)) {
  496. printk(KERN_WARNING "Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
  497. printk(KERN_WARNING "If AUX port is really absent please use the 'i8042.noaux' option.\n");
  498. }
  499. if (i8042_toggle_aux(1))
  500. return -1;
  501. /*
  502. * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
  503. * used it for a PCI card or somethig else.
  504. */
  505. if (i8042_noloop || aux_loop_broken) {
  506. /*
  507. * Without LOOP command we can't test AUX IRQ delivery. Assume the port
  508. * is working and hope we are right.
  509. */
  510. retval = 0;
  511. goto out;
  512. }
  513. if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED,
  514. "i8042", i8042_platform_device))
  515. goto out;
  516. irq_registered = 1;
  517. if (i8042_enable_aux_port())
  518. goto out;
  519. spin_lock_irqsave(&i8042_lock, flags);
  520. init_completion(&i8042_aux_irq_delivered);
  521. i8042_irq_being_tested = 1;
  522. param = 0xa5;
  523. retval = __i8042_command(&param, I8042_CMD_AUX_LOOP & 0xf0ff);
  524. spin_unlock_irqrestore(&i8042_lock, flags);
  525. if (retval)
  526. goto out;
  527. if (wait_for_completion_timeout(&i8042_aux_irq_delivered,
  528. msecs_to_jiffies(250)) == 0) {
  529. /*
  530. * AUX IRQ was never delivered so we need to flush the controller to
  531. * get rid of the byte we put there; otherwise keyboard may not work.
  532. */
  533. i8042_flush();
  534. retval = -1;
  535. }
  536. out:
  537. /*
  538. * Disable the interface.
  539. */
  540. i8042_ctr |= I8042_CTR_AUXDIS;
  541. i8042_ctr &= ~I8042_CTR_AUXINT;
  542. if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
  543. retval = -1;
  544. if (irq_registered)
  545. free_irq(I8042_AUX_IRQ, i8042_platform_device);
  546. return retval;
  547. }
  548. static int i8042_controller_check(void)
  549. {
  550. if (i8042_flush() == I8042_BUFFER_SIZE) {
  551. printk(KERN_ERR "i8042.c: No controller found.\n");
  552. return -ENODEV;
  553. }
  554. return 0;
  555. }
  556. static int i8042_controller_selftest(void)
  557. {
  558. unsigned char param;
  559. if (!i8042_reset)
  560. return 0;
  561. if (i8042_command(&param, I8042_CMD_CTL_TEST)) {
  562. printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n");
  563. return -ENODEV;
  564. }
  565. if (param != I8042_RET_CTL_TEST) {
  566. printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
  567. param, I8042_RET_CTL_TEST);
  568. return -EIO;
  569. }
  570. return 0;
  571. }
  572. /*
  573. * i8042_controller init initializes the i8042 controller, and,
  574. * most importantly, sets it into non-xlated mode if that's
  575. * desired.
  576. */
  577. static int i8042_controller_init(void)
  578. {
  579. unsigned long flags;
  580. /*
  581. * Save the CTR for restoral on unload / reboot.
  582. */
  583. if (i8042_command(&i8042_ctr, I8042_CMD_CTL_RCTR)) {
  584. printk(KERN_ERR "i8042.c: Can't read CTR while initializing i8042.\n");
  585. return -EIO;
  586. }
  587. i8042_initial_ctr = i8042_ctr;
  588. /*
  589. * Disable the keyboard interface and interrupt.
  590. */
  591. i8042_ctr |= I8042_CTR_KBDDIS;
  592. i8042_ctr &= ~I8042_CTR_KBDINT;
  593. /*
  594. * Handle keylock.
  595. */
  596. spin_lock_irqsave(&i8042_lock, flags);
  597. if (~i8042_read_status() & I8042_STR_KEYLOCK) {
  598. if (i8042_unlock)
  599. i8042_ctr |= I8042_CTR_IGNKEYLOCK;
  600. else
  601. printk(KERN_WARNING "i8042.c: Warning: Keylock active.\n");
  602. }
  603. spin_unlock_irqrestore(&i8042_lock, flags);
  604. /*
  605. * If the chip is configured into nontranslated mode by the BIOS, don't
  606. * bother enabling translating and be happy.
  607. */
  608. if (~i8042_ctr & I8042_CTR_XLATE)
  609. i8042_direct = 1;
  610. /*
  611. * Set nontranslated mode for the kbd interface if requested by an option.
  612. * After this the kbd interface becomes a simple serial in/out, like the aux
  613. * interface is. We don't do this by default, since it can confuse notebook
  614. * BIOSes.
  615. */
  616. if (i8042_direct)
  617. i8042_ctr &= ~I8042_CTR_XLATE;
  618. /*
  619. * Write CTR back.
  620. */
  621. if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
  622. printk(KERN_ERR "i8042.c: Can't write CTR while initializing i8042.\n");
  623. return -EIO;
  624. }
  625. return 0;
  626. }
  627. /*
  628. * Reset the controller and reset CRT to the original value set by BIOS.
  629. */
  630. static void i8042_controller_reset(void)
  631. {
  632. i8042_flush();
  633. /*
  634. * Disable both KBD and AUX interfaces so they don't get in the way
  635. */
  636. i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS;
  637. i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT);
  638. /*
  639. * Disable MUX mode if present.
  640. */
  641. if (i8042_mux_present)
  642. i8042_set_mux_mode(0, NULL);
  643. /*
  644. * Reset the controller if requested.
  645. */
  646. i8042_controller_selftest();
  647. /*
  648. * Restore the original control register setting.
  649. */
  650. if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
  651. printk(KERN_WARNING "i8042.c: Can't restore CTR.\n");
  652. }
  653. /*
  654. * i8042_panic_blink() will flash the keyboard LEDs and is called when
  655. * kernel panics. Flashing LEDs is useful for users running X who may
  656. * not see the console and will help distingushing panics from "real"
  657. * lockups.
  658. *
  659. * Note that DELAY has a limit of 10ms so we will not get stuck here
  660. * waiting for KBC to free up even if KBD interrupt is off
  661. */
  662. #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
  663. static long i8042_panic_blink(long count)
  664. {
  665. long delay = 0;
  666. static long last_blink;
  667. static char led;
  668. /*
  669. * We expect frequency to be about 1/2s. KDB uses about 1s.
  670. * Make sure they are different.
  671. */
  672. if (!i8042_blink_frequency)
  673. return 0;
  674. if (count - last_blink < i8042_blink_frequency)
  675. return 0;
  676. led ^= 0x01 | 0x04;
  677. while (i8042_read_status() & I8042_STR_IBF)
  678. DELAY;
  679. dbg("%02x -> i8042 (panic blink)", 0xed);
  680. i8042_suppress_kbd_ack = 2;
  681. i8042_write_data(0xed); /* set leds */
  682. DELAY;
  683. while (i8042_read_status() & I8042_STR_IBF)
  684. DELAY;
  685. DELAY;
  686. dbg("%02x -> i8042 (panic blink)", led);
  687. i8042_write_data(led);
  688. DELAY;
  689. last_blink = count;
  690. return delay;
  691. }
  692. #undef DELAY
  693. #ifdef CONFIG_PM
  694. /*
  695. * Here we try to restore the original BIOS settings. We only want to
  696. * do that once, when we really suspend, not when we taking memory
  697. * snapshot for swsusp (in this case we'll perform required cleanup
  698. * as part of shutdown process).
  699. */
  700. static int i8042_suspend(struct platform_device *dev, pm_message_t state)
  701. {
  702. if (dev->dev.power.power_state.event != state.event) {
  703. if (state.event == PM_EVENT_SUSPEND)
  704. i8042_controller_reset();
  705. dev->dev.power.power_state = state;
  706. }
  707. return 0;
  708. }
  709. /*
  710. * Here we try to reset everything back to a state in which suspended
  711. */
  712. static int i8042_resume(struct platform_device *dev)
  713. {
  714. int error;
  715. /*
  716. * Do not bother with restoring state if we haven't suspened yet
  717. */
  718. if (dev->dev.power.power_state.event == PM_EVENT_ON)
  719. return 0;
  720. error = i8042_controller_check();
  721. if (error)
  722. return error;
  723. error = i8042_controller_selftest();
  724. if (error)
  725. return error;
  726. /*
  727. * Restore original CTR value and disable all ports
  728. */
  729. i8042_ctr = i8042_initial_ctr;
  730. if (i8042_direct)
  731. i8042_ctr &= ~I8042_CTR_XLATE;
  732. i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
  733. i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
  734. if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
  735. printk(KERN_ERR "i8042: Can't write CTR to resume\n");
  736. return -EIO;
  737. }
  738. if (i8042_mux_present) {
  739. if (i8042_set_mux_mode(1, NULL) || i8042_enable_mux_ports())
  740. printk(KERN_WARNING
  741. "i8042: failed to resume active multiplexor, "
  742. "mouse won't work.\n");
  743. } else if (i8042_ports[I8042_AUX_PORT_NO].serio)
  744. i8042_enable_aux_port();
  745. if (i8042_ports[I8042_KBD_PORT_NO].serio)
  746. i8042_enable_kbd_port();
  747. i8042_interrupt(0, NULL);
  748. dev->dev.power.power_state = PMSG_ON;
  749. return 0;
  750. }
  751. #endif /* CONFIG_PM */
  752. /*
  753. * We need to reset the 8042 back to original mode on system shutdown,
  754. * because otherwise BIOSes will be confused.
  755. */
  756. static void i8042_shutdown(struct platform_device *dev)
  757. {
  758. i8042_controller_reset();
  759. }
  760. static int __devinit i8042_create_kbd_port(void)
  761. {
  762. struct serio *serio;
  763. struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
  764. serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
  765. if (!serio)
  766. return -ENOMEM;
  767. serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
  768. serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write;
  769. serio->start = i8042_start;
  770. serio->stop = i8042_stop;
  771. serio->port_data = port;
  772. serio->dev.parent = &i8042_platform_device->dev;
  773. strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
  774. strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
  775. port->serio = serio;
  776. port->irq = I8042_KBD_IRQ;
  777. return 0;
  778. }
  779. static int __devinit i8042_create_aux_port(int idx)
  780. {
  781. struct serio *serio;
  782. int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx;
  783. struct i8042_port *port = &i8042_ports[port_no];
  784. serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
  785. if (!serio)
  786. return -ENOMEM;
  787. serio->id.type = SERIO_8042;
  788. serio->write = i8042_aux_write;
  789. serio->start = i8042_start;
  790. serio->stop = i8042_stop;
  791. serio->port_data = port;
  792. serio->dev.parent = &i8042_platform_device->dev;
  793. if (idx < 0) {
  794. strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
  795. strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
  796. } else {
  797. snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
  798. snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1);
  799. }
  800. port->serio = serio;
  801. port->mux = idx;
  802. port->irq = I8042_AUX_IRQ;
  803. return 0;
  804. }
  805. static void __devinit i8042_free_kbd_port(void)
  806. {
  807. kfree(i8042_ports[I8042_KBD_PORT_NO].serio);
  808. i8042_ports[I8042_KBD_PORT_NO].serio = NULL;
  809. }
  810. static void __devinit i8042_free_aux_ports(void)
  811. {
  812. int i;
  813. for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) {
  814. kfree(i8042_ports[i].serio);
  815. i8042_ports[i].serio = NULL;
  816. }
  817. }
  818. static void __devinit i8042_register_ports(void)
  819. {
  820. int i;
  821. for (i = 0; i < I8042_NUM_PORTS; i++) {
  822. if (i8042_ports[i].serio) {
  823. printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n",
  824. i8042_ports[i].serio->name,
  825. (unsigned long) I8042_DATA_REG,
  826. (unsigned long) I8042_COMMAND_REG,
  827. i8042_ports[i].irq);
  828. serio_register_port(i8042_ports[i].serio);
  829. }
  830. }
  831. }
  832. static void __devexit i8042_unregister_ports(void)
  833. {
  834. int i;
  835. for (i = 0; i < I8042_NUM_PORTS; i++) {
  836. if (i8042_ports[i].serio) {
  837. serio_unregister_port(i8042_ports[i].serio);
  838. i8042_ports[i].serio = NULL;
  839. }
  840. }
  841. }
  842. static void i8042_free_irqs(void)
  843. {
  844. if (i8042_aux_irq_registered)
  845. free_irq(I8042_AUX_IRQ, i8042_platform_device);
  846. if (i8042_kbd_irq_registered)
  847. free_irq(I8042_KBD_IRQ, i8042_platform_device);
  848. i8042_aux_irq_registered = i8042_kbd_irq_registered = 0;
  849. }
  850. static int __devinit i8042_setup_aux(void)
  851. {
  852. int (*aux_enable)(void);
  853. int error;
  854. int i;
  855. if (i8042_check_aux())
  856. return -ENODEV;
  857. if (i8042_nomux || i8042_check_mux()) {
  858. error = i8042_create_aux_port(-1);
  859. if (error)
  860. goto err_free_ports;
  861. aux_enable = i8042_enable_aux_port;
  862. } else {
  863. for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
  864. error = i8042_create_aux_port(i);
  865. if (error)
  866. goto err_free_ports;
  867. }
  868. aux_enable = i8042_enable_mux_ports;
  869. }
  870. error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED,
  871. "i8042", i8042_platform_device);
  872. if (error)
  873. goto err_free_ports;
  874. if (aux_enable())
  875. goto err_free_irq;
  876. i8042_aux_irq_registered = 1;
  877. return 0;
  878. err_free_irq:
  879. free_irq(I8042_AUX_IRQ, i8042_platform_device);
  880. err_free_ports:
  881. i8042_free_aux_ports();
  882. return error;
  883. }
  884. static int __devinit i8042_setup_kbd(void)
  885. {
  886. int error;
  887. error = i8042_create_kbd_port();
  888. if (error)
  889. return error;
  890. error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED,
  891. "i8042", i8042_platform_device);
  892. if (error)
  893. goto err_free_port;
  894. error = i8042_enable_kbd_port();
  895. if (error)
  896. goto err_free_irq;
  897. i8042_kbd_irq_registered = 1;
  898. return 0;
  899. err_free_irq:
  900. free_irq(I8042_KBD_IRQ, i8042_platform_device);
  901. err_free_port:
  902. i8042_free_kbd_port();
  903. return error;
  904. }
  905. static int __devinit i8042_probe(struct platform_device *dev)
  906. {
  907. int error;
  908. error = i8042_controller_selftest();
  909. if (error)
  910. return error;
  911. error = i8042_controller_init();
  912. if (error)
  913. return error;
  914. if (!i8042_noaux) {
  915. error = i8042_setup_aux();
  916. if (error && error != -ENODEV && error != -EBUSY)
  917. goto out_fail;
  918. }
  919. if (!i8042_nokbd) {
  920. error = i8042_setup_kbd();
  921. if (error)
  922. goto out_fail;
  923. }
  924. /*
  925. * Ok, everything is ready, let's register all serio ports
  926. */
  927. i8042_register_ports();
  928. return 0;
  929. out_fail:
  930. i8042_free_aux_ports(); /* in case KBD failed but AUX not */
  931. i8042_free_irqs();
  932. i8042_controller_reset();
  933. return error;
  934. }
  935. static int __devexit i8042_remove(struct platform_device *dev)
  936. {
  937. i8042_unregister_ports();
  938. i8042_free_irqs();
  939. i8042_controller_reset();
  940. return 0;
  941. }
  942. static struct platform_driver i8042_driver = {
  943. .driver = {
  944. .name = "i8042",
  945. .owner = THIS_MODULE,
  946. },
  947. .probe = i8042_probe,
  948. .remove = __devexit_p(i8042_remove),
  949. .shutdown = i8042_shutdown,
  950. #ifdef CONFIG_PM
  951. .suspend = i8042_suspend,
  952. .resume = i8042_resume,
  953. #endif
  954. };
  955. static int __init i8042_init(void)
  956. {
  957. int err;
  958. dbg_init();
  959. err = i8042_platform_init();
  960. if (err)
  961. return err;
  962. err = i8042_controller_check();
  963. if (err)
  964. goto err_platform_exit;
  965. err = platform_driver_register(&i8042_driver);
  966. if (err)
  967. goto err_platform_exit;
  968. i8042_platform_device = platform_device_alloc("i8042", -1);
  969. if (!i8042_platform_device) {
  970. err = -ENOMEM;
  971. goto err_unregister_driver;
  972. }
  973. err = platform_device_add(i8042_platform_device);
  974. if (err)
  975. goto err_free_device;
  976. panic_blink = i8042_panic_blink;
  977. return 0;
  978. err_free_device:
  979. platform_device_put(i8042_platform_device);
  980. err_unregister_driver:
  981. platform_driver_unregister(&i8042_driver);
  982. err_platform_exit:
  983. i8042_platform_exit();
  984. return err;
  985. }
  986. static void __exit i8042_exit(void)
  987. {
  988. platform_device_unregister(i8042_platform_device);
  989. platform_driver_unregister(&i8042_driver);
  990. i8042_platform_exit();
  991. panic_blink = NULL;
  992. }
  993. module_init(i8042_init);
  994. module_exit(i8042_exit);