ehca_mrmw.c 62 KB

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  1. /*
  2. * IBM eServer eHCA Infiniband device driver for Linux on POWER
  3. *
  4. * MR/MW functions
  5. *
  6. * Authors: Dietmar Decker <ddecker@de.ibm.com>
  7. * Christoph Raisch <raisch@de.ibm.com>
  8. * Hoang-Nam Nguyen <hnguyen@de.ibm.com>
  9. *
  10. * Copyright (c) 2005 IBM Corporation
  11. *
  12. * All rights reserved.
  13. *
  14. * This source code is distributed under a dual license of GPL v2.0 and OpenIB
  15. * BSD.
  16. *
  17. * OpenIB BSD License
  18. *
  19. * Redistribution and use in source and binary forms, with or without
  20. * modification, are permitted provided that the following conditions are met:
  21. *
  22. * Redistributions of source code must retain the above copyright notice, this
  23. * list of conditions and the following disclaimer.
  24. *
  25. * Redistributions in binary form must reproduce the above copyright notice,
  26. * this list of conditions and the following disclaimer in the documentation
  27. * and/or other materials
  28. * provided with the distribution.
  29. *
  30. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  31. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  32. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  33. * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  34. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  35. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  36. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  37. * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
  38. * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  39. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  40. * POSSIBILITY OF SUCH DAMAGE.
  41. */
  42. #include <asm/current.h>
  43. #include <rdma/ib_umem.h>
  44. #include "ehca_iverbs.h"
  45. #include "ehca_mrmw.h"
  46. #include "hcp_if.h"
  47. #include "hipz_hw.h"
  48. #define NUM_CHUNKS(length, chunk_size) \
  49. (((length) + (chunk_size - 1)) / (chunk_size))
  50. /* max number of rpages (per hcall register_rpages) */
  51. #define MAX_RPAGES 512
  52. static struct kmem_cache *mr_cache;
  53. static struct kmem_cache *mw_cache;
  54. enum ehca_mr_pgsize {
  55. EHCA_MR_PGSIZE4K = 0x1000L,
  56. EHCA_MR_PGSIZE64K = 0x10000L,
  57. EHCA_MR_PGSIZE1M = 0x100000L,
  58. EHCA_MR_PGSIZE16M = 0x1000000L
  59. };
  60. #define EHCA_MR_PGSHIFT4K 12
  61. #define EHCA_MR_PGSHIFT64K 16
  62. #define EHCA_MR_PGSHIFT1M 20
  63. #define EHCA_MR_PGSHIFT16M 24
  64. static u32 ehca_encode_hwpage_size(u32 pgsize)
  65. {
  66. int log = ilog2(pgsize);
  67. WARN_ON(log < 12 || log > 24 || log & 3);
  68. return (log - 12) / 4;
  69. }
  70. static u64 ehca_get_max_hwpage_size(struct ehca_shca *shca)
  71. {
  72. return 1UL << ilog2(shca->hca_cap_mr_pgsize);
  73. }
  74. static struct ehca_mr *ehca_mr_new(void)
  75. {
  76. struct ehca_mr *me;
  77. me = kmem_cache_zalloc(mr_cache, GFP_KERNEL);
  78. if (me)
  79. spin_lock_init(&me->mrlock);
  80. else
  81. ehca_gen_err("alloc failed");
  82. return me;
  83. }
  84. static void ehca_mr_delete(struct ehca_mr *me)
  85. {
  86. kmem_cache_free(mr_cache, me);
  87. }
  88. static struct ehca_mw *ehca_mw_new(void)
  89. {
  90. struct ehca_mw *me;
  91. me = kmem_cache_zalloc(mw_cache, GFP_KERNEL);
  92. if (me)
  93. spin_lock_init(&me->mwlock);
  94. else
  95. ehca_gen_err("alloc failed");
  96. return me;
  97. }
  98. static void ehca_mw_delete(struct ehca_mw *me)
  99. {
  100. kmem_cache_free(mw_cache, me);
  101. }
  102. /*----------------------------------------------------------------------*/
  103. struct ib_mr *ehca_get_dma_mr(struct ib_pd *pd, int mr_access_flags)
  104. {
  105. struct ib_mr *ib_mr;
  106. int ret;
  107. struct ehca_mr *e_maxmr;
  108. struct ehca_pd *e_pd = container_of(pd, struct ehca_pd, ib_pd);
  109. struct ehca_shca *shca =
  110. container_of(pd->device, struct ehca_shca, ib_device);
  111. if (shca->maxmr) {
  112. e_maxmr = ehca_mr_new();
  113. if (!e_maxmr) {
  114. ehca_err(&shca->ib_device, "out of memory");
  115. ib_mr = ERR_PTR(-ENOMEM);
  116. goto get_dma_mr_exit0;
  117. }
  118. ret = ehca_reg_maxmr(shca, e_maxmr, (u64 *)KERNELBASE,
  119. mr_access_flags, e_pd,
  120. &e_maxmr->ib.ib_mr.lkey,
  121. &e_maxmr->ib.ib_mr.rkey);
  122. if (ret) {
  123. ehca_mr_delete(e_maxmr);
  124. ib_mr = ERR_PTR(ret);
  125. goto get_dma_mr_exit0;
  126. }
  127. ib_mr = &e_maxmr->ib.ib_mr;
  128. } else {
  129. ehca_err(&shca->ib_device, "no internal max-MR exist!");
  130. ib_mr = ERR_PTR(-EINVAL);
  131. goto get_dma_mr_exit0;
  132. }
  133. get_dma_mr_exit0:
  134. if (IS_ERR(ib_mr))
  135. ehca_err(&shca->ib_device, "h_ret=%li pd=%p mr_access_flags=%x",
  136. PTR_ERR(ib_mr), pd, mr_access_flags);
  137. return ib_mr;
  138. } /* end ehca_get_dma_mr() */
  139. /*----------------------------------------------------------------------*/
  140. struct ib_mr *ehca_reg_phys_mr(struct ib_pd *pd,
  141. struct ib_phys_buf *phys_buf_array,
  142. int num_phys_buf,
  143. int mr_access_flags,
  144. u64 *iova_start)
  145. {
  146. struct ib_mr *ib_mr;
  147. int ret;
  148. struct ehca_mr *e_mr;
  149. struct ehca_shca *shca =
  150. container_of(pd->device, struct ehca_shca, ib_device);
  151. struct ehca_pd *e_pd = container_of(pd, struct ehca_pd, ib_pd);
  152. u64 size;
  153. if ((num_phys_buf <= 0) || !phys_buf_array) {
  154. ehca_err(pd->device, "bad input values: num_phys_buf=%x "
  155. "phys_buf_array=%p", num_phys_buf, phys_buf_array);
  156. ib_mr = ERR_PTR(-EINVAL);
  157. goto reg_phys_mr_exit0;
  158. }
  159. if (((mr_access_flags & IB_ACCESS_REMOTE_WRITE) &&
  160. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE)) ||
  161. ((mr_access_flags & IB_ACCESS_REMOTE_ATOMIC) &&
  162. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE))) {
  163. /*
  164. * Remote Write Access requires Local Write Access
  165. * Remote Atomic Access requires Local Write Access
  166. */
  167. ehca_err(pd->device, "bad input values: mr_access_flags=%x",
  168. mr_access_flags);
  169. ib_mr = ERR_PTR(-EINVAL);
  170. goto reg_phys_mr_exit0;
  171. }
  172. /* check physical buffer list and calculate size */
  173. ret = ehca_mr_chk_buf_and_calc_size(phys_buf_array, num_phys_buf,
  174. iova_start, &size);
  175. if (ret) {
  176. ib_mr = ERR_PTR(ret);
  177. goto reg_phys_mr_exit0;
  178. }
  179. if ((size == 0) ||
  180. (((u64)iova_start + size) < (u64)iova_start)) {
  181. ehca_err(pd->device, "bad input values: size=%lx iova_start=%p",
  182. size, iova_start);
  183. ib_mr = ERR_PTR(-EINVAL);
  184. goto reg_phys_mr_exit0;
  185. }
  186. e_mr = ehca_mr_new();
  187. if (!e_mr) {
  188. ehca_err(pd->device, "out of memory");
  189. ib_mr = ERR_PTR(-ENOMEM);
  190. goto reg_phys_mr_exit0;
  191. }
  192. /* register MR on HCA */
  193. if (ehca_mr_is_maxmr(size, iova_start)) {
  194. e_mr->flags |= EHCA_MR_FLAG_MAXMR;
  195. ret = ehca_reg_maxmr(shca, e_mr, iova_start, mr_access_flags,
  196. e_pd, &e_mr->ib.ib_mr.lkey,
  197. &e_mr->ib.ib_mr.rkey);
  198. if (ret) {
  199. ib_mr = ERR_PTR(ret);
  200. goto reg_phys_mr_exit1;
  201. }
  202. } else {
  203. struct ehca_mr_pginfo pginfo;
  204. u32 num_kpages;
  205. u32 num_hwpages;
  206. u64 hw_pgsize;
  207. num_kpages = NUM_CHUNKS(((u64)iova_start % PAGE_SIZE) + size,
  208. PAGE_SIZE);
  209. /* for kernel space we try most possible pgsize */
  210. hw_pgsize = ehca_get_max_hwpage_size(shca);
  211. num_hwpages = NUM_CHUNKS(((u64)iova_start % hw_pgsize) + size,
  212. hw_pgsize);
  213. memset(&pginfo, 0, sizeof(pginfo));
  214. pginfo.type = EHCA_MR_PGI_PHYS;
  215. pginfo.num_kpages = num_kpages;
  216. pginfo.hwpage_size = hw_pgsize;
  217. pginfo.num_hwpages = num_hwpages;
  218. pginfo.u.phy.num_phys_buf = num_phys_buf;
  219. pginfo.u.phy.phys_buf_array = phys_buf_array;
  220. pginfo.next_hwpage =
  221. ((u64)iova_start & ~PAGE_MASK) / hw_pgsize;
  222. ret = ehca_reg_mr(shca, e_mr, iova_start, size, mr_access_flags,
  223. e_pd, &pginfo, &e_mr->ib.ib_mr.lkey,
  224. &e_mr->ib.ib_mr.rkey);
  225. if (ret) {
  226. ib_mr = ERR_PTR(ret);
  227. goto reg_phys_mr_exit1;
  228. }
  229. }
  230. /* successful registration of all pages */
  231. return &e_mr->ib.ib_mr;
  232. reg_phys_mr_exit1:
  233. ehca_mr_delete(e_mr);
  234. reg_phys_mr_exit0:
  235. if (IS_ERR(ib_mr))
  236. ehca_err(pd->device, "h_ret=%li pd=%p phys_buf_array=%p "
  237. "num_phys_buf=%x mr_access_flags=%x iova_start=%p",
  238. PTR_ERR(ib_mr), pd, phys_buf_array,
  239. num_phys_buf, mr_access_flags, iova_start);
  240. return ib_mr;
  241. } /* end ehca_reg_phys_mr() */
  242. /*----------------------------------------------------------------------*/
  243. struct ib_mr *ehca_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
  244. u64 virt, int mr_access_flags,
  245. struct ib_udata *udata)
  246. {
  247. struct ib_mr *ib_mr;
  248. struct ehca_mr *e_mr;
  249. struct ehca_shca *shca =
  250. container_of(pd->device, struct ehca_shca, ib_device);
  251. struct ehca_pd *e_pd = container_of(pd, struct ehca_pd, ib_pd);
  252. struct ehca_mr_pginfo pginfo;
  253. int ret, page_shift;
  254. u32 num_kpages;
  255. u32 num_hwpages;
  256. u64 hwpage_size;
  257. if (!pd) {
  258. ehca_gen_err("bad pd=%p", pd);
  259. return ERR_PTR(-EFAULT);
  260. }
  261. if (((mr_access_flags & IB_ACCESS_REMOTE_WRITE) &&
  262. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE)) ||
  263. ((mr_access_flags & IB_ACCESS_REMOTE_ATOMIC) &&
  264. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE))) {
  265. /*
  266. * Remote Write Access requires Local Write Access
  267. * Remote Atomic Access requires Local Write Access
  268. */
  269. ehca_err(pd->device, "bad input values: mr_access_flags=%x",
  270. mr_access_flags);
  271. ib_mr = ERR_PTR(-EINVAL);
  272. goto reg_user_mr_exit0;
  273. }
  274. if (length == 0 || virt + length < virt) {
  275. ehca_err(pd->device, "bad input values: length=%lx "
  276. "virt_base=%lx", length, virt);
  277. ib_mr = ERR_PTR(-EINVAL);
  278. goto reg_user_mr_exit0;
  279. }
  280. e_mr = ehca_mr_new();
  281. if (!e_mr) {
  282. ehca_err(pd->device, "out of memory");
  283. ib_mr = ERR_PTR(-ENOMEM);
  284. goto reg_user_mr_exit0;
  285. }
  286. e_mr->umem = ib_umem_get(pd->uobject->context, start, length,
  287. mr_access_flags);
  288. if (IS_ERR(e_mr->umem)) {
  289. ib_mr = (void *)e_mr->umem;
  290. goto reg_user_mr_exit1;
  291. }
  292. if (e_mr->umem->page_size != PAGE_SIZE) {
  293. ehca_err(pd->device, "page size not supported, "
  294. "e_mr->umem->page_size=%x", e_mr->umem->page_size);
  295. ib_mr = ERR_PTR(-EINVAL);
  296. goto reg_user_mr_exit2;
  297. }
  298. /* determine number of MR pages */
  299. num_kpages = NUM_CHUNKS((virt % PAGE_SIZE) + length, PAGE_SIZE);
  300. /* select proper hw_pgsize */
  301. page_shift = PAGE_SHIFT;
  302. if (e_mr->umem->hugetlb) {
  303. /* determine page_shift, clamp between 4K and 16M */
  304. page_shift = (fls64(length - 1) + 3) & ~3;
  305. page_shift = min(max(page_shift, EHCA_MR_PGSHIFT4K),
  306. EHCA_MR_PGSHIFT16M);
  307. }
  308. hwpage_size = 1UL << page_shift;
  309. /* now that we have the desired page size, shift until it's
  310. * supported, too. 4K is always supported, so this terminates.
  311. */
  312. while (!(hwpage_size & shca->hca_cap_mr_pgsize))
  313. hwpage_size >>= 4;
  314. reg_user_mr_fallback:
  315. num_hwpages = NUM_CHUNKS((virt % hwpage_size) + length, hwpage_size);
  316. /* register MR on HCA */
  317. memset(&pginfo, 0, sizeof(pginfo));
  318. pginfo.type = EHCA_MR_PGI_USER;
  319. pginfo.hwpage_size = hwpage_size;
  320. pginfo.num_kpages = num_kpages;
  321. pginfo.num_hwpages = num_hwpages;
  322. pginfo.u.usr.region = e_mr->umem;
  323. pginfo.next_hwpage = e_mr->umem->offset / hwpage_size;
  324. pginfo.u.usr.next_chunk = list_prepare_entry(pginfo.u.usr.next_chunk,
  325. (&e_mr->umem->chunk_list),
  326. list);
  327. ret = ehca_reg_mr(shca, e_mr, (u64 *)virt, length, mr_access_flags,
  328. e_pd, &pginfo, &e_mr->ib.ib_mr.lkey,
  329. &e_mr->ib.ib_mr.rkey);
  330. if (ret == -EINVAL && pginfo.hwpage_size > PAGE_SIZE) {
  331. ehca_warn(pd->device, "failed to register mr "
  332. "with hwpage_size=%lx", hwpage_size);
  333. ehca_info(pd->device, "try to register mr with "
  334. "kpage_size=%lx", PAGE_SIZE);
  335. /*
  336. * this means kpages are not contiguous for a hw page
  337. * try kernel page size as fallback solution
  338. */
  339. hwpage_size = PAGE_SIZE;
  340. goto reg_user_mr_fallback;
  341. }
  342. if (ret) {
  343. ib_mr = ERR_PTR(ret);
  344. goto reg_user_mr_exit2;
  345. }
  346. /* successful registration of all pages */
  347. return &e_mr->ib.ib_mr;
  348. reg_user_mr_exit2:
  349. ib_umem_release(e_mr->umem);
  350. reg_user_mr_exit1:
  351. ehca_mr_delete(e_mr);
  352. reg_user_mr_exit0:
  353. if (IS_ERR(ib_mr))
  354. ehca_err(pd->device, "rc=%li pd=%p mr_access_flags=%x udata=%p",
  355. PTR_ERR(ib_mr), pd, mr_access_flags, udata);
  356. return ib_mr;
  357. } /* end ehca_reg_user_mr() */
  358. /*----------------------------------------------------------------------*/
  359. int ehca_rereg_phys_mr(struct ib_mr *mr,
  360. int mr_rereg_mask,
  361. struct ib_pd *pd,
  362. struct ib_phys_buf *phys_buf_array,
  363. int num_phys_buf,
  364. int mr_access_flags,
  365. u64 *iova_start)
  366. {
  367. int ret;
  368. struct ehca_shca *shca =
  369. container_of(mr->device, struct ehca_shca, ib_device);
  370. struct ehca_mr *e_mr = container_of(mr, struct ehca_mr, ib.ib_mr);
  371. struct ehca_pd *my_pd = container_of(mr->pd, struct ehca_pd, ib_pd);
  372. u64 new_size;
  373. u64 *new_start;
  374. u32 new_acl;
  375. struct ehca_pd *new_pd;
  376. u32 tmp_lkey, tmp_rkey;
  377. unsigned long sl_flags;
  378. u32 num_kpages = 0;
  379. u32 num_hwpages = 0;
  380. struct ehca_mr_pginfo pginfo;
  381. u32 cur_pid = current->tgid;
  382. if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
  383. (my_pd->ownpid != cur_pid)) {
  384. ehca_err(mr->device, "Invalid caller pid=%x ownpid=%x",
  385. cur_pid, my_pd->ownpid);
  386. ret = -EINVAL;
  387. goto rereg_phys_mr_exit0;
  388. }
  389. if (!(mr_rereg_mask & IB_MR_REREG_TRANS)) {
  390. /* TODO not supported, because PHYP rereg hCall needs pages */
  391. ehca_err(mr->device, "rereg without IB_MR_REREG_TRANS not "
  392. "supported yet, mr_rereg_mask=%x", mr_rereg_mask);
  393. ret = -EINVAL;
  394. goto rereg_phys_mr_exit0;
  395. }
  396. if (mr_rereg_mask & IB_MR_REREG_PD) {
  397. if (!pd) {
  398. ehca_err(mr->device, "rereg with bad pd, pd=%p "
  399. "mr_rereg_mask=%x", pd, mr_rereg_mask);
  400. ret = -EINVAL;
  401. goto rereg_phys_mr_exit0;
  402. }
  403. }
  404. if ((mr_rereg_mask &
  405. ~(IB_MR_REREG_TRANS | IB_MR_REREG_PD | IB_MR_REREG_ACCESS)) ||
  406. (mr_rereg_mask == 0)) {
  407. ret = -EINVAL;
  408. goto rereg_phys_mr_exit0;
  409. }
  410. /* check other parameters */
  411. if (e_mr == shca->maxmr) {
  412. /* should be impossible, however reject to be sure */
  413. ehca_err(mr->device, "rereg internal max-MR impossible, mr=%p "
  414. "shca->maxmr=%p mr->lkey=%x",
  415. mr, shca->maxmr, mr->lkey);
  416. ret = -EINVAL;
  417. goto rereg_phys_mr_exit0;
  418. }
  419. if (mr_rereg_mask & IB_MR_REREG_TRANS) { /* transl., i.e. addr/size */
  420. if (e_mr->flags & EHCA_MR_FLAG_FMR) {
  421. ehca_err(mr->device, "not supported for FMR, mr=%p "
  422. "flags=%x", mr, e_mr->flags);
  423. ret = -EINVAL;
  424. goto rereg_phys_mr_exit0;
  425. }
  426. if (!phys_buf_array || num_phys_buf <= 0) {
  427. ehca_err(mr->device, "bad input values mr_rereg_mask=%x"
  428. " phys_buf_array=%p num_phys_buf=%x",
  429. mr_rereg_mask, phys_buf_array, num_phys_buf);
  430. ret = -EINVAL;
  431. goto rereg_phys_mr_exit0;
  432. }
  433. }
  434. if ((mr_rereg_mask & IB_MR_REREG_ACCESS) && /* change ACL */
  435. (((mr_access_flags & IB_ACCESS_REMOTE_WRITE) &&
  436. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE)) ||
  437. ((mr_access_flags & IB_ACCESS_REMOTE_ATOMIC) &&
  438. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE)))) {
  439. /*
  440. * Remote Write Access requires Local Write Access
  441. * Remote Atomic Access requires Local Write Access
  442. */
  443. ehca_err(mr->device, "bad input values: mr_rereg_mask=%x "
  444. "mr_access_flags=%x", mr_rereg_mask, mr_access_flags);
  445. ret = -EINVAL;
  446. goto rereg_phys_mr_exit0;
  447. }
  448. /* set requested values dependent on rereg request */
  449. spin_lock_irqsave(&e_mr->mrlock, sl_flags);
  450. new_start = e_mr->start;
  451. new_size = e_mr->size;
  452. new_acl = e_mr->acl;
  453. new_pd = container_of(mr->pd, struct ehca_pd, ib_pd);
  454. if (mr_rereg_mask & IB_MR_REREG_TRANS) {
  455. u64 hw_pgsize = ehca_get_max_hwpage_size(shca);
  456. new_start = iova_start; /* change address */
  457. /* check physical buffer list and calculate size */
  458. ret = ehca_mr_chk_buf_and_calc_size(phys_buf_array,
  459. num_phys_buf, iova_start,
  460. &new_size);
  461. if (ret)
  462. goto rereg_phys_mr_exit1;
  463. if ((new_size == 0) ||
  464. (((u64)iova_start + new_size) < (u64)iova_start)) {
  465. ehca_err(mr->device, "bad input values: new_size=%lx "
  466. "iova_start=%p", new_size, iova_start);
  467. ret = -EINVAL;
  468. goto rereg_phys_mr_exit1;
  469. }
  470. num_kpages = NUM_CHUNKS(((u64)new_start % PAGE_SIZE) +
  471. new_size, PAGE_SIZE);
  472. num_hwpages = NUM_CHUNKS(((u64)new_start % hw_pgsize) +
  473. new_size, hw_pgsize);
  474. memset(&pginfo, 0, sizeof(pginfo));
  475. pginfo.type = EHCA_MR_PGI_PHYS;
  476. pginfo.num_kpages = num_kpages;
  477. pginfo.hwpage_size = hw_pgsize;
  478. pginfo.num_hwpages = num_hwpages;
  479. pginfo.u.phy.num_phys_buf = num_phys_buf;
  480. pginfo.u.phy.phys_buf_array = phys_buf_array;
  481. pginfo.next_hwpage =
  482. ((u64)iova_start & ~PAGE_MASK) / hw_pgsize;
  483. }
  484. if (mr_rereg_mask & IB_MR_REREG_ACCESS)
  485. new_acl = mr_access_flags;
  486. if (mr_rereg_mask & IB_MR_REREG_PD)
  487. new_pd = container_of(pd, struct ehca_pd, ib_pd);
  488. ret = ehca_rereg_mr(shca, e_mr, new_start, new_size, new_acl,
  489. new_pd, &pginfo, &tmp_lkey, &tmp_rkey);
  490. if (ret)
  491. goto rereg_phys_mr_exit1;
  492. /* successful reregistration */
  493. if (mr_rereg_mask & IB_MR_REREG_PD)
  494. mr->pd = pd;
  495. mr->lkey = tmp_lkey;
  496. mr->rkey = tmp_rkey;
  497. rereg_phys_mr_exit1:
  498. spin_unlock_irqrestore(&e_mr->mrlock, sl_flags);
  499. rereg_phys_mr_exit0:
  500. if (ret)
  501. ehca_err(mr->device, "ret=%i mr=%p mr_rereg_mask=%x pd=%p "
  502. "phys_buf_array=%p num_phys_buf=%x mr_access_flags=%x "
  503. "iova_start=%p",
  504. ret, mr, mr_rereg_mask, pd, phys_buf_array,
  505. num_phys_buf, mr_access_flags, iova_start);
  506. return ret;
  507. } /* end ehca_rereg_phys_mr() */
  508. /*----------------------------------------------------------------------*/
  509. int ehca_query_mr(struct ib_mr *mr, struct ib_mr_attr *mr_attr)
  510. {
  511. int ret = 0;
  512. u64 h_ret;
  513. struct ehca_shca *shca =
  514. container_of(mr->device, struct ehca_shca, ib_device);
  515. struct ehca_mr *e_mr = container_of(mr, struct ehca_mr, ib.ib_mr);
  516. struct ehca_pd *my_pd = container_of(mr->pd, struct ehca_pd, ib_pd);
  517. u32 cur_pid = current->tgid;
  518. unsigned long sl_flags;
  519. struct ehca_mr_hipzout_parms hipzout;
  520. if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
  521. (my_pd->ownpid != cur_pid)) {
  522. ehca_err(mr->device, "Invalid caller pid=%x ownpid=%x",
  523. cur_pid, my_pd->ownpid);
  524. ret = -EINVAL;
  525. goto query_mr_exit0;
  526. }
  527. if ((e_mr->flags & EHCA_MR_FLAG_FMR)) {
  528. ehca_err(mr->device, "not supported for FMR, mr=%p e_mr=%p "
  529. "e_mr->flags=%x", mr, e_mr, e_mr->flags);
  530. ret = -EINVAL;
  531. goto query_mr_exit0;
  532. }
  533. memset(mr_attr, 0, sizeof(struct ib_mr_attr));
  534. spin_lock_irqsave(&e_mr->mrlock, sl_flags);
  535. h_ret = hipz_h_query_mr(shca->ipz_hca_handle, e_mr, &hipzout);
  536. if (h_ret != H_SUCCESS) {
  537. ehca_err(mr->device, "hipz_mr_query failed, h_ret=%li mr=%p "
  538. "hca_hndl=%lx mr_hndl=%lx lkey=%x",
  539. h_ret, mr, shca->ipz_hca_handle.handle,
  540. e_mr->ipz_mr_handle.handle, mr->lkey);
  541. ret = ehca2ib_return_code(h_ret);
  542. goto query_mr_exit1;
  543. }
  544. mr_attr->pd = mr->pd;
  545. mr_attr->device_virt_addr = hipzout.vaddr;
  546. mr_attr->size = hipzout.len;
  547. mr_attr->lkey = hipzout.lkey;
  548. mr_attr->rkey = hipzout.rkey;
  549. ehca_mrmw_reverse_map_acl(&hipzout.acl, &mr_attr->mr_access_flags);
  550. query_mr_exit1:
  551. spin_unlock_irqrestore(&e_mr->mrlock, sl_flags);
  552. query_mr_exit0:
  553. if (ret)
  554. ehca_err(mr->device, "ret=%i mr=%p mr_attr=%p",
  555. ret, mr, mr_attr);
  556. return ret;
  557. } /* end ehca_query_mr() */
  558. /*----------------------------------------------------------------------*/
  559. int ehca_dereg_mr(struct ib_mr *mr)
  560. {
  561. int ret = 0;
  562. u64 h_ret;
  563. struct ehca_shca *shca =
  564. container_of(mr->device, struct ehca_shca, ib_device);
  565. struct ehca_mr *e_mr = container_of(mr, struct ehca_mr, ib.ib_mr);
  566. struct ehca_pd *my_pd = container_of(mr->pd, struct ehca_pd, ib_pd);
  567. u32 cur_pid = current->tgid;
  568. if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
  569. (my_pd->ownpid != cur_pid)) {
  570. ehca_err(mr->device, "Invalid caller pid=%x ownpid=%x",
  571. cur_pid, my_pd->ownpid);
  572. ret = -EINVAL;
  573. goto dereg_mr_exit0;
  574. }
  575. if ((e_mr->flags & EHCA_MR_FLAG_FMR)) {
  576. ehca_err(mr->device, "not supported for FMR, mr=%p e_mr=%p "
  577. "e_mr->flags=%x", mr, e_mr, e_mr->flags);
  578. ret = -EINVAL;
  579. goto dereg_mr_exit0;
  580. } else if (e_mr == shca->maxmr) {
  581. /* should be impossible, however reject to be sure */
  582. ehca_err(mr->device, "dereg internal max-MR impossible, mr=%p "
  583. "shca->maxmr=%p mr->lkey=%x",
  584. mr, shca->maxmr, mr->lkey);
  585. ret = -EINVAL;
  586. goto dereg_mr_exit0;
  587. }
  588. /* TODO: BUSY: MR still has bound window(s) */
  589. h_ret = hipz_h_free_resource_mr(shca->ipz_hca_handle, e_mr);
  590. if (h_ret != H_SUCCESS) {
  591. ehca_err(mr->device, "hipz_free_mr failed, h_ret=%li shca=%p "
  592. "e_mr=%p hca_hndl=%lx mr_hndl=%lx mr->lkey=%x",
  593. h_ret, shca, e_mr, shca->ipz_hca_handle.handle,
  594. e_mr->ipz_mr_handle.handle, mr->lkey);
  595. ret = ehca2ib_return_code(h_ret);
  596. goto dereg_mr_exit0;
  597. }
  598. if (e_mr->umem)
  599. ib_umem_release(e_mr->umem);
  600. /* successful deregistration */
  601. ehca_mr_delete(e_mr);
  602. dereg_mr_exit0:
  603. if (ret)
  604. ehca_err(mr->device, "ret=%i mr=%p", ret, mr);
  605. return ret;
  606. } /* end ehca_dereg_mr() */
  607. /*----------------------------------------------------------------------*/
  608. struct ib_mw *ehca_alloc_mw(struct ib_pd *pd)
  609. {
  610. struct ib_mw *ib_mw;
  611. u64 h_ret;
  612. struct ehca_mw *e_mw;
  613. struct ehca_pd *e_pd = container_of(pd, struct ehca_pd, ib_pd);
  614. struct ehca_shca *shca =
  615. container_of(pd->device, struct ehca_shca, ib_device);
  616. struct ehca_mw_hipzout_parms hipzout;
  617. e_mw = ehca_mw_new();
  618. if (!e_mw) {
  619. ib_mw = ERR_PTR(-ENOMEM);
  620. goto alloc_mw_exit0;
  621. }
  622. h_ret = hipz_h_alloc_resource_mw(shca->ipz_hca_handle, e_mw,
  623. e_pd->fw_pd, &hipzout);
  624. if (h_ret != H_SUCCESS) {
  625. ehca_err(pd->device, "hipz_mw_allocate failed, h_ret=%li "
  626. "shca=%p hca_hndl=%lx mw=%p",
  627. h_ret, shca, shca->ipz_hca_handle.handle, e_mw);
  628. ib_mw = ERR_PTR(ehca2ib_return_code(h_ret));
  629. goto alloc_mw_exit1;
  630. }
  631. /* successful MW allocation */
  632. e_mw->ipz_mw_handle = hipzout.handle;
  633. e_mw->ib_mw.rkey = hipzout.rkey;
  634. return &e_mw->ib_mw;
  635. alloc_mw_exit1:
  636. ehca_mw_delete(e_mw);
  637. alloc_mw_exit0:
  638. if (IS_ERR(ib_mw))
  639. ehca_err(pd->device, "h_ret=%li pd=%p", PTR_ERR(ib_mw), pd);
  640. return ib_mw;
  641. } /* end ehca_alloc_mw() */
  642. /*----------------------------------------------------------------------*/
  643. int ehca_bind_mw(struct ib_qp *qp,
  644. struct ib_mw *mw,
  645. struct ib_mw_bind *mw_bind)
  646. {
  647. /* TODO: not supported up to now */
  648. ehca_gen_err("bind MW currently not supported by HCAD");
  649. return -EPERM;
  650. } /* end ehca_bind_mw() */
  651. /*----------------------------------------------------------------------*/
  652. int ehca_dealloc_mw(struct ib_mw *mw)
  653. {
  654. u64 h_ret;
  655. struct ehca_shca *shca =
  656. container_of(mw->device, struct ehca_shca, ib_device);
  657. struct ehca_mw *e_mw = container_of(mw, struct ehca_mw, ib_mw);
  658. h_ret = hipz_h_free_resource_mw(shca->ipz_hca_handle, e_mw);
  659. if (h_ret != H_SUCCESS) {
  660. ehca_err(mw->device, "hipz_free_mw failed, h_ret=%li shca=%p "
  661. "mw=%p rkey=%x hca_hndl=%lx mw_hndl=%lx",
  662. h_ret, shca, mw, mw->rkey, shca->ipz_hca_handle.handle,
  663. e_mw->ipz_mw_handle.handle);
  664. return ehca2ib_return_code(h_ret);
  665. }
  666. /* successful deallocation */
  667. ehca_mw_delete(e_mw);
  668. return 0;
  669. } /* end ehca_dealloc_mw() */
  670. /*----------------------------------------------------------------------*/
  671. struct ib_fmr *ehca_alloc_fmr(struct ib_pd *pd,
  672. int mr_access_flags,
  673. struct ib_fmr_attr *fmr_attr)
  674. {
  675. struct ib_fmr *ib_fmr;
  676. struct ehca_shca *shca =
  677. container_of(pd->device, struct ehca_shca, ib_device);
  678. struct ehca_pd *e_pd = container_of(pd, struct ehca_pd, ib_pd);
  679. struct ehca_mr *e_fmr;
  680. int ret;
  681. u32 tmp_lkey, tmp_rkey;
  682. struct ehca_mr_pginfo pginfo;
  683. u64 hw_pgsize;
  684. /* check other parameters */
  685. if (((mr_access_flags & IB_ACCESS_REMOTE_WRITE) &&
  686. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE)) ||
  687. ((mr_access_flags & IB_ACCESS_REMOTE_ATOMIC) &&
  688. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE))) {
  689. /*
  690. * Remote Write Access requires Local Write Access
  691. * Remote Atomic Access requires Local Write Access
  692. */
  693. ehca_err(pd->device, "bad input values: mr_access_flags=%x",
  694. mr_access_flags);
  695. ib_fmr = ERR_PTR(-EINVAL);
  696. goto alloc_fmr_exit0;
  697. }
  698. if (mr_access_flags & IB_ACCESS_MW_BIND) {
  699. ehca_err(pd->device, "bad input values: mr_access_flags=%x",
  700. mr_access_flags);
  701. ib_fmr = ERR_PTR(-EINVAL);
  702. goto alloc_fmr_exit0;
  703. }
  704. if ((fmr_attr->max_pages == 0) || (fmr_attr->max_maps == 0)) {
  705. ehca_err(pd->device, "bad input values: fmr_attr->max_pages=%x "
  706. "fmr_attr->max_maps=%x fmr_attr->page_shift=%x",
  707. fmr_attr->max_pages, fmr_attr->max_maps,
  708. fmr_attr->page_shift);
  709. ib_fmr = ERR_PTR(-EINVAL);
  710. goto alloc_fmr_exit0;
  711. }
  712. hw_pgsize = 1 << fmr_attr->page_shift;
  713. if (!(hw_pgsize & shca->hca_cap_mr_pgsize)) {
  714. ehca_err(pd->device, "unsupported fmr_attr->page_shift=%x",
  715. fmr_attr->page_shift);
  716. ib_fmr = ERR_PTR(-EINVAL);
  717. goto alloc_fmr_exit0;
  718. }
  719. e_fmr = ehca_mr_new();
  720. if (!e_fmr) {
  721. ib_fmr = ERR_PTR(-ENOMEM);
  722. goto alloc_fmr_exit0;
  723. }
  724. e_fmr->flags |= EHCA_MR_FLAG_FMR;
  725. /* register MR on HCA */
  726. memset(&pginfo, 0, sizeof(pginfo));
  727. pginfo.hwpage_size = hw_pgsize;
  728. /*
  729. * pginfo.num_hwpages==0, ie register_rpages() will not be called
  730. * but deferred to map_phys_fmr()
  731. */
  732. ret = ehca_reg_mr(shca, e_fmr, NULL,
  733. fmr_attr->max_pages * (1 << fmr_attr->page_shift),
  734. mr_access_flags, e_pd, &pginfo,
  735. &tmp_lkey, &tmp_rkey);
  736. if (ret) {
  737. ib_fmr = ERR_PTR(ret);
  738. goto alloc_fmr_exit1;
  739. }
  740. /* successful */
  741. e_fmr->hwpage_size = hw_pgsize;
  742. e_fmr->fmr_page_size = 1 << fmr_attr->page_shift;
  743. e_fmr->fmr_max_pages = fmr_attr->max_pages;
  744. e_fmr->fmr_max_maps = fmr_attr->max_maps;
  745. e_fmr->fmr_map_cnt = 0;
  746. return &e_fmr->ib.ib_fmr;
  747. alloc_fmr_exit1:
  748. ehca_mr_delete(e_fmr);
  749. alloc_fmr_exit0:
  750. return ib_fmr;
  751. } /* end ehca_alloc_fmr() */
  752. /*----------------------------------------------------------------------*/
  753. int ehca_map_phys_fmr(struct ib_fmr *fmr,
  754. u64 *page_list,
  755. int list_len,
  756. u64 iova)
  757. {
  758. int ret;
  759. struct ehca_shca *shca =
  760. container_of(fmr->device, struct ehca_shca, ib_device);
  761. struct ehca_mr *e_fmr = container_of(fmr, struct ehca_mr, ib.ib_fmr);
  762. struct ehca_pd *e_pd = container_of(fmr->pd, struct ehca_pd, ib_pd);
  763. struct ehca_mr_pginfo pginfo;
  764. u32 tmp_lkey, tmp_rkey;
  765. if (!(e_fmr->flags & EHCA_MR_FLAG_FMR)) {
  766. ehca_err(fmr->device, "not a FMR, e_fmr=%p e_fmr->flags=%x",
  767. e_fmr, e_fmr->flags);
  768. ret = -EINVAL;
  769. goto map_phys_fmr_exit0;
  770. }
  771. ret = ehca_fmr_check_page_list(e_fmr, page_list, list_len);
  772. if (ret)
  773. goto map_phys_fmr_exit0;
  774. if (iova % e_fmr->fmr_page_size) {
  775. /* only whole-numbered pages */
  776. ehca_err(fmr->device, "bad iova, iova=%lx fmr_page_size=%x",
  777. iova, e_fmr->fmr_page_size);
  778. ret = -EINVAL;
  779. goto map_phys_fmr_exit0;
  780. }
  781. if (e_fmr->fmr_map_cnt >= e_fmr->fmr_max_maps) {
  782. /* HCAD does not limit the maps, however trace this anyway */
  783. ehca_info(fmr->device, "map limit exceeded, fmr=%p "
  784. "e_fmr->fmr_map_cnt=%x e_fmr->fmr_max_maps=%x",
  785. fmr, e_fmr->fmr_map_cnt, e_fmr->fmr_max_maps);
  786. }
  787. memset(&pginfo, 0, sizeof(pginfo));
  788. pginfo.type = EHCA_MR_PGI_FMR;
  789. pginfo.num_kpages = list_len;
  790. pginfo.hwpage_size = e_fmr->hwpage_size;
  791. pginfo.num_hwpages =
  792. list_len * e_fmr->fmr_page_size / pginfo.hwpage_size;
  793. pginfo.u.fmr.page_list = page_list;
  794. pginfo.next_hwpage =
  795. (iova & (e_fmr->fmr_page_size-1)) / pginfo.hwpage_size;
  796. pginfo.u.fmr.fmr_pgsize = e_fmr->fmr_page_size;
  797. ret = ehca_rereg_mr(shca, e_fmr, (u64 *)iova,
  798. list_len * e_fmr->fmr_page_size,
  799. e_fmr->acl, e_pd, &pginfo, &tmp_lkey, &tmp_rkey);
  800. if (ret)
  801. goto map_phys_fmr_exit0;
  802. /* successful reregistration */
  803. e_fmr->fmr_map_cnt++;
  804. e_fmr->ib.ib_fmr.lkey = tmp_lkey;
  805. e_fmr->ib.ib_fmr.rkey = tmp_rkey;
  806. return 0;
  807. map_phys_fmr_exit0:
  808. if (ret)
  809. ehca_err(fmr->device, "ret=%i fmr=%p page_list=%p list_len=%x "
  810. "iova=%lx", ret, fmr, page_list, list_len, iova);
  811. return ret;
  812. } /* end ehca_map_phys_fmr() */
  813. /*----------------------------------------------------------------------*/
  814. int ehca_unmap_fmr(struct list_head *fmr_list)
  815. {
  816. int ret = 0;
  817. struct ib_fmr *ib_fmr;
  818. struct ehca_shca *shca = NULL;
  819. struct ehca_shca *prev_shca;
  820. struct ehca_mr *e_fmr;
  821. u32 num_fmr = 0;
  822. u32 unmap_fmr_cnt = 0;
  823. /* check all FMR belong to same SHCA, and check internal flag */
  824. list_for_each_entry(ib_fmr, fmr_list, list) {
  825. prev_shca = shca;
  826. if (!ib_fmr) {
  827. ehca_gen_err("bad fmr=%p in list", ib_fmr);
  828. ret = -EINVAL;
  829. goto unmap_fmr_exit0;
  830. }
  831. shca = container_of(ib_fmr->device, struct ehca_shca,
  832. ib_device);
  833. e_fmr = container_of(ib_fmr, struct ehca_mr, ib.ib_fmr);
  834. if ((shca != prev_shca) && prev_shca) {
  835. ehca_err(&shca->ib_device, "SHCA mismatch, shca=%p "
  836. "prev_shca=%p e_fmr=%p",
  837. shca, prev_shca, e_fmr);
  838. ret = -EINVAL;
  839. goto unmap_fmr_exit0;
  840. }
  841. if (!(e_fmr->flags & EHCA_MR_FLAG_FMR)) {
  842. ehca_err(&shca->ib_device, "not a FMR, e_fmr=%p "
  843. "e_fmr->flags=%x", e_fmr, e_fmr->flags);
  844. ret = -EINVAL;
  845. goto unmap_fmr_exit0;
  846. }
  847. num_fmr++;
  848. }
  849. /* loop over all FMRs to unmap */
  850. list_for_each_entry(ib_fmr, fmr_list, list) {
  851. unmap_fmr_cnt++;
  852. e_fmr = container_of(ib_fmr, struct ehca_mr, ib.ib_fmr);
  853. shca = container_of(ib_fmr->device, struct ehca_shca,
  854. ib_device);
  855. ret = ehca_unmap_one_fmr(shca, e_fmr);
  856. if (ret) {
  857. /* unmap failed, stop unmapping of rest of FMRs */
  858. ehca_err(&shca->ib_device, "unmap of one FMR failed, "
  859. "stop rest, e_fmr=%p num_fmr=%x "
  860. "unmap_fmr_cnt=%x lkey=%x", e_fmr, num_fmr,
  861. unmap_fmr_cnt, e_fmr->ib.ib_fmr.lkey);
  862. goto unmap_fmr_exit0;
  863. }
  864. }
  865. unmap_fmr_exit0:
  866. if (ret)
  867. ehca_gen_err("ret=%i fmr_list=%p num_fmr=%x unmap_fmr_cnt=%x",
  868. ret, fmr_list, num_fmr, unmap_fmr_cnt);
  869. return ret;
  870. } /* end ehca_unmap_fmr() */
  871. /*----------------------------------------------------------------------*/
  872. int ehca_dealloc_fmr(struct ib_fmr *fmr)
  873. {
  874. int ret;
  875. u64 h_ret;
  876. struct ehca_shca *shca =
  877. container_of(fmr->device, struct ehca_shca, ib_device);
  878. struct ehca_mr *e_fmr = container_of(fmr, struct ehca_mr, ib.ib_fmr);
  879. if (!(e_fmr->flags & EHCA_MR_FLAG_FMR)) {
  880. ehca_err(fmr->device, "not a FMR, e_fmr=%p e_fmr->flags=%x",
  881. e_fmr, e_fmr->flags);
  882. ret = -EINVAL;
  883. goto free_fmr_exit0;
  884. }
  885. h_ret = hipz_h_free_resource_mr(shca->ipz_hca_handle, e_fmr);
  886. if (h_ret != H_SUCCESS) {
  887. ehca_err(fmr->device, "hipz_free_mr failed, h_ret=%li e_fmr=%p "
  888. "hca_hndl=%lx fmr_hndl=%lx fmr->lkey=%x",
  889. h_ret, e_fmr, shca->ipz_hca_handle.handle,
  890. e_fmr->ipz_mr_handle.handle, fmr->lkey);
  891. ret = ehca2ib_return_code(h_ret);
  892. goto free_fmr_exit0;
  893. }
  894. /* successful deregistration */
  895. ehca_mr_delete(e_fmr);
  896. return 0;
  897. free_fmr_exit0:
  898. if (ret)
  899. ehca_err(&shca->ib_device, "ret=%i fmr=%p", ret, fmr);
  900. return ret;
  901. } /* end ehca_dealloc_fmr() */
  902. /*----------------------------------------------------------------------*/
  903. int ehca_reg_mr(struct ehca_shca *shca,
  904. struct ehca_mr *e_mr,
  905. u64 *iova_start,
  906. u64 size,
  907. int acl,
  908. struct ehca_pd *e_pd,
  909. struct ehca_mr_pginfo *pginfo,
  910. u32 *lkey, /*OUT*/
  911. u32 *rkey) /*OUT*/
  912. {
  913. int ret;
  914. u64 h_ret;
  915. u32 hipz_acl;
  916. struct ehca_mr_hipzout_parms hipzout;
  917. ehca_mrmw_map_acl(acl, &hipz_acl);
  918. ehca_mrmw_set_pgsize_hipz_acl(pginfo->hwpage_size, &hipz_acl);
  919. if (ehca_use_hp_mr == 1)
  920. hipz_acl |= 0x00000001;
  921. h_ret = hipz_h_alloc_resource_mr(shca->ipz_hca_handle, e_mr,
  922. (u64)iova_start, size, hipz_acl,
  923. e_pd->fw_pd, &hipzout);
  924. if (h_ret != H_SUCCESS) {
  925. ehca_err(&shca->ib_device, "hipz_alloc_mr failed, h_ret=%li "
  926. "hca_hndl=%lx", h_ret, shca->ipz_hca_handle.handle);
  927. ret = ehca2ib_return_code(h_ret);
  928. goto ehca_reg_mr_exit0;
  929. }
  930. e_mr->ipz_mr_handle = hipzout.handle;
  931. ret = ehca_reg_mr_rpages(shca, e_mr, pginfo);
  932. if (ret)
  933. goto ehca_reg_mr_exit1;
  934. /* successful registration */
  935. e_mr->num_kpages = pginfo->num_kpages;
  936. e_mr->num_hwpages = pginfo->num_hwpages;
  937. e_mr->hwpage_size = pginfo->hwpage_size;
  938. e_mr->start = iova_start;
  939. e_mr->size = size;
  940. e_mr->acl = acl;
  941. *lkey = hipzout.lkey;
  942. *rkey = hipzout.rkey;
  943. return 0;
  944. ehca_reg_mr_exit1:
  945. h_ret = hipz_h_free_resource_mr(shca->ipz_hca_handle, e_mr);
  946. if (h_ret != H_SUCCESS) {
  947. ehca_err(&shca->ib_device, "h_ret=%li shca=%p e_mr=%p "
  948. "iova_start=%p size=%lx acl=%x e_pd=%p lkey=%x "
  949. "pginfo=%p num_kpages=%lx num_hwpages=%lx ret=%i",
  950. h_ret, shca, e_mr, iova_start, size, acl, e_pd,
  951. hipzout.lkey, pginfo, pginfo->num_kpages,
  952. pginfo->num_hwpages, ret);
  953. ehca_err(&shca->ib_device, "internal error in ehca_reg_mr, "
  954. "not recoverable");
  955. }
  956. ehca_reg_mr_exit0:
  957. if (ret)
  958. ehca_err(&shca->ib_device, "ret=%i shca=%p e_mr=%p "
  959. "iova_start=%p size=%lx acl=%x e_pd=%p pginfo=%p "
  960. "num_kpages=%lx num_hwpages=%lx",
  961. ret, shca, e_mr, iova_start, size, acl, e_pd, pginfo,
  962. pginfo->num_kpages, pginfo->num_hwpages);
  963. return ret;
  964. } /* end ehca_reg_mr() */
  965. /*----------------------------------------------------------------------*/
  966. int ehca_reg_mr_rpages(struct ehca_shca *shca,
  967. struct ehca_mr *e_mr,
  968. struct ehca_mr_pginfo *pginfo)
  969. {
  970. int ret = 0;
  971. u64 h_ret;
  972. u32 rnum;
  973. u64 rpage;
  974. u32 i;
  975. u64 *kpage;
  976. if (!pginfo->num_hwpages) /* in case of fmr */
  977. return 0;
  978. kpage = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
  979. if (!kpage) {
  980. ehca_err(&shca->ib_device, "kpage alloc failed");
  981. ret = -ENOMEM;
  982. goto ehca_reg_mr_rpages_exit0;
  983. }
  984. /* max MAX_RPAGES ehca mr pages per register call */
  985. for (i = 0; i < NUM_CHUNKS(pginfo->num_hwpages, MAX_RPAGES); i++) {
  986. if (i == NUM_CHUNKS(pginfo->num_hwpages, MAX_RPAGES) - 1) {
  987. rnum = pginfo->num_hwpages % MAX_RPAGES; /* last shot */
  988. if (rnum == 0)
  989. rnum = MAX_RPAGES; /* last shot is full */
  990. } else
  991. rnum = MAX_RPAGES;
  992. ret = ehca_set_pagebuf(pginfo, rnum, kpage);
  993. if (ret) {
  994. ehca_err(&shca->ib_device, "ehca_set_pagebuf "
  995. "bad rc, ret=%i rnum=%x kpage=%p",
  996. ret, rnum, kpage);
  997. goto ehca_reg_mr_rpages_exit1;
  998. }
  999. if (rnum > 1) {
  1000. rpage = virt_to_abs(kpage);
  1001. if (!rpage) {
  1002. ehca_err(&shca->ib_device, "kpage=%p i=%x",
  1003. kpage, i);
  1004. ret = -EFAULT;
  1005. goto ehca_reg_mr_rpages_exit1;
  1006. }
  1007. } else
  1008. rpage = *kpage;
  1009. h_ret = hipz_h_register_rpage_mr(
  1010. shca->ipz_hca_handle, e_mr,
  1011. ehca_encode_hwpage_size(pginfo->hwpage_size),
  1012. 0, rpage, rnum);
  1013. if (i == NUM_CHUNKS(pginfo->num_hwpages, MAX_RPAGES) - 1) {
  1014. /*
  1015. * check for 'registration complete'==H_SUCCESS
  1016. * and for 'page registered'==H_PAGE_REGISTERED
  1017. */
  1018. if (h_ret != H_SUCCESS) {
  1019. ehca_err(&shca->ib_device, "last "
  1020. "hipz_reg_rpage_mr failed, h_ret=%li "
  1021. "e_mr=%p i=%x hca_hndl=%lx mr_hndl=%lx"
  1022. " lkey=%x", h_ret, e_mr, i,
  1023. shca->ipz_hca_handle.handle,
  1024. e_mr->ipz_mr_handle.handle,
  1025. e_mr->ib.ib_mr.lkey);
  1026. ret = ehca2ib_return_code(h_ret);
  1027. break;
  1028. } else
  1029. ret = 0;
  1030. } else if (h_ret != H_PAGE_REGISTERED) {
  1031. ehca_err(&shca->ib_device, "hipz_reg_rpage_mr failed, "
  1032. "h_ret=%li e_mr=%p i=%x lkey=%x hca_hndl=%lx "
  1033. "mr_hndl=%lx", h_ret, e_mr, i,
  1034. e_mr->ib.ib_mr.lkey,
  1035. shca->ipz_hca_handle.handle,
  1036. e_mr->ipz_mr_handle.handle);
  1037. ret = ehca2ib_return_code(h_ret);
  1038. break;
  1039. } else
  1040. ret = 0;
  1041. } /* end for(i) */
  1042. ehca_reg_mr_rpages_exit1:
  1043. ehca_free_fw_ctrlblock(kpage);
  1044. ehca_reg_mr_rpages_exit0:
  1045. if (ret)
  1046. ehca_err(&shca->ib_device, "ret=%i shca=%p e_mr=%p pginfo=%p "
  1047. "num_kpages=%lx num_hwpages=%lx", ret, shca, e_mr,
  1048. pginfo, pginfo->num_kpages, pginfo->num_hwpages);
  1049. return ret;
  1050. } /* end ehca_reg_mr_rpages() */
  1051. /*----------------------------------------------------------------------*/
  1052. inline int ehca_rereg_mr_rereg1(struct ehca_shca *shca,
  1053. struct ehca_mr *e_mr,
  1054. u64 *iova_start,
  1055. u64 size,
  1056. u32 acl,
  1057. struct ehca_pd *e_pd,
  1058. struct ehca_mr_pginfo *pginfo,
  1059. u32 *lkey, /*OUT*/
  1060. u32 *rkey) /*OUT*/
  1061. {
  1062. int ret;
  1063. u64 h_ret;
  1064. u32 hipz_acl;
  1065. u64 *kpage;
  1066. u64 rpage;
  1067. struct ehca_mr_pginfo pginfo_save;
  1068. struct ehca_mr_hipzout_parms hipzout;
  1069. ehca_mrmw_map_acl(acl, &hipz_acl);
  1070. ehca_mrmw_set_pgsize_hipz_acl(pginfo->hwpage_size, &hipz_acl);
  1071. kpage = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
  1072. if (!kpage) {
  1073. ehca_err(&shca->ib_device, "kpage alloc failed");
  1074. ret = -ENOMEM;
  1075. goto ehca_rereg_mr_rereg1_exit0;
  1076. }
  1077. pginfo_save = *pginfo;
  1078. ret = ehca_set_pagebuf(pginfo, pginfo->num_hwpages, kpage);
  1079. if (ret) {
  1080. ehca_err(&shca->ib_device, "set pagebuf failed, e_mr=%p "
  1081. "pginfo=%p type=%x num_kpages=%lx num_hwpages=%lx "
  1082. "kpage=%p", e_mr, pginfo, pginfo->type,
  1083. pginfo->num_kpages, pginfo->num_hwpages, kpage);
  1084. goto ehca_rereg_mr_rereg1_exit1;
  1085. }
  1086. rpage = virt_to_abs(kpage);
  1087. if (!rpage) {
  1088. ehca_err(&shca->ib_device, "kpage=%p", kpage);
  1089. ret = -EFAULT;
  1090. goto ehca_rereg_mr_rereg1_exit1;
  1091. }
  1092. h_ret = hipz_h_reregister_pmr(shca->ipz_hca_handle, e_mr,
  1093. (u64)iova_start, size, hipz_acl,
  1094. e_pd->fw_pd, rpage, &hipzout);
  1095. if (h_ret != H_SUCCESS) {
  1096. /*
  1097. * reregistration unsuccessful, try it again with the 3 hCalls,
  1098. * e.g. this is required in case H_MR_CONDITION
  1099. * (MW bound or MR is shared)
  1100. */
  1101. ehca_warn(&shca->ib_device, "hipz_h_reregister_pmr failed "
  1102. "(Rereg1), h_ret=%li e_mr=%p", h_ret, e_mr);
  1103. *pginfo = pginfo_save;
  1104. ret = -EAGAIN;
  1105. } else if ((u64 *)hipzout.vaddr != iova_start) {
  1106. ehca_err(&shca->ib_device, "PHYP changed iova_start in "
  1107. "rereg_pmr, iova_start=%p iova_start_out=%lx e_mr=%p "
  1108. "mr_handle=%lx lkey=%x lkey_out=%x", iova_start,
  1109. hipzout.vaddr, e_mr, e_mr->ipz_mr_handle.handle,
  1110. e_mr->ib.ib_mr.lkey, hipzout.lkey);
  1111. ret = -EFAULT;
  1112. } else {
  1113. /*
  1114. * successful reregistration
  1115. * note: start and start_out are identical for eServer HCAs
  1116. */
  1117. e_mr->num_kpages = pginfo->num_kpages;
  1118. e_mr->num_hwpages = pginfo->num_hwpages;
  1119. e_mr->hwpage_size = pginfo->hwpage_size;
  1120. e_mr->start = iova_start;
  1121. e_mr->size = size;
  1122. e_mr->acl = acl;
  1123. *lkey = hipzout.lkey;
  1124. *rkey = hipzout.rkey;
  1125. }
  1126. ehca_rereg_mr_rereg1_exit1:
  1127. ehca_free_fw_ctrlblock(kpage);
  1128. ehca_rereg_mr_rereg1_exit0:
  1129. if ( ret && (ret != -EAGAIN) )
  1130. ehca_err(&shca->ib_device, "ret=%i lkey=%x rkey=%x "
  1131. "pginfo=%p num_kpages=%lx num_hwpages=%lx",
  1132. ret, *lkey, *rkey, pginfo, pginfo->num_kpages,
  1133. pginfo->num_hwpages);
  1134. return ret;
  1135. } /* end ehca_rereg_mr_rereg1() */
  1136. /*----------------------------------------------------------------------*/
  1137. int ehca_rereg_mr(struct ehca_shca *shca,
  1138. struct ehca_mr *e_mr,
  1139. u64 *iova_start,
  1140. u64 size,
  1141. int acl,
  1142. struct ehca_pd *e_pd,
  1143. struct ehca_mr_pginfo *pginfo,
  1144. u32 *lkey,
  1145. u32 *rkey)
  1146. {
  1147. int ret = 0;
  1148. u64 h_ret;
  1149. int rereg_1_hcall = 1; /* 1: use hipz_h_reregister_pmr directly */
  1150. int rereg_3_hcall = 0; /* 1: use 3 hipz calls for reregistration */
  1151. /* first determine reregistration hCall(s) */
  1152. if ((pginfo->num_hwpages > MAX_RPAGES) ||
  1153. (e_mr->num_hwpages > MAX_RPAGES) ||
  1154. (pginfo->num_hwpages > e_mr->num_hwpages)) {
  1155. ehca_dbg(&shca->ib_device, "Rereg3 case, "
  1156. "pginfo->num_hwpages=%lx e_mr->num_hwpages=%x",
  1157. pginfo->num_hwpages, e_mr->num_hwpages);
  1158. rereg_1_hcall = 0;
  1159. rereg_3_hcall = 1;
  1160. }
  1161. if (e_mr->flags & EHCA_MR_FLAG_MAXMR) { /* check for max-MR */
  1162. rereg_1_hcall = 0;
  1163. rereg_3_hcall = 1;
  1164. e_mr->flags &= ~EHCA_MR_FLAG_MAXMR;
  1165. ehca_err(&shca->ib_device, "Rereg MR for max-MR! e_mr=%p",
  1166. e_mr);
  1167. }
  1168. if (rereg_1_hcall) {
  1169. ret = ehca_rereg_mr_rereg1(shca, e_mr, iova_start, size,
  1170. acl, e_pd, pginfo, lkey, rkey);
  1171. if (ret) {
  1172. if (ret == -EAGAIN)
  1173. rereg_3_hcall = 1;
  1174. else
  1175. goto ehca_rereg_mr_exit0;
  1176. }
  1177. }
  1178. if (rereg_3_hcall) {
  1179. struct ehca_mr save_mr;
  1180. /* first deregister old MR */
  1181. h_ret = hipz_h_free_resource_mr(shca->ipz_hca_handle, e_mr);
  1182. if (h_ret != H_SUCCESS) {
  1183. ehca_err(&shca->ib_device, "hipz_free_mr failed, "
  1184. "h_ret=%li e_mr=%p hca_hndl=%lx mr_hndl=%lx "
  1185. "mr->lkey=%x",
  1186. h_ret, e_mr, shca->ipz_hca_handle.handle,
  1187. e_mr->ipz_mr_handle.handle,
  1188. e_mr->ib.ib_mr.lkey);
  1189. ret = ehca2ib_return_code(h_ret);
  1190. goto ehca_rereg_mr_exit0;
  1191. }
  1192. /* clean ehca_mr_t, without changing struct ib_mr and lock */
  1193. save_mr = *e_mr;
  1194. ehca_mr_deletenew(e_mr);
  1195. /* set some MR values */
  1196. e_mr->flags = save_mr.flags;
  1197. e_mr->hwpage_size = save_mr.hwpage_size;
  1198. e_mr->fmr_page_size = save_mr.fmr_page_size;
  1199. e_mr->fmr_max_pages = save_mr.fmr_max_pages;
  1200. e_mr->fmr_max_maps = save_mr.fmr_max_maps;
  1201. e_mr->fmr_map_cnt = save_mr.fmr_map_cnt;
  1202. ret = ehca_reg_mr(shca, e_mr, iova_start, size, acl,
  1203. e_pd, pginfo, lkey, rkey);
  1204. if (ret) {
  1205. u32 offset = (u64)(&e_mr->flags) - (u64)e_mr;
  1206. memcpy(&e_mr->flags, &(save_mr.flags),
  1207. sizeof(struct ehca_mr) - offset);
  1208. goto ehca_rereg_mr_exit0;
  1209. }
  1210. }
  1211. ehca_rereg_mr_exit0:
  1212. if (ret)
  1213. ehca_err(&shca->ib_device, "ret=%i shca=%p e_mr=%p "
  1214. "iova_start=%p size=%lx acl=%x e_pd=%p pginfo=%p "
  1215. "num_kpages=%lx lkey=%x rkey=%x rereg_1_hcall=%x "
  1216. "rereg_3_hcall=%x", ret, shca, e_mr, iova_start, size,
  1217. acl, e_pd, pginfo, pginfo->num_kpages, *lkey, *rkey,
  1218. rereg_1_hcall, rereg_3_hcall);
  1219. return ret;
  1220. } /* end ehca_rereg_mr() */
  1221. /*----------------------------------------------------------------------*/
  1222. int ehca_unmap_one_fmr(struct ehca_shca *shca,
  1223. struct ehca_mr *e_fmr)
  1224. {
  1225. int ret = 0;
  1226. u64 h_ret;
  1227. struct ehca_pd *e_pd =
  1228. container_of(e_fmr->ib.ib_fmr.pd, struct ehca_pd, ib_pd);
  1229. struct ehca_mr save_fmr;
  1230. u32 tmp_lkey, tmp_rkey;
  1231. struct ehca_mr_pginfo pginfo;
  1232. struct ehca_mr_hipzout_parms hipzout;
  1233. struct ehca_mr save_mr;
  1234. if (e_fmr->fmr_max_pages <= MAX_RPAGES) {
  1235. /*
  1236. * note: after using rereg hcall with len=0,
  1237. * rereg hcall must be used again for registering pages
  1238. */
  1239. h_ret = hipz_h_reregister_pmr(shca->ipz_hca_handle, e_fmr, 0,
  1240. 0, 0, e_pd->fw_pd, 0, &hipzout);
  1241. if (h_ret == H_SUCCESS) {
  1242. /* successful reregistration */
  1243. e_fmr->start = NULL;
  1244. e_fmr->size = 0;
  1245. tmp_lkey = hipzout.lkey;
  1246. tmp_rkey = hipzout.rkey;
  1247. return 0;
  1248. }
  1249. /*
  1250. * should not happen, because length checked above,
  1251. * FMRs are not shared and no MW bound to FMRs
  1252. */
  1253. ehca_err(&shca->ib_device, "hipz_reregister_pmr failed "
  1254. "(Rereg1), h_ret=%li e_fmr=%p hca_hndl=%lx "
  1255. "mr_hndl=%lx lkey=%x lkey_out=%x",
  1256. h_ret, e_fmr, shca->ipz_hca_handle.handle,
  1257. e_fmr->ipz_mr_handle.handle,
  1258. e_fmr->ib.ib_fmr.lkey, hipzout.lkey);
  1259. /* try free and rereg */
  1260. }
  1261. /* first free old FMR */
  1262. h_ret = hipz_h_free_resource_mr(shca->ipz_hca_handle, e_fmr);
  1263. if (h_ret != H_SUCCESS) {
  1264. ehca_err(&shca->ib_device, "hipz_free_mr failed, "
  1265. "h_ret=%li e_fmr=%p hca_hndl=%lx mr_hndl=%lx "
  1266. "lkey=%x",
  1267. h_ret, e_fmr, shca->ipz_hca_handle.handle,
  1268. e_fmr->ipz_mr_handle.handle,
  1269. e_fmr->ib.ib_fmr.lkey);
  1270. ret = ehca2ib_return_code(h_ret);
  1271. goto ehca_unmap_one_fmr_exit0;
  1272. }
  1273. /* clean ehca_mr_t, without changing lock */
  1274. save_fmr = *e_fmr;
  1275. ehca_mr_deletenew(e_fmr);
  1276. /* set some MR values */
  1277. e_fmr->flags = save_fmr.flags;
  1278. e_fmr->hwpage_size = save_fmr.hwpage_size;
  1279. e_fmr->fmr_page_size = save_fmr.fmr_page_size;
  1280. e_fmr->fmr_max_pages = save_fmr.fmr_max_pages;
  1281. e_fmr->fmr_max_maps = save_fmr.fmr_max_maps;
  1282. e_fmr->fmr_map_cnt = save_fmr.fmr_map_cnt;
  1283. e_fmr->acl = save_fmr.acl;
  1284. memset(&pginfo, 0, sizeof(pginfo));
  1285. pginfo.type = EHCA_MR_PGI_FMR;
  1286. ret = ehca_reg_mr(shca, e_fmr, NULL,
  1287. (e_fmr->fmr_max_pages * e_fmr->fmr_page_size),
  1288. e_fmr->acl, e_pd, &pginfo, &tmp_lkey,
  1289. &tmp_rkey);
  1290. if (ret) {
  1291. u32 offset = (u64)(&e_fmr->flags) - (u64)e_fmr;
  1292. memcpy(&e_fmr->flags, &(save_mr.flags),
  1293. sizeof(struct ehca_mr) - offset);
  1294. }
  1295. ehca_unmap_one_fmr_exit0:
  1296. if (ret)
  1297. ehca_err(&shca->ib_device, "ret=%i tmp_lkey=%x tmp_rkey=%x "
  1298. "fmr_max_pages=%x",
  1299. ret, tmp_lkey, tmp_rkey, e_fmr->fmr_max_pages);
  1300. return ret;
  1301. } /* end ehca_unmap_one_fmr() */
  1302. /*----------------------------------------------------------------------*/
  1303. int ehca_reg_smr(struct ehca_shca *shca,
  1304. struct ehca_mr *e_origmr,
  1305. struct ehca_mr *e_newmr,
  1306. u64 *iova_start,
  1307. int acl,
  1308. struct ehca_pd *e_pd,
  1309. u32 *lkey, /*OUT*/
  1310. u32 *rkey) /*OUT*/
  1311. {
  1312. int ret = 0;
  1313. u64 h_ret;
  1314. u32 hipz_acl;
  1315. struct ehca_mr_hipzout_parms hipzout;
  1316. ehca_mrmw_map_acl(acl, &hipz_acl);
  1317. ehca_mrmw_set_pgsize_hipz_acl(e_origmr->hwpage_size, &hipz_acl);
  1318. h_ret = hipz_h_register_smr(shca->ipz_hca_handle, e_newmr, e_origmr,
  1319. (u64)iova_start, hipz_acl, e_pd->fw_pd,
  1320. &hipzout);
  1321. if (h_ret != H_SUCCESS) {
  1322. ehca_err(&shca->ib_device, "hipz_reg_smr failed, h_ret=%li "
  1323. "shca=%p e_origmr=%p e_newmr=%p iova_start=%p acl=%x "
  1324. "e_pd=%p hca_hndl=%lx mr_hndl=%lx lkey=%x",
  1325. h_ret, shca, e_origmr, e_newmr, iova_start, acl, e_pd,
  1326. shca->ipz_hca_handle.handle,
  1327. e_origmr->ipz_mr_handle.handle,
  1328. e_origmr->ib.ib_mr.lkey);
  1329. ret = ehca2ib_return_code(h_ret);
  1330. goto ehca_reg_smr_exit0;
  1331. }
  1332. /* successful registration */
  1333. e_newmr->num_kpages = e_origmr->num_kpages;
  1334. e_newmr->num_hwpages = e_origmr->num_hwpages;
  1335. e_newmr->hwpage_size = e_origmr->hwpage_size;
  1336. e_newmr->start = iova_start;
  1337. e_newmr->size = e_origmr->size;
  1338. e_newmr->acl = acl;
  1339. e_newmr->ipz_mr_handle = hipzout.handle;
  1340. *lkey = hipzout.lkey;
  1341. *rkey = hipzout.rkey;
  1342. return 0;
  1343. ehca_reg_smr_exit0:
  1344. if (ret)
  1345. ehca_err(&shca->ib_device, "ret=%i shca=%p e_origmr=%p "
  1346. "e_newmr=%p iova_start=%p acl=%x e_pd=%p",
  1347. ret, shca, e_origmr, e_newmr, iova_start, acl, e_pd);
  1348. return ret;
  1349. } /* end ehca_reg_smr() */
  1350. /*----------------------------------------------------------------------*/
  1351. /* register internal max-MR to internal SHCA */
  1352. int ehca_reg_internal_maxmr(
  1353. struct ehca_shca *shca,
  1354. struct ehca_pd *e_pd,
  1355. struct ehca_mr **e_maxmr) /*OUT*/
  1356. {
  1357. int ret;
  1358. struct ehca_mr *e_mr;
  1359. u64 *iova_start;
  1360. u64 size_maxmr;
  1361. struct ehca_mr_pginfo pginfo;
  1362. struct ib_phys_buf ib_pbuf;
  1363. u32 num_kpages;
  1364. u32 num_hwpages;
  1365. u64 hw_pgsize;
  1366. e_mr = ehca_mr_new();
  1367. if (!e_mr) {
  1368. ehca_err(&shca->ib_device, "out of memory");
  1369. ret = -ENOMEM;
  1370. goto ehca_reg_internal_maxmr_exit0;
  1371. }
  1372. e_mr->flags |= EHCA_MR_FLAG_MAXMR;
  1373. /* register internal max-MR on HCA */
  1374. size_maxmr = (u64)high_memory - PAGE_OFFSET;
  1375. iova_start = (u64 *)KERNELBASE;
  1376. ib_pbuf.addr = 0;
  1377. ib_pbuf.size = size_maxmr;
  1378. num_kpages = NUM_CHUNKS(((u64)iova_start % PAGE_SIZE) + size_maxmr,
  1379. PAGE_SIZE);
  1380. hw_pgsize = ehca_get_max_hwpage_size(shca);
  1381. num_hwpages = NUM_CHUNKS(((u64)iova_start % hw_pgsize) + size_maxmr,
  1382. hw_pgsize);
  1383. memset(&pginfo, 0, sizeof(pginfo));
  1384. pginfo.type = EHCA_MR_PGI_PHYS;
  1385. pginfo.num_kpages = num_kpages;
  1386. pginfo.num_hwpages = num_hwpages;
  1387. pginfo.hwpage_size = hw_pgsize;
  1388. pginfo.u.phy.num_phys_buf = 1;
  1389. pginfo.u.phy.phys_buf_array = &ib_pbuf;
  1390. ret = ehca_reg_mr(shca, e_mr, iova_start, size_maxmr, 0, e_pd,
  1391. &pginfo, &e_mr->ib.ib_mr.lkey,
  1392. &e_mr->ib.ib_mr.rkey);
  1393. if (ret) {
  1394. ehca_err(&shca->ib_device, "reg of internal max MR failed, "
  1395. "e_mr=%p iova_start=%p size_maxmr=%lx num_kpages=%x "
  1396. "num_hwpages=%x", e_mr, iova_start, size_maxmr,
  1397. num_kpages, num_hwpages);
  1398. goto ehca_reg_internal_maxmr_exit1;
  1399. }
  1400. /* successful registration of all pages */
  1401. e_mr->ib.ib_mr.device = e_pd->ib_pd.device;
  1402. e_mr->ib.ib_mr.pd = &e_pd->ib_pd;
  1403. e_mr->ib.ib_mr.uobject = NULL;
  1404. atomic_inc(&(e_pd->ib_pd.usecnt));
  1405. atomic_set(&(e_mr->ib.ib_mr.usecnt), 0);
  1406. *e_maxmr = e_mr;
  1407. return 0;
  1408. ehca_reg_internal_maxmr_exit1:
  1409. ehca_mr_delete(e_mr);
  1410. ehca_reg_internal_maxmr_exit0:
  1411. if (ret)
  1412. ehca_err(&shca->ib_device, "ret=%i shca=%p e_pd=%p e_maxmr=%p",
  1413. ret, shca, e_pd, e_maxmr);
  1414. return ret;
  1415. } /* end ehca_reg_internal_maxmr() */
  1416. /*----------------------------------------------------------------------*/
  1417. int ehca_reg_maxmr(struct ehca_shca *shca,
  1418. struct ehca_mr *e_newmr,
  1419. u64 *iova_start,
  1420. int acl,
  1421. struct ehca_pd *e_pd,
  1422. u32 *lkey,
  1423. u32 *rkey)
  1424. {
  1425. u64 h_ret;
  1426. struct ehca_mr *e_origmr = shca->maxmr;
  1427. u32 hipz_acl;
  1428. struct ehca_mr_hipzout_parms hipzout;
  1429. ehca_mrmw_map_acl(acl, &hipz_acl);
  1430. ehca_mrmw_set_pgsize_hipz_acl(e_origmr->hwpage_size, &hipz_acl);
  1431. h_ret = hipz_h_register_smr(shca->ipz_hca_handle, e_newmr, e_origmr,
  1432. (u64)iova_start, hipz_acl, e_pd->fw_pd,
  1433. &hipzout);
  1434. if (h_ret != H_SUCCESS) {
  1435. ehca_err(&shca->ib_device, "hipz_reg_smr failed, h_ret=%li "
  1436. "e_origmr=%p hca_hndl=%lx mr_hndl=%lx lkey=%x",
  1437. h_ret, e_origmr, shca->ipz_hca_handle.handle,
  1438. e_origmr->ipz_mr_handle.handle,
  1439. e_origmr->ib.ib_mr.lkey);
  1440. return ehca2ib_return_code(h_ret);
  1441. }
  1442. /* successful registration */
  1443. e_newmr->num_kpages = e_origmr->num_kpages;
  1444. e_newmr->num_hwpages = e_origmr->num_hwpages;
  1445. e_newmr->hwpage_size = e_origmr->hwpage_size;
  1446. e_newmr->start = iova_start;
  1447. e_newmr->size = e_origmr->size;
  1448. e_newmr->acl = acl;
  1449. e_newmr->ipz_mr_handle = hipzout.handle;
  1450. *lkey = hipzout.lkey;
  1451. *rkey = hipzout.rkey;
  1452. return 0;
  1453. } /* end ehca_reg_maxmr() */
  1454. /*----------------------------------------------------------------------*/
  1455. int ehca_dereg_internal_maxmr(struct ehca_shca *shca)
  1456. {
  1457. int ret;
  1458. struct ehca_mr *e_maxmr;
  1459. struct ib_pd *ib_pd;
  1460. if (!shca->maxmr) {
  1461. ehca_err(&shca->ib_device, "bad call, shca=%p", shca);
  1462. ret = -EINVAL;
  1463. goto ehca_dereg_internal_maxmr_exit0;
  1464. }
  1465. e_maxmr = shca->maxmr;
  1466. ib_pd = e_maxmr->ib.ib_mr.pd;
  1467. shca->maxmr = NULL; /* remove internal max-MR indication from SHCA */
  1468. ret = ehca_dereg_mr(&e_maxmr->ib.ib_mr);
  1469. if (ret) {
  1470. ehca_err(&shca->ib_device, "dereg internal max-MR failed, "
  1471. "ret=%i e_maxmr=%p shca=%p lkey=%x",
  1472. ret, e_maxmr, shca, e_maxmr->ib.ib_mr.lkey);
  1473. shca->maxmr = e_maxmr;
  1474. goto ehca_dereg_internal_maxmr_exit0;
  1475. }
  1476. atomic_dec(&ib_pd->usecnt);
  1477. ehca_dereg_internal_maxmr_exit0:
  1478. if (ret)
  1479. ehca_err(&shca->ib_device, "ret=%i shca=%p shca->maxmr=%p",
  1480. ret, shca, shca->maxmr);
  1481. return ret;
  1482. } /* end ehca_dereg_internal_maxmr() */
  1483. /*----------------------------------------------------------------------*/
  1484. /*
  1485. * check physical buffer array of MR verbs for validness and
  1486. * calculates MR size
  1487. */
  1488. int ehca_mr_chk_buf_and_calc_size(struct ib_phys_buf *phys_buf_array,
  1489. int num_phys_buf,
  1490. u64 *iova_start,
  1491. u64 *size)
  1492. {
  1493. struct ib_phys_buf *pbuf = phys_buf_array;
  1494. u64 size_count = 0;
  1495. u32 i;
  1496. if (num_phys_buf == 0) {
  1497. ehca_gen_err("bad phys buf array len, num_phys_buf=0");
  1498. return -EINVAL;
  1499. }
  1500. /* check first buffer */
  1501. if (((u64)iova_start & ~PAGE_MASK) != (pbuf->addr & ~PAGE_MASK)) {
  1502. ehca_gen_err("iova_start/addr mismatch, iova_start=%p "
  1503. "pbuf->addr=%lx pbuf->size=%lx",
  1504. iova_start, pbuf->addr, pbuf->size);
  1505. return -EINVAL;
  1506. }
  1507. if (((pbuf->addr + pbuf->size) % PAGE_SIZE) &&
  1508. (num_phys_buf > 1)) {
  1509. ehca_gen_err("addr/size mismatch in 1st buf, pbuf->addr=%lx "
  1510. "pbuf->size=%lx", pbuf->addr, pbuf->size);
  1511. return -EINVAL;
  1512. }
  1513. for (i = 0; i < num_phys_buf; i++) {
  1514. if ((i > 0) && (pbuf->addr % PAGE_SIZE)) {
  1515. ehca_gen_err("bad address, i=%x pbuf->addr=%lx "
  1516. "pbuf->size=%lx",
  1517. i, pbuf->addr, pbuf->size);
  1518. return -EINVAL;
  1519. }
  1520. if (((i > 0) && /* not 1st */
  1521. (i < (num_phys_buf - 1)) && /* not last */
  1522. (pbuf->size % PAGE_SIZE)) || (pbuf->size == 0)) {
  1523. ehca_gen_err("bad size, i=%x pbuf->size=%lx",
  1524. i, pbuf->size);
  1525. return -EINVAL;
  1526. }
  1527. size_count += pbuf->size;
  1528. pbuf++;
  1529. }
  1530. *size = size_count;
  1531. return 0;
  1532. } /* end ehca_mr_chk_buf_and_calc_size() */
  1533. /*----------------------------------------------------------------------*/
  1534. /* check page list of map FMR verb for validness */
  1535. int ehca_fmr_check_page_list(struct ehca_mr *e_fmr,
  1536. u64 *page_list,
  1537. int list_len)
  1538. {
  1539. u32 i;
  1540. u64 *page;
  1541. if ((list_len == 0) || (list_len > e_fmr->fmr_max_pages)) {
  1542. ehca_gen_err("bad list_len, list_len=%x "
  1543. "e_fmr->fmr_max_pages=%x fmr=%p",
  1544. list_len, e_fmr->fmr_max_pages, e_fmr);
  1545. return -EINVAL;
  1546. }
  1547. /* each page must be aligned */
  1548. page = page_list;
  1549. for (i = 0; i < list_len; i++) {
  1550. if (*page % e_fmr->fmr_page_size) {
  1551. ehca_gen_err("bad page, i=%x *page=%lx page=%p fmr=%p "
  1552. "fmr_page_size=%x", i, *page, page, e_fmr,
  1553. e_fmr->fmr_page_size);
  1554. return -EINVAL;
  1555. }
  1556. page++;
  1557. }
  1558. return 0;
  1559. } /* end ehca_fmr_check_page_list() */
  1560. /*----------------------------------------------------------------------*/
  1561. /* PAGE_SIZE >= pginfo->hwpage_size */
  1562. static int ehca_set_pagebuf_user1(struct ehca_mr_pginfo *pginfo,
  1563. u32 number,
  1564. u64 *kpage)
  1565. {
  1566. int ret = 0;
  1567. struct ib_umem_chunk *prev_chunk;
  1568. struct ib_umem_chunk *chunk;
  1569. u64 pgaddr;
  1570. u32 i = 0;
  1571. u32 j = 0;
  1572. int hwpages_per_kpage = PAGE_SIZE / pginfo->hwpage_size;
  1573. /* loop over desired chunk entries */
  1574. chunk = pginfo->u.usr.next_chunk;
  1575. prev_chunk = pginfo->u.usr.next_chunk;
  1576. list_for_each_entry_continue(
  1577. chunk, (&(pginfo->u.usr.region->chunk_list)), list) {
  1578. for (i = pginfo->u.usr.next_nmap; i < chunk->nmap; ) {
  1579. pgaddr = page_to_pfn(sg_page(&chunk->page_list[i]))
  1580. << PAGE_SHIFT ;
  1581. *kpage = phys_to_abs(pgaddr +
  1582. (pginfo->next_hwpage *
  1583. pginfo->hwpage_size));
  1584. if ( !(*kpage) ) {
  1585. ehca_gen_err("pgaddr=%lx "
  1586. "chunk->page_list[i]=%lx "
  1587. "i=%x next_hwpage=%lx",
  1588. pgaddr, (u64)sg_dma_address(
  1589. &chunk->page_list[i]),
  1590. i, pginfo->next_hwpage);
  1591. return -EFAULT;
  1592. }
  1593. (pginfo->hwpage_cnt)++;
  1594. (pginfo->next_hwpage)++;
  1595. kpage++;
  1596. if (pginfo->next_hwpage % hwpages_per_kpage == 0) {
  1597. (pginfo->kpage_cnt)++;
  1598. (pginfo->u.usr.next_nmap)++;
  1599. pginfo->next_hwpage = 0;
  1600. i++;
  1601. }
  1602. j++;
  1603. if (j >= number) break;
  1604. }
  1605. if ((pginfo->u.usr.next_nmap >= chunk->nmap) &&
  1606. (j >= number)) {
  1607. pginfo->u.usr.next_nmap = 0;
  1608. prev_chunk = chunk;
  1609. break;
  1610. } else if (pginfo->u.usr.next_nmap >= chunk->nmap) {
  1611. pginfo->u.usr.next_nmap = 0;
  1612. prev_chunk = chunk;
  1613. } else if (j >= number)
  1614. break;
  1615. else
  1616. prev_chunk = chunk;
  1617. }
  1618. pginfo->u.usr.next_chunk =
  1619. list_prepare_entry(prev_chunk,
  1620. (&(pginfo->u.usr.region->chunk_list)),
  1621. list);
  1622. return ret;
  1623. }
  1624. /*
  1625. * check given pages for contiguous layout
  1626. * last page addr is returned in prev_pgaddr for further check
  1627. */
  1628. static int ehca_check_kpages_per_ate(struct scatterlist *page_list,
  1629. int start_idx, int end_idx,
  1630. u64 *prev_pgaddr)
  1631. {
  1632. int t;
  1633. for (t = start_idx; t <= end_idx; t++) {
  1634. u64 pgaddr = page_to_pfn(sg_page(&page_list[t])) << PAGE_SHIFT;
  1635. ehca_gen_dbg("chunk_page=%lx value=%016lx", pgaddr,
  1636. *(u64 *)abs_to_virt(phys_to_abs(pgaddr)));
  1637. if (pgaddr - PAGE_SIZE != *prev_pgaddr) {
  1638. ehca_gen_err("uncontiguous page found pgaddr=%lx "
  1639. "prev_pgaddr=%lx page_list_i=%x",
  1640. pgaddr, *prev_pgaddr, t);
  1641. return -EINVAL;
  1642. }
  1643. *prev_pgaddr = pgaddr;
  1644. }
  1645. return 0;
  1646. }
  1647. /* PAGE_SIZE < pginfo->hwpage_size */
  1648. static int ehca_set_pagebuf_user2(struct ehca_mr_pginfo *pginfo,
  1649. u32 number,
  1650. u64 *kpage)
  1651. {
  1652. int ret = 0;
  1653. struct ib_umem_chunk *prev_chunk;
  1654. struct ib_umem_chunk *chunk;
  1655. u64 pgaddr, prev_pgaddr;
  1656. u32 i = 0;
  1657. u32 j = 0;
  1658. int kpages_per_hwpage = pginfo->hwpage_size / PAGE_SIZE;
  1659. int nr_kpages = kpages_per_hwpage;
  1660. /* loop over desired chunk entries */
  1661. chunk = pginfo->u.usr.next_chunk;
  1662. prev_chunk = pginfo->u.usr.next_chunk;
  1663. list_for_each_entry_continue(
  1664. chunk, (&(pginfo->u.usr.region->chunk_list)), list) {
  1665. for (i = pginfo->u.usr.next_nmap; i < chunk->nmap; ) {
  1666. if (nr_kpages == kpages_per_hwpage) {
  1667. pgaddr = ( page_to_pfn(sg_page(&chunk->page_list[i]))
  1668. << PAGE_SHIFT );
  1669. *kpage = phys_to_abs(pgaddr);
  1670. if ( !(*kpage) ) {
  1671. ehca_gen_err("pgaddr=%lx i=%x",
  1672. pgaddr, i);
  1673. ret = -EFAULT;
  1674. return ret;
  1675. }
  1676. /*
  1677. * The first page in a hwpage must be aligned;
  1678. * the first MR page is exempt from this rule.
  1679. */
  1680. if (pgaddr & (pginfo->hwpage_size - 1)) {
  1681. if (pginfo->hwpage_cnt) {
  1682. ehca_gen_err(
  1683. "invalid alignment "
  1684. "pgaddr=%lx i=%x "
  1685. "mr_pgsize=%lx",
  1686. pgaddr, i,
  1687. pginfo->hwpage_size);
  1688. ret = -EFAULT;
  1689. return ret;
  1690. }
  1691. /* first MR page */
  1692. pginfo->kpage_cnt =
  1693. (pgaddr &
  1694. (pginfo->hwpage_size - 1)) >>
  1695. PAGE_SHIFT;
  1696. nr_kpages -= pginfo->kpage_cnt;
  1697. *kpage = phys_to_abs(
  1698. pgaddr &
  1699. ~(pginfo->hwpage_size - 1));
  1700. }
  1701. ehca_gen_dbg("kpage=%lx chunk_page=%lx "
  1702. "value=%016lx", *kpage, pgaddr,
  1703. *(u64 *)abs_to_virt(
  1704. phys_to_abs(pgaddr)));
  1705. prev_pgaddr = pgaddr;
  1706. i++;
  1707. pginfo->kpage_cnt++;
  1708. pginfo->u.usr.next_nmap++;
  1709. nr_kpages--;
  1710. if (!nr_kpages)
  1711. goto next_kpage;
  1712. continue;
  1713. }
  1714. if (i + nr_kpages > chunk->nmap) {
  1715. ret = ehca_check_kpages_per_ate(
  1716. chunk->page_list, i,
  1717. chunk->nmap - 1, &prev_pgaddr);
  1718. if (ret) return ret;
  1719. pginfo->kpage_cnt += chunk->nmap - i;
  1720. pginfo->u.usr.next_nmap += chunk->nmap - i;
  1721. nr_kpages -= chunk->nmap - i;
  1722. break;
  1723. }
  1724. ret = ehca_check_kpages_per_ate(chunk->page_list, i,
  1725. i + nr_kpages - 1,
  1726. &prev_pgaddr);
  1727. if (ret) return ret;
  1728. i += nr_kpages;
  1729. pginfo->kpage_cnt += nr_kpages;
  1730. pginfo->u.usr.next_nmap += nr_kpages;
  1731. next_kpage:
  1732. nr_kpages = kpages_per_hwpage;
  1733. (pginfo->hwpage_cnt)++;
  1734. kpage++;
  1735. j++;
  1736. if (j >= number) break;
  1737. }
  1738. if ((pginfo->u.usr.next_nmap >= chunk->nmap) &&
  1739. (j >= number)) {
  1740. pginfo->u.usr.next_nmap = 0;
  1741. prev_chunk = chunk;
  1742. break;
  1743. } else if (pginfo->u.usr.next_nmap >= chunk->nmap) {
  1744. pginfo->u.usr.next_nmap = 0;
  1745. prev_chunk = chunk;
  1746. } else if (j >= number)
  1747. break;
  1748. else
  1749. prev_chunk = chunk;
  1750. }
  1751. pginfo->u.usr.next_chunk =
  1752. list_prepare_entry(prev_chunk,
  1753. (&(pginfo->u.usr.region->chunk_list)),
  1754. list);
  1755. return ret;
  1756. }
  1757. int ehca_set_pagebuf_phys(struct ehca_mr_pginfo *pginfo,
  1758. u32 number,
  1759. u64 *kpage)
  1760. {
  1761. int ret = 0;
  1762. struct ib_phys_buf *pbuf;
  1763. u64 num_hw, offs_hw;
  1764. u32 i = 0;
  1765. /* loop over desired phys_buf_array entries */
  1766. while (i < number) {
  1767. pbuf = pginfo->u.phy.phys_buf_array + pginfo->u.phy.next_buf;
  1768. num_hw = NUM_CHUNKS((pbuf->addr % pginfo->hwpage_size) +
  1769. pbuf->size, pginfo->hwpage_size);
  1770. offs_hw = (pbuf->addr & ~(pginfo->hwpage_size - 1)) /
  1771. pginfo->hwpage_size;
  1772. while (pginfo->next_hwpage < offs_hw + num_hw) {
  1773. /* sanity check */
  1774. if ((pginfo->kpage_cnt >= pginfo->num_kpages) ||
  1775. (pginfo->hwpage_cnt >= pginfo->num_hwpages)) {
  1776. ehca_gen_err("kpage_cnt >= num_kpages, "
  1777. "kpage_cnt=%lx num_kpages=%lx "
  1778. "hwpage_cnt=%lx "
  1779. "num_hwpages=%lx i=%x",
  1780. pginfo->kpage_cnt,
  1781. pginfo->num_kpages,
  1782. pginfo->hwpage_cnt,
  1783. pginfo->num_hwpages, i);
  1784. return -EFAULT;
  1785. }
  1786. *kpage = phys_to_abs(
  1787. (pbuf->addr & ~(pginfo->hwpage_size - 1)) +
  1788. (pginfo->next_hwpage * pginfo->hwpage_size));
  1789. if ( !(*kpage) && pbuf->addr ) {
  1790. ehca_gen_err("pbuf->addr=%lx pbuf->size=%lx "
  1791. "next_hwpage=%lx", pbuf->addr,
  1792. pbuf->size, pginfo->next_hwpage);
  1793. return -EFAULT;
  1794. }
  1795. (pginfo->hwpage_cnt)++;
  1796. (pginfo->next_hwpage)++;
  1797. if (PAGE_SIZE >= pginfo->hwpage_size) {
  1798. if (pginfo->next_hwpage %
  1799. (PAGE_SIZE / pginfo->hwpage_size) == 0)
  1800. (pginfo->kpage_cnt)++;
  1801. } else
  1802. pginfo->kpage_cnt += pginfo->hwpage_size /
  1803. PAGE_SIZE;
  1804. kpage++;
  1805. i++;
  1806. if (i >= number) break;
  1807. }
  1808. if (pginfo->next_hwpage >= offs_hw + num_hw) {
  1809. (pginfo->u.phy.next_buf)++;
  1810. pginfo->next_hwpage = 0;
  1811. }
  1812. }
  1813. return ret;
  1814. }
  1815. int ehca_set_pagebuf_fmr(struct ehca_mr_pginfo *pginfo,
  1816. u32 number,
  1817. u64 *kpage)
  1818. {
  1819. int ret = 0;
  1820. u64 *fmrlist;
  1821. u32 i;
  1822. /* loop over desired page_list entries */
  1823. fmrlist = pginfo->u.fmr.page_list + pginfo->u.fmr.next_listelem;
  1824. for (i = 0; i < number; i++) {
  1825. *kpage = phys_to_abs((*fmrlist & ~(pginfo->hwpage_size - 1)) +
  1826. pginfo->next_hwpage * pginfo->hwpage_size);
  1827. if ( !(*kpage) ) {
  1828. ehca_gen_err("*fmrlist=%lx fmrlist=%p "
  1829. "next_listelem=%lx next_hwpage=%lx",
  1830. *fmrlist, fmrlist,
  1831. pginfo->u.fmr.next_listelem,
  1832. pginfo->next_hwpage);
  1833. return -EFAULT;
  1834. }
  1835. (pginfo->hwpage_cnt)++;
  1836. if (pginfo->u.fmr.fmr_pgsize >= pginfo->hwpage_size) {
  1837. if (pginfo->next_hwpage %
  1838. (pginfo->u.fmr.fmr_pgsize /
  1839. pginfo->hwpage_size) == 0) {
  1840. (pginfo->kpage_cnt)++;
  1841. (pginfo->u.fmr.next_listelem)++;
  1842. fmrlist++;
  1843. pginfo->next_hwpage = 0;
  1844. } else
  1845. (pginfo->next_hwpage)++;
  1846. } else {
  1847. unsigned int cnt_per_hwpage = pginfo->hwpage_size /
  1848. pginfo->u.fmr.fmr_pgsize;
  1849. unsigned int j;
  1850. u64 prev = *kpage;
  1851. /* check if adrs are contiguous */
  1852. for (j = 1; j < cnt_per_hwpage; j++) {
  1853. u64 p = phys_to_abs(fmrlist[j] &
  1854. ~(pginfo->hwpage_size - 1));
  1855. if (prev + pginfo->u.fmr.fmr_pgsize != p) {
  1856. ehca_gen_err("uncontiguous fmr pages "
  1857. "found prev=%lx p=%lx "
  1858. "idx=%x", prev, p, i + j);
  1859. return -EINVAL;
  1860. }
  1861. prev = p;
  1862. }
  1863. pginfo->kpage_cnt += cnt_per_hwpage;
  1864. pginfo->u.fmr.next_listelem += cnt_per_hwpage;
  1865. fmrlist += cnt_per_hwpage;
  1866. }
  1867. kpage++;
  1868. }
  1869. return ret;
  1870. }
  1871. /* setup page buffer from page info */
  1872. int ehca_set_pagebuf(struct ehca_mr_pginfo *pginfo,
  1873. u32 number,
  1874. u64 *kpage)
  1875. {
  1876. int ret;
  1877. switch (pginfo->type) {
  1878. case EHCA_MR_PGI_PHYS:
  1879. ret = ehca_set_pagebuf_phys(pginfo, number, kpage);
  1880. break;
  1881. case EHCA_MR_PGI_USER:
  1882. ret = PAGE_SIZE >= pginfo->hwpage_size ?
  1883. ehca_set_pagebuf_user1(pginfo, number, kpage) :
  1884. ehca_set_pagebuf_user2(pginfo, number, kpage);
  1885. break;
  1886. case EHCA_MR_PGI_FMR:
  1887. ret = ehca_set_pagebuf_fmr(pginfo, number, kpage);
  1888. break;
  1889. default:
  1890. ehca_gen_err("bad pginfo->type=%x", pginfo->type);
  1891. ret = -EFAULT;
  1892. break;
  1893. }
  1894. return ret;
  1895. } /* end ehca_set_pagebuf() */
  1896. /*----------------------------------------------------------------------*/
  1897. /*
  1898. * check MR if it is a max-MR, i.e. uses whole memory
  1899. * in case it's a max-MR 1 is returned, else 0
  1900. */
  1901. int ehca_mr_is_maxmr(u64 size,
  1902. u64 *iova_start)
  1903. {
  1904. /* a MR is treated as max-MR only if it fits following: */
  1905. if ((size == ((u64)high_memory - PAGE_OFFSET)) &&
  1906. (iova_start == (void *)KERNELBASE)) {
  1907. ehca_gen_dbg("this is a max-MR");
  1908. return 1;
  1909. } else
  1910. return 0;
  1911. } /* end ehca_mr_is_maxmr() */
  1912. /*----------------------------------------------------------------------*/
  1913. /* map access control for MR/MW. This routine is used for MR and MW. */
  1914. void ehca_mrmw_map_acl(int ib_acl,
  1915. u32 *hipz_acl)
  1916. {
  1917. *hipz_acl = 0;
  1918. if (ib_acl & IB_ACCESS_REMOTE_READ)
  1919. *hipz_acl |= HIPZ_ACCESSCTRL_R_READ;
  1920. if (ib_acl & IB_ACCESS_REMOTE_WRITE)
  1921. *hipz_acl |= HIPZ_ACCESSCTRL_R_WRITE;
  1922. if (ib_acl & IB_ACCESS_REMOTE_ATOMIC)
  1923. *hipz_acl |= HIPZ_ACCESSCTRL_R_ATOMIC;
  1924. if (ib_acl & IB_ACCESS_LOCAL_WRITE)
  1925. *hipz_acl |= HIPZ_ACCESSCTRL_L_WRITE;
  1926. if (ib_acl & IB_ACCESS_MW_BIND)
  1927. *hipz_acl |= HIPZ_ACCESSCTRL_MW_BIND;
  1928. } /* end ehca_mrmw_map_acl() */
  1929. /*----------------------------------------------------------------------*/
  1930. /* sets page size in hipz access control for MR/MW. */
  1931. void ehca_mrmw_set_pgsize_hipz_acl(u32 pgsize, u32 *hipz_acl) /*INOUT*/
  1932. {
  1933. *hipz_acl |= (ehca_encode_hwpage_size(pgsize) << 24);
  1934. } /* end ehca_mrmw_set_pgsize_hipz_acl() */
  1935. /*----------------------------------------------------------------------*/
  1936. /*
  1937. * reverse map access control for MR/MW.
  1938. * This routine is used for MR and MW.
  1939. */
  1940. void ehca_mrmw_reverse_map_acl(const u32 *hipz_acl,
  1941. int *ib_acl) /*OUT*/
  1942. {
  1943. *ib_acl = 0;
  1944. if (*hipz_acl & HIPZ_ACCESSCTRL_R_READ)
  1945. *ib_acl |= IB_ACCESS_REMOTE_READ;
  1946. if (*hipz_acl & HIPZ_ACCESSCTRL_R_WRITE)
  1947. *ib_acl |= IB_ACCESS_REMOTE_WRITE;
  1948. if (*hipz_acl & HIPZ_ACCESSCTRL_R_ATOMIC)
  1949. *ib_acl |= IB_ACCESS_REMOTE_ATOMIC;
  1950. if (*hipz_acl & HIPZ_ACCESSCTRL_L_WRITE)
  1951. *ib_acl |= IB_ACCESS_LOCAL_WRITE;
  1952. if (*hipz_acl & HIPZ_ACCESSCTRL_MW_BIND)
  1953. *ib_acl |= IB_ACCESS_MW_BIND;
  1954. } /* end ehca_mrmw_reverse_map_acl() */
  1955. /*----------------------------------------------------------------------*/
  1956. /*
  1957. * MR destructor and constructor
  1958. * used in Reregister MR verb, sets all fields in ehca_mr_t to 0,
  1959. * except struct ib_mr and spinlock
  1960. */
  1961. void ehca_mr_deletenew(struct ehca_mr *mr)
  1962. {
  1963. mr->flags = 0;
  1964. mr->num_kpages = 0;
  1965. mr->num_hwpages = 0;
  1966. mr->acl = 0;
  1967. mr->start = NULL;
  1968. mr->fmr_page_size = 0;
  1969. mr->fmr_max_pages = 0;
  1970. mr->fmr_max_maps = 0;
  1971. mr->fmr_map_cnt = 0;
  1972. memset(&mr->ipz_mr_handle, 0, sizeof(mr->ipz_mr_handle));
  1973. memset(&mr->galpas, 0, sizeof(mr->galpas));
  1974. } /* end ehca_mr_deletenew() */
  1975. int ehca_init_mrmw_cache(void)
  1976. {
  1977. mr_cache = kmem_cache_create("ehca_cache_mr",
  1978. sizeof(struct ehca_mr), 0,
  1979. SLAB_HWCACHE_ALIGN,
  1980. NULL);
  1981. if (!mr_cache)
  1982. return -ENOMEM;
  1983. mw_cache = kmem_cache_create("ehca_cache_mw",
  1984. sizeof(struct ehca_mw), 0,
  1985. SLAB_HWCACHE_ALIGN,
  1986. NULL);
  1987. if (!mw_cache) {
  1988. kmem_cache_destroy(mr_cache);
  1989. mr_cache = NULL;
  1990. return -ENOMEM;
  1991. }
  1992. return 0;
  1993. }
  1994. void ehca_cleanup_mrmw_cache(void)
  1995. {
  1996. if (mr_cache)
  1997. kmem_cache_destroy(mr_cache);
  1998. if (mw_cache)
  1999. kmem_cache_destroy(mw_cache);
  2000. }