qd65xx.c 12 KB

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  1. /*
  2. * linux/drivers/ide/legacy/qd65xx.c Version 0.07 Sep 30, 2001
  3. *
  4. * Copyright (C) 1996-2001 Linus Torvalds & author (see below)
  5. */
  6. /*
  7. * Version 0.03 Cleaned auto-tune, added probe
  8. * Version 0.04 Added second channel tuning
  9. * Version 0.05 Enhanced tuning ; added qd6500 support
  10. * Version 0.06 Added dos driver's list
  11. * Version 0.07 Second channel bug fix
  12. *
  13. * QDI QD6500/QD6580 EIDE controller fast support
  14. *
  15. * Please set local bus speed using kernel parameter idebus
  16. * for example, "idebus=33" stands for 33Mhz VLbus
  17. * To activate controller support, use "ide0=qd65xx"
  18. * To enable tuning, use "hda=autotune hdb=autotune"
  19. * To enable 2nd channel tuning (qd6580 only), use "hdc=autotune hdd=autotune"
  20. */
  21. /*
  22. * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
  23. * Samuel Thibault <samuel.thibault@fnac.net>
  24. */
  25. #include <linux/module.h>
  26. #include <linux/types.h>
  27. #include <linux/kernel.h>
  28. #include <linux/delay.h>
  29. #include <linux/timer.h>
  30. #include <linux/mm.h>
  31. #include <linux/ioport.h>
  32. #include <linux/blkdev.h>
  33. #include <linux/hdreg.h>
  34. #include <linux/ide.h>
  35. #include <linux/init.h>
  36. #include <asm/system.h>
  37. #include <asm/io.h>
  38. #include "qd65xx.h"
  39. /*
  40. * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
  41. * or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
  42. * -- qd6500 is a single IDE interface
  43. * -- qd6580 is a dual IDE interface
  44. *
  45. * More research on qd6580 being done by willmore@cig.mot.com (David)
  46. * More Information given by Petr Soucek (petr@ryston.cz)
  47. * http://www.ryston.cz/petr/vlb
  48. */
  49. /*
  50. * base: Timer1
  51. *
  52. *
  53. * base+0x01: Config (R/O)
  54. *
  55. * bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
  56. * bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
  57. * bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
  58. * bit 3: qd6500: 1 = disabled, 0 = enabled
  59. * qd6580: 1
  60. * upper nibble:
  61. * qd6500: 1100
  62. * qd6580: either 1010 or 0101
  63. *
  64. *
  65. * base+0x02: Timer2 (qd6580 only)
  66. *
  67. *
  68. * base+0x03: Control (qd6580 only)
  69. *
  70. * bits 0-3 must always be set 1
  71. * bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
  72. * bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
  73. * 0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
  74. * channel 1 for hdc & hdd
  75. * bit 1 : 1 = only disks on primary port
  76. * 0 = disks & ATAPI devices on primary port
  77. * bit 2-4 : always 0
  78. * bit 5 : status, but of what ?
  79. * bit 6 : always set 1 by dos driver
  80. * bit 7 : set 1 for non-ATAPI devices on primary port
  81. * (maybe read-ahead and post-write buffer ?)
  82. */
  83. static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */
  84. /*
  85. * qd_select:
  86. *
  87. * This routine is invoked from ide.c to prepare for access to a given drive.
  88. */
  89. static void qd_select (ide_drive_t *drive)
  90. {
  91. u8 index = (( (QD_TIMREG(drive)) & 0x80 ) >> 7) |
  92. (QD_TIMREG(drive) & 0x02);
  93. if (timings[index] != QD_TIMING(drive))
  94. outb(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));
  95. }
  96. /*
  97. * qd6500_compute_timing
  98. *
  99. * computes the timing value where
  100. * lower nibble represents active time, in count of VLB clocks
  101. * upper nibble represents recovery time, in count of VLB clocks
  102. */
  103. static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
  104. {
  105. u8 active_cycle,recovery_cycle;
  106. if (system_bus_clock()<=33) {
  107. active_cycle = 9 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 9);
  108. recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 0, 15);
  109. } else {
  110. active_cycle = 8 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 1, 8);
  111. recovery_cycle = 18 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 3, 18);
  112. }
  113. return((recovery_cycle<<4) | 0x08 | active_cycle);
  114. }
  115. /*
  116. * qd6580_compute_timing
  117. *
  118. * idem for qd6580
  119. */
  120. static u8 qd6580_compute_timing (int active_time, int recovery_time)
  121. {
  122. u8 active_cycle = 17 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 17);
  123. u8 recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 2, 15);
  124. return((recovery_cycle<<4) | active_cycle);
  125. }
  126. /*
  127. * qd_find_disk_type
  128. *
  129. * tries to find timing from dos driver's table
  130. */
  131. static int qd_find_disk_type (ide_drive_t *drive,
  132. int *active_time, int *recovery_time)
  133. {
  134. struct qd65xx_timing_s *p;
  135. char model[40];
  136. if (!*drive->id->model) return 0;
  137. strncpy(model,drive->id->model,40);
  138. ide_fixstring(model,40,1); /* byte-swap */
  139. for (p = qd65xx_timing ; p->offset != -1 ; p++) {
  140. if (!strncmp(p->model, model+p->offset, 4)) {
  141. printk(KERN_DEBUG "%s: listed !\n", drive->name);
  142. *active_time = p->active;
  143. *recovery_time = p->recovery;
  144. return 1;
  145. }
  146. }
  147. return 0;
  148. }
  149. /*
  150. * qd_timing_ok:
  151. *
  152. * check whether timings don't conflict
  153. */
  154. static int qd_timing_ok (ide_drive_t drives[])
  155. {
  156. return (IDE_IMPLY(drives[0].present && drives[1].present,
  157. IDE_IMPLY(QD_TIMREG(drives) == QD_TIMREG(drives+1),
  158. QD_TIMING(drives) == QD_TIMING(drives+1))));
  159. /* if same timing register, must be same timing */
  160. }
  161. /*
  162. * qd_set_timing:
  163. *
  164. * records the timing, and enables selectproc as needed
  165. */
  166. static void qd_set_timing (ide_drive_t *drive, u8 timing)
  167. {
  168. ide_hwif_t *hwif = HWIF(drive);
  169. drive->drive_data &= 0xff00;
  170. drive->drive_data |= timing;
  171. if (qd_timing_ok(hwif->drives)) {
  172. qd_select(drive); /* selects once */
  173. hwif->selectproc = NULL;
  174. } else
  175. hwif->selectproc = &qd_select;
  176. printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
  177. }
  178. static void qd6500_set_pio_mode(ide_drive_t *drive, const u8 pio)
  179. {
  180. int active_time = 175;
  181. int recovery_time = 415; /* worst case values from the dos driver */
  182. /*
  183. * FIXME: use "pio" value
  184. */
  185. if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)
  186. && drive->id->tPIO && (drive->id->field_valid & 0x02)
  187. && drive->id->eide_pio >= 240) {
  188. printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
  189. drive->id->tPIO);
  190. active_time = 110;
  191. recovery_time = drive->id->eide_pio - 120;
  192. }
  193. qd_set_timing(drive, qd6500_compute_timing(HWIF(drive), active_time, recovery_time));
  194. }
  195. static void qd6580_set_pio_mode(ide_drive_t *drive, const u8 pio)
  196. {
  197. int base = HWIF(drive)->select_data;
  198. unsigned int cycle_time;
  199. int active_time = 175;
  200. int recovery_time = 415; /* worst case values from the dos driver */
  201. if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
  202. cycle_time = ide_pio_cycle_time(drive, pio);
  203. switch (pio) {
  204. case 0: break;
  205. case 3:
  206. if (cycle_time >= 110) {
  207. active_time = 86;
  208. recovery_time = cycle_time - 102;
  209. } else
  210. printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
  211. break;
  212. case 4:
  213. if (cycle_time >= 69) {
  214. active_time = 70;
  215. recovery_time = cycle_time - 61;
  216. } else
  217. printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
  218. break;
  219. default:
  220. if (cycle_time >= 180) {
  221. active_time = 110;
  222. recovery_time = cycle_time - 120;
  223. } else {
  224. active_time = ide_pio_timings[pio].active_time;
  225. recovery_time = cycle_time - active_time;
  226. }
  227. }
  228. printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
  229. }
  230. if (!HWIF(drive)->channel && drive->media != ide_disk) {
  231. outb(0x5f, QD_CONTROL_PORT);
  232. printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
  233. "and post-write buffer on %s.\n",
  234. drive->name, HWIF(drive)->name);
  235. }
  236. qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
  237. }
  238. /*
  239. * qd_testreg
  240. *
  241. * tests if the given port is a register
  242. */
  243. static int __init qd_testreg(int port)
  244. {
  245. unsigned long flags;
  246. u8 savereg, readreg;
  247. local_irq_save(flags);
  248. savereg = inb_p(port);
  249. outb_p(QD_TESTVAL, port); /* safe value */
  250. readreg = inb_p(port);
  251. outb(savereg, port);
  252. local_irq_restore(flags);
  253. if (savereg == QD_TESTVAL) {
  254. printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
  255. printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
  256. printk(KERN_ERR "Assuming qd65xx is not present.\n");
  257. return 1;
  258. }
  259. return (readreg != QD_TESTVAL);
  260. }
  261. /*
  262. * qd_setup:
  263. *
  264. * called to setup an ata channel : adjusts attributes & links for tuning
  265. */
  266. static void __init qd_setup(ide_hwif_t *hwif, int base, int config,
  267. unsigned int data0, unsigned int data1)
  268. {
  269. hwif->chipset = ide_qd65xx;
  270. hwif->channel = hwif->index;
  271. hwif->select_data = base;
  272. hwif->config_data = config;
  273. hwif->drives[0].drive_data = data0;
  274. hwif->drives[1].drive_data = data1;
  275. hwif->drives[0].io_32bit =
  276. hwif->drives[1].io_32bit = 1;
  277. hwif->pio_mask = ATA_PIO4;
  278. }
  279. /*
  280. * qd_unsetup:
  281. *
  282. * called to unsetup an ata channel : back to default values, unlinks tuning
  283. */
  284. /*
  285. static void __exit qd_unsetup(ide_hwif_t *hwif)
  286. {
  287. u8 config = hwif->config_data;
  288. int base = hwif->select_data;
  289. void *set_pio_mode = (void *)hwif->set_pio_mode;
  290. if (hwif->chipset != ide_qd65xx)
  291. return;
  292. printk(KERN_NOTICE "%s: back to defaults\n", hwif->name);
  293. hwif->selectproc = NULL;
  294. hwif->set_pio_mode = NULL;
  295. if (set_pio_mode == (void *)qd6500_set_pio_mode) {
  296. // will do it for both
  297. outb(QD6500_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
  298. } else if (set_pio_mode == (void *)qd6580_set_pio_mode) {
  299. if (QD_CONTROL(hwif) & QD_CONTR_SEC_DISABLED) {
  300. outb(QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
  301. outb(QD6580_DEF_DATA2, QD_TIMREG(&hwif->drives[1]));
  302. } else {
  303. outb(hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
  304. }
  305. } else {
  306. printk(KERN_WARNING "Unknown qd65xx tuning fonction !\n");
  307. printk(KERN_WARNING "keeping settings !\n");
  308. }
  309. }
  310. */
  311. /*
  312. * qd_probe:
  313. *
  314. * looks at the specified baseport, and if qd found, registers & initialises it
  315. * return 1 if another qd may be probed
  316. */
  317. static int __init qd_probe(int base)
  318. {
  319. ide_hwif_t *hwif;
  320. u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
  321. u8 config;
  322. u8 unit;
  323. config = inb(QD_CONFIG_PORT);
  324. if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
  325. return 1;
  326. unit = ! (config & QD_CONFIG_IDE_BASEPORT);
  327. if ((config & 0xf0) == QD_CONFIG_QD6500) {
  328. if (qd_testreg(base)) return 1; /* bad register */
  329. /* qd6500 found */
  330. hwif = &ide_hwifs[unit];
  331. printk(KERN_NOTICE "%s: qd6500 at %#x\n", hwif->name, base);
  332. printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
  333. config, QD_ID3);
  334. if (config & QD_CONFIG_DISABLED) {
  335. printk(KERN_WARNING "qd6500 is disabled !\n");
  336. return 1;
  337. }
  338. qd_setup(hwif, base, config, QD6500_DEF_DATA, QD6500_DEF_DATA);
  339. hwif->set_pio_mode = &qd6500_set_pio_mode;
  340. idx[0] = unit;
  341. ide_device_add(idx);
  342. return 1;
  343. }
  344. if (((config & 0xf0) == QD_CONFIG_QD6580_A) ||
  345. ((config & 0xf0) == QD_CONFIG_QD6580_B)) {
  346. u8 control;
  347. if (qd_testreg(base) || qd_testreg(base+0x02)) return 1;
  348. /* bad registers */
  349. /* qd6580 found */
  350. control = inb(QD_CONTROL_PORT);
  351. printk(KERN_NOTICE "qd6580 at %#x\n", base);
  352. printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
  353. config, control, QD_ID3);
  354. if (control & QD_CONTR_SEC_DISABLED) {
  355. /* secondary disabled */
  356. hwif = &ide_hwifs[unit];
  357. printk(KERN_INFO "%s: qd6580: single IDE board\n",
  358. hwif->name);
  359. qd_setup(hwif, base, config | (control << 8),
  360. QD6580_DEF_DATA, QD6580_DEF_DATA2);
  361. hwif->set_pio_mode = &qd6580_set_pio_mode;
  362. idx[0] = unit;
  363. ide_device_add(idx);
  364. outb(QD_DEF_CONTR, QD_CONTROL_PORT);
  365. return 1;
  366. } else {
  367. ide_hwif_t *mate;
  368. hwif = &ide_hwifs[0];
  369. mate = &ide_hwifs[1];
  370. /* secondary enabled */
  371. printk(KERN_INFO "%s&%s: qd6580: dual IDE board\n",
  372. hwif->name, mate->name);
  373. qd_setup(hwif, base, config | (control << 8),
  374. QD6580_DEF_DATA, QD6580_DEF_DATA);
  375. hwif->set_pio_mode = &qd6580_set_pio_mode;
  376. qd_setup(mate, base, config | (control << 8),
  377. QD6580_DEF_DATA2, QD6580_DEF_DATA2);
  378. mate->set_pio_mode = &qd6580_set_pio_mode;
  379. idx[0] = 0;
  380. idx[1] = 1;
  381. ide_device_add(idx);
  382. outb(QD_DEF_CONTR, QD_CONTROL_PORT);
  383. return 0; /* no other qd65xx possible */
  384. }
  385. }
  386. /* no qd65xx found */
  387. return 1;
  388. }
  389. int probe_qd65xx = 0;
  390. module_param_named(probe, probe_qd65xx, bool, 0);
  391. MODULE_PARM_DESC(probe, "probe for QD65xx chipsets");
  392. /* Can be called directly from ide.c. */
  393. int __init qd65xx_init(void)
  394. {
  395. if (probe_qd65xx == 0)
  396. return -ENODEV;
  397. if (qd_probe(0x30))
  398. qd_probe(0xb0);
  399. if (ide_hwifs[0].chipset != ide_qd65xx &&
  400. ide_hwifs[1].chipset != ide_qd65xx)
  401. return -ENODEV;
  402. return 0;
  403. }
  404. #ifdef MODULE
  405. module_init(qd65xx_init);
  406. #endif
  407. MODULE_AUTHOR("Samuel Thibault");
  408. MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
  409. MODULE_LICENSE("GPL");