ioatdma_hw.h 2.3 KB

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  1. /*
  2. * Copyright(c) 2004 - 2007 Intel Corporation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the Free
  6. * Software Foundation; either version 2 of the License, or (at your option)
  7. * any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc., 59
  16. * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called COPYING.
  20. */
  21. #ifndef _IOAT_HW_H_
  22. #define _IOAT_HW_H_
  23. /* PCI Configuration Space Values */
  24. #define IOAT_PCI_VID 0x8086
  25. /* CB device ID's */
  26. #define IOAT_PCI_DID_5000 0x1A38
  27. #define IOAT_PCI_DID_CNB 0x360B
  28. #define IOAT_PCI_DID_SCNB 0x65FF
  29. #define IOAT_PCI_DID_SNB 0x402F
  30. #define IOAT_PCI_RID 0x00
  31. #define IOAT_PCI_SVID 0x8086
  32. #define IOAT_PCI_SID 0x8086
  33. #define IOAT_VER_1_2 0x12 /* Version 1.2 */
  34. #define IOAT_VER_2_0 0x20 /* Version 2.0 */
  35. struct ioat_dma_descriptor {
  36. uint32_t size;
  37. uint32_t ctl;
  38. uint64_t src_addr;
  39. uint64_t dst_addr;
  40. uint64_t next;
  41. uint64_t rsv1;
  42. uint64_t rsv2;
  43. uint64_t user1;
  44. uint64_t user2;
  45. };
  46. #define IOAT_DMA_DESCRIPTOR_CTL_INT_GN 0x00000001
  47. #define IOAT_DMA_DESCRIPTOR_CTL_SRC_SN 0x00000002
  48. #define IOAT_DMA_DESCRIPTOR_CTL_DST_SN 0x00000004
  49. #define IOAT_DMA_DESCRIPTOR_CTL_CP_STS 0x00000008
  50. #define IOAT_DMA_DESCRIPTOR_CTL_FRAME 0x00000010
  51. #define IOAT_DMA_DESCRIPTOR_NUL 0x00000020
  52. #define IOAT_DMA_DESCRIPTOR_CTL_SP_BRK 0x00000040
  53. #define IOAT_DMA_DESCRIPTOR_CTL_DP_BRK 0x00000080
  54. #define IOAT_DMA_DESCRIPTOR_CTL_BNDL 0x00000100
  55. #define IOAT_DMA_DESCRIPTOR_CTL_DCA 0x00000200
  56. #define IOAT_DMA_DESCRIPTOR_CTL_BUFHINT 0x00000400
  57. #define IOAT_DMA_DESCRIPTOR_CTL_OPCODE_CONTEXT 0xFF000000
  58. #define IOAT_DMA_DESCRIPTOR_CTL_OPCODE_DMA 0x00000000
  59. #define IOAT_DMA_DESCRIPTOR_CTL_CONTEXT_DCA 0x00000001
  60. #define IOAT_DMA_DESCRIPTOR_CTL_OPCODE_MASK 0xFF000000
  61. #endif