nmi_64.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482
  1. /*
  2. * NMI watchdog support on APIC systems
  3. *
  4. * Started by Ingo Molnar <mingo@redhat.com>
  5. *
  6. * Fixes:
  7. * Mikael Pettersson : AMD K7 support for local APIC NMI watchdog.
  8. * Mikael Pettersson : Power Management for local APIC NMI watchdog.
  9. * Pavel Machek and
  10. * Mikael Pettersson : PM converted to driver model. Disable/enable API.
  11. */
  12. #include <linux/nmi.h>
  13. #include <linux/mm.h>
  14. #include <linux/delay.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/module.h>
  17. #include <linux/sysdev.h>
  18. #include <linux/sysctl.h>
  19. #include <linux/kprobes.h>
  20. #include <linux/cpumask.h>
  21. #include <linux/kdebug.h>
  22. #include <asm/smp.h>
  23. #include <asm/nmi.h>
  24. #include <asm/proto.h>
  25. #include <asm/mce.h>
  26. int unknown_nmi_panic;
  27. int nmi_watchdog_enabled;
  28. int panic_on_unrecovered_nmi;
  29. static cpumask_t backtrace_mask = CPU_MASK_NONE;
  30. /* nmi_active:
  31. * >0: the lapic NMI watchdog is active, but can be disabled
  32. * <0: the lapic NMI watchdog has not been set up, and cannot
  33. * be enabled
  34. * 0: the lapic NMI watchdog is disabled, but can be enabled
  35. */
  36. atomic_t nmi_active = ATOMIC_INIT(0); /* oprofile uses this */
  37. int panic_on_timeout;
  38. unsigned int nmi_watchdog = NMI_DEFAULT;
  39. static unsigned int nmi_hz = HZ;
  40. static DEFINE_PER_CPU(short, wd_enabled);
  41. /* local prototypes */
  42. static int unknown_nmi_panic_callback(struct pt_regs *regs, int cpu);
  43. /* Run after command line and cpu_init init, but before all other checks */
  44. void nmi_watchdog_default(void)
  45. {
  46. if (nmi_watchdog != NMI_DEFAULT)
  47. return;
  48. nmi_watchdog = NMI_NONE;
  49. }
  50. static int endflag __initdata = 0;
  51. #ifdef CONFIG_SMP
  52. /* The performance counters used by NMI_LOCAL_APIC don't trigger when
  53. * the CPU is idle. To make sure the NMI watchdog really ticks on all
  54. * CPUs during the test make them busy.
  55. */
  56. static __init void nmi_cpu_busy(void *data)
  57. {
  58. local_irq_enable_in_hardirq();
  59. /* Intentionally don't use cpu_relax here. This is
  60. to make sure that the performance counter really ticks,
  61. even if there is a simulator or similar that catches the
  62. pause instruction. On a real HT machine this is fine because
  63. all other CPUs are busy with "useless" delay loops and don't
  64. care if they get somewhat less cycles. */
  65. while (endflag == 0)
  66. mb();
  67. }
  68. #endif
  69. int __init check_nmi_watchdog (void)
  70. {
  71. int *counts;
  72. int cpu;
  73. if ((nmi_watchdog == NMI_NONE) || (nmi_watchdog == NMI_DISABLED))
  74. return 0;
  75. if (!atomic_read(&nmi_active))
  76. return 0;
  77. counts = kmalloc(NR_CPUS * sizeof(int), GFP_KERNEL);
  78. if (!counts)
  79. return -1;
  80. printk(KERN_INFO "testing NMI watchdog ... ");
  81. #ifdef CONFIG_SMP
  82. if (nmi_watchdog == NMI_LOCAL_APIC)
  83. smp_call_function(nmi_cpu_busy, (void *)&endflag, 0, 0);
  84. #endif
  85. for (cpu = 0; cpu < NR_CPUS; cpu++)
  86. counts[cpu] = cpu_pda(cpu)->__nmi_count;
  87. local_irq_enable();
  88. mdelay((20*1000)/nmi_hz); // wait 20 ticks
  89. for_each_online_cpu(cpu) {
  90. if (!per_cpu(wd_enabled, cpu))
  91. continue;
  92. if (cpu_pda(cpu)->__nmi_count - counts[cpu] <= 5) {
  93. printk(KERN_WARNING "WARNING: CPU#%d: NMI "
  94. "appears to be stuck (%d->%d)!\n",
  95. cpu,
  96. counts[cpu],
  97. cpu_pda(cpu)->__nmi_count);
  98. per_cpu(wd_enabled, cpu) = 0;
  99. atomic_dec(&nmi_active);
  100. }
  101. }
  102. if (!atomic_read(&nmi_active)) {
  103. kfree(counts);
  104. atomic_set(&nmi_active, -1);
  105. endflag = 1;
  106. return -1;
  107. }
  108. endflag = 1;
  109. printk("OK.\n");
  110. /* now that we know it works we can reduce NMI frequency to
  111. something more reasonable; makes a difference in some configs */
  112. if (nmi_watchdog == NMI_LOCAL_APIC)
  113. nmi_hz = lapic_adjust_nmi_hz(1);
  114. kfree(counts);
  115. return 0;
  116. }
  117. int __init setup_nmi_watchdog(char *str)
  118. {
  119. int nmi;
  120. if (!strncmp(str,"panic",5)) {
  121. panic_on_timeout = 1;
  122. str = strchr(str, ',');
  123. if (!str)
  124. return 1;
  125. ++str;
  126. }
  127. get_option(&str, &nmi);
  128. if ((nmi >= NMI_INVALID) || (nmi < NMI_NONE))
  129. return 0;
  130. nmi_watchdog = nmi;
  131. return 1;
  132. }
  133. __setup("nmi_watchdog=", setup_nmi_watchdog);
  134. static void __acpi_nmi_disable(void *__unused)
  135. {
  136. apic_write(APIC_LVT0, APIC_DM_NMI | APIC_LVT_MASKED);
  137. }
  138. /*
  139. * Disable timer based NMIs on all CPUs:
  140. */
  141. void acpi_nmi_disable(void)
  142. {
  143. if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC)
  144. on_each_cpu(__acpi_nmi_disable, NULL, 0, 1);
  145. }
  146. static void __acpi_nmi_enable(void *__unused)
  147. {
  148. apic_write(APIC_LVT0, APIC_DM_NMI);
  149. }
  150. /*
  151. * Enable timer based NMIs on all CPUs:
  152. */
  153. void acpi_nmi_enable(void)
  154. {
  155. if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC)
  156. on_each_cpu(__acpi_nmi_enable, NULL, 0, 1);
  157. }
  158. #ifdef CONFIG_PM
  159. static int nmi_pm_active; /* nmi_active before suspend */
  160. static int lapic_nmi_suspend(struct sys_device *dev, pm_message_t state)
  161. {
  162. /* only CPU0 goes here, other CPUs should be offline */
  163. nmi_pm_active = atomic_read(&nmi_active);
  164. stop_apic_nmi_watchdog(NULL);
  165. BUG_ON(atomic_read(&nmi_active) != 0);
  166. return 0;
  167. }
  168. static int lapic_nmi_resume(struct sys_device *dev)
  169. {
  170. /* only CPU0 goes here, other CPUs should be offline */
  171. if (nmi_pm_active > 0) {
  172. setup_apic_nmi_watchdog(NULL);
  173. touch_nmi_watchdog();
  174. }
  175. return 0;
  176. }
  177. static struct sysdev_class nmi_sysclass = {
  178. .name = "lapic_nmi",
  179. .resume = lapic_nmi_resume,
  180. .suspend = lapic_nmi_suspend,
  181. };
  182. static struct sys_device device_lapic_nmi = {
  183. .id = 0,
  184. .cls = &nmi_sysclass,
  185. };
  186. static int __init init_lapic_nmi_sysfs(void)
  187. {
  188. int error;
  189. /* should really be a BUG_ON but b/c this is an
  190. * init call, it just doesn't work. -dcz
  191. */
  192. if (nmi_watchdog != NMI_LOCAL_APIC)
  193. return 0;
  194. if ( atomic_read(&nmi_active) < 0 )
  195. return 0;
  196. error = sysdev_class_register(&nmi_sysclass);
  197. if (!error)
  198. error = sysdev_register(&device_lapic_nmi);
  199. return error;
  200. }
  201. /* must come after the local APIC's device_initcall() */
  202. late_initcall(init_lapic_nmi_sysfs);
  203. #endif /* CONFIG_PM */
  204. void setup_apic_nmi_watchdog(void *unused)
  205. {
  206. if (__get_cpu_var(wd_enabled) == 1)
  207. return;
  208. /* cheap hack to support suspend/resume */
  209. /* if cpu0 is not active neither should the other cpus */
  210. if ((smp_processor_id() != 0) && (atomic_read(&nmi_active) <= 0))
  211. return;
  212. switch (nmi_watchdog) {
  213. case NMI_LOCAL_APIC:
  214. __get_cpu_var(wd_enabled) = 1;
  215. if (lapic_watchdog_init(nmi_hz) < 0) {
  216. __get_cpu_var(wd_enabled) = 0;
  217. return;
  218. }
  219. /* FALL THROUGH */
  220. case NMI_IO_APIC:
  221. __get_cpu_var(wd_enabled) = 1;
  222. atomic_inc(&nmi_active);
  223. }
  224. }
  225. void stop_apic_nmi_watchdog(void *unused)
  226. {
  227. /* only support LOCAL and IO APICs for now */
  228. if ((nmi_watchdog != NMI_LOCAL_APIC) &&
  229. (nmi_watchdog != NMI_IO_APIC))
  230. return;
  231. if (__get_cpu_var(wd_enabled) == 0)
  232. return;
  233. if (nmi_watchdog == NMI_LOCAL_APIC)
  234. lapic_watchdog_stop();
  235. __get_cpu_var(wd_enabled) = 0;
  236. atomic_dec(&nmi_active);
  237. }
  238. /*
  239. * the best way to detect whether a CPU has a 'hard lockup' problem
  240. * is to check it's local APIC timer IRQ counts. If they are not
  241. * changing then that CPU has some problem.
  242. *
  243. * as these watchdog NMI IRQs are generated on every CPU, we only
  244. * have to check the current processor.
  245. */
  246. static DEFINE_PER_CPU(unsigned, last_irq_sum);
  247. static DEFINE_PER_CPU(local_t, alert_counter);
  248. static DEFINE_PER_CPU(int, nmi_touch);
  249. void touch_nmi_watchdog(void)
  250. {
  251. if (nmi_watchdog > 0) {
  252. unsigned cpu;
  253. /*
  254. * Tell other CPUs to reset their alert counters. We cannot
  255. * do it ourselves because the alert count increase is not
  256. * atomic.
  257. */
  258. for_each_present_cpu(cpu) {
  259. if (per_cpu(nmi_touch, cpu) != 1)
  260. per_cpu(nmi_touch, cpu) = 1;
  261. }
  262. }
  263. touch_softlockup_watchdog();
  264. }
  265. int __kprobes nmi_watchdog_tick(struct pt_regs * regs, unsigned reason)
  266. {
  267. int sum;
  268. int touched = 0;
  269. int cpu = smp_processor_id();
  270. int rc = 0;
  271. /* check for other users first */
  272. if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT)
  273. == NOTIFY_STOP) {
  274. rc = 1;
  275. touched = 1;
  276. }
  277. sum = read_pda(apic_timer_irqs) + read_pda(irq0_irqs);
  278. if (__get_cpu_var(nmi_touch)) {
  279. __get_cpu_var(nmi_touch) = 0;
  280. touched = 1;
  281. }
  282. if (cpu_isset(cpu, backtrace_mask)) {
  283. static DEFINE_SPINLOCK(lock); /* Serialise the printks */
  284. spin_lock(&lock);
  285. printk("NMI backtrace for cpu %d\n", cpu);
  286. dump_stack();
  287. spin_unlock(&lock);
  288. cpu_clear(cpu, backtrace_mask);
  289. }
  290. #ifdef CONFIG_X86_MCE
  291. /* Could check oops_in_progress here too, but it's safer
  292. not too */
  293. if (atomic_read(&mce_entry) > 0)
  294. touched = 1;
  295. #endif
  296. /* if the apic timer isn't firing, this cpu isn't doing much */
  297. if (!touched && __get_cpu_var(last_irq_sum) == sum) {
  298. /*
  299. * Ayiee, looks like this CPU is stuck ...
  300. * wait a few IRQs (5 seconds) before doing the oops ...
  301. */
  302. local_inc(&__get_cpu_var(alert_counter));
  303. if (local_read(&__get_cpu_var(alert_counter)) == 5*nmi_hz)
  304. die_nmi("NMI Watchdog detected LOCKUP on CPU %d\n", regs,
  305. panic_on_timeout);
  306. } else {
  307. __get_cpu_var(last_irq_sum) = sum;
  308. local_set(&__get_cpu_var(alert_counter), 0);
  309. }
  310. /* see if the nmi watchdog went off */
  311. if (!__get_cpu_var(wd_enabled))
  312. return rc;
  313. switch (nmi_watchdog) {
  314. case NMI_LOCAL_APIC:
  315. rc |= lapic_wd_event(nmi_hz);
  316. break;
  317. case NMI_IO_APIC:
  318. /* don't know how to accurately check for this.
  319. * just assume it was a watchdog timer interrupt
  320. * This matches the old behaviour.
  321. */
  322. rc = 1;
  323. break;
  324. }
  325. return rc;
  326. }
  327. static unsigned ignore_nmis;
  328. asmlinkage __kprobes void do_nmi(struct pt_regs * regs, long error_code)
  329. {
  330. nmi_enter();
  331. add_pda(__nmi_count,1);
  332. if (!ignore_nmis)
  333. default_do_nmi(regs);
  334. nmi_exit();
  335. }
  336. int do_nmi_callback(struct pt_regs * regs, int cpu)
  337. {
  338. #ifdef CONFIG_SYSCTL
  339. if (unknown_nmi_panic)
  340. return unknown_nmi_panic_callback(regs, cpu);
  341. #endif
  342. return 0;
  343. }
  344. void stop_nmi(void)
  345. {
  346. acpi_nmi_disable();
  347. ignore_nmis++;
  348. }
  349. void restart_nmi(void)
  350. {
  351. ignore_nmis--;
  352. acpi_nmi_enable();
  353. }
  354. #ifdef CONFIG_SYSCTL
  355. static int unknown_nmi_panic_callback(struct pt_regs *regs, int cpu)
  356. {
  357. unsigned char reason = get_nmi_reason();
  358. char buf[64];
  359. sprintf(buf, "NMI received for unknown reason %02x\n", reason);
  360. die_nmi(buf, regs, 1); /* Always panic here */
  361. return 0;
  362. }
  363. /*
  364. * proc handler for /proc/sys/kernel/nmi
  365. */
  366. int proc_nmi_enabled(struct ctl_table *table, int write, struct file *file,
  367. void __user *buffer, size_t *length, loff_t *ppos)
  368. {
  369. int old_state;
  370. nmi_watchdog_enabled = (atomic_read(&nmi_active) > 0) ? 1 : 0;
  371. old_state = nmi_watchdog_enabled;
  372. proc_dointvec(table, write, file, buffer, length, ppos);
  373. if (!!old_state == !!nmi_watchdog_enabled)
  374. return 0;
  375. if (atomic_read(&nmi_active) < 0 || nmi_watchdog == NMI_DISABLED) {
  376. printk( KERN_WARNING "NMI watchdog is permanently disabled\n");
  377. return -EIO;
  378. }
  379. /* if nmi_watchdog is not set yet, then set it */
  380. nmi_watchdog_default();
  381. if (nmi_watchdog == NMI_LOCAL_APIC) {
  382. if (nmi_watchdog_enabled)
  383. enable_lapic_nmi_watchdog();
  384. else
  385. disable_lapic_nmi_watchdog();
  386. } else {
  387. printk( KERN_WARNING
  388. "NMI watchdog doesn't know what hardware to touch\n");
  389. return -EIO;
  390. }
  391. return 0;
  392. }
  393. #endif
  394. void __trigger_all_cpu_backtrace(void)
  395. {
  396. int i;
  397. backtrace_mask = cpu_online_map;
  398. /* Wait for up to 10 seconds for all CPUs to do the backtrace */
  399. for (i = 0; i < 10 * 1000; i++) {
  400. if (cpus_empty(backtrace_mask))
  401. break;
  402. mdelay(1);
  403. }
  404. }
  405. EXPORT_SYMBOL(nmi_active);
  406. EXPORT_SYMBOL(nmi_watchdog);
  407. EXPORT_SYMBOL(touch_nmi_watchdog);