traps.c 22 KB

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  1. /*
  2. * arch/s390/kernel/traps.c
  3. *
  4. * S390 version
  5. * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
  6. * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
  7. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
  8. *
  9. * Derived from "arch/i386/kernel/traps.c"
  10. * Copyright (C) 1991, 1992 Linus Torvalds
  11. */
  12. /*
  13. * 'Traps.c' handles hardware traps and faults after we have saved some
  14. * state in 'asm.s'.
  15. */
  16. #include <linux/sched.h>
  17. #include <linux/kernel.h>
  18. #include <linux/string.h>
  19. #include <linux/errno.h>
  20. #include <linux/ptrace.h>
  21. #include <linux/timer.h>
  22. #include <linux/mm.h>
  23. #include <linux/smp.h>
  24. #include <linux/init.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/delay.h>
  27. #include <linux/module.h>
  28. #include <linux/kdebug.h>
  29. #include <linux/kallsyms.h>
  30. #include <linux/reboot.h>
  31. #include <linux/kprobes.h>
  32. #include <linux/bug.h>
  33. #include <asm/system.h>
  34. #include <asm/uaccess.h>
  35. #include <asm/io.h>
  36. #include <asm/atomic.h>
  37. #include <asm/mathemu.h>
  38. #include <asm/cpcmd.h>
  39. #include <asm/s390_ext.h>
  40. #include <asm/lowcore.h>
  41. #include <asm/debug.h>
  42. /* Called from entry.S only */
  43. extern void handle_per_exception(struct pt_regs *regs);
  44. typedef void pgm_check_handler_t(struct pt_regs *, long);
  45. pgm_check_handler_t *pgm_check_table[128];
  46. #ifdef CONFIG_SYSCTL
  47. #ifdef CONFIG_PROCESS_DEBUG
  48. int sysctl_userprocess_debug = 1;
  49. #else
  50. int sysctl_userprocess_debug = 0;
  51. #endif
  52. #endif
  53. extern pgm_check_handler_t do_protection_exception;
  54. extern pgm_check_handler_t do_dat_exception;
  55. extern pgm_check_handler_t do_monitor_call;
  56. #define stack_pointer ({ void **sp; asm("la %0,0(15)" : "=&d" (sp)); sp; })
  57. #ifndef CONFIG_64BIT
  58. #define FOURLONG "%08lx %08lx %08lx %08lx\n"
  59. static int kstack_depth_to_print = 12;
  60. #else /* CONFIG_64BIT */
  61. #define FOURLONG "%016lx %016lx %016lx %016lx\n"
  62. static int kstack_depth_to_print = 20;
  63. #endif /* CONFIG_64BIT */
  64. /*
  65. * For show_trace we have tree different stack to consider:
  66. * - the panic stack which is used if the kernel stack has overflown
  67. * - the asynchronous interrupt stack (cpu related)
  68. * - the synchronous kernel stack (process related)
  69. * The stack trace can start at any of the three stack and can potentially
  70. * touch all of them. The order is: panic stack, async stack, sync stack.
  71. */
  72. static unsigned long
  73. __show_trace(unsigned long sp, unsigned long low, unsigned long high)
  74. {
  75. struct stack_frame *sf;
  76. struct pt_regs *regs;
  77. while (1) {
  78. sp = sp & PSW_ADDR_INSN;
  79. if (sp < low || sp > high - sizeof(*sf))
  80. return sp;
  81. sf = (struct stack_frame *) sp;
  82. printk("([<%016lx>] ", sf->gprs[8] & PSW_ADDR_INSN);
  83. print_symbol("%s)\n", sf->gprs[8] & PSW_ADDR_INSN);
  84. /* Follow the backchain. */
  85. while (1) {
  86. low = sp;
  87. sp = sf->back_chain & PSW_ADDR_INSN;
  88. if (!sp)
  89. break;
  90. if (sp <= low || sp > high - sizeof(*sf))
  91. return sp;
  92. sf = (struct stack_frame *) sp;
  93. printk(" [<%016lx>] ", sf->gprs[8] & PSW_ADDR_INSN);
  94. print_symbol("%s\n", sf->gprs[8] & PSW_ADDR_INSN);
  95. }
  96. /* Zero backchain detected, check for interrupt frame. */
  97. sp = (unsigned long) (sf + 1);
  98. if (sp <= low || sp > high - sizeof(*regs))
  99. return sp;
  100. regs = (struct pt_regs *) sp;
  101. printk(" [<%016lx>] ", regs->psw.addr & PSW_ADDR_INSN);
  102. print_symbol("%s\n", regs->psw.addr & PSW_ADDR_INSN);
  103. low = sp;
  104. sp = regs->gprs[15];
  105. }
  106. }
  107. void show_trace(struct task_struct *task, unsigned long *stack)
  108. {
  109. register unsigned long __r15 asm ("15");
  110. unsigned long sp;
  111. sp = (unsigned long) stack;
  112. if (!sp)
  113. sp = task ? task->thread.ksp : __r15;
  114. printk("Call Trace:\n");
  115. #ifdef CONFIG_CHECK_STACK
  116. sp = __show_trace(sp, S390_lowcore.panic_stack - 4096,
  117. S390_lowcore.panic_stack);
  118. #endif
  119. sp = __show_trace(sp, S390_lowcore.async_stack - ASYNC_SIZE,
  120. S390_lowcore.async_stack);
  121. if (task)
  122. __show_trace(sp, (unsigned long) task_stack_page(task),
  123. (unsigned long) task_stack_page(task) + THREAD_SIZE);
  124. else
  125. __show_trace(sp, S390_lowcore.thread_info,
  126. S390_lowcore.thread_info + THREAD_SIZE);
  127. printk("\n");
  128. if (!task)
  129. task = current;
  130. debug_show_held_locks(task);
  131. }
  132. void show_stack(struct task_struct *task, unsigned long *sp)
  133. {
  134. register unsigned long * __r15 asm ("15");
  135. unsigned long *stack;
  136. int i;
  137. if (!sp)
  138. stack = task ? (unsigned long *) task->thread.ksp : __r15;
  139. else
  140. stack = sp;
  141. for (i = 0; i < kstack_depth_to_print; i++) {
  142. if (((addr_t) stack & (THREAD_SIZE-1)) == 0)
  143. break;
  144. if (i && ((i * sizeof (long) % 32) == 0))
  145. printk("\n ");
  146. printk("%p ", (void *)*stack++);
  147. }
  148. printk("\n");
  149. show_trace(task, sp);
  150. }
  151. /*
  152. * The architecture-independent dump_stack generator
  153. */
  154. void dump_stack(void)
  155. {
  156. show_stack(NULL, NULL);
  157. }
  158. EXPORT_SYMBOL(dump_stack);
  159. static inline int mask_bits(struct pt_regs *regs, unsigned long bits)
  160. {
  161. return (regs->psw.mask & bits) / ((~bits + 1) & bits);
  162. }
  163. void show_registers(struct pt_regs *regs)
  164. {
  165. char *mode;
  166. mode = (regs->psw.mask & PSW_MASK_PSTATE) ? "User" : "Krnl";
  167. printk("%s PSW : %p %p",
  168. mode, (void *) regs->psw.mask,
  169. (void *) regs->psw.addr);
  170. print_symbol(" (%s)\n", regs->psw.addr & PSW_ADDR_INSN);
  171. printk(" R:%x T:%x IO:%x EX:%x Key:%x M:%x W:%x "
  172. "P:%x AS:%x CC:%x PM:%x", mask_bits(regs, PSW_MASK_PER),
  173. mask_bits(regs, PSW_MASK_DAT), mask_bits(regs, PSW_MASK_IO),
  174. mask_bits(regs, PSW_MASK_EXT), mask_bits(regs, PSW_MASK_KEY),
  175. mask_bits(regs, PSW_MASK_MCHECK), mask_bits(regs, PSW_MASK_WAIT),
  176. mask_bits(regs, PSW_MASK_PSTATE), mask_bits(regs, PSW_MASK_ASC),
  177. mask_bits(regs, PSW_MASK_CC), mask_bits(regs, PSW_MASK_PM));
  178. #ifdef CONFIG_64BIT
  179. printk(" EA:%x", mask_bits(regs, PSW_BASE_BITS));
  180. #endif
  181. printk("\n%s GPRS: " FOURLONG, mode,
  182. regs->gprs[0], regs->gprs[1], regs->gprs[2], regs->gprs[3]);
  183. printk(" " FOURLONG,
  184. regs->gprs[4], regs->gprs[5], regs->gprs[6], regs->gprs[7]);
  185. printk(" " FOURLONG,
  186. regs->gprs[8], regs->gprs[9], regs->gprs[10], regs->gprs[11]);
  187. printk(" " FOURLONG,
  188. regs->gprs[12], regs->gprs[13], regs->gprs[14], regs->gprs[15]);
  189. show_code(regs);
  190. }
  191. /* This is called from fs/proc/array.c */
  192. char *task_show_regs(struct task_struct *task, char *buffer)
  193. {
  194. struct pt_regs *regs;
  195. regs = task_pt_regs(task);
  196. buffer += sprintf(buffer, "task: %p, ksp: %p\n",
  197. task, (void *)task->thread.ksp);
  198. buffer += sprintf(buffer, "User PSW : %p %p\n",
  199. (void *) regs->psw.mask, (void *)regs->psw.addr);
  200. buffer += sprintf(buffer, "User GPRS: " FOURLONG,
  201. regs->gprs[0], regs->gprs[1],
  202. regs->gprs[2], regs->gprs[3]);
  203. buffer += sprintf(buffer, " " FOURLONG,
  204. regs->gprs[4], regs->gprs[5],
  205. regs->gprs[6], regs->gprs[7]);
  206. buffer += sprintf(buffer, " " FOURLONG,
  207. regs->gprs[8], regs->gprs[9],
  208. regs->gprs[10], regs->gprs[11]);
  209. buffer += sprintf(buffer, " " FOURLONG,
  210. regs->gprs[12], regs->gprs[13],
  211. regs->gprs[14], regs->gprs[15]);
  212. buffer += sprintf(buffer, "User ACRS: %08x %08x %08x %08x\n",
  213. task->thread.acrs[0], task->thread.acrs[1],
  214. task->thread.acrs[2], task->thread.acrs[3]);
  215. buffer += sprintf(buffer, " %08x %08x %08x %08x\n",
  216. task->thread.acrs[4], task->thread.acrs[5],
  217. task->thread.acrs[6], task->thread.acrs[7]);
  218. buffer += sprintf(buffer, " %08x %08x %08x %08x\n",
  219. task->thread.acrs[8], task->thread.acrs[9],
  220. task->thread.acrs[10], task->thread.acrs[11]);
  221. buffer += sprintf(buffer, " %08x %08x %08x %08x\n",
  222. task->thread.acrs[12], task->thread.acrs[13],
  223. task->thread.acrs[14], task->thread.acrs[15]);
  224. return buffer;
  225. }
  226. static DEFINE_SPINLOCK(die_lock);
  227. void die(const char * str, struct pt_regs * regs, long err)
  228. {
  229. static int die_counter;
  230. oops_enter();
  231. debug_stop_all();
  232. console_verbose();
  233. spin_lock_irq(&die_lock);
  234. bust_spinlocks(1);
  235. printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
  236. print_modules();
  237. notify_die(DIE_OOPS, str, regs, err, current->thread.trap_no, SIGSEGV);
  238. show_regs(regs);
  239. bust_spinlocks(0);
  240. add_taint(TAINT_DIE);
  241. spin_unlock_irq(&die_lock);
  242. if (in_interrupt())
  243. panic("Fatal exception in interrupt");
  244. if (panic_on_oops)
  245. panic("Fatal exception: panic_on_oops");
  246. oops_exit();
  247. do_exit(SIGSEGV);
  248. }
  249. static void inline
  250. report_user_fault(long interruption_code, struct pt_regs *regs)
  251. {
  252. #if defined(CONFIG_SYSCTL)
  253. if (!sysctl_userprocess_debug)
  254. return;
  255. #endif
  256. #if defined(CONFIG_SYSCTL) || defined(CONFIG_PROCESS_DEBUG)
  257. printk("User process fault: interruption code 0x%lX\n",
  258. interruption_code);
  259. show_regs(regs);
  260. #endif
  261. }
  262. int is_valid_bugaddr(unsigned long addr)
  263. {
  264. return 1;
  265. }
  266. static void __kprobes inline do_trap(long interruption_code, int signr,
  267. char *str, struct pt_regs *regs,
  268. siginfo_t *info)
  269. {
  270. /*
  271. * We got all needed information from the lowcore and can
  272. * now safely switch on interrupts.
  273. */
  274. if (regs->psw.mask & PSW_MASK_PSTATE)
  275. local_irq_enable();
  276. if (notify_die(DIE_TRAP, str, regs, interruption_code,
  277. interruption_code, signr) == NOTIFY_STOP)
  278. return;
  279. if (regs->psw.mask & PSW_MASK_PSTATE) {
  280. struct task_struct *tsk = current;
  281. tsk->thread.trap_no = interruption_code & 0xffff;
  282. force_sig_info(signr, info, tsk);
  283. report_user_fault(interruption_code, regs);
  284. } else {
  285. const struct exception_table_entry *fixup;
  286. fixup = search_exception_tables(regs->psw.addr & PSW_ADDR_INSN);
  287. if (fixup)
  288. regs->psw.addr = fixup->fixup | PSW_ADDR_AMODE;
  289. else {
  290. enum bug_trap_type btt;
  291. btt = report_bug(regs->psw.addr & PSW_ADDR_INSN, regs);
  292. if (btt == BUG_TRAP_TYPE_WARN)
  293. return;
  294. die(str, regs, interruption_code);
  295. }
  296. }
  297. }
  298. static inline void __user *get_check_address(struct pt_regs *regs)
  299. {
  300. return (void __user *)((regs->psw.addr-S390_lowcore.pgm_ilc) & PSW_ADDR_INSN);
  301. }
  302. void __kprobes do_single_step(struct pt_regs *regs)
  303. {
  304. if (notify_die(DIE_SSTEP, "sstep", regs, 0, 0,
  305. SIGTRAP) == NOTIFY_STOP){
  306. return;
  307. }
  308. if ((current->ptrace & PT_PTRACED) != 0)
  309. force_sig(SIGTRAP, current);
  310. }
  311. static void default_trap_handler(struct pt_regs * regs, long interruption_code)
  312. {
  313. if (regs->psw.mask & PSW_MASK_PSTATE) {
  314. local_irq_enable();
  315. do_exit(SIGSEGV);
  316. report_user_fault(interruption_code, regs);
  317. } else
  318. die("Unknown program exception", regs, interruption_code);
  319. }
  320. #define DO_ERROR_INFO(signr, str, name, sicode, siaddr) \
  321. static void name(struct pt_regs * regs, long interruption_code) \
  322. { \
  323. siginfo_t info; \
  324. info.si_signo = signr; \
  325. info.si_errno = 0; \
  326. info.si_code = sicode; \
  327. info.si_addr = siaddr; \
  328. do_trap(interruption_code, signr, str, regs, &info); \
  329. }
  330. DO_ERROR_INFO(SIGILL, "addressing exception", addressing_exception,
  331. ILL_ILLADR, get_check_address(regs))
  332. DO_ERROR_INFO(SIGILL, "execute exception", execute_exception,
  333. ILL_ILLOPN, get_check_address(regs))
  334. DO_ERROR_INFO(SIGFPE, "fixpoint divide exception", divide_exception,
  335. FPE_INTDIV, get_check_address(regs))
  336. DO_ERROR_INFO(SIGFPE, "fixpoint overflow exception", overflow_exception,
  337. FPE_INTOVF, get_check_address(regs))
  338. DO_ERROR_INFO(SIGFPE, "HFP overflow exception", hfp_overflow_exception,
  339. FPE_FLTOVF, get_check_address(regs))
  340. DO_ERROR_INFO(SIGFPE, "HFP underflow exception", hfp_underflow_exception,
  341. FPE_FLTUND, get_check_address(regs))
  342. DO_ERROR_INFO(SIGFPE, "HFP significance exception", hfp_significance_exception,
  343. FPE_FLTRES, get_check_address(regs))
  344. DO_ERROR_INFO(SIGFPE, "HFP divide exception", hfp_divide_exception,
  345. FPE_FLTDIV, get_check_address(regs))
  346. DO_ERROR_INFO(SIGFPE, "HFP square root exception", hfp_sqrt_exception,
  347. FPE_FLTINV, get_check_address(regs))
  348. DO_ERROR_INFO(SIGILL, "operand exception", operand_exception,
  349. ILL_ILLOPN, get_check_address(regs))
  350. DO_ERROR_INFO(SIGILL, "privileged operation", privileged_op,
  351. ILL_PRVOPC, get_check_address(regs))
  352. DO_ERROR_INFO(SIGILL, "special operation exception", special_op_exception,
  353. ILL_ILLOPN, get_check_address(regs))
  354. DO_ERROR_INFO(SIGILL, "translation exception", translation_exception,
  355. ILL_ILLOPN, get_check_address(regs))
  356. static inline void
  357. do_fp_trap(struct pt_regs *regs, void __user *location,
  358. int fpc, long interruption_code)
  359. {
  360. siginfo_t si;
  361. si.si_signo = SIGFPE;
  362. si.si_errno = 0;
  363. si.si_addr = location;
  364. si.si_code = 0;
  365. /* FPC[2] is Data Exception Code */
  366. if ((fpc & 0x00000300) == 0) {
  367. /* bits 6 and 7 of DXC are 0 iff IEEE exception */
  368. if (fpc & 0x8000) /* invalid fp operation */
  369. si.si_code = FPE_FLTINV;
  370. else if (fpc & 0x4000) /* div by 0 */
  371. si.si_code = FPE_FLTDIV;
  372. else if (fpc & 0x2000) /* overflow */
  373. si.si_code = FPE_FLTOVF;
  374. else if (fpc & 0x1000) /* underflow */
  375. si.si_code = FPE_FLTUND;
  376. else if (fpc & 0x0800) /* inexact */
  377. si.si_code = FPE_FLTRES;
  378. }
  379. current->thread.ieee_instruction_pointer = (addr_t) location;
  380. do_trap(interruption_code, SIGFPE,
  381. "floating point exception", regs, &si);
  382. }
  383. static void illegal_op(struct pt_regs * regs, long interruption_code)
  384. {
  385. siginfo_t info;
  386. __u8 opcode[6];
  387. __u16 __user *location;
  388. int signal = 0;
  389. location = get_check_address(regs);
  390. /*
  391. * We got all needed information from the lowcore and can
  392. * now safely switch on interrupts.
  393. */
  394. if (regs->psw.mask & PSW_MASK_PSTATE)
  395. local_irq_enable();
  396. if (regs->psw.mask & PSW_MASK_PSTATE) {
  397. if (get_user(*((__u16 *) opcode), (__u16 __user *) location))
  398. return;
  399. if (*((__u16 *) opcode) == S390_BREAKPOINT_U16) {
  400. if (current->ptrace & PT_PTRACED)
  401. force_sig(SIGTRAP, current);
  402. else
  403. signal = SIGILL;
  404. #ifdef CONFIG_MATHEMU
  405. } else if (opcode[0] == 0xb3) {
  406. if (get_user(*((__u16 *) (opcode+2)), location+1))
  407. return;
  408. signal = math_emu_b3(opcode, regs);
  409. } else if (opcode[0] == 0xed) {
  410. if (get_user(*((__u32 *) (opcode+2)),
  411. (__u32 __user *)(location+1)))
  412. return;
  413. signal = math_emu_ed(opcode, regs);
  414. } else if (*((__u16 *) opcode) == 0xb299) {
  415. if (get_user(*((__u16 *) (opcode+2)), location+1))
  416. return;
  417. signal = math_emu_srnm(opcode, regs);
  418. } else if (*((__u16 *) opcode) == 0xb29c) {
  419. if (get_user(*((__u16 *) (opcode+2)), location+1))
  420. return;
  421. signal = math_emu_stfpc(opcode, regs);
  422. } else if (*((__u16 *) opcode) == 0xb29d) {
  423. if (get_user(*((__u16 *) (opcode+2)), location+1))
  424. return;
  425. signal = math_emu_lfpc(opcode, regs);
  426. #endif
  427. } else
  428. signal = SIGILL;
  429. } else {
  430. /*
  431. * If we get an illegal op in kernel mode, send it through the
  432. * kprobes notifier. If kprobes doesn't pick it up, SIGILL
  433. */
  434. if (notify_die(DIE_BPT, "bpt", regs, interruption_code,
  435. 3, SIGTRAP) != NOTIFY_STOP)
  436. signal = SIGILL;
  437. }
  438. #ifdef CONFIG_MATHEMU
  439. if (signal == SIGFPE)
  440. do_fp_trap(regs, location,
  441. current->thread.fp_regs.fpc, interruption_code);
  442. else if (signal == SIGSEGV) {
  443. info.si_signo = signal;
  444. info.si_errno = 0;
  445. info.si_code = SEGV_MAPERR;
  446. info.si_addr = (void __user *) location;
  447. do_trap(interruption_code, signal,
  448. "user address fault", regs, &info);
  449. } else
  450. #endif
  451. if (signal) {
  452. info.si_signo = signal;
  453. info.si_errno = 0;
  454. info.si_code = ILL_ILLOPC;
  455. info.si_addr = (void __user *) location;
  456. do_trap(interruption_code, signal,
  457. "illegal operation", regs, &info);
  458. }
  459. }
  460. #ifdef CONFIG_MATHEMU
  461. asmlinkage void
  462. specification_exception(struct pt_regs * regs, long interruption_code)
  463. {
  464. __u8 opcode[6];
  465. __u16 __user *location = NULL;
  466. int signal = 0;
  467. location = (__u16 __user *) get_check_address(regs);
  468. /*
  469. * We got all needed information from the lowcore and can
  470. * now safely switch on interrupts.
  471. */
  472. if (regs->psw.mask & PSW_MASK_PSTATE)
  473. local_irq_enable();
  474. if (regs->psw.mask & PSW_MASK_PSTATE) {
  475. get_user(*((__u16 *) opcode), location);
  476. switch (opcode[0]) {
  477. case 0x28: /* LDR Rx,Ry */
  478. signal = math_emu_ldr(opcode);
  479. break;
  480. case 0x38: /* LER Rx,Ry */
  481. signal = math_emu_ler(opcode);
  482. break;
  483. case 0x60: /* STD R,D(X,B) */
  484. get_user(*((__u16 *) (opcode+2)), location+1);
  485. signal = math_emu_std(opcode, regs);
  486. break;
  487. case 0x68: /* LD R,D(X,B) */
  488. get_user(*((__u16 *) (opcode+2)), location+1);
  489. signal = math_emu_ld(opcode, regs);
  490. break;
  491. case 0x70: /* STE R,D(X,B) */
  492. get_user(*((__u16 *) (opcode+2)), location+1);
  493. signal = math_emu_ste(opcode, regs);
  494. break;
  495. case 0x78: /* LE R,D(X,B) */
  496. get_user(*((__u16 *) (opcode+2)), location+1);
  497. signal = math_emu_le(opcode, regs);
  498. break;
  499. default:
  500. signal = SIGILL;
  501. break;
  502. }
  503. } else
  504. signal = SIGILL;
  505. if (signal == SIGFPE)
  506. do_fp_trap(regs, location,
  507. current->thread.fp_regs.fpc, interruption_code);
  508. else if (signal) {
  509. siginfo_t info;
  510. info.si_signo = signal;
  511. info.si_errno = 0;
  512. info.si_code = ILL_ILLOPN;
  513. info.si_addr = location;
  514. do_trap(interruption_code, signal,
  515. "specification exception", regs, &info);
  516. }
  517. }
  518. #else
  519. DO_ERROR_INFO(SIGILL, "specification exception", specification_exception,
  520. ILL_ILLOPN, get_check_address(regs));
  521. #endif
  522. static void data_exception(struct pt_regs * regs, long interruption_code)
  523. {
  524. __u16 __user *location;
  525. int signal = 0;
  526. location = get_check_address(regs);
  527. /*
  528. * We got all needed information from the lowcore and can
  529. * now safely switch on interrupts.
  530. */
  531. if (regs->psw.mask & PSW_MASK_PSTATE)
  532. local_irq_enable();
  533. if (MACHINE_HAS_IEEE)
  534. asm volatile("stfpc %0" : "=m" (current->thread.fp_regs.fpc));
  535. #ifdef CONFIG_MATHEMU
  536. else if (regs->psw.mask & PSW_MASK_PSTATE) {
  537. __u8 opcode[6];
  538. get_user(*((__u16 *) opcode), location);
  539. switch (opcode[0]) {
  540. case 0x28: /* LDR Rx,Ry */
  541. signal = math_emu_ldr(opcode);
  542. break;
  543. case 0x38: /* LER Rx,Ry */
  544. signal = math_emu_ler(opcode);
  545. break;
  546. case 0x60: /* STD R,D(X,B) */
  547. get_user(*((__u16 *) (opcode+2)), location+1);
  548. signal = math_emu_std(opcode, regs);
  549. break;
  550. case 0x68: /* LD R,D(X,B) */
  551. get_user(*((__u16 *) (opcode+2)), location+1);
  552. signal = math_emu_ld(opcode, regs);
  553. break;
  554. case 0x70: /* STE R,D(X,B) */
  555. get_user(*((__u16 *) (opcode+2)), location+1);
  556. signal = math_emu_ste(opcode, regs);
  557. break;
  558. case 0x78: /* LE R,D(X,B) */
  559. get_user(*((__u16 *) (opcode+2)), location+1);
  560. signal = math_emu_le(opcode, regs);
  561. break;
  562. case 0xb3:
  563. get_user(*((__u16 *) (opcode+2)), location+1);
  564. signal = math_emu_b3(opcode, regs);
  565. break;
  566. case 0xed:
  567. get_user(*((__u32 *) (opcode+2)),
  568. (__u32 __user *)(location+1));
  569. signal = math_emu_ed(opcode, regs);
  570. break;
  571. case 0xb2:
  572. if (opcode[1] == 0x99) {
  573. get_user(*((__u16 *) (opcode+2)), location+1);
  574. signal = math_emu_srnm(opcode, regs);
  575. } else if (opcode[1] == 0x9c) {
  576. get_user(*((__u16 *) (opcode+2)), location+1);
  577. signal = math_emu_stfpc(opcode, regs);
  578. } else if (opcode[1] == 0x9d) {
  579. get_user(*((__u16 *) (opcode+2)), location+1);
  580. signal = math_emu_lfpc(opcode, regs);
  581. } else
  582. signal = SIGILL;
  583. break;
  584. default:
  585. signal = SIGILL;
  586. break;
  587. }
  588. }
  589. #endif
  590. if (current->thread.fp_regs.fpc & FPC_DXC_MASK)
  591. signal = SIGFPE;
  592. else
  593. signal = SIGILL;
  594. if (signal == SIGFPE)
  595. do_fp_trap(regs, location,
  596. current->thread.fp_regs.fpc, interruption_code);
  597. else if (signal) {
  598. siginfo_t info;
  599. info.si_signo = signal;
  600. info.si_errno = 0;
  601. info.si_code = ILL_ILLOPN;
  602. info.si_addr = location;
  603. do_trap(interruption_code, signal,
  604. "data exception", regs, &info);
  605. }
  606. }
  607. static void space_switch_exception(struct pt_regs * regs, long int_code)
  608. {
  609. siginfo_t info;
  610. /* Set user psw back to home space mode. */
  611. if (regs->psw.mask & PSW_MASK_PSTATE)
  612. regs->psw.mask |= PSW_ASC_HOME;
  613. /* Send SIGILL. */
  614. info.si_signo = SIGILL;
  615. info.si_errno = 0;
  616. info.si_code = ILL_PRVOPC;
  617. info.si_addr = get_check_address(regs);
  618. do_trap(int_code, SIGILL, "space switch event", regs, &info);
  619. }
  620. asmlinkage void kernel_stack_overflow(struct pt_regs * regs)
  621. {
  622. bust_spinlocks(1);
  623. printk("Kernel stack overflow.\n");
  624. show_regs(regs);
  625. bust_spinlocks(0);
  626. panic("Corrupt kernel stack, can't continue.");
  627. }
  628. /* init is done in lowcore.S and head.S */
  629. void __init trap_init(void)
  630. {
  631. int i;
  632. for (i = 0; i < 128; i++)
  633. pgm_check_table[i] = &default_trap_handler;
  634. pgm_check_table[1] = &illegal_op;
  635. pgm_check_table[2] = &privileged_op;
  636. pgm_check_table[3] = &execute_exception;
  637. pgm_check_table[4] = &do_protection_exception;
  638. pgm_check_table[5] = &addressing_exception;
  639. pgm_check_table[6] = &specification_exception;
  640. pgm_check_table[7] = &data_exception;
  641. pgm_check_table[8] = &overflow_exception;
  642. pgm_check_table[9] = &divide_exception;
  643. pgm_check_table[0x0A] = &overflow_exception;
  644. pgm_check_table[0x0B] = &divide_exception;
  645. pgm_check_table[0x0C] = &hfp_overflow_exception;
  646. pgm_check_table[0x0D] = &hfp_underflow_exception;
  647. pgm_check_table[0x0E] = &hfp_significance_exception;
  648. pgm_check_table[0x0F] = &hfp_divide_exception;
  649. pgm_check_table[0x10] = &do_dat_exception;
  650. pgm_check_table[0x11] = &do_dat_exception;
  651. pgm_check_table[0x12] = &translation_exception;
  652. pgm_check_table[0x13] = &special_op_exception;
  653. #ifdef CONFIG_64BIT
  654. pgm_check_table[0x38] = &do_dat_exception;
  655. pgm_check_table[0x39] = &do_dat_exception;
  656. pgm_check_table[0x3A] = &do_dat_exception;
  657. pgm_check_table[0x3B] = &do_dat_exception;
  658. #endif /* CONFIG_64BIT */
  659. pgm_check_table[0x15] = &operand_exception;
  660. pgm_check_table[0x1C] = &space_switch_exception;
  661. pgm_check_table[0x1D] = &hfp_sqrt_exception;
  662. pgm_check_table[0x40] = &do_monitor_call;
  663. pfault_irq_init();
  664. }