cpufreq.c 7.0 KB

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  1. /*
  2. * Copyright (C) 2007 PA Semi, Inc
  3. *
  4. * Authors: Egor Martovetsky <egor@pasemi.com>
  5. * Olof Johansson <olof@lixom.net>
  6. *
  7. * Maintained by: Olof Johansson <olof@lixom.net>
  8. *
  9. * Based on arch/powerpc/platforms/cell/cbe_cpufreq.c:
  10. * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2, or (at your option)
  15. * any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  25. *
  26. */
  27. #include <linux/cpufreq.h>
  28. #include <linux/timer.h>
  29. #include <asm/hw_irq.h>
  30. #include <asm/io.h>
  31. #include <asm/prom.h>
  32. #include <asm/time.h>
  33. #define SDCASR_REG 0x0100
  34. #define SDCASR_REG_STRIDE 0x1000
  35. #define SDCPWR_CFGA0_REG 0x0100
  36. #define SDCPWR_PWST0_REG 0x0000
  37. #define SDCPWR_GIZTIME_REG 0x0440
  38. /* SDCPWR_GIZTIME_REG fields */
  39. #define SDCPWR_GIZTIME_GR 0x80000000
  40. #define SDCPWR_GIZTIME_LONGLOCK 0x000000ff
  41. /* Offset of ASR registers from SDC base */
  42. #define SDCASR_OFFSET 0x120000
  43. static void __iomem *sdcpwr_mapbase;
  44. static void __iomem *sdcasr_mapbase;
  45. static DEFINE_MUTEX(pas_switch_mutex);
  46. /* Current astate, is used when waking up from power savings on
  47. * one core, in case the other core has switched states during
  48. * the idle time.
  49. */
  50. static int current_astate;
  51. /* We support 5(A0-A4) power states excluding turbo(A5-A6) modes */
  52. static struct cpufreq_frequency_table pas_freqs[] = {
  53. {0, 0},
  54. {1, 0},
  55. {2, 0},
  56. {3, 0},
  57. {4, 0},
  58. {0, CPUFREQ_TABLE_END},
  59. };
  60. static struct freq_attr *pas_cpu_freqs_attr[] = {
  61. &cpufreq_freq_attr_scaling_available_freqs,
  62. NULL,
  63. };
  64. /*
  65. * hardware specific functions
  66. */
  67. static int get_astate_freq(int astate)
  68. {
  69. u32 ret;
  70. ret = in_le32(sdcpwr_mapbase + SDCPWR_CFGA0_REG + (astate * 0x10));
  71. return ret & 0x3f;
  72. }
  73. static int get_cur_astate(int cpu)
  74. {
  75. u32 ret;
  76. ret = in_le32(sdcpwr_mapbase + SDCPWR_PWST0_REG);
  77. ret = (ret >> (cpu * 4)) & 0x7;
  78. return ret;
  79. }
  80. static int get_gizmo_latency(void)
  81. {
  82. u32 giztime, ret;
  83. giztime = in_le32(sdcpwr_mapbase + SDCPWR_GIZTIME_REG);
  84. /* just provide the upper bound */
  85. if (giztime & SDCPWR_GIZTIME_GR)
  86. ret = (giztime & SDCPWR_GIZTIME_LONGLOCK) * 128000;
  87. else
  88. ret = (giztime & SDCPWR_GIZTIME_LONGLOCK) * 1000;
  89. return ret;
  90. }
  91. static void set_astate(int cpu, unsigned int astate)
  92. {
  93. u64 flags;
  94. /* Return if called before init has run */
  95. if (unlikely(!sdcasr_mapbase))
  96. return;
  97. local_irq_save(flags);
  98. out_le32(sdcasr_mapbase + SDCASR_REG + SDCASR_REG_STRIDE*cpu, astate);
  99. local_irq_restore(flags);
  100. }
  101. void restore_astate(int cpu)
  102. {
  103. set_astate(cpu, current_astate);
  104. }
  105. /*
  106. * cpufreq functions
  107. */
  108. static int pas_cpufreq_cpu_init(struct cpufreq_policy *policy)
  109. {
  110. const u32 *max_freqp;
  111. u32 max_freq;
  112. int i, cur_astate;
  113. struct resource res;
  114. struct device_node *cpu, *dn;
  115. int err = -ENODEV;
  116. cpu = of_get_cpu_node(policy->cpu, NULL);
  117. if (!cpu)
  118. goto out;
  119. dn = of_find_compatible_node(NULL, "sdc", "1682m-sdc");
  120. if (!dn)
  121. goto out;
  122. err = of_address_to_resource(dn, 0, &res);
  123. of_node_put(dn);
  124. if (err)
  125. goto out;
  126. sdcasr_mapbase = ioremap(res.start + SDCASR_OFFSET, 0x2000);
  127. if (!sdcasr_mapbase) {
  128. err = -EINVAL;
  129. goto out;
  130. }
  131. dn = of_find_compatible_node(NULL, "gizmo", "1682m-gizmo");
  132. if (!dn) {
  133. err = -ENODEV;
  134. goto out_unmap_sdcasr;
  135. }
  136. err = of_address_to_resource(dn, 0, &res);
  137. of_node_put(dn);
  138. if (err)
  139. goto out_unmap_sdcasr;
  140. sdcpwr_mapbase = ioremap(res.start, 0x1000);
  141. if (!sdcpwr_mapbase) {
  142. err = -EINVAL;
  143. goto out_unmap_sdcasr;
  144. }
  145. pr_debug("init cpufreq on CPU %d\n", policy->cpu);
  146. max_freqp = of_get_property(cpu, "clock-frequency", NULL);
  147. if (!max_freqp) {
  148. err = -EINVAL;
  149. goto out_unmap_sdcpwr;
  150. }
  151. /* we need the freq in kHz */
  152. max_freq = *max_freqp / 1000;
  153. pr_debug("max clock-frequency is at %u kHz\n", max_freq);
  154. pr_debug("initializing frequency table\n");
  155. /* initialize frequency table */
  156. for (i=0; pas_freqs[i].frequency!=CPUFREQ_TABLE_END; i++) {
  157. pas_freqs[i].frequency = get_astate_freq(pas_freqs[i].index) * 100000;
  158. pr_debug("%d: %d\n", i, pas_freqs[i].frequency);
  159. }
  160. policy->cpuinfo.transition_latency = get_gizmo_latency();
  161. cur_astate = get_cur_astate(policy->cpu);
  162. pr_debug("current astate is at %d\n",cur_astate);
  163. policy->cur = pas_freqs[cur_astate].frequency;
  164. policy->cpus = cpu_online_map;
  165. ppc_proc_freq = policy->cur * 1000ul;
  166. cpufreq_frequency_table_get_attr(pas_freqs, policy->cpu);
  167. /* this ensures that policy->cpuinfo_min and policy->cpuinfo_max
  168. * are set correctly
  169. */
  170. return cpufreq_frequency_table_cpuinfo(policy, pas_freqs);
  171. out_unmap_sdcpwr:
  172. iounmap(sdcpwr_mapbase);
  173. out_unmap_sdcasr:
  174. iounmap(sdcasr_mapbase);
  175. out:
  176. return err;
  177. }
  178. static int pas_cpufreq_cpu_exit(struct cpufreq_policy *policy)
  179. {
  180. if (sdcasr_mapbase)
  181. iounmap(sdcasr_mapbase);
  182. if (sdcpwr_mapbase)
  183. iounmap(sdcpwr_mapbase);
  184. cpufreq_frequency_table_put_attr(policy->cpu);
  185. return 0;
  186. }
  187. static int pas_cpufreq_verify(struct cpufreq_policy *policy)
  188. {
  189. return cpufreq_frequency_table_verify(policy, pas_freqs);
  190. }
  191. static int pas_cpufreq_target(struct cpufreq_policy *policy,
  192. unsigned int target_freq,
  193. unsigned int relation)
  194. {
  195. struct cpufreq_freqs freqs;
  196. int pas_astate_new;
  197. int i;
  198. cpufreq_frequency_table_target(policy,
  199. pas_freqs,
  200. target_freq,
  201. relation,
  202. &pas_astate_new);
  203. freqs.old = policy->cur;
  204. freqs.new = pas_freqs[pas_astate_new].frequency;
  205. freqs.cpu = policy->cpu;
  206. mutex_lock(&pas_switch_mutex);
  207. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  208. pr_debug("setting frequency for cpu %d to %d kHz, 1/%d of max frequency\n",
  209. policy->cpu,
  210. pas_freqs[pas_astate_new].frequency,
  211. pas_freqs[pas_astate_new].index);
  212. current_astate = pas_astate_new;
  213. for_each_online_cpu(i)
  214. set_astate(i, pas_astate_new);
  215. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  216. mutex_unlock(&pas_switch_mutex);
  217. ppc_proc_freq = freqs.new * 1000ul;
  218. return 0;
  219. }
  220. static struct cpufreq_driver pas_cpufreq_driver = {
  221. .name = "pas-cpufreq",
  222. .owner = THIS_MODULE,
  223. .flags = CPUFREQ_CONST_LOOPS,
  224. .init = pas_cpufreq_cpu_init,
  225. .exit = pas_cpufreq_cpu_exit,
  226. .verify = pas_cpufreq_verify,
  227. .target = pas_cpufreq_target,
  228. .attr = pas_cpu_freqs_attr,
  229. };
  230. /*
  231. * module init and destoy
  232. */
  233. static int __init pas_cpufreq_init(void)
  234. {
  235. if (!machine_is_compatible("PA6T-1682M"))
  236. return -ENODEV;
  237. return cpufreq_register_driver(&pas_cpufreq_driver);
  238. }
  239. static void __exit pas_cpufreq_exit(void)
  240. {
  241. cpufreq_unregister_driver(&pas_cpufreq_driver);
  242. }
  243. module_init(pas_cpufreq_init);
  244. module_exit(pas_cpufreq_exit);
  245. MODULE_LICENSE("GPL");
  246. MODULE_AUTHOR("Egor Martovetsky <egor@pasemi.com>, Olof Johansson <olof@lixom.net>");