setup.c 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701
  1. /*
  2. * Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
  3. * Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
  4. *
  5. * Description:
  6. * Architecture- / platform-specific boot-time initialization code for
  7. * the IBM iSeries LPAR. Adapted from original code by Grant Erickson and
  8. * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
  9. * <dan@net4x.com>.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version
  14. * 2 of the License, or (at your option) any later version.
  15. */
  16. #undef DEBUG
  17. #include <linux/init.h>
  18. #include <linux/threads.h>
  19. #include <linux/smp.h>
  20. #include <linux/param.h>
  21. #include <linux/string.h>
  22. #include <linux/seq_file.h>
  23. #include <linux/kdev_t.h>
  24. #include <linux/major.h>
  25. #include <linux/root_dev.h>
  26. #include <linux/kernel.h>
  27. #include <linux/hrtimer.h>
  28. #include <linux/tick.h>
  29. #include <asm/processor.h>
  30. #include <asm/machdep.h>
  31. #include <asm/page.h>
  32. #include <asm/mmu.h>
  33. #include <asm/pgtable.h>
  34. #include <asm/mmu_context.h>
  35. #include <asm/cputable.h>
  36. #include <asm/sections.h>
  37. #include <asm/iommu.h>
  38. #include <asm/firmware.h>
  39. #include <asm/system.h>
  40. #include <asm/time.h>
  41. #include <asm/paca.h>
  42. #include <asm/cache.h>
  43. #include <asm/abs_addr.h>
  44. #include <asm/iseries/hv_lp_config.h>
  45. #include <asm/iseries/hv_call_event.h>
  46. #include <asm/iseries/hv_call_xm.h>
  47. #include <asm/iseries/it_lp_queue.h>
  48. #include <asm/iseries/mf.h>
  49. #include <asm/iseries/hv_lp_event.h>
  50. #include <asm/iseries/lpar_map.h>
  51. #include <asm/udbg.h>
  52. #include <asm/irq.h>
  53. #include "naca.h"
  54. #include "setup.h"
  55. #include "irq.h"
  56. #include "vpd_areas.h"
  57. #include "processor_vpd.h"
  58. #include "it_lp_naca.h"
  59. #include "main_store.h"
  60. #include "call_sm.h"
  61. #include "call_hpt.h"
  62. #ifdef DEBUG
  63. #define DBG(fmt...) udbg_printf(fmt)
  64. #else
  65. #define DBG(fmt...)
  66. #endif
  67. /* Function Prototypes */
  68. static unsigned long build_iSeries_Memory_Map(void);
  69. static void iseries_shared_idle(void);
  70. static void iseries_dedicated_idle(void);
  71. #ifdef CONFIG_PCI
  72. extern void iSeries_pci_final_fixup(void);
  73. #else
  74. static void iSeries_pci_final_fixup(void) { }
  75. #endif
  76. struct MemoryBlock {
  77. unsigned long absStart;
  78. unsigned long absEnd;
  79. unsigned long logicalStart;
  80. unsigned long logicalEnd;
  81. };
  82. /*
  83. * Process the main store vpd to determine where the holes in memory are
  84. * and return the number of physical blocks and fill in the array of
  85. * block data.
  86. */
  87. static unsigned long iSeries_process_Condor_mainstore_vpd(
  88. struct MemoryBlock *mb_array, unsigned long max_entries)
  89. {
  90. unsigned long holeFirstChunk, holeSizeChunks;
  91. unsigned long numMemoryBlocks = 1;
  92. struct IoHriMainStoreSegment4 *msVpd =
  93. (struct IoHriMainStoreSegment4 *)xMsVpd;
  94. unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
  95. unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
  96. unsigned long holeSize = holeEnd - holeStart;
  97. printk("Mainstore_VPD: Condor\n");
  98. /*
  99. * Determine if absolute memory has any
  100. * holes so that we can interpret the
  101. * access map we get back from the hypervisor
  102. * correctly.
  103. */
  104. mb_array[0].logicalStart = 0;
  105. mb_array[0].logicalEnd = 0x100000000;
  106. mb_array[0].absStart = 0;
  107. mb_array[0].absEnd = 0x100000000;
  108. if (holeSize) {
  109. numMemoryBlocks = 2;
  110. holeStart = holeStart & 0x000fffffffffffff;
  111. holeStart = addr_to_chunk(holeStart);
  112. holeFirstChunk = holeStart;
  113. holeSize = addr_to_chunk(holeSize);
  114. holeSizeChunks = holeSize;
  115. printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
  116. holeFirstChunk, holeSizeChunks );
  117. mb_array[0].logicalEnd = holeFirstChunk;
  118. mb_array[0].absEnd = holeFirstChunk;
  119. mb_array[1].logicalStart = holeFirstChunk;
  120. mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
  121. mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
  122. mb_array[1].absEnd = 0x100000000;
  123. }
  124. return numMemoryBlocks;
  125. }
  126. #define MaxSegmentAreas 32
  127. #define MaxSegmentAdrRangeBlocks 128
  128. #define MaxAreaRangeBlocks 4
  129. static unsigned long iSeries_process_Regatta_mainstore_vpd(
  130. struct MemoryBlock *mb_array, unsigned long max_entries)
  131. {
  132. struct IoHriMainStoreSegment5 *msVpdP =
  133. (struct IoHriMainStoreSegment5 *)xMsVpd;
  134. unsigned long numSegmentBlocks = 0;
  135. u32 existsBits = msVpdP->msAreaExists;
  136. unsigned long area_num;
  137. printk("Mainstore_VPD: Regatta\n");
  138. for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
  139. unsigned long numAreaBlocks;
  140. struct IoHriMainStoreArea4 *currentArea;
  141. if (existsBits & 0x80000000) {
  142. unsigned long block_num;
  143. currentArea = &msVpdP->msAreaArray[area_num];
  144. numAreaBlocks = currentArea->numAdrRangeBlocks;
  145. printk("ms_vpd: processing area %2ld blocks=%ld",
  146. area_num, numAreaBlocks);
  147. for (block_num = 0; block_num < numAreaBlocks;
  148. ++block_num ) {
  149. /* Process an address range block */
  150. struct MemoryBlock tempBlock;
  151. unsigned long i;
  152. tempBlock.absStart =
  153. (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
  154. tempBlock.absEnd =
  155. (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
  156. tempBlock.logicalStart = 0;
  157. tempBlock.logicalEnd = 0;
  158. printk("\n block %ld absStart=%016lx absEnd=%016lx",
  159. block_num, tempBlock.absStart,
  160. tempBlock.absEnd);
  161. for (i = 0; i < numSegmentBlocks; ++i) {
  162. if (mb_array[i].absStart ==
  163. tempBlock.absStart)
  164. break;
  165. }
  166. if (i == numSegmentBlocks) {
  167. if (numSegmentBlocks == max_entries)
  168. panic("iSeries_process_mainstore_vpd: too many memory blocks");
  169. mb_array[numSegmentBlocks] = tempBlock;
  170. ++numSegmentBlocks;
  171. } else
  172. printk(" (duplicate)");
  173. }
  174. printk("\n");
  175. }
  176. existsBits <<= 1;
  177. }
  178. /* Now sort the blocks found into ascending sequence */
  179. if (numSegmentBlocks > 1) {
  180. unsigned long m, n;
  181. for (m = 0; m < numSegmentBlocks - 1; ++m) {
  182. for (n = numSegmentBlocks - 1; m < n; --n) {
  183. if (mb_array[n].absStart <
  184. mb_array[n-1].absStart) {
  185. struct MemoryBlock tempBlock;
  186. tempBlock = mb_array[n];
  187. mb_array[n] = mb_array[n-1];
  188. mb_array[n-1] = tempBlock;
  189. }
  190. }
  191. }
  192. }
  193. /*
  194. * Assign "logical" addresses to each block. These
  195. * addresses correspond to the hypervisor "bitmap" space.
  196. * Convert all addresses into units of 256K chunks.
  197. */
  198. {
  199. unsigned long i, nextBitmapAddress;
  200. printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
  201. nextBitmapAddress = 0;
  202. for (i = 0; i < numSegmentBlocks; ++i) {
  203. unsigned long length = mb_array[i].absEnd -
  204. mb_array[i].absStart;
  205. mb_array[i].logicalStart = nextBitmapAddress;
  206. mb_array[i].logicalEnd = nextBitmapAddress + length;
  207. nextBitmapAddress += length;
  208. printk(" Bitmap range: %016lx - %016lx\n"
  209. " Absolute range: %016lx - %016lx\n",
  210. mb_array[i].logicalStart,
  211. mb_array[i].logicalEnd,
  212. mb_array[i].absStart, mb_array[i].absEnd);
  213. mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
  214. 0x000fffffffffffff);
  215. mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
  216. 0x000fffffffffffff);
  217. mb_array[i].logicalStart =
  218. addr_to_chunk(mb_array[i].logicalStart);
  219. mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
  220. }
  221. }
  222. return numSegmentBlocks;
  223. }
  224. static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
  225. unsigned long max_entries)
  226. {
  227. unsigned long i;
  228. unsigned long mem_blocks = 0;
  229. if (cpu_has_feature(CPU_FTR_SLB))
  230. mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
  231. max_entries);
  232. else
  233. mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
  234. max_entries);
  235. printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
  236. for (i = 0; i < mem_blocks; ++i) {
  237. printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
  238. " abs chunks %016lx - %016lx\n",
  239. i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
  240. mb_array[i].absStart, mb_array[i].absEnd);
  241. }
  242. return mem_blocks;
  243. }
  244. static void __init iSeries_get_cmdline(void)
  245. {
  246. char *p, *q;
  247. /* copy the command line parameter from the primary VSP */
  248. HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
  249. HvLpDma_Direction_RemoteToLocal);
  250. p = cmd_line;
  251. q = cmd_line + 255;
  252. while(p < q) {
  253. if (!*p || *p == '\n')
  254. break;
  255. ++p;
  256. }
  257. *p = 0;
  258. }
  259. static void __init iSeries_init_early(void)
  260. {
  261. DBG(" -> iSeries_init_early()\n");
  262. /* Snapshot the timebase, for use in later recalibration */
  263. iSeries_time_init_early();
  264. /*
  265. * Initialize the DMA/TCE management
  266. */
  267. iommu_init_early_iSeries();
  268. /* Initialize machine-dependency vectors */
  269. #ifdef CONFIG_SMP
  270. smp_init_iSeries();
  271. #endif
  272. /* Associate Lp Event Queue 0 with processor 0 */
  273. HvCallEvent_setLpEventQueueInterruptProc(0, 0);
  274. mf_init();
  275. DBG(" <- iSeries_init_early()\n");
  276. }
  277. struct mschunks_map mschunks_map = {
  278. /* XXX We don't use these, but Piranha might need them. */
  279. .chunk_size = MSCHUNKS_CHUNK_SIZE,
  280. .chunk_shift = MSCHUNKS_CHUNK_SHIFT,
  281. .chunk_mask = MSCHUNKS_OFFSET_MASK,
  282. };
  283. EXPORT_SYMBOL(mschunks_map);
  284. void mschunks_alloc(unsigned long num_chunks)
  285. {
  286. klimit = _ALIGN(klimit, sizeof(u32));
  287. mschunks_map.mapping = (u32 *)klimit;
  288. klimit += num_chunks * sizeof(u32);
  289. mschunks_map.num_chunks = num_chunks;
  290. }
  291. /*
  292. * The iSeries may have very large memories ( > 128 GB ) and a partition
  293. * may get memory in "chunks" that may be anywhere in the 2**52 real
  294. * address space. The chunks are 256K in size. To map this to the
  295. * memory model Linux expects, the AS/400 specific code builds a
  296. * translation table to translate what Linux thinks are "physical"
  297. * addresses to the actual real addresses. This allows us to make
  298. * it appear to Linux that we have contiguous memory starting at
  299. * physical address zero while in fact this could be far from the truth.
  300. * To avoid confusion, I'll let the words physical and/or real address
  301. * apply to the Linux addresses while I'll use "absolute address" to
  302. * refer to the actual hardware real address.
  303. *
  304. * build_iSeries_Memory_Map gets information from the Hypervisor and
  305. * looks at the Main Store VPD to determine the absolute addresses
  306. * of the memory that has been assigned to our partition and builds
  307. * a table used to translate Linux's physical addresses to these
  308. * absolute addresses. Absolute addresses are needed when
  309. * communicating with the hypervisor (e.g. to build HPT entries)
  310. *
  311. * Returns the physical memory size
  312. */
  313. static unsigned long __init build_iSeries_Memory_Map(void)
  314. {
  315. u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
  316. u32 nextPhysChunk;
  317. u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
  318. u32 totalChunks,moreChunks;
  319. u32 currChunk, thisChunk, absChunk;
  320. u32 currDword;
  321. u32 chunkBit;
  322. u64 map;
  323. struct MemoryBlock mb[32];
  324. unsigned long numMemoryBlocks, curBlock;
  325. /* Chunk size on iSeries is 256K bytes */
  326. totalChunks = (u32)HvLpConfig_getMsChunks();
  327. mschunks_alloc(totalChunks);
  328. /*
  329. * Get absolute address of our load area
  330. * and map it to physical address 0
  331. * This guarantees that the loadarea ends up at physical 0
  332. * otherwise, it might not be returned by PLIC as the first
  333. * chunks
  334. */
  335. loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
  336. loadAreaSize = itLpNaca.xLoadAreaChunks;
  337. /*
  338. * Only add the pages already mapped here.
  339. * Otherwise we might add the hpt pages
  340. * The rest of the pages of the load area
  341. * aren't in the HPT yet and can still
  342. * be assigned an arbitrary physical address
  343. */
  344. if ((loadAreaSize * 64) > HvPagesToMap)
  345. loadAreaSize = HvPagesToMap / 64;
  346. loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
  347. /*
  348. * TODO Do we need to do something if the HPT is in the 64MB load area?
  349. * This would be required if the itLpNaca.xLoadAreaChunks includes
  350. * the HPT size
  351. */
  352. printk("Mapping load area - physical addr = 0000000000000000\n"
  353. " absolute addr = %016lx\n",
  354. chunk_to_addr(loadAreaFirstChunk));
  355. printk("Load area size %dK\n", loadAreaSize * 256);
  356. for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
  357. mschunks_map.mapping[nextPhysChunk] =
  358. loadAreaFirstChunk + nextPhysChunk;
  359. /*
  360. * Get absolute address of our HPT and remember it so
  361. * we won't map it to any physical address
  362. */
  363. hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
  364. hptSizePages = (u32)HvCallHpt_getHptPages();
  365. hptSizeChunks = hptSizePages >>
  366. (MSCHUNKS_CHUNK_SHIFT - HW_PAGE_SHIFT);
  367. hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
  368. printk("HPT absolute addr = %016lx, size = %dK\n",
  369. chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
  370. /*
  371. * Determine if absolute memory has any
  372. * holes so that we can interpret the
  373. * access map we get back from the hypervisor
  374. * correctly.
  375. */
  376. numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
  377. /*
  378. * Process the main store access map from the hypervisor
  379. * to build up our physical -> absolute translation table
  380. */
  381. curBlock = 0;
  382. currChunk = 0;
  383. currDword = 0;
  384. moreChunks = totalChunks;
  385. while (moreChunks) {
  386. map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
  387. currDword);
  388. thisChunk = currChunk;
  389. while (map) {
  390. chunkBit = map >> 63;
  391. map <<= 1;
  392. if (chunkBit) {
  393. --moreChunks;
  394. while (thisChunk >= mb[curBlock].logicalEnd) {
  395. ++curBlock;
  396. if (curBlock >= numMemoryBlocks)
  397. panic("out of memory blocks");
  398. }
  399. if (thisChunk < mb[curBlock].logicalStart)
  400. panic("memory block error");
  401. absChunk = mb[curBlock].absStart +
  402. (thisChunk - mb[curBlock].logicalStart);
  403. if (((absChunk < hptFirstChunk) ||
  404. (absChunk > hptLastChunk)) &&
  405. ((absChunk < loadAreaFirstChunk) ||
  406. (absChunk > loadAreaLastChunk))) {
  407. mschunks_map.mapping[nextPhysChunk] =
  408. absChunk;
  409. ++nextPhysChunk;
  410. }
  411. }
  412. ++thisChunk;
  413. }
  414. ++currDword;
  415. currChunk += 64;
  416. }
  417. /*
  418. * main store size (in chunks) is
  419. * totalChunks - hptSizeChunks
  420. * which should be equal to
  421. * nextPhysChunk
  422. */
  423. return chunk_to_addr(nextPhysChunk);
  424. }
  425. /*
  426. * Document me.
  427. */
  428. static void __init iSeries_setup_arch(void)
  429. {
  430. if (get_lppaca()->shared_proc) {
  431. ppc_md.idle_loop = iseries_shared_idle;
  432. printk(KERN_DEBUG "Using shared processor idle loop\n");
  433. } else {
  434. ppc_md.idle_loop = iseries_dedicated_idle;
  435. printk(KERN_DEBUG "Using dedicated idle loop\n");
  436. }
  437. /* Setup the Lp Event Queue */
  438. setup_hvlpevent_queue();
  439. printk("Max logical processors = %d\n",
  440. itVpdAreas.xSlicMaxLogicalProcs);
  441. printk("Max physical processors = %d\n",
  442. itVpdAreas.xSlicMaxPhysicalProcs);
  443. }
  444. static void iSeries_show_cpuinfo(struct seq_file *m)
  445. {
  446. seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
  447. }
  448. static void __init iSeries_progress(char * st, unsigned short code)
  449. {
  450. printk("Progress: [%04x] - %s\n", (unsigned)code, st);
  451. mf_display_progress(code);
  452. }
  453. static void __init iSeries_fixup_klimit(void)
  454. {
  455. /*
  456. * Change klimit to take into account any ram disk
  457. * that may be included
  458. */
  459. if (naca.xRamDisk)
  460. klimit = KERNELBASE + (u64)naca.xRamDisk +
  461. (naca.xRamDiskSize * HW_PAGE_SIZE);
  462. }
  463. static int __init iSeries_src_init(void)
  464. {
  465. /* clear the progress line */
  466. if (firmware_has_feature(FW_FEATURE_ISERIES))
  467. ppc_md.progress(" ", 0xffff);
  468. return 0;
  469. }
  470. late_initcall(iSeries_src_init);
  471. static inline void process_iSeries_events(void)
  472. {
  473. asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
  474. }
  475. static void yield_shared_processor(void)
  476. {
  477. unsigned long tb;
  478. HvCall_setEnabledInterrupts(HvCall_MaskIPI |
  479. HvCall_MaskLpEvent |
  480. HvCall_MaskLpProd |
  481. HvCall_MaskTimeout);
  482. tb = get_tb();
  483. /* Compute future tb value when yield should expire */
  484. HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy);
  485. /*
  486. * The decrementer stops during the yield. Force a fake decrementer
  487. * here and let the timer_interrupt code sort out the actual time.
  488. */
  489. get_lppaca()->int_dword.fields.decr_int = 1;
  490. ppc64_runlatch_on();
  491. process_iSeries_events();
  492. }
  493. static void iseries_shared_idle(void)
  494. {
  495. while (1) {
  496. tick_nohz_stop_sched_tick();
  497. while (!need_resched() && !hvlpevent_is_pending()) {
  498. local_irq_disable();
  499. ppc64_runlatch_off();
  500. /* Recheck with irqs off */
  501. if (!need_resched() && !hvlpevent_is_pending())
  502. yield_shared_processor();
  503. HMT_medium();
  504. local_irq_enable();
  505. }
  506. ppc64_runlatch_on();
  507. tick_nohz_restart_sched_tick();
  508. if (hvlpevent_is_pending())
  509. process_iSeries_events();
  510. preempt_enable_no_resched();
  511. schedule();
  512. preempt_disable();
  513. }
  514. }
  515. static void iseries_dedicated_idle(void)
  516. {
  517. set_thread_flag(TIF_POLLING_NRFLAG);
  518. while (1) {
  519. tick_nohz_stop_sched_tick();
  520. if (!need_resched()) {
  521. while (!need_resched()) {
  522. ppc64_runlatch_off();
  523. HMT_low();
  524. if (hvlpevent_is_pending()) {
  525. HMT_medium();
  526. ppc64_runlatch_on();
  527. process_iSeries_events();
  528. }
  529. }
  530. HMT_medium();
  531. }
  532. ppc64_runlatch_on();
  533. tick_nohz_restart_sched_tick();
  534. preempt_enable_no_resched();
  535. schedule();
  536. preempt_disable();
  537. }
  538. }
  539. static void __iomem *iseries_ioremap(phys_addr_t address, unsigned long size,
  540. unsigned long flags)
  541. {
  542. return (void __iomem *)address;
  543. }
  544. static void iseries_iounmap(volatile void __iomem *token)
  545. {
  546. }
  547. static int __init iseries_probe(void)
  548. {
  549. unsigned long root = of_get_flat_dt_root();
  550. if (!of_flat_dt_is_compatible(root, "IBM,iSeries"))
  551. return 0;
  552. hpte_init_iSeries();
  553. /* iSeries does not support 16M pages */
  554. cur_cpu_spec->cpu_features &= ~CPU_FTR_16M_PAGE;
  555. return 1;
  556. }
  557. define_machine(iseries) {
  558. .name = "iSeries",
  559. .setup_arch = iSeries_setup_arch,
  560. .show_cpuinfo = iSeries_show_cpuinfo,
  561. .init_IRQ = iSeries_init_IRQ,
  562. .get_irq = iSeries_get_irq,
  563. .init_early = iSeries_init_early,
  564. .pcibios_fixup = iSeries_pci_final_fixup,
  565. .restart = mf_reboot,
  566. .power_off = mf_power_off,
  567. .halt = mf_power_off,
  568. .get_boot_time = iSeries_get_boot_time,
  569. .set_rtc_time = iSeries_set_rtc_time,
  570. .get_rtc_time = iSeries_get_rtc_time,
  571. .calibrate_decr = generic_calibrate_decr,
  572. .progress = iSeries_progress,
  573. .probe = iseries_probe,
  574. .ioremap = iseries_ioremap,
  575. .iounmap = iseries_iounmap,
  576. /* XXX Implement enable_pmcs for iSeries */
  577. };
  578. void * __init iSeries_early_setup(void)
  579. {
  580. unsigned long phys_mem_size;
  581. /* Identify CPU type. This is done again by the common code later
  582. * on but calling this function multiple times is fine.
  583. */
  584. identify_cpu(0, mfspr(SPRN_PVR));
  585. powerpc_firmware_features |= FW_FEATURE_ISERIES;
  586. powerpc_firmware_features |= FW_FEATURE_LPAR;
  587. iSeries_fixup_klimit();
  588. /*
  589. * Initialize the table which translate Linux physical addresses to
  590. * AS/400 absolute addresses
  591. */
  592. phys_mem_size = build_iSeries_Memory_Map();
  593. iSeries_get_cmdline();
  594. return (void *) __pa(build_flat_dt(phys_mem_size));
  595. }
  596. static void hvputc(char c)
  597. {
  598. if (c == '\n')
  599. hvputc('\r');
  600. HvCall_writeLogBuffer(&c, 1);
  601. }
  602. void __init udbg_init_iseries(void)
  603. {
  604. udbg_putc = hvputc;
  605. }