mpc866ads.dts 3.1 KB

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  1. /*
  2. * MPC866 ADS Device Tree Source
  3. *
  4. * Copyright 2006 MontaVista Software, Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. / {
  12. model = "MPC866ADS";
  13. compatible = "mpc8xx";
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. cpus {
  17. #address-cells = <1>;
  18. #size-cells = <0>;
  19. PowerPC,866@0 {
  20. device_type = "cpu";
  21. reg = <0>;
  22. d-cache-line-size = <20>; // 32 bytes
  23. i-cache-line-size = <20>; // 32 bytes
  24. d-cache-size = <2000>; // L1, 8K
  25. i-cache-size = <4000>; // L1, 16K
  26. timebase-frequency = <0>;
  27. bus-frequency = <0>;
  28. clock-frequency = <0>;
  29. interrupts = <f 2>; // decrementer interrupt
  30. interrupt-parent = <&Mpc8xx_pic>;
  31. };
  32. };
  33. memory {
  34. device_type = "memory";
  35. reg = <00000000 800000>;
  36. };
  37. soc866@ff000000 {
  38. #address-cells = <1>;
  39. #size-cells = <1>;
  40. device_type = "soc";
  41. ranges = <0 ff000000 00100000>;
  42. reg = <ff000000 00000200>;
  43. bus-frequency = <0>;
  44. mdio@e80 {
  45. device_type = "mdio";
  46. compatible = "fs_enet";
  47. reg = <e80 8>;
  48. #address-cells = <1>;
  49. #size-cells = <0>;
  50. phy: ethernet-phy@f {
  51. reg = <f>;
  52. device_type = "ethernet-phy";
  53. };
  54. };
  55. fec@e00 {
  56. device_type = "network";
  57. compatible = "fs_enet";
  58. model = "FEC";
  59. device-id = <1>;
  60. reg = <e00 188>;
  61. mac-address = [ 00 00 0C 00 01 FD ];
  62. interrupts = <3 1>;
  63. interrupt-parent = <&Mpc8xx_pic>;
  64. phy-handle = <&Phy>;
  65. };
  66. mpc8xx_pic: pic@ff000000 {
  67. interrupt-controller;
  68. #address-cells = <0>;
  69. #interrupt-cells = <2>;
  70. reg = <0 24>;
  71. device_type = "mpc8xx-pic";
  72. compatible = "CPM";
  73. };
  74. cpm@ff000000 {
  75. #address-cells = <1>;
  76. #size-cells = <1>;
  77. device_type = "cpm";
  78. model = "CPM";
  79. ranges = <0 0 4000>;
  80. reg = <860 f0>;
  81. command-proc = <9c0>;
  82. brg-frequency = <0>;
  83. interrupts = <0 2>; // cpm error interrupt
  84. interrupt-parent = <&Cpm_pic>;
  85. cpm_pic: pic@930 {
  86. interrupt-controller;
  87. #address-cells = <0>;
  88. #interrupt-cells = <2>;
  89. interrupts = <5 2 0 2>;
  90. interrupt-parent = <&Mpc8xx_pic>;
  91. reg = <930 20>;
  92. device_type = "cpm-pic";
  93. compatible = "CPM";
  94. };
  95. smc@a80 {
  96. device_type = "serial";
  97. compatible = "cpm_uart";
  98. model = "SMC";
  99. device-id = <1>;
  100. reg = <a80 10 3e80 40>;
  101. clock-setup = <00ffffff 0>;
  102. rx-clock = <1>;
  103. tx-clock = <1>;
  104. current-speed = <0>;
  105. interrupts = <4 3>;
  106. interrupt-parent = <&Cpm_pic>;
  107. };
  108. smc@a90 {
  109. device_type = "serial";
  110. compatible = "cpm_uart";
  111. model = "SMC";
  112. device-id = <2>;
  113. reg = <a90 20 3f80 40>;
  114. clock-setup = <ff00ffff 90000>;
  115. rx-clock = <2>;
  116. tx-clock = <2>;
  117. current-speed = <0>;
  118. interrupts = <3 3>;
  119. interrupt-parent = <&Cpm_pic>;
  120. };
  121. scc@a00 {
  122. device_type = "network";
  123. compatible = "fs_enet";
  124. model = "SCC";
  125. device-id = <1>;
  126. reg = <a00 18 3c00 80>;
  127. mac-address = [ 00 00 0C 00 03 FD ];
  128. interrupts = <1e 3>;
  129. interrupt-parent = <&Cpm_pic>;
  130. };
  131. };
  132. };
  133. };