mpc8641_hpcn.dts 10 KB

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  1. /*
  2. * MPC8641 HPCN Device Tree Source
  3. *
  4. * Copyright 2006 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. / {
  12. model = "MPC8641HPCN";
  13. compatible = "mpc86xx";
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. cpus {
  17. #address-cells = <1>;
  18. #size-cells = <0>;
  19. PowerPC,8641@0 {
  20. device_type = "cpu";
  21. reg = <0>;
  22. d-cache-line-size = <20>; // 32 bytes
  23. i-cache-line-size = <20>; // 32 bytes
  24. d-cache-size = <8000>; // L1, 32K
  25. i-cache-size = <8000>; // L1, 32K
  26. timebase-frequency = <0>; // 33 MHz, from uboot
  27. bus-frequency = <0>; // From uboot
  28. clock-frequency = <0>; // From uboot
  29. };
  30. PowerPC,8641@1 {
  31. device_type = "cpu";
  32. reg = <1>;
  33. d-cache-line-size = <20>; // 32 bytes
  34. i-cache-line-size = <20>; // 32 bytes
  35. d-cache-size = <8000>; // L1, 32K
  36. i-cache-size = <8000>; // L1, 32K
  37. timebase-frequency = <0>; // 33 MHz, from uboot
  38. bus-frequency = <0>; // From uboot
  39. clock-frequency = <0>; // From uboot
  40. };
  41. };
  42. memory {
  43. device_type = "memory";
  44. reg = <00000000 40000000>; // 1G at 0x0
  45. };
  46. soc8641@f8000000 {
  47. #address-cells = <1>;
  48. #size-cells = <1>;
  49. device_type = "soc";
  50. ranges = <00000000 f8000000 00100000>;
  51. reg = <f8000000 00001000>; // CCSRBAR
  52. bus-frequency = <0>;
  53. i2c@3000 {
  54. device_type = "i2c";
  55. compatible = "fsl-i2c";
  56. reg = <3000 100>;
  57. interrupts = <2b 2>;
  58. interrupt-parent = <&mpic>;
  59. dfsrr;
  60. };
  61. i2c@3100 {
  62. device_type = "i2c";
  63. compatible = "fsl-i2c";
  64. reg = <3100 100>;
  65. interrupts = <2b 2>;
  66. interrupt-parent = <&mpic>;
  67. dfsrr;
  68. };
  69. mdio@24520 {
  70. #address-cells = <1>;
  71. #size-cells = <0>;
  72. device_type = "mdio";
  73. compatible = "gianfar";
  74. reg = <24520 20>;
  75. phy0: ethernet-phy@0 {
  76. interrupt-parent = <&mpic>;
  77. interrupts = <a 1>;
  78. reg = <0>;
  79. device_type = "ethernet-phy";
  80. };
  81. phy1: ethernet-phy@1 {
  82. interrupt-parent = <&mpic>;
  83. interrupts = <a 1>;
  84. reg = <1>;
  85. device_type = "ethernet-phy";
  86. };
  87. phy2: ethernet-phy@2 {
  88. interrupt-parent = <&mpic>;
  89. interrupts = <a 1>;
  90. reg = <2>;
  91. device_type = "ethernet-phy";
  92. };
  93. phy3: ethernet-phy@3 {
  94. interrupt-parent = <&mpic>;
  95. interrupts = <a 1>;
  96. reg = <3>;
  97. device_type = "ethernet-phy";
  98. };
  99. };
  100. ethernet@24000 {
  101. #address-cells = <1>;
  102. #size-cells = <0>;
  103. device_type = "network";
  104. model = "TSEC";
  105. compatible = "gianfar";
  106. reg = <24000 1000>;
  107. /*
  108. * mac-address is deprecated and will be removed
  109. * in 2.6.25. Only recent versions of
  110. * U-Boot support local-mac-address, however.
  111. */
  112. mac-address = [ 00 00 00 00 00 00 ];
  113. local-mac-address = [ 00 00 00 00 00 00 ];
  114. interrupts = <1d 2 1e 2 22 2>;
  115. interrupt-parent = <&mpic>;
  116. phy-handle = <&phy0>;
  117. phy-connection-type = "rgmii-id";
  118. };
  119. ethernet@25000 {
  120. #address-cells = <1>;
  121. #size-cells = <0>;
  122. device_type = "network";
  123. model = "TSEC";
  124. compatible = "gianfar";
  125. reg = <25000 1000>;
  126. /*
  127. * mac-address is deprecated and will be removed
  128. * in 2.6.25. Only recent versions of
  129. * U-Boot support local-mac-address, however.
  130. */
  131. mac-address = [ 00 00 00 00 00 00 ];
  132. local-mac-address = [ 00 00 00 00 00 00 ];
  133. interrupts = <23 2 24 2 28 2>;
  134. interrupt-parent = <&mpic>;
  135. phy-handle = <&phy1>;
  136. phy-connection-type = "rgmii-id";
  137. };
  138. ethernet@26000 {
  139. #address-cells = <1>;
  140. #size-cells = <0>;
  141. device_type = "network";
  142. model = "TSEC";
  143. compatible = "gianfar";
  144. reg = <26000 1000>;
  145. /*
  146. * mac-address is deprecated and will be removed
  147. * in 2.6.25. Only recent versions of
  148. * U-Boot support local-mac-address, however.
  149. */
  150. mac-address = [ 00 00 00 00 00 00 ];
  151. local-mac-address = [ 00 00 00 00 00 00 ];
  152. interrupts = <1F 2 20 2 21 2>;
  153. interrupt-parent = <&mpic>;
  154. phy-handle = <&phy2>;
  155. phy-connection-type = "rgmii-id";
  156. };
  157. ethernet@27000 {
  158. #address-cells = <1>;
  159. #size-cells = <0>;
  160. device_type = "network";
  161. model = "TSEC";
  162. compatible = "gianfar";
  163. reg = <27000 1000>;
  164. /*
  165. * mac-address is deprecated and will be removed
  166. * in 2.6.25. Only recent versions of
  167. * U-Boot support local-mac-address, however.
  168. */
  169. mac-address = [ 00 00 00 00 00 00 ];
  170. local-mac-address = [ 00 00 00 00 00 00 ];
  171. interrupts = <25 2 26 2 27 2>;
  172. interrupt-parent = <&mpic>;
  173. phy-handle = <&phy3>;
  174. phy-connection-type = "rgmii-id";
  175. };
  176. serial@4500 {
  177. device_type = "serial";
  178. compatible = "ns16550";
  179. reg = <4500 100>;
  180. clock-frequency = <0>;
  181. interrupts = <2a 2>;
  182. interrupt-parent = <&mpic>;
  183. };
  184. serial@4600 {
  185. device_type = "serial";
  186. compatible = "ns16550";
  187. reg = <4600 100>;
  188. clock-frequency = <0>;
  189. interrupts = <1c 2>;
  190. interrupt-parent = <&mpic>;
  191. };
  192. mpic: pic@40000 {
  193. clock-frequency = <0>;
  194. interrupt-controller;
  195. #address-cells = <0>;
  196. #interrupt-cells = <2>;
  197. reg = <40000 40000>;
  198. compatible = "chrp,open-pic";
  199. device_type = "open-pic";
  200. big-endian;
  201. };
  202. global-utilities@e0000 {
  203. compatible = "fsl,mpc8641-guts";
  204. reg = <e0000 1000>;
  205. fsl,has-rstcr;
  206. };
  207. };
  208. pcie@f8008000 {
  209. compatible = "fsl,mpc8641-pcie";
  210. device_type = "pci";
  211. #interrupt-cells = <1>;
  212. #size-cells = <2>;
  213. #address-cells = <3>;
  214. reg = <f8008000 1000>;
  215. bus-range = <0 ff>;
  216. ranges = <02000000 0 80000000 80000000 0 20000000
  217. 01000000 0 00000000 e2000000 0 00100000>;
  218. clock-frequency = <1fca055>;
  219. interrupt-parent = <&mpic>;
  220. interrupts = <18 2>;
  221. interrupt-map-mask = <ff00 0 0 7>;
  222. interrupt-map = <
  223. /* IDSEL 0x11 func 0 - PCI slot 1 */
  224. 8800 0 0 1 &mpic 2 1
  225. 8800 0 0 2 &mpic 3 1
  226. 8800 0 0 3 &mpic 4 1
  227. 8800 0 0 4 &mpic 1 1
  228. /* IDSEL 0x11 func 1 - PCI slot 1 */
  229. 8900 0 0 1 &mpic 2 1
  230. 8900 0 0 2 &mpic 3 1
  231. 8900 0 0 3 &mpic 4 1
  232. 8900 0 0 4 &mpic 1 1
  233. /* IDSEL 0x11 func 2 - PCI slot 1 */
  234. 8a00 0 0 1 &mpic 2 1
  235. 8a00 0 0 2 &mpic 3 1
  236. 8a00 0 0 3 &mpic 4 1
  237. 8a00 0 0 4 &mpic 1 1
  238. /* IDSEL 0x11 func 3 - PCI slot 1 */
  239. 8b00 0 0 1 &mpic 2 1
  240. 8b00 0 0 2 &mpic 3 1
  241. 8b00 0 0 3 &mpic 4 1
  242. 8b00 0 0 4 &mpic 1 1
  243. /* IDSEL 0x11 func 4 - PCI slot 1 */
  244. 8c00 0 0 1 &mpic 2 1
  245. 8c00 0 0 2 &mpic 3 1
  246. 8c00 0 0 3 &mpic 4 1
  247. 8c00 0 0 4 &mpic 1 1
  248. /* IDSEL 0x11 func 5 - PCI slot 1 */
  249. 8d00 0 0 1 &mpic 2 1
  250. 8d00 0 0 2 &mpic 3 1
  251. 8d00 0 0 3 &mpic 4 1
  252. 8d00 0 0 4 &mpic 1 1
  253. /* IDSEL 0x11 func 6 - PCI slot 1 */
  254. 8e00 0 0 1 &mpic 2 1
  255. 8e00 0 0 2 &mpic 3 1
  256. 8e00 0 0 3 &mpic 4 1
  257. 8e00 0 0 4 &mpic 1 1
  258. /* IDSEL 0x11 func 7 - PCI slot 1 */
  259. 8f00 0 0 1 &mpic 2 1
  260. 8f00 0 0 2 &mpic 3 1
  261. 8f00 0 0 3 &mpic 4 1
  262. 8f00 0 0 4 &mpic 1 1
  263. /* IDSEL 0x12 func 0 - PCI slot 2 */
  264. 9000 0 0 1 &mpic 3 1
  265. 9000 0 0 2 &mpic 4 1
  266. 9000 0 0 3 &mpic 1 1
  267. 9000 0 0 4 &mpic 2 1
  268. /* IDSEL 0x12 func 1 - PCI slot 2 */
  269. 9100 0 0 1 &mpic 3 1
  270. 9100 0 0 2 &mpic 4 1
  271. 9100 0 0 3 &mpic 1 1
  272. 9100 0 0 4 &mpic 2 1
  273. /* IDSEL 0x12 func 2 - PCI slot 2 */
  274. 9200 0 0 1 &mpic 3 1
  275. 9200 0 0 2 &mpic 4 1
  276. 9200 0 0 3 &mpic 1 1
  277. 9200 0 0 4 &mpic 2 1
  278. /* IDSEL 0x12 func 3 - PCI slot 2 */
  279. 9300 0 0 1 &mpic 3 1
  280. 9300 0 0 2 &mpic 4 1
  281. 9300 0 0 3 &mpic 1 1
  282. 9300 0 0 4 &mpic 2 1
  283. /* IDSEL 0x12 func 4 - PCI slot 2 */
  284. 9400 0 0 1 &mpic 3 1
  285. 9400 0 0 2 &mpic 4 1
  286. 9400 0 0 3 &mpic 1 1
  287. 9400 0 0 4 &mpic 2 1
  288. /* IDSEL 0x12 func 5 - PCI slot 2 */
  289. 9500 0 0 1 &mpic 3 1
  290. 9500 0 0 2 &mpic 4 1
  291. 9500 0 0 3 &mpic 1 1
  292. 9500 0 0 4 &mpic 2 1
  293. /* IDSEL 0x12 func 6 - PCI slot 2 */
  294. 9600 0 0 1 &mpic 3 1
  295. 9600 0 0 2 &mpic 4 1
  296. 9600 0 0 3 &mpic 1 1
  297. 9600 0 0 4 &mpic 2 1
  298. /* IDSEL 0x12 func 7 - PCI slot 2 */
  299. 9700 0 0 1 &mpic 3 1
  300. 9700 0 0 2 &mpic 4 1
  301. 9700 0 0 3 &mpic 1 1
  302. 9700 0 0 4 &mpic 2 1
  303. // IDSEL 0x1c USB
  304. e000 0 0 1 &i8259 c 2
  305. e100 0 0 1 &i8259 9 2
  306. e200 0 0 1 &i8259 a 2
  307. e300 0 0 1 &i8259 b 2
  308. // IDSEL 0x1d Audio
  309. e800 0 0 1 &i8259 6 2
  310. // IDSEL 0x1e Legacy
  311. f000 0 0 1 &i8259 7 2
  312. f100 0 0 1 &i8259 7 2
  313. // IDSEL 0x1f IDE/SATA
  314. f800 0 0 1 &i8259 e 2
  315. f900 0 0 1 &i8259 5 2
  316. >;
  317. pcie@0 {
  318. reg = <0 0 0 0 0>;
  319. #size-cells = <2>;
  320. #address-cells = <3>;
  321. device_type = "pci";
  322. ranges = <02000000 0 80000000
  323. 02000000 0 80000000
  324. 0 20000000
  325. 01000000 0 00000000
  326. 01000000 0 00000000
  327. 0 00100000>;
  328. uli1575@0 {
  329. reg = <0 0 0 0 0>;
  330. #size-cells = <2>;
  331. #address-cells = <3>;
  332. ranges = <02000000 0 80000000
  333. 02000000 0 80000000
  334. 0 20000000
  335. 01000000 0 00000000
  336. 01000000 0 00000000
  337. 0 00100000>;
  338. isa@1e {
  339. device_type = "isa";
  340. #interrupt-cells = <2>;
  341. #size-cells = <1>;
  342. #address-cells = <2>;
  343. reg = <f000 0 0 0 0>;
  344. ranges = <1 0 01000000 0 0
  345. 00001000>;
  346. interrupt-parent = <&i8259>;
  347. i8259: interrupt-controller@20 {
  348. reg = <1 20 2
  349. 1 a0 2
  350. 1 4d0 2>;
  351. interrupt-controller;
  352. device_type = "interrupt-controller";
  353. #address-cells = <0>;
  354. #interrupt-cells = <2>;
  355. compatible = "chrp,iic";
  356. interrupts = <9 2>;
  357. interrupt-parent = <&mpic>;
  358. };
  359. i8042@60 {
  360. #size-cells = <0>;
  361. #address-cells = <1>;
  362. reg = <1 60 1 1 64 1>;
  363. interrupts = <1 3 c 3>;
  364. interrupt-parent =
  365. <&i8259>;
  366. keyboard@0 {
  367. reg = <0>;
  368. compatible = "pnpPNP,303";
  369. };
  370. mouse@1 {
  371. reg = <1>;
  372. compatible = "pnpPNP,f03";
  373. };
  374. };
  375. rtc@70 {
  376. compatible =
  377. "pnpPNP,b00";
  378. reg = <1 70 2>;
  379. };
  380. gpio@400 {
  381. reg = <1 400 80>;
  382. };
  383. };
  384. };
  385. };
  386. };
  387. pcie@f8009000 {
  388. compatible = "fsl,mpc8641-pcie";
  389. device_type = "pci";
  390. #interrupt-cells = <1>;
  391. #size-cells = <2>;
  392. #address-cells = <3>;
  393. reg = <f8009000 1000>;
  394. bus-range = <0 ff>;
  395. ranges = <02000000 0 a0000000 a0000000 0 20000000
  396. 01000000 0 00000000 e3000000 0 00100000>;
  397. clock-frequency = <1fca055>;
  398. interrupt-parent = <&mpic>;
  399. interrupts = <19 2>;
  400. interrupt-map-mask = <f800 0 0 7>;
  401. interrupt-map = <
  402. /* IDSEL 0x0 */
  403. 0000 0 0 1 &mpic 4 1
  404. 0000 0 0 2 &mpic 5 1
  405. 0000 0 0 3 &mpic 6 1
  406. 0000 0 0 4 &mpic 7 1
  407. >;
  408. pcie@0 {
  409. reg = <0 0 0 0 0>;
  410. #size-cells = <2>;
  411. #address-cells = <3>;
  412. device_type = "pci";
  413. ranges = <02000000 0 a0000000
  414. 02000000 0 a0000000
  415. 0 20000000
  416. 01000000 0 00000000
  417. 01000000 0 00000000
  418. 0 00100000>;
  419. };
  420. };
  421. };