irqmap.c 4.9 KB

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  1. /*
  2. * BRIEF MODULE DESCRIPTION
  3. * Au1xxx irq map table
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License as published by the
  7. * Free Software Foundation; either version 2 of the License, or (at your
  8. * option) any later version.
  9. *
  10. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  11. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  12. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  13. * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  14. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  15. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  16. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  17. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  18. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  19. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  20. *
  21. * You should have received a copy of the GNU General Public License along
  22. * with this program; if not, write to the Free Software Foundation, Inc.,
  23. * 675 Mass Ave, Cambridge, MA 02139, USA.
  24. */
  25. #include <linux/errno.h>
  26. #include <linux/init.h>
  27. #include <linux/irq.h>
  28. #include <linux/kernel_stat.h>
  29. #include <linux/module.h>
  30. #include <linux/signal.h>
  31. #include <linux/sched.h>
  32. #include <linux/types.h>
  33. #include <linux/interrupt.h>
  34. #include <linux/ioport.h>
  35. #include <linux/timex.h>
  36. #include <linux/slab.h>
  37. #include <linux/random.h>
  38. #include <linux/delay.h>
  39. #include <linux/bitops.h>
  40. #include <asm/bootinfo.h>
  41. #include <asm/io.h>
  42. #include <asm/mipsregs.h>
  43. #include <asm/system.h>
  44. #include <asm/mach-au1x00/au1000.h>
  45. #ifdef CONFIG_MIPS_PB1200
  46. #include <asm/mach-pb1x00/pb1200.h>
  47. #endif
  48. #ifdef CONFIG_MIPS_DB1200
  49. #include <asm/mach-db1x00/db1200.h>
  50. #define PB1200_INT_BEGIN DB1200_INT_BEGIN
  51. #define PB1200_INT_END DB1200_INT_END
  52. #endif
  53. struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
  54. { AU1000_GPIO_7, INTC_INT_LOW_LEVEL, 0 }, // This is exteranl interrupt cascade
  55. };
  56. int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map);
  57. /*
  58. * Support for External interrupts on the PbAu1200 Development platform.
  59. */
  60. static volatile int pb1200_cascade_en=0;
  61. irqreturn_t pb1200_cascade_handler( int irq, void *dev_id)
  62. {
  63. unsigned short bisr = bcsr->int_status;
  64. int extirq_nr = 0;
  65. /* Clear all the edge interrupts. This has no effect on level */
  66. bcsr->int_status = bisr;
  67. for( ; bisr; bisr &= (bisr-1) )
  68. {
  69. extirq_nr = PB1200_INT_BEGIN + __ffs(bisr);
  70. /* Ack and dispatch IRQ */
  71. do_IRQ(extirq_nr);
  72. }
  73. return IRQ_RETVAL(1);
  74. }
  75. inline void pb1200_enable_irq(unsigned int irq_nr)
  76. {
  77. bcsr->intset_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
  78. bcsr->intset = 1<<(irq_nr - PB1200_INT_BEGIN);
  79. }
  80. inline void pb1200_disable_irq(unsigned int irq_nr)
  81. {
  82. bcsr->intclr_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
  83. bcsr->intclr = 1<<(irq_nr - PB1200_INT_BEGIN);
  84. }
  85. static unsigned int pb1200_setup_cascade(void)
  86. {
  87. int err;
  88. err = request_irq(AU1000_GPIO_7, &pb1200_cascade_handler,
  89. 0, "Pb1200 Cascade", &pb1200_cascade_handler);
  90. if (err)
  91. return err;
  92. return 0;
  93. }
  94. static unsigned int pb1200_startup_irq(unsigned int irq)
  95. {
  96. if (++pb1200_cascade_en == 1) {
  97. int res;
  98. res = pb1200_setup_cascade();
  99. if (res)
  100. return res;
  101. }
  102. pb1200_enable_irq(irq);
  103. return 0;
  104. }
  105. static void pb1200_shutdown_irq(unsigned int irq)
  106. {
  107. pb1200_disable_irq(irq);
  108. if (--pb1200_cascade_en == 0)
  109. free_irq(AU1000_GPIO_7, &pb1200_cascade_handler);
  110. }
  111. static struct irq_chip external_irq_type = {
  112. #ifdef CONFIG_MIPS_PB1200
  113. .name = "Pb1200 Ext",
  114. #endif
  115. #ifdef CONFIG_MIPS_DB1200
  116. .name = "Db1200 Ext",
  117. #endif
  118. .startup = pb1200_startup_irq,
  119. .shutdown = pb1200_shutdown_irq,
  120. .ack = pb1200_disable_irq,
  121. .mask = pb1200_disable_irq,
  122. .mask_ack = pb1200_disable_irq,
  123. .unmask = pb1200_enable_irq,
  124. };
  125. void _board_init_irq(void)
  126. {
  127. unsigned int irq;
  128. #ifdef CONFIG_MIPS_PB1200
  129. /* We have a problem with CPLD rev3. Enable a workaround */
  130. if (((bcsr->whoami & BCSR_WHOAMI_CPLD) >> 4) <= 3) {
  131. printk("\nWARNING!!!\n");
  132. printk("\nWARNING!!!\n");
  133. printk("\nWARNING!!!\n");
  134. printk("\nWARNING!!!\n");
  135. printk("\nWARNING!!!\n");
  136. printk("\nWARNING!!!\n");
  137. printk("Pb1200 must be at CPLD rev4. Please have Pb1200\n");
  138. printk("updated to latest revision. This software will not\n");
  139. printk("work on anything less than CPLD rev4\n");
  140. printk("\nWARNING!!!\n");
  141. printk("\nWARNING!!!\n");
  142. printk("\nWARNING!!!\n");
  143. printk("\nWARNING!!!\n");
  144. printk("\nWARNING!!!\n");
  145. printk("\nWARNING!!!\n");
  146. panic("Game over. Your score is 0.");
  147. }
  148. #endif
  149. for (irq = PB1200_INT_BEGIN; irq <= PB1200_INT_END; irq++) {
  150. set_irq_chip_and_handler(irq, &external_irq_type,
  151. handle_level_irq);
  152. pb1200_disable_irq(irq);
  153. }
  154. /*
  155. * GPIO_7 can not be hooked here, so it is hooked upon first
  156. * request of any source attached to the cascade
  157. */
  158. }