pnav10.c 13 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf537/boards/stamp.c
  3. * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Created:
  7. * Description:
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2006 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/mtd/mtd.h>
  33. #include <linux/mtd/partitions.h>
  34. #include <linux/spi/spi.h>
  35. #include <linux/spi/flash.h>
  36. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  37. #include <linux/usb/isp1362.h>
  38. #endif
  39. #include <linux/irq.h>
  40. #include <asm/dma.h>
  41. #include <asm/bfin5xx_spi.h>
  42. #include <asm/portmux.h>
  43. #include <linux/usb/sl811.h>
  44. #include <linux/spi/ad7877.h>
  45. /*
  46. * Name the Board for the /proc/cpuinfo
  47. */
  48. const char bfin_board_name[] = "PNAV-1.0";
  49. /*
  50. * Driver needs to know address, irq and flag pin.
  51. */
  52. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  53. static struct resource bfin_pcmcia_cf_resources[] = {
  54. {
  55. .start = 0x20310000, /* IO PORT */
  56. .end = 0x20312000,
  57. .flags = IORESOURCE_MEM,
  58. }, {
  59. .start = 0x20311000, /* Attribute Memory */
  60. .end = 0x20311FFF,
  61. .flags = IORESOURCE_MEM,
  62. }, {
  63. .start = IRQ_PF4,
  64. .end = IRQ_PF4,
  65. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  66. }, {
  67. .start = 6, /* Card Detect PF6 */
  68. .end = 6,
  69. .flags = IORESOURCE_IRQ,
  70. },
  71. };
  72. static struct platform_device bfin_pcmcia_cf_device = {
  73. .name = "bfin_cf_pcmcia",
  74. .id = -1,
  75. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  76. .resource = bfin_pcmcia_cf_resources,
  77. };
  78. #endif
  79. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  80. static struct platform_device rtc_device = {
  81. .name = "rtc-bfin",
  82. .id = -1,
  83. };
  84. #endif
  85. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  86. static struct resource smc91x_resources[] = {
  87. {
  88. .name = "smc91x-regs",
  89. .start = 0x20300300,
  90. .end = 0x20300300 + 16,
  91. .flags = IORESOURCE_MEM,
  92. }, {
  93. .start = IRQ_PF7,
  94. .end = IRQ_PF7,
  95. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  96. },
  97. };
  98. static struct platform_device smc91x_device = {
  99. .name = "smc91x",
  100. .id = 0,
  101. .num_resources = ARRAY_SIZE(smc91x_resources),
  102. .resource = smc91x_resources,
  103. };
  104. #endif
  105. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  106. static struct resource sl811_hcd_resources[] = {
  107. {
  108. .start = 0x20340000,
  109. .end = 0x20340000,
  110. .flags = IORESOURCE_MEM,
  111. }, {
  112. .start = 0x20340004,
  113. .end = 0x20340004,
  114. .flags = IORESOURCE_MEM,
  115. }, {
  116. .start = CONFIG_USB_SL811_BFIN_IRQ,
  117. .end = CONFIG_USB_SL811_BFIN_IRQ,
  118. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  119. },
  120. };
  121. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  122. void sl811_port_power(struct device *dev, int is_on)
  123. {
  124. gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
  125. gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS);
  126. if (is_on)
  127. gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 1);
  128. else
  129. gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 0);
  130. }
  131. #endif
  132. static struct sl811_platform_data sl811_priv = {
  133. .potpg = 10,
  134. .power = 250, /* == 500mA */
  135. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  136. .port_power = &sl811_port_power,
  137. #endif
  138. };
  139. static struct platform_device sl811_hcd_device = {
  140. .name = "sl811-hcd",
  141. .id = 0,
  142. .dev = {
  143. .platform_data = &sl811_priv,
  144. },
  145. .num_resources = ARRAY_SIZE(sl811_hcd_resources),
  146. .resource = sl811_hcd_resources,
  147. };
  148. #endif
  149. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  150. static struct resource isp1362_hcd_resources[] = {
  151. {
  152. .start = 0x20360000,
  153. .end = 0x20360000,
  154. .flags = IORESOURCE_MEM,
  155. }, {
  156. .start = 0x20360004,
  157. .end = 0x20360004,
  158. .flags = IORESOURCE_MEM,
  159. }, {
  160. .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
  161. .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
  162. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  163. },
  164. };
  165. static struct isp1362_platform_data isp1362_priv = {
  166. .sel15Kres = 1,
  167. .clknotstop = 0,
  168. .oc_enable = 0,
  169. .int_act_high = 0,
  170. .int_edge_triggered = 0,
  171. .remote_wakeup_connected = 0,
  172. .no_power_switching = 1,
  173. .power_switching_mode = 0,
  174. };
  175. static struct platform_device isp1362_hcd_device = {
  176. .name = "isp1362-hcd",
  177. .id = 0,
  178. .dev = {
  179. .platform_data = &isp1362_priv,
  180. },
  181. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  182. .resource = isp1362_hcd_resources,
  183. };
  184. #endif
  185. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  186. static struct platform_device bfin_mac_device = {
  187. .name = "bfin_mac",
  188. };
  189. #endif
  190. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  191. static struct resource net2272_bfin_resources[] = {
  192. {
  193. .start = 0x20300000,
  194. .end = 0x20300000 + 0x100,
  195. .flags = IORESOURCE_MEM,
  196. }, {
  197. .start = IRQ_PF7,
  198. .end = IRQ_PF7,
  199. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  200. },
  201. };
  202. static struct platform_device net2272_bfin_device = {
  203. .name = "net2272",
  204. .id = -1,
  205. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  206. .resource = net2272_bfin_resources,
  207. };
  208. #endif
  209. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  210. /* all SPI peripherals info goes here */
  211. #if defined(CONFIG_MTD_M25P80) \
  212. || defined(CONFIG_MTD_M25P80_MODULE)
  213. static struct mtd_partition bfin_spi_flash_partitions[] = {
  214. {
  215. .name = "bootloader",
  216. .size = 0x00020000,
  217. .offset = 0,
  218. .mask_flags = MTD_CAP_ROM
  219. }, {
  220. .name = "kernel",
  221. .size = 0xe0000,
  222. .offset = 0x20000
  223. }, {
  224. .name = "file system",
  225. .size = 0x700000,
  226. .offset = 0x00100000,
  227. }
  228. };
  229. static struct flash_platform_data bfin_spi_flash_data = {
  230. .name = "m25p80",
  231. .parts = bfin_spi_flash_partitions,
  232. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  233. .type = "m25p64",
  234. };
  235. /* SPI flash chip (m25p64) */
  236. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  237. .enable_dma = 0, /* use dma transfer with this chip*/
  238. .bits_per_word = 8,
  239. };
  240. #endif
  241. #if defined(CONFIG_SPI_ADC_BF533) \
  242. || defined(CONFIG_SPI_ADC_BF533_MODULE)
  243. /* SPI ADC chip */
  244. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  245. .enable_dma = 1, /* use dma transfer with this chip*/
  246. .bits_per_word = 16,
  247. };
  248. #endif
  249. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  250. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  251. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  252. .enable_dma = 0,
  253. .bits_per_word = 16,
  254. };
  255. #endif
  256. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  257. static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
  258. .enable_dma = 0,
  259. .bits_per_word = 16,
  260. };
  261. #endif
  262. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  263. static struct bfin5xx_spi_chip spi_mmc_chip_info = {
  264. .enable_dma = 1,
  265. .bits_per_word = 8,
  266. };
  267. #endif
  268. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  269. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  270. .cs_change_per_word = 0,
  271. .enable_dma = 0,
  272. .bits_per_word = 16,
  273. };
  274. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  275. .model = 7877,
  276. .vref_delay_usecs = 50, /* internal, no capacitor */
  277. .x_plate_ohms = 419,
  278. .y_plate_ohms = 486,
  279. .pressure_max = 1000,
  280. .pressure_min = 0,
  281. .stopacq_polarity = 1,
  282. .first_conversion_delay = 3,
  283. .acquisition_time = 1,
  284. .averaging = 1,
  285. .pen_down_acc_interval = 1,
  286. };
  287. #endif
  288. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  289. #if defined(CONFIG_MTD_M25P80) \
  290. || defined(CONFIG_MTD_M25P80_MODULE)
  291. {
  292. /* the modalias must be the same as spi device driver name */
  293. .modalias = "m25p80", /* Name of spi_driver for this device */
  294. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  295. .bus_num = 0, /* Framework bus number */
  296. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  297. .platform_data = &bfin_spi_flash_data,
  298. .controller_data = &spi_flash_chip_info,
  299. .mode = SPI_MODE_3,
  300. },
  301. #endif
  302. #if defined(CONFIG_SPI_ADC_BF533) \
  303. || defined(CONFIG_SPI_ADC_BF533_MODULE)
  304. {
  305. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  306. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  307. .bus_num = 0, /* Framework bus number */
  308. .chip_select = 1, /* Framework chip select. */
  309. .platform_data = NULL, /* No spi_driver specific config */
  310. .controller_data = &spi_adc_chip_info,
  311. },
  312. #endif
  313. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  314. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  315. {
  316. .modalias = "ad1836-spi",
  317. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  318. .bus_num = 0,
  319. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  320. .controller_data = &ad1836_spi_chip_info,
  321. },
  322. #endif
  323. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  324. {
  325. .modalias = "ad9960-spi",
  326. .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
  327. .bus_num = 0,
  328. .chip_select = 1,
  329. .controller_data = &ad9960_spi_chip_info,
  330. },
  331. #endif
  332. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  333. {
  334. .modalias = "spi_mmc_dummy",
  335. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  336. .bus_num = 0,
  337. .chip_select = 7,
  338. .platform_data = NULL,
  339. .controller_data = &spi_mmc_chip_info,
  340. .mode = SPI_MODE_3,
  341. },
  342. {
  343. .modalias = "spi_mmc",
  344. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  345. .bus_num = 0,
  346. .chip_select = CONFIG_SPI_MMC_CS_CHAN,
  347. .platform_data = NULL,
  348. .controller_data = &spi_mmc_chip_info,
  349. .mode = SPI_MODE_3,
  350. },
  351. #endif
  352. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  353. {
  354. .modalias = "ad7877",
  355. .platform_data = &bfin_ad7877_ts_info,
  356. .irq = IRQ_PF2,
  357. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  358. .bus_num = 0,
  359. .chip_select = 5,
  360. .controller_data = &spi_ad7877_chip_info,
  361. },
  362. #endif
  363. };
  364. /* SPI (0) */
  365. static struct resource bfin_spi0_resource[] = {
  366. [0] = {
  367. .start = SPI0_REGBASE,
  368. .end = SPI0_REGBASE + 0xFF,
  369. .flags = IORESOURCE_MEM,
  370. },
  371. [1] = {
  372. .start = CH_SPI,
  373. .end = CH_SPI,
  374. .flags = IORESOURCE_IRQ,
  375. }
  376. };
  377. /* SPI controller data */
  378. static struct bfin5xx_spi_master bfin_spi0_info = {
  379. .num_chipselect = 8,
  380. .enable_dma = 1, /* master has the ability to do dma transfer */
  381. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  382. };
  383. static struct platform_device bfin_spi0_device = {
  384. .name = "bfin-spi",
  385. .id = 0, /* Bus number */
  386. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  387. .resource = bfin_spi0_resource,
  388. .dev = {
  389. .platform_data = &bfin_spi0_info, /* Passed to driver */
  390. },
  391. };
  392. #endif /* spi master and devices */
  393. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  394. static struct platform_device bfin_fb_device = {
  395. .name = "bf537-lq035",
  396. };
  397. #endif
  398. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  399. static struct resource bfin_uart_resources[] = {
  400. {
  401. .start = 0xFFC00400,
  402. .end = 0xFFC004FF,
  403. .flags = IORESOURCE_MEM,
  404. }, {
  405. .start = 0xFFC02000,
  406. .end = 0xFFC020FF,
  407. .flags = IORESOURCE_MEM,
  408. },
  409. };
  410. static struct platform_device bfin_uart_device = {
  411. .name = "bfin-uart",
  412. .id = 1,
  413. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  414. .resource = bfin_uart_resources,
  415. };
  416. #endif
  417. static struct platform_device *stamp_devices[] __initdata = {
  418. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  419. &bfin_pcmcia_cf_device,
  420. #endif
  421. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  422. &rtc_device,
  423. #endif
  424. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  425. &sl811_hcd_device,
  426. #endif
  427. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  428. &isp1362_hcd_device,
  429. #endif
  430. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  431. &smc91x_device,
  432. #endif
  433. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  434. &bfin_mac_device,
  435. #endif
  436. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  437. &net2272_bfin_device,
  438. #endif
  439. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  440. &bfin_spi0_device,
  441. #endif
  442. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  443. &bfin_fb_device,
  444. #endif
  445. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  446. &bfin_uart_device,
  447. #endif
  448. };
  449. static int __init stamp_init(void)
  450. {
  451. printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
  452. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  453. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  454. spi_register_board_info(bfin_spi_board_info,
  455. ARRAY_SIZE(bfin_spi_board_info));
  456. #endif
  457. return 0;
  458. }
  459. arch_initcall(stamp_init);
  460. void bfin_get_ether_addr(char *addr)
  461. {
  462. random_ether_addr(addr);
  463. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  464. }
  465. EXPORT_SYMBOL(bfin_get_ether_addr);