cm_bf537.c 11 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf537/boards/cm_bf537.c
  3. * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Created: 2005
  7. * Description: Board description file
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2006 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/mtd/mtd.h>
  33. #include <linux/mtd/partitions.h>
  34. #include <linux/spi/spi.h>
  35. #include <linux/spi/flash.h>
  36. #include <linux/usb/isp1362.h>
  37. #include <linux/pata_platform.h>
  38. #include <linux/irq.h>
  39. #include <asm/dma.h>
  40. #include <asm/bfin5xx_spi.h>
  41. #include <asm/portmux.h>
  42. /*
  43. * Name the Board for the /proc/cpuinfo
  44. */
  45. const char bfin_board_name[] = "Bluetechnix CM BF537";
  46. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  47. /* all SPI peripherals info goes here */
  48. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  49. static struct mtd_partition bfin_spi_flash_partitions[] = {
  50. {
  51. .name = "bootloader",
  52. .size = 0x00020000,
  53. .offset = 0,
  54. .mask_flags = MTD_CAP_ROM
  55. }, {
  56. .name = "kernel",
  57. .size = 0xe0000,
  58. .offset = 0x20000
  59. }, {
  60. .name = "file system",
  61. .size = 0x700000,
  62. .offset = 0x00100000,
  63. }
  64. };
  65. static struct flash_platform_data bfin_spi_flash_data = {
  66. .name = "m25p80",
  67. .parts = bfin_spi_flash_partitions,
  68. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  69. .type = "m25p64",
  70. };
  71. /* SPI flash chip (m25p64) */
  72. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  73. .enable_dma = 0, /* use dma transfer with this chip*/
  74. .bits_per_word = 8,
  75. };
  76. #endif
  77. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  78. /* SPI ADC chip */
  79. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  80. .enable_dma = 1, /* use dma transfer with this chip*/
  81. .bits_per_word = 16,
  82. };
  83. #endif
  84. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  85. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  86. .enable_dma = 0,
  87. .bits_per_word = 16,
  88. };
  89. #endif
  90. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  91. static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
  92. .enable_dma = 0,
  93. .bits_per_word = 16,
  94. };
  95. #endif
  96. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  97. static struct bfin5xx_spi_chip spi_mmc_chip_info = {
  98. .enable_dma = 1,
  99. .bits_per_word = 8,
  100. };
  101. #endif
  102. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  103. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  104. {
  105. /* the modalias must be the same as spi device driver name */
  106. .modalias = "m25p80", /* Name of spi_driver for this device */
  107. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  108. .bus_num = 0, /* Framework bus number */
  109. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  110. .platform_data = &bfin_spi_flash_data,
  111. .controller_data = &spi_flash_chip_info,
  112. .mode = SPI_MODE_3,
  113. },
  114. #endif
  115. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  116. {
  117. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  118. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  119. .bus_num = 0, /* Framework bus number */
  120. .chip_select = 1, /* Framework chip select. */
  121. .platform_data = NULL, /* No spi_driver specific config */
  122. .controller_data = &spi_adc_chip_info,
  123. },
  124. #endif
  125. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  126. {
  127. .modalias = "ad1836-spi",
  128. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  129. .bus_num = 0,
  130. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  131. .controller_data = &ad1836_spi_chip_info,
  132. },
  133. #endif
  134. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  135. {
  136. .modalias = "ad9960-spi",
  137. .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
  138. .bus_num = 0,
  139. .chip_select = 1,
  140. .controller_data = &ad9960_spi_chip_info,
  141. },
  142. #endif
  143. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  144. {
  145. .modalias = "spi_mmc_dummy",
  146. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  147. .bus_num = 0,
  148. .chip_select = 7,
  149. .platform_data = NULL,
  150. .controller_data = &spi_mmc_chip_info,
  151. .mode = SPI_MODE_3,
  152. },
  153. {
  154. .modalias = "spi_mmc",
  155. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  156. .bus_num = 0,
  157. .chip_select = CONFIG_SPI_MMC_CS_CHAN,
  158. .platform_data = NULL,
  159. .controller_data = &spi_mmc_chip_info,
  160. .mode = SPI_MODE_3,
  161. },
  162. #endif
  163. };
  164. /* SPI (0) */
  165. static struct resource bfin_spi0_resource[] = {
  166. [0] = {
  167. .start = SPI0_REGBASE,
  168. .end = SPI0_REGBASE + 0xFF,
  169. .flags = IORESOURCE_MEM,
  170. },
  171. [1] = {
  172. .start = CH_SPI,
  173. .end = CH_SPI,
  174. .flags = IORESOURCE_IRQ,
  175. }
  176. };
  177. /* SPI controller data */
  178. static struct bfin5xx_spi_master bfin_spi0_info = {
  179. .num_chipselect = 8,
  180. .enable_dma = 1, /* master has the ability to do dma transfer */
  181. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  182. };
  183. static struct platform_device bfin_spi0_device = {
  184. .name = "bfin-spi",
  185. .id = 0, /* Bus number */
  186. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  187. .resource = bfin_spi0_resource,
  188. .dev = {
  189. .platform_data = &bfin_spi0_info, /* Passed to driver */
  190. },
  191. };
  192. #endif /* spi master and devices */
  193. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  194. static struct platform_device rtc_device = {
  195. .name = "rtc-bfin",
  196. .id = -1,
  197. };
  198. #endif
  199. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  200. static struct resource smc91x_resources[] = {
  201. {
  202. .start = 0x20200300,
  203. .end = 0x20200300 + 16,
  204. .flags = IORESOURCE_MEM,
  205. }, {
  206. .start = IRQ_PF14,
  207. .end = IRQ_PF14,
  208. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  209. },
  210. };
  211. static struct platform_device smc91x_device = {
  212. .name = "smc91x",
  213. .id = 0,
  214. .num_resources = ARRAY_SIZE(smc91x_resources),
  215. .resource = smc91x_resources,
  216. };
  217. #endif
  218. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  219. static struct resource isp1362_hcd_resources[] = {
  220. {
  221. .start = 0x20308000,
  222. .end = 0x20308000,
  223. .flags = IORESOURCE_MEM,
  224. }, {
  225. .start = 0x20308004,
  226. .end = 0x20308004,
  227. .flags = IORESOURCE_MEM,
  228. }, {
  229. .start = IRQ_PG15,
  230. .end = IRQ_PG15,
  231. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  232. },
  233. };
  234. static struct isp1362_platform_data isp1362_priv = {
  235. .sel15Kres = 1,
  236. .clknotstop = 0,
  237. .oc_enable = 0,
  238. .int_act_high = 0,
  239. .int_edge_triggered = 0,
  240. .remote_wakeup_connected = 0,
  241. .no_power_switching = 1,
  242. .power_switching_mode = 0,
  243. };
  244. static struct platform_device isp1362_hcd_device = {
  245. .name = "isp1362-hcd",
  246. .id = 0,
  247. .dev = {
  248. .platform_data = &isp1362_priv,
  249. },
  250. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  251. .resource = isp1362_hcd_resources,
  252. };
  253. #endif
  254. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  255. static struct resource net2272_bfin_resources[] = {
  256. {
  257. .start = 0x20200000,
  258. .end = 0x20200000 + 0x100,
  259. .flags = IORESOURCE_MEM,
  260. }, {
  261. .start = IRQ_PH14,
  262. .end = IRQ_PH14,
  263. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  264. },
  265. };
  266. static struct platform_device net2272_bfin_device = {
  267. .name = "net2272",
  268. .id = -1,
  269. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  270. .resource = net2272_bfin_resources,
  271. };
  272. #endif
  273. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  274. static struct resource bfin_uart_resources[] = {
  275. {
  276. .start = 0xFFC00400,
  277. .end = 0xFFC004FF,
  278. .flags = IORESOURCE_MEM,
  279. }, {
  280. .start = 0xFFC02000,
  281. .end = 0xFFC020FF,
  282. .flags = IORESOURCE_MEM,
  283. },
  284. };
  285. static struct platform_device bfin_uart_device = {
  286. .name = "bfin-uart",
  287. .id = 1,
  288. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  289. .resource = bfin_uart_resources,
  290. };
  291. #endif
  292. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  293. static struct platform_device bfin_sport0_uart_device = {
  294. .name = "bfin-sport-uart",
  295. .id = 0,
  296. };
  297. static struct platform_device bfin_sport1_uart_device = {
  298. .name = "bfin-sport-uart",
  299. .id = 1,
  300. };
  301. #endif
  302. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  303. static struct platform_device bfin_mac_device = {
  304. .name = "bfin_mac",
  305. };
  306. #endif
  307. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  308. #define PATA_INT 64
  309. static struct pata_platform_info bfin_pata_platform_data = {
  310. .ioport_shift = 2,
  311. .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  312. };
  313. static struct resource bfin_pata_resources[] = {
  314. {
  315. .start = 0x2030C000,
  316. .end = 0x2030C01F,
  317. .flags = IORESOURCE_MEM,
  318. },
  319. {
  320. .start = 0x2030D018,
  321. .end = 0x2030D01B,
  322. .flags = IORESOURCE_MEM,
  323. },
  324. {
  325. .start = PATA_INT,
  326. .end = PATA_INT,
  327. .flags = IORESOURCE_IRQ,
  328. },
  329. };
  330. static struct platform_device bfin_pata_device = {
  331. .name = "pata_platform",
  332. .id = -1,
  333. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  334. .resource = bfin_pata_resources,
  335. .dev = {
  336. .platform_data = &bfin_pata_platform_data,
  337. }
  338. };
  339. #endif
  340. static struct platform_device *cm_bf537_devices[] __initdata = {
  341. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  342. &rtc_device,
  343. #endif
  344. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  345. &bfin_uart_device,
  346. #endif
  347. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  348. &bfin_sport0_uart_device,
  349. &bfin_sport1_uart_device,
  350. #endif
  351. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  352. &isp1362_hcd_device,
  353. #endif
  354. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  355. &smc91x_device,
  356. #endif
  357. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  358. &bfin_mac_device,
  359. #endif
  360. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  361. &net2272_bfin_device,
  362. #endif
  363. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  364. &bfin_spi0_device,
  365. #endif
  366. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  367. &bfin_pata_device,
  368. #endif
  369. };
  370. static int __init cm_bf537_init(void)
  371. {
  372. printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
  373. platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
  374. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  375. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  376. #endif
  377. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  378. irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
  379. #endif
  380. return 0;
  381. }
  382. arch_initcall(cm_bf537_init);
  383. void bfin_get_ether_addr(char *addr)
  384. {
  385. random_ether_addr(addr);
  386. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  387. }
  388. EXPORT_SYMBOL(bfin_get_ether_addr);