stamp.c 12 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf533/stamp.c
  3. * Based on: arch/blackfin/mach-bf533/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Created: 2005
  7. * Description: Board Info File for the BF533-STAMP
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2006 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/mtd/mtd.h>
  33. #include <linux/mtd/partitions.h>
  34. #include <linux/spi/spi.h>
  35. #include <linux/spi/flash.h>
  36. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  37. #include <linux/usb/isp1362.h>
  38. #endif
  39. #include <linux/pata_platform.h>
  40. #include <linux/irq.h>
  41. #include <asm/dma.h>
  42. #include <asm/bfin5xx_spi.h>
  43. #include <asm/reboot.h>
  44. #include <asm/portmux.h>
  45. /*
  46. * Name the Board for the /proc/cpuinfo
  47. */
  48. const char bfin_board_name[] = "ADDS-BF533-STAMP";
  49. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  50. static struct platform_device rtc_device = {
  51. .name = "rtc-bfin",
  52. .id = -1,
  53. };
  54. #endif
  55. /*
  56. * Driver needs to know address, irq and flag pin.
  57. */
  58. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  59. static struct resource smc91x_resources[] = {
  60. {
  61. .name = "smc91x-regs",
  62. .start = 0x20300300,
  63. .end = 0x20300300 + 16,
  64. .flags = IORESOURCE_MEM,
  65. }, {
  66. .start = IRQ_PF7,
  67. .end = IRQ_PF7,
  68. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  69. },
  70. };
  71. static struct platform_device smc91x_device = {
  72. .name = "smc91x",
  73. .id = 0,
  74. .num_resources = ARRAY_SIZE(smc91x_resources),
  75. .resource = smc91x_resources,
  76. };
  77. #endif
  78. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  79. static struct platform_device bfin_fb_adv7393_device = {
  80. .name = "bfin-adv7393",
  81. };
  82. #endif
  83. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  84. static struct resource net2272_bfin_resources[] = {
  85. {
  86. .start = 0x20300000,
  87. .end = 0x20300000 + 0x100,
  88. .flags = IORESOURCE_MEM,
  89. }, {
  90. .start = IRQ_PF10,
  91. .end = IRQ_PF10,
  92. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  93. },
  94. };
  95. static struct platform_device net2272_bfin_device = {
  96. .name = "net2272",
  97. .id = -1,
  98. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  99. .resource = net2272_bfin_resources,
  100. };
  101. #endif
  102. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  103. /* all SPI peripherals info goes here */
  104. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  105. static struct mtd_partition bfin_spi_flash_partitions[] = {
  106. {
  107. .name = "bootloader",
  108. .size = 0x00020000,
  109. .offset = 0,
  110. .mask_flags = MTD_CAP_ROM
  111. }, {
  112. .name = "kernel",
  113. .size = 0xe0000,
  114. .offset = 0x20000
  115. }, {
  116. .name = "file system",
  117. .size = 0x700000,
  118. .offset = 0x00100000,
  119. }
  120. };
  121. static struct flash_platform_data bfin_spi_flash_data = {
  122. .name = "m25p80",
  123. .parts = bfin_spi_flash_partitions,
  124. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  125. .type = "m25p64",
  126. };
  127. /* SPI flash chip (m25p64) */
  128. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  129. .enable_dma = 0, /* use dma transfer with this chip*/
  130. .bits_per_word = 8,
  131. };
  132. #endif
  133. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  134. /* SPI ADC chip */
  135. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  136. .enable_dma = 1, /* use dma transfer with this chip*/
  137. .bits_per_word = 16,
  138. };
  139. #endif
  140. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  141. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  142. .enable_dma = 0,
  143. .bits_per_word = 16,
  144. };
  145. #endif
  146. #if defined(CONFIG_PBX)
  147. static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
  148. .ctl_reg = 0x4, /* send zero */
  149. .enable_dma = 0,
  150. .bits_per_word = 8,
  151. .cs_change_per_word = 1,
  152. };
  153. #endif
  154. #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
  155. static struct bfin5xx_spi_chip ad5304_chip_info = {
  156. .enable_dma = 0,
  157. .bits_per_word = 16,
  158. };
  159. #endif
  160. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  161. static struct bfin5xx_spi_chip spi_mmc_chip_info = {
  162. .enable_dma = 1,
  163. .bits_per_word = 8,
  164. };
  165. #endif
  166. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  167. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  168. {
  169. /* the modalias must be the same as spi device driver name */
  170. .modalias = "m25p80", /* Name of spi_driver for this device */
  171. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  172. .bus_num = 0, /* Framework bus number */
  173. .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
  174. .platform_data = &bfin_spi_flash_data,
  175. .controller_data = &spi_flash_chip_info,
  176. .mode = SPI_MODE_3,
  177. },
  178. #endif
  179. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  180. {
  181. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  182. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  183. .bus_num = 0, /* Framework bus number */
  184. .chip_select = 1, /* Framework chip select. */
  185. .platform_data = NULL, /* No spi_driver specific config */
  186. .controller_data = &spi_adc_chip_info,
  187. },
  188. #endif
  189. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  190. {
  191. .modalias = "ad1836-spi",
  192. .max_speed_hz = 31250000, /* max spi clock (SCK) speed in HZ */
  193. .bus_num = 0,
  194. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  195. .controller_data = &ad1836_spi_chip_info,
  196. },
  197. #endif
  198. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  199. {
  200. .modalias = "spi_mmc_dummy",
  201. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  202. .bus_num = 0,
  203. .chip_select = 0,
  204. .platform_data = NULL,
  205. .controller_data = &spi_mmc_chip_info,
  206. .mode = SPI_MODE_3,
  207. },
  208. {
  209. .modalias = "spi_mmc",
  210. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  211. .bus_num = 0,
  212. .chip_select = CONFIG_SPI_MMC_CS_CHAN,
  213. .platform_data = NULL,
  214. .controller_data = &spi_mmc_chip_info,
  215. .mode = SPI_MODE_3,
  216. },
  217. #endif
  218. #if defined(CONFIG_PBX)
  219. {
  220. .modalias = "fxs-spi",
  221. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  222. .bus_num = 0,
  223. .chip_select = 8 - CONFIG_J11_JUMPER,
  224. .controller_data = &spi_si3xxx_chip_info,
  225. .mode = SPI_MODE_3,
  226. },
  227. {
  228. .modalias = "fxo-spi",
  229. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  230. .bus_num = 0,
  231. .chip_select = 8 - CONFIG_J19_JUMPER,
  232. .controller_data = &spi_si3xxx_chip_info,
  233. .mode = SPI_MODE_3,
  234. },
  235. #endif
  236. #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
  237. {
  238. .modalias = "ad5304_spi",
  239. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  240. .bus_num = 0,
  241. .chip_select = 2,
  242. .platform_data = NULL,
  243. .controller_data = &ad5304_chip_info,
  244. .mode = SPI_MODE_2,
  245. },
  246. #endif
  247. };
  248. /* SPI (0) */
  249. static struct resource bfin_spi0_resource[] = {
  250. [0] = {
  251. .start = SPI0_REGBASE,
  252. .end = SPI0_REGBASE + 0xFF,
  253. .flags = IORESOURCE_MEM,
  254. },
  255. [1] = {
  256. .start = CH_SPI,
  257. .end = CH_SPI,
  258. .flags = IORESOURCE_IRQ,
  259. }
  260. };
  261. /* SPI controller data */
  262. static struct bfin5xx_spi_master bfin_spi0_info = {
  263. .num_chipselect = 8,
  264. .enable_dma = 1, /* master has the ability to do dma transfer */
  265. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  266. };
  267. static struct platform_device bfin_spi0_device = {
  268. .name = "bfin-spi",
  269. .id = 0, /* Bus number */
  270. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  271. .resource = bfin_spi0_resource,
  272. .dev = {
  273. .platform_data = &bfin_spi0_info, /* Passed to driver */
  274. },
  275. };
  276. #endif /* spi master and devices */
  277. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  278. static struct platform_device bfin_fb_device = {
  279. .name = "bf537-fb",
  280. };
  281. #endif
  282. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  283. static struct resource bfin_uart_resources[] = {
  284. {
  285. .start = 0xFFC00400,
  286. .end = 0xFFC004FF,
  287. .flags = IORESOURCE_MEM,
  288. },
  289. };
  290. static struct platform_device bfin_uart_device = {
  291. .name = "bfin-uart",
  292. .id = 1,
  293. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  294. .resource = bfin_uart_resources,
  295. };
  296. #endif
  297. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  298. static struct platform_device bfin_sport0_uart_device = {
  299. .name = "bfin-sport-uart",
  300. .id = 0,
  301. };
  302. static struct platform_device bfin_sport1_uart_device = {
  303. .name = "bfin-sport-uart",
  304. .id = 1,
  305. };
  306. #endif
  307. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  308. #define PATA_INT 55
  309. static struct pata_platform_info bfin_pata_platform_data = {
  310. .ioport_shift = 1,
  311. .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  312. };
  313. static struct resource bfin_pata_resources[] = {
  314. {
  315. .start = 0x20314020,
  316. .end = 0x2031403F,
  317. .flags = IORESOURCE_MEM,
  318. },
  319. {
  320. .start = 0x2031401C,
  321. .end = 0x2031401F,
  322. .flags = IORESOURCE_MEM,
  323. },
  324. {
  325. .start = PATA_INT,
  326. .end = PATA_INT,
  327. .flags = IORESOURCE_IRQ,
  328. },
  329. };
  330. static struct platform_device bfin_pata_device = {
  331. .name = "pata_platform",
  332. .id = -1,
  333. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  334. .resource = bfin_pata_resources,
  335. .dev = {
  336. .platform_data = &bfin_pata_platform_data,
  337. }
  338. };
  339. #endif
  340. static struct platform_device *stamp_devices[] __initdata = {
  341. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  342. &rtc_device,
  343. #endif
  344. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  345. &smc91x_device,
  346. #endif
  347. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  348. &bfin_fb_adv7393_device,
  349. #endif
  350. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  351. &net2272_bfin_device,
  352. #endif
  353. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  354. &bfin_spi0_device,
  355. #endif
  356. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  357. &bfin_uart_device,
  358. #endif
  359. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  360. &bfin_sport0_uart_device,
  361. &bfin_sport1_uart_device,
  362. #endif
  363. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  364. &bfin_pata_device,
  365. #endif
  366. };
  367. static int __init stamp_init(void)
  368. {
  369. int ret;
  370. printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
  371. ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  372. if (ret < 0)
  373. return ret;
  374. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  375. # if defined(CONFIG_BFIN_SHARED_FLASH_ENET)
  376. /* setup BF533_STAMP CPLD to route AMS3 to Ethernet MAC */
  377. bfin_write_FIO_DIR(bfin_read_FIO_DIR() | (1 << CONFIG_ENET_FLASH_PIN));
  378. bfin_write_FIO_FLAG_S(1 << CONFIG_ENET_FLASH_PIN);
  379. SSYNC();
  380. # endif
  381. #endif
  382. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  383. spi_register_board_info(bfin_spi_board_info,
  384. ARRAY_SIZE(bfin_spi_board_info));
  385. #endif
  386. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  387. irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
  388. #endif
  389. return 0;
  390. }
  391. arch_initcall(stamp_init);
  392. void native_machine_restart(char *cmd)
  393. {
  394. #if defined(CONFIG_BFIN_SHARED_FLASH_ENET)
  395. # define BIT_TO_SET (1 << CONFIG_ENET_FLASH_PIN)
  396. bfin_write_FIO_INEN(~BIT_TO_SET);
  397. bfin_write_FIO_DIR(BIT_TO_SET);
  398. bfin_write_FIO_FLAG_C(BIT_TO_SET);
  399. #endif
  400. }