cm_bf533.c 9.6 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf533/boards/cm_bf533.c
  3. * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au> Copyright 2005
  5. *
  6. * Created: 2005
  7. * Description: Board description file
  8. *
  9. * Modified:
  10. * Copyright 2004-2006 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. #include <linux/device.h>
  30. #include <linux/platform_device.h>
  31. #include <linux/mtd/mtd.h>
  32. #include <linux/mtd/partitions.h>
  33. #include <linux/spi/spi.h>
  34. #include <linux/spi/flash.h>
  35. #include <linux/usb/isp1362.h>
  36. #include <linux/pata_platform.h>
  37. #include <linux/irq.h>
  38. #include <asm/dma.h>
  39. #include <asm/bfin5xx_spi.h>
  40. #include <asm/portmux.h>
  41. /*
  42. * Name the Board for the /proc/cpuinfo
  43. */
  44. const char bfin_board_name[] = "Bluetechnix CM BF533";
  45. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  46. /* all SPI peripherals info goes here */
  47. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  48. static struct mtd_partition bfin_spi_flash_partitions[] = {
  49. {
  50. .name = "bootloader",
  51. .size = 0x00020000,
  52. .offset = 0,
  53. .mask_flags = MTD_CAP_ROM
  54. }, {
  55. .name = "kernel",
  56. .size = 0xe0000,
  57. .offset = 0x20000
  58. }, {
  59. .name = "file system",
  60. .size = 0x700000,
  61. .offset = 0x00100000,
  62. }
  63. };
  64. static struct flash_platform_data bfin_spi_flash_data = {
  65. .name = "m25p80",
  66. .parts = bfin_spi_flash_partitions,
  67. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  68. .type = "m25p64",
  69. };
  70. /* SPI flash chip (m25p64) */
  71. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  72. .enable_dma = 0, /* use dma transfer with this chip*/
  73. .bits_per_word = 8,
  74. };
  75. #endif
  76. /* SPI ADC chip */
  77. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  78. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  79. .enable_dma = 1, /* use dma transfer with this chip*/
  80. .bits_per_word = 16,
  81. };
  82. #endif
  83. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  84. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  85. .enable_dma = 0,
  86. .bits_per_word = 16,
  87. };
  88. #endif
  89. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  90. static struct bfin5xx_spi_chip spi_mmc_chip_info = {
  91. .enable_dma = 1,
  92. .bits_per_word = 8,
  93. };
  94. #endif
  95. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  96. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  97. {
  98. /* the modalias must be the same as spi device driver name */
  99. .modalias = "m25p80", /* Name of spi_driver for this device */
  100. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  101. .bus_num = 0, /* Framework bus number */
  102. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  103. .platform_data = &bfin_spi_flash_data,
  104. .controller_data = &spi_flash_chip_info,
  105. .mode = SPI_MODE_3,
  106. },
  107. #endif
  108. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  109. {
  110. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  111. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  112. .bus_num = 0, /* Framework bus number */
  113. .chip_select = 2, /* Framework chip select. */
  114. .platform_data = NULL, /* No spi_driver specific config */
  115. .controller_data = &spi_adc_chip_info,
  116. },
  117. #endif
  118. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  119. {
  120. .modalias = "ad1836-spi",
  121. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  122. .bus_num = 0,
  123. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  124. .controller_data = &ad1836_spi_chip_info,
  125. },
  126. #endif
  127. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  128. {
  129. .modalias = "spi_mmc_dummy",
  130. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  131. .bus_num = 0,
  132. .chip_select = 0,
  133. .platform_data = NULL,
  134. .controller_data = &spi_mmc_chip_info,
  135. .mode = SPI_MODE_3,
  136. },
  137. {
  138. .modalias = "spi_mmc",
  139. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  140. .bus_num = 0,
  141. .chip_select = CONFIG_SPI_MMC_CS_CHAN,
  142. .platform_data = NULL,
  143. .controller_data = &spi_mmc_chip_info,
  144. .mode = SPI_MODE_3,
  145. },
  146. #endif
  147. };
  148. /* SPI (0) */
  149. static struct resource bfin_spi0_resource[] = {
  150. [0] = {
  151. .start = SPI0_REGBASE,
  152. .end = SPI0_REGBASE + 0xFF,
  153. .flags = IORESOURCE_MEM,
  154. },
  155. [1] = {
  156. .start = CH_SPI,
  157. .end = CH_SPI,
  158. .flags = IORESOURCE_IRQ,
  159. }
  160. };
  161. /* SPI controller data */
  162. static struct bfin5xx_spi_master bfin_spi0_info = {
  163. .num_chipselect = 8,
  164. .enable_dma = 1, /* master has the ability to do dma transfer */
  165. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  166. };
  167. static struct platform_device bfin_spi0_device = {
  168. .name = "bfin-spi",
  169. .id = 0, /* Bus number */
  170. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  171. .resource = bfin_spi0_resource,
  172. .dev = {
  173. .platform_data = &bfin_spi0_info, /* Passed to driver */
  174. },
  175. };
  176. #endif /* spi master and devices */
  177. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  178. static struct platform_device rtc_device = {
  179. .name = "rtc-bfin",
  180. .id = -1,
  181. };
  182. #endif
  183. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  184. static struct resource smc91x_resources[] = {
  185. {
  186. .start = 0x20200300,
  187. .end = 0x20200300 + 16,
  188. .flags = IORESOURCE_MEM,
  189. }, {
  190. .start = IRQ_PF0,
  191. .end = IRQ_PF0,
  192. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  193. },
  194. };
  195. static struct platform_device smc91x_device = {
  196. .name = "smc91x",
  197. .id = 0,
  198. .num_resources = ARRAY_SIZE(smc91x_resources),
  199. .resource = smc91x_resources,
  200. };
  201. #endif
  202. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  203. static struct resource bfin_uart_resources[] = {
  204. {
  205. .start = 0xFFC00400,
  206. .end = 0xFFC004FF,
  207. .flags = IORESOURCE_MEM,
  208. },
  209. };
  210. static struct platform_device bfin_uart_device = {
  211. .name = "bfin-uart",
  212. .id = 1,
  213. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  214. .resource = bfin_uart_resources,
  215. };
  216. #endif
  217. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  218. static struct platform_device bfin_sport0_uart_device = {
  219. .name = "bfin-sport-uart",
  220. .id = 0,
  221. };
  222. static struct platform_device bfin_sport1_uart_device = {
  223. .name = "bfin-sport-uart",
  224. .id = 1,
  225. };
  226. #endif
  227. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  228. static struct resource isp1362_hcd_resources[] = {
  229. {
  230. .start = 0x20308000,
  231. .end = 0x20308000,
  232. .flags = IORESOURCE_MEM,
  233. }, {
  234. .start = 0x20308004,
  235. .end = 0x20308004,
  236. .flags = IORESOURCE_MEM,
  237. }, {
  238. .start = IRQ_PF4,
  239. .end = IRQ_PF4,
  240. .flags = IORESOURCE_IRQ,
  241. },
  242. };
  243. static struct isp1362_platform_data isp1362_priv = {
  244. .sel15Kres = 1,
  245. .clknotstop = 0,
  246. .oc_enable = 0,
  247. .int_act_high = 0,
  248. .int_edge_triggered = 0,
  249. .remote_wakeup_connected = 0,
  250. .no_power_switching = 1,
  251. .power_switching_mode = 0,
  252. };
  253. static struct platform_device isp1362_hcd_device = {
  254. .name = "isp1362-hcd",
  255. .id = 0,
  256. .dev = {
  257. .platform_data = &isp1362_priv,
  258. },
  259. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  260. .resource = isp1362_hcd_resources,
  261. };
  262. #endif
  263. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  264. #define PATA_INT 38
  265. static struct pata_platform_info bfin_pata_platform_data = {
  266. .ioport_shift = 2,
  267. .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  268. };
  269. static struct resource bfin_pata_resources[] = {
  270. {
  271. .start = 0x2030C000,
  272. .end = 0x2030C01F,
  273. .flags = IORESOURCE_MEM,
  274. },
  275. {
  276. .start = 0x2030D018,
  277. .end = 0x2030D01B,
  278. .flags = IORESOURCE_MEM,
  279. },
  280. {
  281. .start = PATA_INT,
  282. .end = PATA_INT,
  283. .flags = IORESOURCE_IRQ,
  284. },
  285. };
  286. static struct platform_device bfin_pata_device = {
  287. .name = "pata_platform",
  288. .id = -1,
  289. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  290. .resource = bfin_pata_resources,
  291. .dev = {
  292. .platform_data = &bfin_pata_platform_data,
  293. }
  294. };
  295. #endif
  296. static struct platform_device *cm_bf533_devices[] __initdata = {
  297. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  298. &bfin_uart_device,
  299. #endif
  300. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  301. &bfin_sport0_uart_device,
  302. &bfin_sport1_uart_device,
  303. #endif
  304. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  305. &rtc_device,
  306. #endif
  307. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  308. &isp1362_hcd_device,
  309. #endif
  310. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  311. &smc91x_device,
  312. #endif
  313. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  314. &bfin_spi0_device,
  315. #endif
  316. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  317. &bfin_pata_device,
  318. #endif
  319. };
  320. static int __init cm_bf533_init(void)
  321. {
  322. printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
  323. platform_add_devices(cm_bf533_devices, ARRAY_SIZE(cm_bf533_devices));
  324. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  325. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  326. #endif
  327. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  328. irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
  329. #endif
  330. return 0;
  331. }
  332. arch_initcall(cm_bf533_init);