ezkit.c 20 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf527/boards/ezkit.c
  3. * Based on: arch/blackfin/mach-bf537/boards/stamp.c
  4. * Author: Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Created:
  7. * Description:
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2007 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/mtd/mtd.h>
  33. #include <linux/mtd/partitions.h>
  34. #include <linux/spi/spi.h>
  35. #include <linux/spi/flash.h>
  36. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  37. #include <linux/usb/isp1362.h>
  38. #endif
  39. #include <linux/pata_platform.h>
  40. #include <linux/irq.h>
  41. #include <linux/interrupt.h>
  42. #include <linux/usb/sl811.h>
  43. #include <asm/cplb.h>
  44. #include <asm/dma.h>
  45. #include <asm/bfin5xx_spi.h>
  46. #include <asm/reboot.h>
  47. #include <asm/nand.h>
  48. #include <asm/portmux.h>
  49. #include <linux/spi/ad7877.h>
  50. /*
  51. * Name the Board for the /proc/cpuinfo
  52. */
  53. const char bfin_board_name[] = "ADDS-BF527-EZKIT";
  54. /*
  55. * Driver needs to know address, irq and flag pin.
  56. */
  57. #define ISP1761_BASE 0x203C0000
  58. #define ISP1761_IRQ IRQ_PF7
  59. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  60. static struct resource bfin_isp1761_resources[] = {
  61. [0] = {
  62. .name = "isp1761-regs",
  63. .start = ISP1761_BASE + 0x00000000,
  64. .end = ISP1761_BASE + 0x000fffff,
  65. .flags = IORESOURCE_MEM,
  66. },
  67. [1] = {
  68. .start = ISP1761_IRQ,
  69. .end = ISP1761_IRQ,
  70. .flags = IORESOURCE_IRQ,
  71. },
  72. };
  73. static struct platform_device bfin_isp1761_device = {
  74. .name = "isp1761",
  75. .id = 0,
  76. .num_resources = ARRAY_SIZE(bfin_isp1761_resources),
  77. .resource = bfin_isp1761_resources,
  78. };
  79. static struct platform_device *bfin_isp1761_devices[] = {
  80. &bfin_isp1761_device,
  81. };
  82. int __init bfin_isp1761_init(void)
  83. {
  84. unsigned int num_devices = ARRAY_SIZE(bfin_isp1761_devices);
  85. printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
  86. set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING);
  87. return platform_add_devices(bfin_isp1761_devices, num_devices);
  88. }
  89. void __exit bfin_isp1761_exit(void)
  90. {
  91. platform_device_unregister(&bfin_isp1761_device);
  92. }
  93. arch_initcall(bfin_isp1761_init);
  94. #endif
  95. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  96. static struct mtd_partition partition_info[] = {
  97. {
  98. .name = "Linux Kernel",
  99. .offset = 0,
  100. .size = 4 * SIZE_1M,
  101. },
  102. {
  103. .name = "File System",
  104. .offset = 4 * SIZE_1M,
  105. .size = (256 - 4) * SIZE_1M,
  106. },
  107. };
  108. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  109. .page_size = NFC_PG_SIZE_256,
  110. .data_width = NFC_NWIDTH_8,
  111. .partitions = partition_info,
  112. .nr_partitions = ARRAY_SIZE(partition_info),
  113. .rd_dly = 3,
  114. .wr_dly = 3,
  115. };
  116. static struct resource bf5xx_nand_resources[] = {
  117. {
  118. .start = NFC_CTL,
  119. .end = NFC_DATA_RD + 2,
  120. .flags = IORESOURCE_MEM,
  121. },
  122. {
  123. .start = CH_NFC,
  124. .end = CH_NFC,
  125. .flags = IORESOURCE_IRQ,
  126. },
  127. };
  128. static struct platform_device bf5xx_nand_device = {
  129. .name = "bf5xx-nand",
  130. .id = 0,
  131. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  132. .resource = bf5xx_nand_resources,
  133. .dev = {
  134. .platform_data = &bf5xx_nand_platform,
  135. },
  136. };
  137. #endif
  138. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  139. static struct resource bfin_pcmcia_cf_resources[] = {
  140. {
  141. .start = 0x20310000, /* IO PORT */
  142. .end = 0x20312000,
  143. .flags = IORESOURCE_MEM,
  144. }, {
  145. .start = 0x20311000, /* Attribute Memory */
  146. .end = 0x20311FFF,
  147. .flags = IORESOURCE_MEM,
  148. }, {
  149. .start = IRQ_PF4,
  150. .end = IRQ_PF4,
  151. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  152. }, {
  153. .start = 6, /* Card Detect PF6 */
  154. .end = 6,
  155. .flags = IORESOURCE_IRQ,
  156. },
  157. };
  158. static struct platform_device bfin_pcmcia_cf_device = {
  159. .name = "bfin_cf_pcmcia",
  160. .id = -1,
  161. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  162. .resource = bfin_pcmcia_cf_resources,
  163. };
  164. #endif
  165. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  166. static struct platform_device rtc_device = {
  167. .name = "rtc-bfin",
  168. .id = -1,
  169. };
  170. #endif
  171. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  172. static struct resource smc91x_resources[] = {
  173. {
  174. .name = "smc91x-regs",
  175. .start = 0x20300300,
  176. .end = 0x20300300 + 16,
  177. .flags = IORESOURCE_MEM,
  178. }, {
  179. .start = IRQ_PF7,
  180. .end = IRQ_PF7,
  181. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  182. },
  183. };
  184. static struct platform_device smc91x_device = {
  185. .name = "smc91x",
  186. .id = 0,
  187. .num_resources = ARRAY_SIZE(smc91x_resources),
  188. .resource = smc91x_resources,
  189. };
  190. #endif
  191. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  192. static struct resource dm9000_resources[] = {
  193. [0] = {
  194. .start = 0x203FB800,
  195. .end = 0x203FB800 + 8,
  196. .flags = IORESOURCE_MEM,
  197. },
  198. [1] = {
  199. .start = IRQ_PF9,
  200. .end = IRQ_PF9,
  201. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  202. },
  203. };
  204. static struct platform_device dm9000_device = {
  205. .name = "dm9000",
  206. .id = -1,
  207. .num_resources = ARRAY_SIZE(dm9000_resources),
  208. .resource = dm9000_resources,
  209. };
  210. #endif
  211. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  212. static struct resource sl811_hcd_resources[] = {
  213. {
  214. .start = 0x20340000,
  215. .end = 0x20340000,
  216. .flags = IORESOURCE_MEM,
  217. }, {
  218. .start = 0x20340004,
  219. .end = 0x20340004,
  220. .flags = IORESOURCE_MEM,
  221. }, {
  222. .start = CONFIG_USB_SL811_BFIN_IRQ,
  223. .end = CONFIG_USB_SL811_BFIN_IRQ,
  224. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  225. },
  226. };
  227. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  228. void sl811_port_power(struct device *dev, int is_on)
  229. {
  230. gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
  231. gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS);
  232. if (is_on)
  233. gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 1);
  234. else
  235. gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 0);
  236. }
  237. #endif
  238. static struct sl811_platform_data sl811_priv = {
  239. .potpg = 10,
  240. .power = 250, /* == 500mA */
  241. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  242. .port_power = &sl811_port_power,
  243. #endif
  244. };
  245. static struct platform_device sl811_hcd_device = {
  246. .name = "sl811-hcd",
  247. .id = 0,
  248. .dev = {
  249. .platform_data = &sl811_priv,
  250. },
  251. .num_resources = ARRAY_SIZE(sl811_hcd_resources),
  252. .resource = sl811_hcd_resources,
  253. };
  254. #endif
  255. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  256. static struct resource isp1362_hcd_resources[] = {
  257. {
  258. .start = 0x20360000,
  259. .end = 0x20360000,
  260. .flags = IORESOURCE_MEM,
  261. }, {
  262. .start = 0x20360004,
  263. .end = 0x20360004,
  264. .flags = IORESOURCE_MEM,
  265. }, {
  266. .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
  267. .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
  268. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  269. },
  270. };
  271. static struct isp1362_platform_data isp1362_priv = {
  272. .sel15Kres = 1,
  273. .clknotstop = 0,
  274. .oc_enable = 0,
  275. .int_act_high = 0,
  276. .int_edge_triggered = 0,
  277. .remote_wakeup_connected = 0,
  278. .no_power_switching = 1,
  279. .power_switching_mode = 0,
  280. };
  281. static struct platform_device isp1362_hcd_device = {
  282. .name = "isp1362-hcd",
  283. .id = 0,
  284. .dev = {
  285. .platform_data = &isp1362_priv,
  286. },
  287. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  288. .resource = isp1362_hcd_resources,
  289. };
  290. #endif
  291. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  292. static struct platform_device bfin_mac_device = {
  293. .name = "bfin_mac",
  294. };
  295. #endif
  296. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  297. static struct resource net2272_bfin_resources[] = {
  298. {
  299. .start = 0x20300000,
  300. .end = 0x20300000 + 0x100,
  301. .flags = IORESOURCE_MEM,
  302. }, {
  303. .start = IRQ_PF7,
  304. .end = IRQ_PF7,
  305. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  306. },
  307. };
  308. static struct platform_device net2272_bfin_device = {
  309. .name = "net2272",
  310. .id = -1,
  311. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  312. .resource = net2272_bfin_resources,
  313. };
  314. #endif
  315. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  316. /* all SPI peripherals info goes here */
  317. #if defined(CONFIG_MTD_M25P80) \
  318. || defined(CONFIG_MTD_M25P80_MODULE)
  319. static struct mtd_partition bfin_spi_flash_partitions[] = {
  320. {
  321. .name = "bootloader",
  322. .size = 0x00020000,
  323. .offset = 0,
  324. .mask_flags = MTD_CAP_ROM
  325. }, {
  326. .name = "kernel",
  327. .size = 0xe0000,
  328. .offset = 0x20000
  329. }, {
  330. .name = "file system",
  331. .size = 0x700000,
  332. .offset = 0x00100000,
  333. }
  334. };
  335. static struct flash_platform_data bfin_spi_flash_data = {
  336. .name = "m25p80",
  337. .parts = bfin_spi_flash_partitions,
  338. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  339. .type = "m25p64",
  340. };
  341. /* SPI flash chip (m25p64) */
  342. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  343. .enable_dma = 0, /* use dma transfer with this chip*/
  344. .bits_per_word = 8,
  345. };
  346. #endif
  347. #if defined(CONFIG_SPI_ADC_BF533) \
  348. || defined(CONFIG_SPI_ADC_BF533_MODULE)
  349. /* SPI ADC chip */
  350. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  351. .enable_dma = 1, /* use dma transfer with this chip*/
  352. .bits_per_word = 16,
  353. };
  354. #endif
  355. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  356. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  357. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  358. .enable_dma = 0,
  359. .bits_per_word = 16,
  360. };
  361. #endif
  362. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  363. static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
  364. .enable_dma = 0,
  365. .bits_per_word = 16,
  366. };
  367. #endif
  368. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  369. static struct bfin5xx_spi_chip spi_mmc_chip_info = {
  370. .enable_dma = 1,
  371. .bits_per_word = 8,
  372. };
  373. #endif
  374. #if defined(CONFIG_PBX)
  375. static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
  376. .ctl_reg = 0x4, /* send zero */
  377. .enable_dma = 0,
  378. .bits_per_word = 8,
  379. .cs_change_per_word = 1,
  380. };
  381. #endif
  382. #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
  383. static struct bfin5xx_spi_chip ad5304_chip_info = {
  384. .enable_dma = 0,
  385. .bits_per_word = 16,
  386. };
  387. #endif
  388. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  389. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  390. .enable_dma = 0,
  391. .bits_per_word = 16,
  392. };
  393. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  394. .model = 7877,
  395. .vref_delay_usecs = 50, /* internal, no capacitor */
  396. .x_plate_ohms = 419,
  397. .y_plate_ohms = 486,
  398. .pressure_max = 1000,
  399. .pressure_min = 0,
  400. .stopacq_polarity = 1,
  401. .first_conversion_delay = 3,
  402. .acquisition_time = 1,
  403. .averaging = 1,
  404. .pen_down_acc_interval = 1,
  405. };
  406. #endif
  407. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  408. && defined(CONFIG_SND_SOC_WM8731_SPI)
  409. static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
  410. .enable_dma = 0,
  411. .bits_per_word = 16,
  412. };
  413. #endif
  414. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  415. #if defined(CONFIG_MTD_M25P80) \
  416. || defined(CONFIG_MTD_M25P80_MODULE)
  417. {
  418. /* the modalias must be the same as spi device driver name */
  419. .modalias = "m25p80", /* Name of spi_driver for this device */
  420. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  421. .bus_num = 0, /* Framework bus number */
  422. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  423. .platform_data = &bfin_spi_flash_data,
  424. .controller_data = &spi_flash_chip_info,
  425. .mode = SPI_MODE_3,
  426. },
  427. #endif
  428. #if defined(CONFIG_SPI_ADC_BF533) \
  429. || defined(CONFIG_SPI_ADC_BF533_MODULE)
  430. {
  431. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  432. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  433. .bus_num = 0, /* Framework bus number */
  434. .chip_select = 1, /* Framework chip select. */
  435. .platform_data = NULL, /* No spi_driver specific config */
  436. .controller_data = &spi_adc_chip_info,
  437. },
  438. #endif
  439. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  440. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  441. {
  442. .modalias = "ad1836-spi",
  443. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  444. .bus_num = 0,
  445. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  446. .controller_data = &ad1836_spi_chip_info,
  447. },
  448. #endif
  449. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  450. {
  451. .modalias = "ad9960-spi",
  452. .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
  453. .bus_num = 0,
  454. .chip_select = 1,
  455. .controller_data = &ad9960_spi_chip_info,
  456. },
  457. #endif
  458. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  459. {
  460. .modalias = "spi_mmc_dummy",
  461. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  462. .bus_num = 0,
  463. .chip_select = 0,
  464. .platform_data = NULL,
  465. .controller_data = &spi_mmc_chip_info,
  466. .mode = SPI_MODE_3,
  467. },
  468. {
  469. .modalias = "spi_mmc",
  470. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  471. .bus_num = 0,
  472. .chip_select = CONFIG_SPI_MMC_CS_CHAN,
  473. .platform_data = NULL,
  474. .controller_data = &spi_mmc_chip_info,
  475. .mode = SPI_MODE_3,
  476. },
  477. #endif
  478. #if defined(CONFIG_PBX)
  479. {
  480. .modalias = "fxs-spi",
  481. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  482. .bus_num = 0,
  483. .chip_select = 8 - CONFIG_J11_JUMPER,
  484. .controller_data = &spi_si3xxx_chip_info,
  485. .mode = SPI_MODE_3,
  486. },
  487. {
  488. .modalias = "fxo-spi",
  489. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  490. .bus_num = 0,
  491. .chip_select = 8 - CONFIG_J19_JUMPER,
  492. .controller_data = &spi_si3xxx_chip_info,
  493. .mode = SPI_MODE_3,
  494. },
  495. #endif
  496. #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
  497. {
  498. .modalias = "ad5304_spi",
  499. .max_speed_hz = 1250000, /* max spi clock (SCK) speed in HZ */
  500. .bus_num = 0,
  501. .chip_select = 2,
  502. .platform_data = NULL,
  503. .controller_data = &ad5304_chip_info,
  504. .mode = SPI_MODE_2,
  505. },
  506. #endif
  507. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  508. {
  509. .modalias = "ad7877",
  510. .platform_data = &bfin_ad7877_ts_info,
  511. .irq = IRQ_PF6,
  512. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  513. .bus_num = 0,
  514. .chip_select = 1,
  515. .controller_data = &spi_ad7877_chip_info,
  516. },
  517. #endif
  518. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  519. && defined(CONFIG_SND_SOC_WM8731_SPI)
  520. {
  521. .modalias = "wm8731",
  522. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  523. .bus_num = 0,
  524. .chip_select = 5,
  525. .controller_data = &spi_wm8731_chip_info,
  526. .mode = SPI_MODE_0,
  527. },
  528. #endif
  529. };
  530. /* SPI controller data */
  531. static struct bfin5xx_spi_master bfin_spi0_info = {
  532. .num_chipselect = 8,
  533. .enable_dma = 1, /* master has the ability to do dma transfer */
  534. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  535. };
  536. /* SPI (0) */
  537. static struct resource bfin_spi0_resource[] = {
  538. [0] = {
  539. .start = SPI0_REGBASE,
  540. .end = SPI0_REGBASE + 0xFF,
  541. .flags = IORESOURCE_MEM,
  542. },
  543. [1] = {
  544. .start = CH_SPI,
  545. .end = CH_SPI,
  546. .flags = IORESOURCE_IRQ,
  547. },
  548. };
  549. static struct platform_device bfin_spi0_device = {
  550. .name = "bfin-spi",
  551. .id = 0, /* Bus number */
  552. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  553. .resource = bfin_spi0_resource,
  554. .dev = {
  555. .platform_data = &bfin_spi0_info, /* Passed to driver */
  556. },
  557. };
  558. #endif /* spi master and devices */
  559. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  560. static struct platform_device bfin_fb_device = {
  561. .name = "bf537-lq035",
  562. };
  563. #endif
  564. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  565. static struct platform_device bfin_fb_adv7393_device = {
  566. .name = "bfin-adv7393",
  567. };
  568. #endif
  569. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  570. static struct resource bfin_uart_resources[] = {
  571. #ifdef CONFIG_SERIAL_BFIN_UART0
  572. {
  573. .start = 0xFFC00400,
  574. .end = 0xFFC004FF,
  575. .flags = IORESOURCE_MEM,
  576. },
  577. #endif
  578. #ifdef CONFIG_SERIAL_BFIN_UART1
  579. {
  580. .start = 0xFFC02000,
  581. .end = 0xFFC020FF,
  582. .flags = IORESOURCE_MEM,
  583. },
  584. #endif
  585. };
  586. static struct platform_device bfin_uart_device = {
  587. .name = "bfin-uart",
  588. .id = 1,
  589. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  590. .resource = bfin_uart_resources,
  591. };
  592. #endif
  593. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  594. static struct resource bfin_twi0_resource[] = {
  595. [0] = {
  596. .start = TWI0_REGBASE,
  597. .end = TWI0_REGBASE,
  598. .flags = IORESOURCE_MEM,
  599. },
  600. [1] = {
  601. .start = IRQ_TWI,
  602. .end = IRQ_TWI,
  603. .flags = IORESOURCE_IRQ,
  604. },
  605. };
  606. static struct platform_device i2c_bfin_twi_device = {
  607. .name = "i2c-bfin-twi",
  608. .id = 0,
  609. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  610. .resource = bfin_twi0_resource,
  611. };
  612. #endif
  613. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  614. static struct platform_device bfin_sport0_uart_device = {
  615. .name = "bfin-sport-uart",
  616. .id = 0,
  617. };
  618. static struct platform_device bfin_sport1_uart_device = {
  619. .name = "bfin-sport-uart",
  620. .id = 1,
  621. };
  622. #endif
  623. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  624. #define PATA_INT 55
  625. static struct pata_platform_info bfin_pata_platform_data = {
  626. .ioport_shift = 1,
  627. .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  628. };
  629. static struct resource bfin_pata_resources[] = {
  630. {
  631. .start = 0x20314020,
  632. .end = 0x2031403F,
  633. .flags = IORESOURCE_MEM,
  634. },
  635. {
  636. .start = 0x2031401C,
  637. .end = 0x2031401F,
  638. .flags = IORESOURCE_MEM,
  639. },
  640. {
  641. .start = PATA_INT,
  642. .end = PATA_INT,
  643. .flags = IORESOURCE_IRQ,
  644. },
  645. };
  646. static struct platform_device bfin_pata_device = {
  647. .name = "pata_platform",
  648. .id = -1,
  649. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  650. .resource = bfin_pata_resources,
  651. .dev = {
  652. .platform_data = &bfin_pata_platform_data,
  653. }
  654. };
  655. #endif
  656. static struct platform_device *stamp_devices[] __initdata = {
  657. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  658. &bf5xx_nand_device,
  659. #endif
  660. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  661. &bfin_pcmcia_cf_device,
  662. #endif
  663. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  664. &rtc_device,
  665. #endif
  666. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  667. &sl811_hcd_device,
  668. #endif
  669. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  670. &isp1362_hcd_device,
  671. #endif
  672. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  673. &smc91x_device,
  674. #endif
  675. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  676. &dm9000_device,
  677. #endif
  678. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  679. &bfin_mac_device,
  680. #endif
  681. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  682. &net2272_bfin_device,
  683. #endif
  684. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  685. &bfin_spi0_device,
  686. #endif
  687. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  688. &bfin_fb_device,
  689. #endif
  690. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  691. &bfin_fb_adv7393_device,
  692. #endif
  693. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  694. &bfin_uart_device,
  695. #endif
  696. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  697. &i2c_bfin_twi_device,
  698. #endif
  699. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  700. &bfin_sport0_uart_device,
  701. &bfin_sport1_uart_device,
  702. #endif
  703. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  704. &bfin_pata_device,
  705. #endif
  706. };
  707. static int __init stamp_init(void)
  708. {
  709. printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
  710. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  711. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  712. spi_register_board_info(bfin_spi_board_info,
  713. ARRAY_SIZE(bfin_spi_board_info));
  714. #endif
  715. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  716. irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
  717. #endif
  718. return 0;
  719. }
  720. arch_initcall(stamp_init);
  721. void native_machine_restart(char *cmd)
  722. {
  723. /* workaround reboot hang when booting from SPI */
  724. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  725. bfin_gpio_reset_spi0_ssel1();
  726. }
  727. /*
  728. * Currently the MAC address is saved in Flash by U-Boot
  729. */
  730. #define FLASH_MAC 0x203f0000
  731. void bfin_get_ether_addr(char *addr)
  732. {
  733. *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
  734. *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
  735. }
  736. EXPORT_SYMBOL(bfin_get_ether_addr);