setup.c 19 KB

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  1. /*
  2. * File: arch/blackfin/kernel/setup.c
  3. * Based on:
  4. * Author:
  5. *
  6. * Created:
  7. * Description:
  8. *
  9. * Modified:
  10. * Copyright 2004-2006 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. #include <linux/delay.h>
  30. #include <linux/console.h>
  31. #include <linux/bootmem.h>
  32. #include <linux/seq_file.h>
  33. #include <linux/cpu.h>
  34. #include <linux/module.h>
  35. #include <linux/tty.h>
  36. #include <linux/ext2_fs.h>
  37. #include <linux/cramfs_fs.h>
  38. #include <linux/romfs_fs.h>
  39. #include <asm/cplb.h>
  40. #include <asm/cacheflush.h>
  41. #include <asm/blackfin.h>
  42. #include <asm/cplbinit.h>
  43. #include <asm/div64.h>
  44. #include <asm/fixed_code.h>
  45. #include <asm/early_printk.h>
  46. u16 _bfin_swrst;
  47. unsigned long memory_start, memory_end, physical_mem_end;
  48. unsigned long reserved_mem_dcache_on;
  49. unsigned long reserved_mem_icache_on;
  50. EXPORT_SYMBOL(memory_start);
  51. EXPORT_SYMBOL(memory_end);
  52. EXPORT_SYMBOL(physical_mem_end);
  53. EXPORT_SYMBOL(_ramend);
  54. #ifdef CONFIG_MTD_UCLINUX
  55. unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
  56. unsigned long _ebss;
  57. EXPORT_SYMBOL(memory_mtd_end);
  58. EXPORT_SYMBOL(memory_mtd_start);
  59. EXPORT_SYMBOL(mtd_size);
  60. #endif
  61. char __initdata command_line[COMMAND_LINE_SIZE];
  62. void __init bf53x_cache_init(void)
  63. {
  64. #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
  65. generate_cpl_tables();
  66. #endif
  67. #ifdef CONFIG_BFIN_ICACHE
  68. bfin_icache_init();
  69. printk(KERN_INFO "Instruction Cache Enabled\n");
  70. #endif
  71. #ifdef CONFIG_BFIN_DCACHE
  72. bfin_dcache_init();
  73. printk(KERN_INFO "Data Cache Enabled"
  74. # if defined CONFIG_BFIN_WB
  75. " (write-back)"
  76. # elif defined CONFIG_BFIN_WT
  77. " (write-through)"
  78. # endif
  79. "\n");
  80. #endif
  81. }
  82. void __init bf53x_relocate_l1_mem(void)
  83. {
  84. unsigned long l1_code_length;
  85. unsigned long l1_data_a_length;
  86. unsigned long l1_data_b_length;
  87. l1_code_length = _etext_l1 - _stext_l1;
  88. if (l1_code_length > L1_CODE_LENGTH)
  89. l1_code_length = L1_CODE_LENGTH;
  90. /* cannot complain as printk is not available as yet.
  91. * But we can continue booting and complain later!
  92. */
  93. /* Copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
  94. dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length);
  95. l1_data_a_length = _ebss_l1 - _sdata_l1;
  96. if (l1_data_a_length > L1_DATA_A_LENGTH)
  97. l1_data_a_length = L1_DATA_A_LENGTH;
  98. /* Copy _sdata_l1 to _ebss_l1 to L1 data bank A SRAM */
  99. dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
  100. l1_data_b_length = _ebss_b_l1 - _sdata_b_l1;
  101. if (l1_data_b_length > L1_DATA_B_LENGTH)
  102. l1_data_b_length = L1_DATA_B_LENGTH;
  103. /* Copy _sdata_b_l1 to _ebss_b_l1 to L1 data bank B SRAM */
  104. dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
  105. l1_data_a_length, l1_data_b_length);
  106. }
  107. /*
  108. * Initial parsing of the command line. Currently, we support:
  109. * - Controlling the linux memory size: mem=xxx[KMG]
  110. * - Controlling the physical memory size: max_mem=xxx[KMG][$][#]
  111. * $ -> reserved memory is dcacheable
  112. * # -> reserved memory is icacheable
  113. */
  114. static __init void parse_cmdline_early(char *cmdline_p)
  115. {
  116. char c = ' ', *to = cmdline_p;
  117. unsigned int memsize;
  118. for (;;) {
  119. if (c == ' ') {
  120. if (!memcmp(to, "mem=", 4)) {
  121. to += 4;
  122. memsize = memparse(to, &to);
  123. if (memsize)
  124. _ramend = memsize;
  125. } else if (!memcmp(to, "max_mem=", 8)) {
  126. to += 8;
  127. memsize = memparse(to, &to);
  128. if (memsize) {
  129. physical_mem_end = memsize;
  130. if (*to != ' ') {
  131. if (*to == '$'
  132. || *(to + 1) == '$')
  133. reserved_mem_dcache_on =
  134. 1;
  135. if (*to == '#'
  136. || *(to + 1) == '#')
  137. reserved_mem_icache_on =
  138. 1;
  139. }
  140. }
  141. } else if (!memcmp(to, "earlyprintk=", 12)) {
  142. to += 12;
  143. setup_early_printk(to);
  144. }
  145. }
  146. c = *(to++);
  147. if (!c)
  148. break;
  149. }
  150. }
  151. void __init setup_arch(char **cmdline_p)
  152. {
  153. int bootmap_size;
  154. unsigned long l1_length, sclk, cclk;
  155. #ifdef CONFIG_MTD_UCLINUX
  156. unsigned long mtd_phys = 0;
  157. #endif
  158. #ifdef CONFIG_DUMMY_CONSOLE
  159. conswitchp = &dummy_con;
  160. #endif
  161. #if defined(CONFIG_CMDLINE_BOOL)
  162. strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
  163. command_line[sizeof(command_line) - 1] = 0;
  164. #endif
  165. /* Keep a copy of command line */
  166. *cmdline_p = &command_line[0];
  167. memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
  168. boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';
  169. /* setup memory defaults from the user config */
  170. physical_mem_end = 0;
  171. _ramend = CONFIG_MEM_SIZE * 1024 * 1024;
  172. parse_cmdline_early(&command_line[0]);
  173. cclk = get_cclk();
  174. sclk = get_sclk();
  175. #if !defined(CONFIG_BFIN_KERNEL_CLOCK)
  176. if (ANOMALY_05000273 && cclk == sclk)
  177. panic("ANOMALY 05000273, SCLK can not be same as CCLK");
  178. #endif
  179. #ifdef BF561_FAMILY
  180. if (ANOMALY_05000266) {
  181. bfin_read_IMDMA_D0_IRQ_STATUS();
  182. bfin_read_IMDMA_D1_IRQ_STATUS();
  183. }
  184. #endif
  185. printk(KERN_INFO "Hardware Trace ");
  186. if (bfin_read_TBUFCTL() & 0x1 )
  187. printk("Active ");
  188. else
  189. printk("Off ");
  190. if (bfin_read_TBUFCTL() & 0x2)
  191. printk("and Enabled\n");
  192. else
  193. printk("and Disabled\n");
  194. #if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH)
  195. /* we need to initialize the Flashrom device here since we might
  196. * do things with flash early on in the boot
  197. */
  198. flash_probe();
  199. #endif
  200. if (physical_mem_end == 0)
  201. physical_mem_end = _ramend;
  202. /* by now the stack is part of the init task */
  203. memory_end = _ramend - DMA_UNCACHED_REGION;
  204. _ramstart = (unsigned long)__bss_stop;
  205. memory_start = PAGE_ALIGN(_ramstart);
  206. #if defined(CONFIG_MTD_UCLINUX)
  207. /* generic memory mapped MTD driver */
  208. memory_mtd_end = memory_end;
  209. mtd_phys = _ramstart;
  210. mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 8)));
  211. # if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS)
  212. if (*((unsigned short *)(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC)
  213. mtd_size =
  214. PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x404)) << 10);
  215. # endif
  216. # if defined(CONFIG_CRAMFS)
  217. if (*((unsigned long *)(mtd_phys)) == CRAMFS_MAGIC)
  218. mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x4)));
  219. # endif
  220. # if defined(CONFIG_ROMFS_FS)
  221. if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0
  222. && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
  223. mtd_size =
  224. PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
  225. # if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
  226. /* Due to a Hardware Anomaly we need to limit the size of usable
  227. * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
  228. * 05000263 - Hardware loop corrupted when taking an ICPLB exception
  229. */
  230. # if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
  231. if (memory_end >= 56 * 1024 * 1024)
  232. memory_end = 56 * 1024 * 1024;
  233. # else
  234. if (memory_end >= 60 * 1024 * 1024)
  235. memory_end = 60 * 1024 * 1024;
  236. # endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
  237. # endif /* ANOMALY_05000263 */
  238. # endif /* CONFIG_ROMFS_FS */
  239. memory_end -= mtd_size;
  240. if (mtd_size == 0) {
  241. console_init();
  242. panic("Don't boot kernel without rootfs attached.\n");
  243. }
  244. /* Relocate MTD image to the top of memory after the uncached memory area */
  245. dma_memcpy((char *)memory_end, __bss_stop, mtd_size);
  246. memory_mtd_start = memory_end;
  247. _ebss = memory_mtd_start; /* define _ebss for compatible */
  248. #endif /* CONFIG_MTD_UCLINUX */
  249. #if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
  250. /* Due to a Hardware Anomaly we need to limit the size of usable
  251. * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
  252. * 05000263 - Hardware loop corrupted when taking an ICPLB exception
  253. */
  254. #if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
  255. if (memory_end >= 56 * 1024 * 1024)
  256. memory_end = 56 * 1024 * 1024;
  257. #else
  258. if (memory_end >= 60 * 1024 * 1024)
  259. memory_end = 60 * 1024 * 1024;
  260. #endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
  261. printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20);
  262. #endif /* ANOMALY_05000263 */
  263. #if !defined(CONFIG_MTD_UCLINUX)
  264. memory_end -= SIZE_4K; /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/
  265. #endif
  266. init_mm.start_code = (unsigned long)_stext;
  267. init_mm.end_code = (unsigned long)_etext;
  268. init_mm.end_data = (unsigned long)_edata;
  269. init_mm.brk = (unsigned long)0;
  270. init_leds();
  271. _bfin_swrst = bfin_read_SWRST();
  272. if (_bfin_swrst & RESET_DOUBLE)
  273. printk(KERN_INFO "Recovering from Double Fault event\n");
  274. else if (_bfin_swrst & RESET_WDOG)
  275. printk(KERN_INFO "Recovering from Watchdog event\n");
  276. else if (_bfin_swrst & RESET_SOFTWARE)
  277. printk(KERN_NOTICE "Reset caused by Software reset\n");
  278. printk(KERN_INFO "Blackfin support (C) 2004-2007 Analog Devices, Inc.\n");
  279. if (bfin_compiled_revid() == 0xffff)
  280. printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU);
  281. else if (bfin_compiled_revid() == -1)
  282. printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU);
  283. else
  284. printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid());
  285. if (bfin_revid() != bfin_compiled_revid()) {
  286. if (bfin_compiled_revid() == -1)
  287. printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n",
  288. bfin_revid());
  289. else if (bfin_compiled_revid() != 0xffff)
  290. printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
  291. bfin_compiled_revid(), bfin_revid());
  292. }
  293. if (bfin_revid() < SUPPORTED_REVID)
  294. printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
  295. CPU, bfin_revid());
  296. printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
  297. printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
  298. cclk / 1000000, sclk / 1000000);
  299. if (ANOMALY_05000273 && (cclk >> 1) <= sclk)
  300. printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n");
  301. printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
  302. printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
  303. printk(KERN_INFO "Memory map:\n"
  304. KERN_INFO " text = 0x%p-0x%p\n"
  305. KERN_INFO " rodata = 0x%p-0x%p\n"
  306. KERN_INFO " data = 0x%p-0x%p\n"
  307. KERN_INFO " stack = 0x%p-0x%p\n"
  308. KERN_INFO " init = 0x%p-0x%p\n"
  309. KERN_INFO " bss = 0x%p-0x%p\n"
  310. KERN_INFO " available = 0x%p-0x%p\n"
  311. #ifdef CONFIG_MTD_UCLINUX
  312. KERN_INFO " rootfs = 0x%p-0x%p\n"
  313. #endif
  314. #if DMA_UNCACHED_REGION > 0
  315. KERN_INFO " DMA Zone = 0x%p-0x%p\n"
  316. #endif
  317. , _stext, _etext,
  318. __start_rodata, __end_rodata,
  319. _sdata, _edata,
  320. (void *)&init_thread_union, (void *)((int)(&init_thread_union) + 0x2000),
  321. __init_begin, __init_end,
  322. __bss_start, __bss_stop,
  323. (void *)_ramstart, (void *)memory_end
  324. #ifdef CONFIG_MTD_UCLINUX
  325. , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size)
  326. #endif
  327. #if DMA_UNCACHED_REGION > 0
  328. , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend)
  329. #endif
  330. );
  331. /*
  332. * give all the memory to the bootmap allocator, tell it to put the
  333. * boot mem_map at the start of memory
  334. */
  335. bootmap_size = init_bootmem_node(NODE_DATA(0), memory_start >> PAGE_SHIFT, /* map goes here */
  336. PAGE_OFFSET >> PAGE_SHIFT,
  337. memory_end >> PAGE_SHIFT);
  338. /*
  339. * free the usable memory, we have to make sure we do not free
  340. * the bootmem bitmap so we then reserve it after freeing it :-)
  341. */
  342. free_bootmem(memory_start, memory_end - memory_start);
  343. reserve_bootmem(memory_start, bootmap_size);
  344. /*
  345. * get kmalloc into gear
  346. */
  347. paging_init();
  348. /* check the size of the l1 area */
  349. l1_length = _etext_l1 - _stext_l1;
  350. if (l1_length > L1_CODE_LENGTH)
  351. panic("L1 code memory overflow\n");
  352. l1_length = _ebss_l1 - _sdata_l1;
  353. if (l1_length > L1_DATA_A_LENGTH)
  354. panic("L1 data memory overflow\n");
  355. /* Copy atomic sequences to their fixed location, and sanity check that
  356. these locations are the ones that we advertise to userspace. */
  357. memcpy((void *)FIXED_CODE_START, &fixed_code_start,
  358. FIXED_CODE_END - FIXED_CODE_START);
  359. BUG_ON((char *)&sigreturn_stub - (char *)&fixed_code_start
  360. != SIGRETURN_STUB - FIXED_CODE_START);
  361. BUG_ON((char *)&atomic_xchg32 - (char *)&fixed_code_start
  362. != ATOMIC_XCHG32 - FIXED_CODE_START);
  363. BUG_ON((char *)&atomic_cas32 - (char *)&fixed_code_start
  364. != ATOMIC_CAS32 - FIXED_CODE_START);
  365. BUG_ON((char *)&atomic_add32 - (char *)&fixed_code_start
  366. != ATOMIC_ADD32 - FIXED_CODE_START);
  367. BUG_ON((char *)&atomic_sub32 - (char *)&fixed_code_start
  368. != ATOMIC_SUB32 - FIXED_CODE_START);
  369. BUG_ON((char *)&atomic_ior32 - (char *)&fixed_code_start
  370. != ATOMIC_IOR32 - FIXED_CODE_START);
  371. BUG_ON((char *)&atomic_and32 - (char *)&fixed_code_start
  372. != ATOMIC_AND32 - FIXED_CODE_START);
  373. BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start
  374. != ATOMIC_XOR32 - FIXED_CODE_START);
  375. BUG_ON((char *)&safe_user_instruction - (char *)&fixed_code_start
  376. != SAFE_USER_INSTRUCTION - FIXED_CODE_START);
  377. init_exception_vectors();
  378. bf53x_cache_init();
  379. }
  380. static int __init topology_init(void)
  381. {
  382. #if defined (CONFIG_BF561)
  383. static struct cpu cpu[2];
  384. register_cpu(&cpu[0], 0);
  385. register_cpu(&cpu[1], 1);
  386. return 0;
  387. #else
  388. static struct cpu cpu[1];
  389. return register_cpu(cpu, 0);
  390. #endif
  391. }
  392. subsys_initcall(topology_init);
  393. static u_long get_vco(void)
  394. {
  395. u_long msel;
  396. u_long vco;
  397. msel = (bfin_read_PLL_CTL() >> 9) & 0x3F;
  398. if (0 == msel)
  399. msel = 64;
  400. vco = CONFIG_CLKIN_HZ;
  401. vco >>= (1 & bfin_read_PLL_CTL()); /* DF bit */
  402. vco = msel * vco;
  403. return vco;
  404. }
  405. /* Get the Core clock */
  406. u_long get_cclk(void)
  407. {
  408. u_long csel, ssel;
  409. if (bfin_read_PLL_STAT() & 0x1)
  410. return CONFIG_CLKIN_HZ;
  411. ssel = bfin_read_PLL_DIV();
  412. csel = ((ssel >> 4) & 0x03);
  413. ssel &= 0xf;
  414. if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */
  415. return get_vco() / ssel;
  416. return get_vco() >> csel;
  417. }
  418. EXPORT_SYMBOL(get_cclk);
  419. /* Get the System clock */
  420. u_long get_sclk(void)
  421. {
  422. u_long ssel;
  423. if (bfin_read_PLL_STAT() & 0x1)
  424. return CONFIG_CLKIN_HZ;
  425. ssel = (bfin_read_PLL_DIV() & 0xf);
  426. if (0 == ssel) {
  427. printk(KERN_WARNING "Invalid System Clock\n");
  428. ssel = 1;
  429. }
  430. return get_vco() / ssel;
  431. }
  432. EXPORT_SYMBOL(get_sclk);
  433. unsigned long sclk_to_usecs(unsigned long sclk)
  434. {
  435. u64 tmp = USEC_PER_SEC * (u64)sclk;
  436. do_div(tmp, get_sclk());
  437. return tmp;
  438. }
  439. EXPORT_SYMBOL(sclk_to_usecs);
  440. unsigned long usecs_to_sclk(unsigned long usecs)
  441. {
  442. u64 tmp = get_sclk() * (u64)usecs;
  443. do_div(tmp, USEC_PER_SEC);
  444. return tmp;
  445. }
  446. EXPORT_SYMBOL(usecs_to_sclk);
  447. /*
  448. * Get CPU information for use by the procfs.
  449. */
  450. static int show_cpuinfo(struct seq_file *m, void *v)
  451. {
  452. char *cpu, *mmu, *fpu, *vendor, *cache;
  453. uint32_t revid;
  454. u_long cclk = 0, sclk = 0;
  455. u_int dcache_size = 0, dsup_banks = 0;
  456. cpu = CPU;
  457. mmu = "none";
  458. fpu = "none";
  459. revid = bfin_revid();
  460. cclk = get_cclk();
  461. sclk = get_sclk();
  462. switch (bfin_read_CHIPID() & CHIPID_MANUFACTURE) {
  463. case 0xca:
  464. vendor = "Analog Devices";
  465. break;
  466. default:
  467. vendor = "unknown";
  468. break;
  469. }
  470. seq_printf(m, "processor\t: %d\n"
  471. "vendor_id\t: %s\n"
  472. "cpu family\t: 0x%x\n"
  473. "model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK)\n"
  474. "stepping\t: %d\n",
  475. 0,
  476. vendor,
  477. (bfin_read_CHIPID() & CHIPID_FAMILY),
  478. cpu, cclk/1000000, sclk/1000000,
  479. revid);
  480. seq_printf(m, "cpu MHz\t\t: %lu.%03lu/%lu.%03lu\n",
  481. cclk/1000000, cclk%1000000,
  482. sclk/1000000, sclk%1000000);
  483. seq_printf(m, "bogomips\t: %lu.%02lu\n"
  484. "Calibration\t: %lu loops\n",
  485. (loops_per_jiffy * HZ) / 500000,
  486. ((loops_per_jiffy * HZ) / 5000) % 100,
  487. (loops_per_jiffy * HZ));
  488. /* Check Cache configutation */
  489. switch (bfin_read_DMEM_CONTROL() & (1 << DMC0_P | 1 << DMC1_P)) {
  490. case ACACHE_BSRAM:
  491. cache = "dbank-A/B\t: cache/sram";
  492. dcache_size = 16;
  493. dsup_banks = 1;
  494. break;
  495. case ACACHE_BCACHE:
  496. cache = "dbank-A/B\t: cache/cache";
  497. dcache_size = 32;
  498. dsup_banks = 2;
  499. break;
  500. case ASRAM_BSRAM:
  501. cache = "dbank-A/B\t: sram/sram";
  502. dcache_size = 0;
  503. dsup_banks = 0;
  504. break;
  505. default:
  506. cache = "unknown";
  507. dcache_size = 0;
  508. dsup_banks = 0;
  509. break;
  510. }
  511. /* Is it turned on? */
  512. if (!((bfin_read_DMEM_CONTROL()) & (ENDCPLB | DMC_ENABLE)))
  513. dcache_size = 0;
  514. seq_printf(m, "cache size\t: %d KB(L1 icache) "
  515. "%d KB(L1 dcache-%s) %d KB(L2 cache)\n",
  516. BFIN_ICACHESIZE / 1024, dcache_size,
  517. #if defined CONFIG_BFIN_WB
  518. "wb"
  519. #elif defined CONFIG_BFIN_WT
  520. "wt"
  521. #endif
  522. "", 0);
  523. seq_printf(m, "%s\n", cache);
  524. seq_printf(m, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n",
  525. BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
  526. seq_printf(m,
  527. "dcache setup\t: %d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
  528. dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
  529. BFIN_DLINES);
  530. #ifdef CONFIG_BFIN_ICACHE_LOCK
  531. switch (read_iloc()) {
  532. case WAY0_L:
  533. seq_printf(m, "Way0 Locked-Down\n");
  534. break;
  535. case WAY1_L:
  536. seq_printf(m, "Way1 Locked-Down\n");
  537. break;
  538. case WAY01_L:
  539. seq_printf(m, "Way0,Way1 Locked-Down\n");
  540. break;
  541. case WAY2_L:
  542. seq_printf(m, "Way2 Locked-Down\n");
  543. break;
  544. case WAY02_L:
  545. seq_printf(m, "Way0,Way2 Locked-Down\n");
  546. break;
  547. case WAY12_L:
  548. seq_printf(m, "Way1,Way2 Locked-Down\n");
  549. break;
  550. case WAY012_L:
  551. seq_printf(m, "Way0,Way1 & Way2 Locked-Down\n");
  552. break;
  553. case WAY3_L:
  554. seq_printf(m, "Way3 Locked-Down\n");
  555. break;
  556. case WAY03_L:
  557. seq_printf(m, "Way0,Way3 Locked-Down\n");
  558. break;
  559. case WAY13_L:
  560. seq_printf(m, "Way1,Way3 Locked-Down\n");
  561. break;
  562. case WAY013_L:
  563. seq_printf(m, "Way 0,Way1,Way3 Locked-Down\n");
  564. break;
  565. case WAY32_L:
  566. seq_printf(m, "Way3,Way2 Locked-Down\n");
  567. break;
  568. case WAY320_L:
  569. seq_printf(m, "Way3,Way2,Way0 Locked-Down\n");
  570. break;
  571. case WAY321_L:
  572. seq_printf(m, "Way3,Way2,Way1 Locked-Down\n");
  573. break;
  574. case WAYALL_L:
  575. seq_printf(m, "All Ways are locked\n");
  576. break;
  577. default:
  578. seq_printf(m, "No Ways are locked\n");
  579. }
  580. #endif
  581. seq_printf(m, "board name\t: %s\n", bfin_board_name);
  582. seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n",
  583. physical_mem_end >> 10, (void *)0, (void *)physical_mem_end);
  584. seq_printf(m, "kernel memory\t: %d kB (0x%p -> 0x%p)\n",
  585. ((int)memory_end - (int)_stext) >> 10,
  586. _stext,
  587. (void *)memory_end);
  588. return 0;
  589. }
  590. static void *c_start(struct seq_file *m, loff_t *pos)
  591. {
  592. return *pos < NR_CPUS ? ((void *)0x12345678) : NULL;
  593. }
  594. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  595. {
  596. ++*pos;
  597. return c_start(m, pos);
  598. }
  599. static void c_stop(struct seq_file *m, void *v)
  600. {
  601. }
  602. struct seq_operations cpuinfo_op = {
  603. .start = c_start,
  604. .next = c_next,
  605. .stop = c_stop,
  606. .show = show_cpuinfo,
  607. };
  608. void __init cmdline_init(const char *r0)
  609. {
  610. if (r0)
  611. strncpy(command_line, r0, COMMAND_LINE_SIZE);
  612. }