bfin_gpio.c 29 KB

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  1. /*
  2. * File: arch/blackfin/kernel/bfin_gpio.c
  3. * Based on:
  4. * Author: Michael Hennerich (hennerich@blackfin.uclinux.org)
  5. *
  6. * Created:
  7. * Description: GPIO Abstraction Layer
  8. *
  9. * Modified:
  10. * Copyright 2007 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. /*
  30. * Number BF537/6/4 BF561 BF533/2/1 BF549/8/4/2
  31. *
  32. * GPIO_0 PF0 PF0 PF0 PA0...PJ13
  33. * GPIO_1 PF1 PF1 PF1
  34. * GPIO_2 PF2 PF2 PF2
  35. * GPIO_3 PF3 PF3 PF3
  36. * GPIO_4 PF4 PF4 PF4
  37. * GPIO_5 PF5 PF5 PF5
  38. * GPIO_6 PF6 PF6 PF6
  39. * GPIO_7 PF7 PF7 PF7
  40. * GPIO_8 PF8 PF8 PF8
  41. * GPIO_9 PF9 PF9 PF9
  42. * GPIO_10 PF10 PF10 PF10
  43. * GPIO_11 PF11 PF11 PF11
  44. * GPIO_12 PF12 PF12 PF12
  45. * GPIO_13 PF13 PF13 PF13
  46. * GPIO_14 PF14 PF14 PF14
  47. * GPIO_15 PF15 PF15 PF15
  48. * GPIO_16 PG0 PF16
  49. * GPIO_17 PG1 PF17
  50. * GPIO_18 PG2 PF18
  51. * GPIO_19 PG3 PF19
  52. * GPIO_20 PG4 PF20
  53. * GPIO_21 PG5 PF21
  54. * GPIO_22 PG6 PF22
  55. * GPIO_23 PG7 PF23
  56. * GPIO_24 PG8 PF24
  57. * GPIO_25 PG9 PF25
  58. * GPIO_26 PG10 PF26
  59. * GPIO_27 PG11 PF27
  60. * GPIO_28 PG12 PF28
  61. * GPIO_29 PG13 PF29
  62. * GPIO_30 PG14 PF30
  63. * GPIO_31 PG15 PF31
  64. * GPIO_32 PH0 PF32
  65. * GPIO_33 PH1 PF33
  66. * GPIO_34 PH2 PF34
  67. * GPIO_35 PH3 PF35
  68. * GPIO_36 PH4 PF36
  69. * GPIO_37 PH5 PF37
  70. * GPIO_38 PH6 PF38
  71. * GPIO_39 PH7 PF39
  72. * GPIO_40 PH8 PF40
  73. * GPIO_41 PH9 PF41
  74. * GPIO_42 PH10 PF42
  75. * GPIO_43 PH11 PF43
  76. * GPIO_44 PH12 PF44
  77. * GPIO_45 PH13 PF45
  78. * GPIO_46 PH14 PF46
  79. * GPIO_47 PH15 PF47
  80. */
  81. #include <linux/delay.h>
  82. #include <linux/module.h>
  83. #include <linux/err.h>
  84. #include <asm/blackfin.h>
  85. #include <asm/gpio.h>
  86. #include <asm/portmux.h>
  87. #include <linux/irq.h>
  88. #if ANOMALY_05000311 || ANOMALY_05000323
  89. enum {
  90. AWA_data = SYSCR,
  91. AWA_data_clear = SYSCR,
  92. AWA_data_set = SYSCR,
  93. AWA_toggle = SYSCR,
  94. AWA_maska = UART_SCR,
  95. AWA_maska_clear = UART_SCR,
  96. AWA_maska_set = UART_SCR,
  97. AWA_maska_toggle = UART_SCR,
  98. AWA_maskb = UART_GCTL,
  99. AWA_maskb_clear = UART_GCTL,
  100. AWA_maskb_set = UART_GCTL,
  101. AWA_maskb_toggle = UART_GCTL,
  102. AWA_dir = SPORT1_STAT,
  103. AWA_polar = SPORT1_STAT,
  104. AWA_edge = SPORT1_STAT,
  105. AWA_both = SPORT1_STAT,
  106. #if ANOMALY_05000311
  107. AWA_inen = TIMER_ENABLE,
  108. #elif ANOMALY_05000323
  109. AWA_inen = DMA1_1_CONFIG,
  110. #endif
  111. };
  112. /* Anomaly Workaround */
  113. #define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
  114. #else
  115. #define AWA_DUMMY_READ(...) do { } while (0)
  116. #endif
  117. #ifdef BF533_FAMILY
  118. static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
  119. (struct gpio_port_t *) FIO_FLAG_D,
  120. };
  121. #endif
  122. #if defined(BF527_FAMILY) || defined(BF537_FAMILY)
  123. static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
  124. (struct gpio_port_t *) PORTFIO,
  125. (struct gpio_port_t *) PORTGIO,
  126. (struct gpio_port_t *) PORTHIO,
  127. };
  128. static unsigned short *port_fer[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
  129. (unsigned short *) PORTF_FER,
  130. (unsigned short *) PORTG_FER,
  131. (unsigned short *) PORTH_FER,
  132. };
  133. #endif
  134. #ifdef BF527_FAMILY
  135. static unsigned short *port_mux[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
  136. (unsigned short *) PORTF_MUX,
  137. (unsigned short *) PORTG_MUX,
  138. (unsigned short *) PORTH_MUX,
  139. };
  140. static const
  141. u8 pmux_offset[][16] =
  142. {{ 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
  143. { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
  144. { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
  145. };
  146. #endif
  147. #ifdef BF561_FAMILY
  148. static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
  149. (struct gpio_port_t *) FIO0_FLAG_D,
  150. (struct gpio_port_t *) FIO1_FLAG_D,
  151. (struct gpio_port_t *) FIO2_FLAG_D,
  152. };
  153. #endif
  154. #ifdef BF548_FAMILY
  155. static struct gpio_port_t *gpio_array[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
  156. (struct gpio_port_t *)PORTA_FER,
  157. (struct gpio_port_t *)PORTB_FER,
  158. (struct gpio_port_t *)PORTC_FER,
  159. (struct gpio_port_t *)PORTD_FER,
  160. (struct gpio_port_t *)PORTE_FER,
  161. (struct gpio_port_t *)PORTF_FER,
  162. (struct gpio_port_t *)PORTG_FER,
  163. (struct gpio_port_t *)PORTH_FER,
  164. (struct gpio_port_t *)PORTI_FER,
  165. (struct gpio_port_t *)PORTJ_FER,
  166. };
  167. #endif
  168. static unsigned short reserved_gpio_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
  169. static unsigned short reserved_peri_map[gpio_bank(MAX_BLACKFIN_GPIOS + 16)];
  170. #define MAX_RESOURCES 256
  171. #define RESOURCE_LABEL_SIZE 16
  172. struct str_ident {
  173. char name[RESOURCE_LABEL_SIZE];
  174. } *str_ident;
  175. #ifdef CONFIG_PM
  176. static unsigned short wakeup_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
  177. static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS];
  178. static struct gpio_port_s gpio_bank_saved[gpio_bank(MAX_BLACKFIN_GPIOS)];
  179. #ifdef BF533_FAMILY
  180. static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB};
  181. #endif
  182. #ifdef BF537_FAMILY
  183. static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX};
  184. #endif
  185. #ifdef BF527_FAMILY
  186. static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB};
  187. #endif
  188. #ifdef BF561_FAMILY
  189. static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB};
  190. #endif
  191. #endif /* CONFIG_PM */
  192. #if defined(BF548_FAMILY)
  193. inline int check_gpio(unsigned short gpio)
  194. {
  195. if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
  196. || gpio == GPIO_PH14 || gpio == GPIO_PH15
  197. || gpio == GPIO_PJ14 || gpio == GPIO_PJ15
  198. || gpio > MAX_BLACKFIN_GPIOS)
  199. return -EINVAL;
  200. return 0;
  201. }
  202. #else
  203. inline int check_gpio(unsigned short gpio)
  204. {
  205. if (gpio >= MAX_BLACKFIN_GPIOS)
  206. return -EINVAL;
  207. return 0;
  208. }
  209. #endif
  210. static void set_label(unsigned short ident, const char *label)
  211. {
  212. if (label && str_ident) {
  213. strncpy(str_ident[ident].name, label,
  214. RESOURCE_LABEL_SIZE);
  215. str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
  216. }
  217. }
  218. static char *get_label(unsigned short ident)
  219. {
  220. if (!str_ident)
  221. return "UNKNOWN";
  222. return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN");
  223. }
  224. static int cmp_label(unsigned short ident, const char *label)
  225. {
  226. if (label && str_ident)
  227. return strncmp(str_ident[ident].name,
  228. label, strlen(label));
  229. else
  230. return -EINVAL;
  231. }
  232. #if defined(BF527_FAMILY) || defined(BF537_FAMILY)
  233. static void port_setup(unsigned short gpio, unsigned short usage)
  234. {
  235. if (!check_gpio(gpio)) {
  236. if (usage == GPIO_USAGE)
  237. *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  238. else
  239. *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
  240. SSYNC();
  241. }
  242. }
  243. #elif defined(BF548_FAMILY)
  244. static void port_setup(unsigned short gpio, unsigned short usage)
  245. {
  246. if (usage == GPIO_USAGE)
  247. gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
  248. else
  249. gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
  250. SSYNC();
  251. }
  252. #else
  253. # define port_setup(...) do { } while (0)
  254. #endif
  255. #ifdef BF537_FAMILY
  256. static struct {
  257. unsigned short res;
  258. unsigned short offset;
  259. } port_mux_lut[] = {
  260. {.res = P_PPI0_D13, .offset = 11},
  261. {.res = P_PPI0_D14, .offset = 11},
  262. {.res = P_PPI0_D15, .offset = 11},
  263. {.res = P_SPORT1_TFS, .offset = 11},
  264. {.res = P_SPORT1_TSCLK, .offset = 11},
  265. {.res = P_SPORT1_DTPRI, .offset = 11},
  266. {.res = P_PPI0_D10, .offset = 10},
  267. {.res = P_PPI0_D11, .offset = 10},
  268. {.res = P_PPI0_D12, .offset = 10},
  269. {.res = P_SPORT1_RSCLK, .offset = 10},
  270. {.res = P_SPORT1_RFS, .offset = 10},
  271. {.res = P_SPORT1_DRPRI, .offset = 10},
  272. {.res = P_PPI0_D8, .offset = 9},
  273. {.res = P_PPI0_D9, .offset = 9},
  274. {.res = P_SPORT1_DRSEC, .offset = 9},
  275. {.res = P_SPORT1_DTSEC, .offset = 9},
  276. {.res = P_TMR2, .offset = 8},
  277. {.res = P_PPI0_FS3, .offset = 8},
  278. {.res = P_TMR3, .offset = 7},
  279. {.res = P_SPI0_SSEL4, .offset = 7},
  280. {.res = P_TMR4, .offset = 6},
  281. {.res = P_SPI0_SSEL5, .offset = 6},
  282. {.res = P_TMR5, .offset = 5},
  283. {.res = P_SPI0_SSEL6, .offset = 5},
  284. {.res = P_UART1_RX, .offset = 4},
  285. {.res = P_UART1_TX, .offset = 4},
  286. {.res = P_TMR6, .offset = 4},
  287. {.res = P_TMR7, .offset = 4},
  288. {.res = P_UART0_RX, .offset = 3},
  289. {.res = P_UART0_TX, .offset = 3},
  290. {.res = P_DMAR0, .offset = 3},
  291. {.res = P_DMAR1, .offset = 3},
  292. {.res = P_SPORT0_DTSEC, .offset = 1},
  293. {.res = P_SPORT0_DRSEC, .offset = 1},
  294. {.res = P_CAN0_RX, .offset = 1},
  295. {.res = P_CAN0_TX, .offset = 1},
  296. {.res = P_SPI0_SSEL7, .offset = 1},
  297. {.res = P_SPORT0_TFS, .offset = 0},
  298. {.res = P_SPORT0_DTPRI, .offset = 0},
  299. {.res = P_SPI0_SSEL2, .offset = 0},
  300. {.res = P_SPI0_SSEL3, .offset = 0},
  301. };
  302. static void portmux_setup(unsigned short per, unsigned short function)
  303. {
  304. u16 y, offset, muxreg;
  305. for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) {
  306. if (port_mux_lut[y].res == per) {
  307. /* SET PORTMUX REG */
  308. offset = port_mux_lut[y].offset;
  309. muxreg = bfin_read_PORT_MUX();
  310. if (offset != 1) {
  311. muxreg &= ~(1 << offset);
  312. } else {
  313. muxreg &= ~(3 << 1);
  314. }
  315. muxreg |= (function << offset);
  316. bfin_write_PORT_MUX(muxreg);
  317. }
  318. }
  319. }
  320. #elif defined(BF548_FAMILY)
  321. inline void portmux_setup(unsigned short portno, unsigned short function)
  322. {
  323. u32 pmux;
  324. pmux = gpio_array[gpio_bank(portno)]->port_mux;
  325. pmux &= ~(0x3 << (2 * gpio_sub_n(portno)));
  326. pmux |= (function & 0x3) << (2 * gpio_sub_n(portno));
  327. gpio_array[gpio_bank(portno)]->port_mux = pmux;
  328. }
  329. inline u16 get_portmux(unsigned short portno)
  330. {
  331. u32 pmux;
  332. pmux = gpio_array[gpio_bank(portno)]->port_mux;
  333. return (pmux >> (2 * gpio_sub_n(portno)) & 0x3);
  334. }
  335. #elif defined(BF527_FAMILY)
  336. inline void portmux_setup(unsigned short portno, unsigned short function)
  337. {
  338. u16 pmux, ident = P_IDENT(portno);
  339. u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
  340. pmux = *port_mux[gpio_bank(ident)];
  341. pmux &= ~(3 << offset);
  342. pmux |= (function & 3) << offset;
  343. *port_mux[gpio_bank(ident)] = pmux;
  344. SSYNC();
  345. }
  346. #else
  347. # define portmux_setup(...) do { } while (0)
  348. #endif
  349. #ifndef BF548_FAMILY
  350. static void default_gpio(unsigned short gpio)
  351. {
  352. unsigned short bank, bitmask;
  353. unsigned long flags;
  354. bank = gpio_bank(gpio);
  355. bitmask = gpio_bit(gpio);
  356. local_irq_save(flags);
  357. gpio_bankb[bank]->maska_clear = bitmask;
  358. gpio_bankb[bank]->maskb_clear = bitmask;
  359. SSYNC();
  360. gpio_bankb[bank]->inen &= ~bitmask;
  361. gpio_bankb[bank]->dir &= ~bitmask;
  362. gpio_bankb[bank]->polar &= ~bitmask;
  363. gpio_bankb[bank]->both &= ~bitmask;
  364. gpio_bankb[bank]->edge &= ~bitmask;
  365. AWA_DUMMY_READ(edge);
  366. local_irq_restore(flags);
  367. }
  368. #else
  369. # define default_gpio(...) do { } while (0)
  370. #endif
  371. static int __init bfin_gpio_init(void)
  372. {
  373. str_ident = kcalloc(MAX_RESOURCES,
  374. sizeof(struct str_ident), GFP_KERNEL);
  375. if (str_ident == NULL)
  376. return -ENOMEM;
  377. memset(str_ident, 0, MAX_RESOURCES * sizeof(struct str_ident));
  378. printk(KERN_INFO "Blackfin GPIO Controller\n");
  379. return 0;
  380. }
  381. arch_initcall(bfin_gpio_init);
  382. #ifndef BF548_FAMILY
  383. /***********************************************************
  384. *
  385. * FUNCTIONS: Blackfin General Purpose Ports Access Functions
  386. *
  387. * INPUTS/OUTPUTS:
  388. * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
  389. *
  390. *
  391. * DESCRIPTION: These functions abstract direct register access
  392. * to Blackfin processor General Purpose
  393. * Ports Regsiters
  394. *
  395. * CAUTION: These functions do not belong to the GPIO Driver API
  396. *************************************************************
  397. * MODIFICATION HISTORY :
  398. **************************************************************/
  399. /* Set a specific bit */
  400. #define SET_GPIO(name) \
  401. void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
  402. { \
  403. unsigned long flags; \
  404. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); \
  405. local_irq_save(flags); \
  406. if (arg) \
  407. gpio_bankb[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
  408. else \
  409. gpio_bankb[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
  410. AWA_DUMMY_READ(name); \
  411. local_irq_restore(flags); \
  412. } \
  413. EXPORT_SYMBOL(set_gpio_ ## name);
  414. SET_GPIO(dir)
  415. SET_GPIO(inen)
  416. SET_GPIO(polar)
  417. SET_GPIO(edge)
  418. SET_GPIO(both)
  419. #if ANOMALY_05000311 || ANOMALY_05000323
  420. #define SET_GPIO_SC(name) \
  421. void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
  422. { \
  423. unsigned long flags; \
  424. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); \
  425. local_irq_save(flags); \
  426. if (arg) \
  427. gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
  428. else \
  429. gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
  430. AWA_DUMMY_READ(name); \
  431. local_irq_restore(flags); \
  432. } \
  433. EXPORT_SYMBOL(set_gpio_ ## name);
  434. #else
  435. #define SET_GPIO_SC(name) \
  436. void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
  437. { \
  438. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); \
  439. if (arg) \
  440. gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
  441. else \
  442. gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
  443. } \
  444. EXPORT_SYMBOL(set_gpio_ ## name);
  445. #endif
  446. SET_GPIO_SC(maska)
  447. SET_GPIO_SC(maskb)
  448. SET_GPIO_SC(data)
  449. #if ANOMALY_05000311 || ANOMALY_05000323
  450. void set_gpio_toggle(unsigned short gpio)
  451. {
  452. unsigned long flags;
  453. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
  454. local_irq_save(flags);
  455. gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
  456. AWA_DUMMY_READ(toggle);
  457. local_irq_restore(flags);
  458. }
  459. #else
  460. void set_gpio_toggle(unsigned short gpio)
  461. {
  462. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
  463. gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
  464. }
  465. #endif
  466. EXPORT_SYMBOL(set_gpio_toggle);
  467. /*Set current PORT date (16-bit word)*/
  468. #if ANOMALY_05000311 || ANOMALY_05000323
  469. #define SET_GPIO_P(name) \
  470. void set_gpiop_ ## name(unsigned short gpio, unsigned short arg) \
  471. { \
  472. unsigned long flags; \
  473. local_irq_save(flags); \
  474. gpio_bankb[gpio_bank(gpio)]->name = arg; \
  475. AWA_DUMMY_READ(name); \
  476. local_irq_restore(flags); \
  477. } \
  478. EXPORT_SYMBOL(set_gpiop_ ## name);
  479. #else
  480. #define SET_GPIO_P(name) \
  481. void set_gpiop_ ## name(unsigned short gpio, unsigned short arg) \
  482. { \
  483. gpio_bankb[gpio_bank(gpio)]->name = arg; \
  484. } \
  485. EXPORT_SYMBOL(set_gpiop_ ## name);
  486. #endif
  487. SET_GPIO_P(data)
  488. SET_GPIO_P(dir)
  489. SET_GPIO_P(inen)
  490. SET_GPIO_P(polar)
  491. SET_GPIO_P(edge)
  492. SET_GPIO_P(both)
  493. SET_GPIO_P(maska)
  494. SET_GPIO_P(maskb)
  495. /* Get a specific bit */
  496. #if ANOMALY_05000311 || ANOMALY_05000323
  497. #define GET_GPIO(name) \
  498. unsigned short get_gpio_ ## name(unsigned short gpio) \
  499. { \
  500. unsigned long flags; \
  501. unsigned short ret; \
  502. local_irq_save(flags); \
  503. ret = 0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
  504. AWA_DUMMY_READ(name); \
  505. local_irq_restore(flags); \
  506. return ret; \
  507. } \
  508. EXPORT_SYMBOL(get_gpio_ ## name);
  509. #else
  510. #define GET_GPIO(name) \
  511. unsigned short get_gpio_ ## name(unsigned short gpio) \
  512. { \
  513. return (0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio))); \
  514. } \
  515. EXPORT_SYMBOL(get_gpio_ ## name);
  516. #endif
  517. GET_GPIO(data)
  518. GET_GPIO(dir)
  519. GET_GPIO(inen)
  520. GET_GPIO(polar)
  521. GET_GPIO(edge)
  522. GET_GPIO(both)
  523. GET_GPIO(maska)
  524. GET_GPIO(maskb)
  525. /*Get current PORT date (16-bit word)*/
  526. #if ANOMALY_05000311 || ANOMALY_05000323
  527. #define GET_GPIO_P(name) \
  528. unsigned short get_gpiop_ ## name(unsigned short gpio) \
  529. { \
  530. unsigned long flags; \
  531. unsigned short ret; \
  532. local_irq_save(flags); \
  533. ret = (gpio_bankb[gpio_bank(gpio)]->name); \
  534. AWA_DUMMY_READ(name); \
  535. local_irq_restore(flags); \
  536. return ret; \
  537. } \
  538. EXPORT_SYMBOL(get_gpiop_ ## name);
  539. #else
  540. #define GET_GPIO_P(name) \
  541. unsigned short get_gpiop_ ## name(unsigned short gpio) \
  542. { \
  543. return (gpio_bankb[gpio_bank(gpio)]->name);\
  544. } \
  545. EXPORT_SYMBOL(get_gpiop_ ## name);
  546. #endif
  547. GET_GPIO_P(data)
  548. GET_GPIO_P(dir)
  549. GET_GPIO_P(inen)
  550. GET_GPIO_P(polar)
  551. GET_GPIO_P(edge)
  552. GET_GPIO_P(both)
  553. GET_GPIO_P(maska)
  554. GET_GPIO_P(maskb)
  555. #ifdef CONFIG_PM
  556. /***********************************************************
  557. *
  558. * FUNCTIONS: Blackfin PM Setup API
  559. *
  560. * INPUTS/OUTPUTS:
  561. * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
  562. * type -
  563. * PM_WAKE_RISING
  564. * PM_WAKE_FALLING
  565. * PM_WAKE_HIGH
  566. * PM_WAKE_LOW
  567. * PM_WAKE_BOTH_EDGES
  568. *
  569. * DESCRIPTION: Blackfin PM Driver API
  570. *
  571. * CAUTION:
  572. *************************************************************
  573. * MODIFICATION HISTORY :
  574. **************************************************************/
  575. int gpio_pm_wakeup_request(unsigned short gpio, unsigned char type)
  576. {
  577. unsigned long flags;
  578. if ((check_gpio(gpio) < 0) || !type)
  579. return -EINVAL;
  580. local_irq_save(flags);
  581. wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio);
  582. wakeup_flags_map[gpio] = type;
  583. local_irq_restore(flags);
  584. return 0;
  585. }
  586. EXPORT_SYMBOL(gpio_pm_wakeup_request);
  587. void gpio_pm_wakeup_free(unsigned short gpio)
  588. {
  589. unsigned long flags;
  590. if (check_gpio(gpio) < 0)
  591. return;
  592. local_irq_save(flags);
  593. wakeup_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  594. local_irq_restore(flags);
  595. }
  596. EXPORT_SYMBOL(gpio_pm_wakeup_free);
  597. static int bfin_gpio_wakeup_type(unsigned short gpio, unsigned char type)
  598. {
  599. port_setup(gpio, GPIO_USAGE);
  600. set_gpio_dir(gpio, 0);
  601. set_gpio_inen(gpio, 1);
  602. if (type & (PM_WAKE_RISING | PM_WAKE_FALLING))
  603. set_gpio_edge(gpio, 1);
  604. else
  605. set_gpio_edge(gpio, 0);
  606. if ((type & (PM_WAKE_BOTH_EDGES)) == (PM_WAKE_BOTH_EDGES))
  607. set_gpio_both(gpio, 1);
  608. else
  609. set_gpio_both(gpio, 0);
  610. if ((type & (PM_WAKE_FALLING | PM_WAKE_LOW)))
  611. set_gpio_polar(gpio, 1);
  612. else
  613. set_gpio_polar(gpio, 0);
  614. SSYNC();
  615. return 0;
  616. }
  617. u32 gpio_pm_setup(void)
  618. {
  619. u32 sic_iwr = 0;
  620. u16 bank, mask, i, gpio;
  621. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  622. mask = wakeup_map[gpio_bank(i)];
  623. bank = gpio_bank(i);
  624. gpio_bank_saved[bank].maskb = gpio_bankb[bank]->maskb;
  625. gpio_bankb[bank]->maskb = 0;
  626. if (mask) {
  627. #ifdef BF537_FAMILY
  628. gpio_bank_saved[bank].fer = *port_fer[bank];
  629. #endif
  630. gpio_bank_saved[bank].inen = gpio_bankb[bank]->inen;
  631. gpio_bank_saved[bank].polar = gpio_bankb[bank]->polar;
  632. gpio_bank_saved[bank].dir = gpio_bankb[bank]->dir;
  633. gpio_bank_saved[bank].edge = gpio_bankb[bank]->edge;
  634. gpio_bank_saved[bank].both = gpio_bankb[bank]->both;
  635. gpio_bank_saved[bank].reserved =
  636. reserved_gpio_map[bank];
  637. gpio = i;
  638. while (mask) {
  639. if (mask & 1) {
  640. reserved_gpio_map[gpio_bank(gpio)] |=
  641. gpio_bit(gpio);
  642. bfin_gpio_wakeup_type(gpio,
  643. wakeup_flags_map[gpio]);
  644. set_gpio_data(gpio, 0); /*Clear*/
  645. }
  646. gpio++;
  647. mask >>= 1;
  648. }
  649. sic_iwr |= 1 <<
  650. (sic_iwr_irqs[bank] - (IRQ_CORETMR + 1));
  651. gpio_bankb[bank]->maskb_set = wakeup_map[gpio_bank(i)];
  652. }
  653. }
  654. AWA_DUMMY_READ(maskb_set);
  655. if (sic_iwr)
  656. return sic_iwr;
  657. else
  658. return IWR_ENABLE_ALL;
  659. }
  660. void gpio_pm_restore(void)
  661. {
  662. u16 bank, mask, i;
  663. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  664. mask = wakeup_map[gpio_bank(i)];
  665. bank = gpio_bank(i);
  666. if (mask) {
  667. #ifdef BF537_FAMILY
  668. *port_fer[bank] = gpio_bank_saved[bank].fer;
  669. #endif
  670. gpio_bankb[bank]->inen = gpio_bank_saved[bank].inen;
  671. gpio_bankb[bank]->dir = gpio_bank_saved[bank].dir;
  672. gpio_bankb[bank]->polar = gpio_bank_saved[bank].polar;
  673. gpio_bankb[bank]->edge = gpio_bank_saved[bank].edge;
  674. gpio_bankb[bank]->both = gpio_bank_saved[bank].both;
  675. reserved_gpio_map[bank] =
  676. gpio_bank_saved[bank].reserved;
  677. }
  678. gpio_bankb[bank]->maskb = gpio_bank_saved[bank].maskb;
  679. }
  680. AWA_DUMMY_READ(maskb);
  681. }
  682. #endif
  683. #endif /* BF548_FAMILY */
  684. /***********************************************************
  685. *
  686. * FUNCTIONS: Blackfin Peripheral Resource Allocation
  687. * and PortMux Setup
  688. *
  689. * INPUTS/OUTPUTS:
  690. * per Peripheral Identifier
  691. * label String
  692. *
  693. * DESCRIPTION: Blackfin Peripheral Resource Allocation and Setup API
  694. *
  695. * CAUTION:
  696. *************************************************************
  697. * MODIFICATION HISTORY :
  698. **************************************************************/
  699. #ifdef BF548_FAMILY
  700. int peripheral_request(unsigned short per, const char *label)
  701. {
  702. unsigned long flags;
  703. unsigned short ident = P_IDENT(per);
  704. /*
  705. * Don't cares are pins with only one dedicated function
  706. */
  707. if (per & P_DONTCARE)
  708. return 0;
  709. if (!(per & P_DEFINED))
  710. return -ENODEV;
  711. if (check_gpio(ident) < 0)
  712. return -EINVAL;
  713. local_irq_save(flags);
  714. if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
  715. printk(KERN_ERR
  716. "%s: Peripheral %d is already reserved as GPIO by %s !\n",
  717. __FUNCTION__, ident, get_label(ident));
  718. dump_stack();
  719. local_irq_restore(flags);
  720. return -EBUSY;
  721. }
  722. if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
  723. u16 funct = get_portmux(ident);
  724. /*
  725. * Pin functions like AMC address strobes my
  726. * be requested and used by several drivers
  727. */
  728. if (!((per & P_MAYSHARE) && (funct == P_FUNCT2MUX(per)))) {
  729. /*
  730. * Allow that the identical pin function can
  731. * be requested from the same driver twice
  732. */
  733. if (cmp_label(ident, label) == 0)
  734. goto anyway;
  735. printk(KERN_ERR
  736. "%s: Peripheral %d function %d is already reserved by %s !\n",
  737. __FUNCTION__, ident, P_FUNCT2MUX(per), get_label(ident));
  738. dump_stack();
  739. local_irq_restore(flags);
  740. return -EBUSY;
  741. }
  742. }
  743. anyway:
  744. reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
  745. portmux_setup(ident, P_FUNCT2MUX(per));
  746. port_setup(ident, PERIPHERAL_USAGE);
  747. local_irq_restore(flags);
  748. set_label(ident, label);
  749. return 0;
  750. }
  751. EXPORT_SYMBOL(peripheral_request);
  752. #else
  753. int peripheral_request(unsigned short per, const char *label)
  754. {
  755. unsigned long flags;
  756. unsigned short ident = P_IDENT(per);
  757. /*
  758. * Don't cares are pins with only one dedicated function
  759. */
  760. if (per & P_DONTCARE)
  761. return 0;
  762. if (!(per & P_DEFINED))
  763. return -ENODEV;
  764. local_irq_save(flags);
  765. if (!check_gpio(ident)) {
  766. if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
  767. printk(KERN_ERR
  768. "%s: Peripheral %d is already reserved as GPIO by %s !\n",
  769. __FUNCTION__, ident, get_label(ident));
  770. dump_stack();
  771. local_irq_restore(flags);
  772. return -EBUSY;
  773. }
  774. }
  775. if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
  776. /*
  777. * Pin functions like AMC address strobes my
  778. * be requested and used by several drivers
  779. */
  780. if (!(per & P_MAYSHARE)) {
  781. /*
  782. * Allow that the identical pin function can
  783. * be requested from the same driver twice
  784. */
  785. if (cmp_label(ident, label) == 0)
  786. goto anyway;
  787. printk(KERN_ERR
  788. "%s: Peripheral %d function %d is already"
  789. " reserved by %s !\n",
  790. __FUNCTION__, ident, P_FUNCT2MUX(per),
  791. get_label(ident));
  792. dump_stack();
  793. local_irq_restore(flags);
  794. return -EBUSY;
  795. }
  796. }
  797. anyway:
  798. portmux_setup(per, P_FUNCT2MUX(per));
  799. port_setup(ident, PERIPHERAL_USAGE);
  800. reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
  801. local_irq_restore(flags);
  802. set_label(ident, label);
  803. return 0;
  804. }
  805. EXPORT_SYMBOL(peripheral_request);
  806. #endif
  807. int peripheral_request_list(unsigned short per[], const char *label)
  808. {
  809. u16 cnt;
  810. int ret;
  811. for (cnt = 0; per[cnt] != 0; cnt++) {
  812. ret = peripheral_request(per[cnt], label);
  813. if (ret < 0) {
  814. for ( ; cnt > 0; cnt--) {
  815. peripheral_free(per[cnt - 1]);
  816. }
  817. return ret;
  818. }
  819. }
  820. return 0;
  821. }
  822. EXPORT_SYMBOL(peripheral_request_list);
  823. void peripheral_free(unsigned short per)
  824. {
  825. unsigned long flags;
  826. unsigned short ident = P_IDENT(per);
  827. if (per & P_DONTCARE)
  828. return;
  829. if (!(per & P_DEFINED))
  830. return;
  831. if (check_gpio(ident) < 0)
  832. return;
  833. local_irq_save(flags);
  834. if (unlikely(!(reserved_peri_map[gpio_bank(ident)]
  835. & gpio_bit(ident)))) {
  836. local_irq_restore(flags);
  837. return;
  838. }
  839. if (!(per & P_MAYSHARE)) {
  840. port_setup(ident, GPIO_USAGE);
  841. }
  842. reserved_peri_map[gpio_bank(ident)] &= ~gpio_bit(ident);
  843. set_label(ident, "free");
  844. local_irq_restore(flags);
  845. }
  846. EXPORT_SYMBOL(peripheral_free);
  847. void peripheral_free_list(unsigned short per[])
  848. {
  849. u16 cnt;
  850. for (cnt = 0; per[cnt] != 0; cnt++) {
  851. peripheral_free(per[cnt]);
  852. }
  853. }
  854. EXPORT_SYMBOL(peripheral_free_list);
  855. /***********************************************************
  856. *
  857. * FUNCTIONS: Blackfin GPIO Driver
  858. *
  859. * INPUTS/OUTPUTS:
  860. * gpio PIO Number between 0 and MAX_BLACKFIN_GPIOS
  861. * label String
  862. *
  863. * DESCRIPTION: Blackfin GPIO Driver API
  864. *
  865. * CAUTION:
  866. *************************************************************
  867. * MODIFICATION HISTORY :
  868. **************************************************************/
  869. int gpio_request(unsigned short gpio, const char *label)
  870. {
  871. unsigned long flags;
  872. if (check_gpio(gpio) < 0)
  873. return -EINVAL;
  874. local_irq_save(flags);
  875. /*
  876. * Allow that the identical GPIO can
  877. * be requested from the same driver twice
  878. * Do nothing and return -
  879. */
  880. if (cmp_label(gpio, label) == 0) {
  881. local_irq_restore(flags);
  882. return 0;
  883. }
  884. if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  885. printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
  886. gpio, get_label(gpio));
  887. dump_stack();
  888. local_irq_restore(flags);
  889. return -EBUSY;
  890. }
  891. if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  892. printk(KERN_ERR
  893. "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
  894. gpio, get_label(gpio));
  895. dump_stack();
  896. local_irq_restore(flags);
  897. return -EBUSY;
  898. }
  899. reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
  900. local_irq_restore(flags);
  901. port_setup(gpio, GPIO_USAGE);
  902. set_label(gpio, label);
  903. return 0;
  904. }
  905. EXPORT_SYMBOL(gpio_request);
  906. void gpio_free(unsigned short gpio)
  907. {
  908. unsigned long flags;
  909. if (check_gpio(gpio) < 0)
  910. return;
  911. local_irq_save(flags);
  912. if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
  913. printk(KERN_ERR "bfin-gpio: GPIO %d wasn't reserved!\n", gpio);
  914. dump_stack();
  915. local_irq_restore(flags);
  916. return;
  917. }
  918. default_gpio(gpio);
  919. reserved_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  920. set_label(gpio, "free");
  921. local_irq_restore(flags);
  922. }
  923. EXPORT_SYMBOL(gpio_free);
  924. #ifdef BF548_FAMILY
  925. void gpio_direction_input(unsigned short gpio)
  926. {
  927. unsigned long flags;
  928. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
  929. local_irq_save(flags);
  930. gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio);
  931. gpio_array[gpio_bank(gpio)]->port_inen |= gpio_bit(gpio);
  932. local_irq_restore(flags);
  933. }
  934. EXPORT_SYMBOL(gpio_direction_input);
  935. void gpio_direction_output(unsigned short gpio)
  936. {
  937. unsigned long flags;
  938. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
  939. local_irq_save(flags);
  940. gpio_array[gpio_bank(gpio)]->port_inen &= ~gpio_bit(gpio);
  941. gpio_array[gpio_bank(gpio)]->port_dir_set = gpio_bit(gpio);
  942. local_irq_restore(flags);
  943. }
  944. EXPORT_SYMBOL(gpio_direction_output);
  945. void gpio_set_value(unsigned short gpio, unsigned short arg)
  946. {
  947. if (arg)
  948. gpio_array[gpio_bank(gpio)]->port_set = gpio_bit(gpio);
  949. else
  950. gpio_array[gpio_bank(gpio)]->port_clear = gpio_bit(gpio);
  951. }
  952. EXPORT_SYMBOL(gpio_set_value);
  953. unsigned short gpio_get_value(unsigned short gpio)
  954. {
  955. return (1 & (gpio_array[gpio_bank(gpio)]->port_data >> gpio_sub_n(gpio)));
  956. }
  957. EXPORT_SYMBOL(gpio_get_value);
  958. #else
  959. void gpio_direction_input(unsigned short gpio)
  960. {
  961. unsigned long flags;
  962. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
  963. local_irq_save(flags);
  964. gpio_bankb[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
  965. gpio_bankb[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
  966. AWA_DUMMY_READ(inen);
  967. local_irq_restore(flags);
  968. }
  969. EXPORT_SYMBOL(gpio_direction_input);
  970. void gpio_direction_output(unsigned short gpio)
  971. {
  972. unsigned long flags;
  973. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
  974. local_irq_save(flags);
  975. gpio_bankb[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
  976. gpio_bankb[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
  977. AWA_DUMMY_READ(dir);
  978. local_irq_restore(flags);
  979. }
  980. EXPORT_SYMBOL(gpio_direction_output);
  981. /* If we are booting from SPI and our board lacks a strong enough pull up,
  982. * the core can reset and execute the bootrom faster than the resistor can
  983. * pull the signal logically high. To work around this (common) error in
  984. * board design, we explicitly set the pin back to GPIO mode, force /CS
  985. * high, and wait for the electrons to do their thing.
  986. *
  987. * This function only makes sense to be called from reset code, but it
  988. * lives here as we need to force all the GPIO states w/out going through
  989. * BUG() checks and such.
  990. */
  991. void bfin_gpio_reset_spi0_ssel1(void)
  992. {
  993. u16 gpio = P_IDENT(P_SPI0_SSEL1);
  994. port_setup(gpio, GPIO_USAGE);
  995. gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
  996. udelay(1);
  997. }
  998. #endif /*BF548_FAMILY */