devs.c 13 KB

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  1. /* linux/arch/arm/plat-s3c24xx/devs.c
  2. *
  3. * Copyright (c) 2004 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * Base S3C24XX platform device definitions
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/types.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/list.h>
  17. #include <linux/timer.h>
  18. #include <linux/init.h>
  19. #include <linux/serial_core.h>
  20. #include <linux/platform_device.h>
  21. #include <asm/mach/arch.h>
  22. #include <asm/mach/map.h>
  23. #include <asm/mach/irq.h>
  24. #include <asm/arch/fb.h>
  25. #include <asm/hardware.h>
  26. #include <asm/io.h>
  27. #include <asm/irq.h>
  28. #include <asm/plat-s3c/regs-serial.h>
  29. #include <asm/plat-s3c24xx/udc.h>
  30. #include <asm/plat-s3c24xx/devs.h>
  31. #include <asm/plat-s3c24xx/cpu.h>
  32. #include <asm/plat-s3c24xx/regs-spi.h>
  33. /* Serial port registrations */
  34. static struct resource s3c2410_uart0_resource[] = {
  35. [0] = {
  36. .start = S3C2410_PA_UART0,
  37. .end = S3C2410_PA_UART0 + 0x3fff,
  38. .flags = IORESOURCE_MEM,
  39. },
  40. [1] = {
  41. .start = IRQ_S3CUART_RX0,
  42. .end = IRQ_S3CUART_ERR0,
  43. .flags = IORESOURCE_IRQ,
  44. }
  45. };
  46. static struct resource s3c2410_uart1_resource[] = {
  47. [0] = {
  48. .start = S3C2410_PA_UART1,
  49. .end = S3C2410_PA_UART1 + 0x3fff,
  50. .flags = IORESOURCE_MEM,
  51. },
  52. [1] = {
  53. .start = IRQ_S3CUART_RX1,
  54. .end = IRQ_S3CUART_ERR1,
  55. .flags = IORESOURCE_IRQ,
  56. }
  57. };
  58. static struct resource s3c2410_uart2_resource[] = {
  59. [0] = {
  60. .start = S3C2410_PA_UART2,
  61. .end = S3C2410_PA_UART2 + 0x3fff,
  62. .flags = IORESOURCE_MEM,
  63. },
  64. [1] = {
  65. .start = IRQ_S3CUART_RX2,
  66. .end = IRQ_S3CUART_ERR2,
  67. .flags = IORESOURCE_IRQ,
  68. }
  69. };
  70. struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
  71. [0] = {
  72. .resources = s3c2410_uart0_resource,
  73. .nr_resources = ARRAY_SIZE(s3c2410_uart0_resource),
  74. },
  75. [1] = {
  76. .resources = s3c2410_uart1_resource,
  77. .nr_resources = ARRAY_SIZE(s3c2410_uart1_resource),
  78. },
  79. [2] = {
  80. .resources = s3c2410_uart2_resource,
  81. .nr_resources = ARRAY_SIZE(s3c2410_uart2_resource),
  82. },
  83. };
  84. /* yart devices */
  85. static struct platform_device s3c24xx_uart_device0 = {
  86. .id = 0,
  87. };
  88. static struct platform_device s3c24xx_uart_device1 = {
  89. .id = 1,
  90. };
  91. static struct platform_device s3c24xx_uart_device2 = {
  92. .id = 2,
  93. };
  94. struct platform_device *s3c24xx_uart_src[3] = {
  95. &s3c24xx_uart_device0,
  96. &s3c24xx_uart_device1,
  97. &s3c24xx_uart_device2,
  98. };
  99. struct platform_device *s3c24xx_uart_devs[3] = {
  100. };
  101. /* USB Host Controller */
  102. static struct resource s3c_usb_resource[] = {
  103. [0] = {
  104. .start = S3C24XX_PA_USBHOST,
  105. .end = S3C24XX_PA_USBHOST + S3C24XX_SZ_USBHOST - 1,
  106. .flags = IORESOURCE_MEM,
  107. },
  108. [1] = {
  109. .start = IRQ_USBH,
  110. .end = IRQ_USBH,
  111. .flags = IORESOURCE_IRQ,
  112. }
  113. };
  114. static u64 s3c_device_usb_dmamask = 0xffffffffUL;
  115. struct platform_device s3c_device_usb = {
  116. .name = "s3c2410-ohci",
  117. .id = -1,
  118. .num_resources = ARRAY_SIZE(s3c_usb_resource),
  119. .resource = s3c_usb_resource,
  120. .dev = {
  121. .dma_mask = &s3c_device_usb_dmamask,
  122. .coherent_dma_mask = 0xffffffffUL
  123. }
  124. };
  125. EXPORT_SYMBOL(s3c_device_usb);
  126. /* LCD Controller */
  127. static struct resource s3c_lcd_resource[] = {
  128. [0] = {
  129. .start = S3C24XX_PA_LCD,
  130. .end = S3C24XX_PA_LCD + S3C24XX_SZ_LCD - 1,
  131. .flags = IORESOURCE_MEM,
  132. },
  133. [1] = {
  134. .start = IRQ_LCD,
  135. .end = IRQ_LCD,
  136. .flags = IORESOURCE_IRQ,
  137. }
  138. };
  139. static u64 s3c_device_lcd_dmamask = 0xffffffffUL;
  140. struct platform_device s3c_device_lcd = {
  141. .name = "s3c2410-lcd",
  142. .id = -1,
  143. .num_resources = ARRAY_SIZE(s3c_lcd_resource),
  144. .resource = s3c_lcd_resource,
  145. .dev = {
  146. .dma_mask = &s3c_device_lcd_dmamask,
  147. .coherent_dma_mask = 0xffffffffUL
  148. }
  149. };
  150. EXPORT_SYMBOL(s3c_device_lcd);
  151. void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
  152. {
  153. struct s3c2410fb_mach_info *npd;
  154. npd = kmalloc(sizeof(*npd), GFP_KERNEL);
  155. if (npd) {
  156. memcpy(npd, pd, sizeof(*npd));
  157. s3c_device_lcd.dev.platform_data = npd;
  158. } else {
  159. printk(KERN_ERR "no memory for LCD platform data\n");
  160. }
  161. }
  162. /* NAND Controller */
  163. static struct resource s3c_nand_resource[] = {
  164. [0] = {
  165. .start = S3C2410_PA_NAND,
  166. .end = S3C2410_PA_NAND + S3C24XX_SZ_NAND - 1,
  167. .flags = IORESOURCE_MEM,
  168. }
  169. };
  170. struct platform_device s3c_device_nand = {
  171. .name = "s3c2410-nand",
  172. .id = -1,
  173. .num_resources = ARRAY_SIZE(s3c_nand_resource),
  174. .resource = s3c_nand_resource,
  175. };
  176. EXPORT_SYMBOL(s3c_device_nand);
  177. /* USB Device (Gadget)*/
  178. static struct resource s3c_usbgadget_resource[] = {
  179. [0] = {
  180. .start = S3C24XX_PA_USBDEV,
  181. .end = S3C24XX_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
  182. .flags = IORESOURCE_MEM,
  183. },
  184. [1] = {
  185. .start = IRQ_USBD,
  186. .end = IRQ_USBD,
  187. .flags = IORESOURCE_IRQ,
  188. }
  189. };
  190. struct platform_device s3c_device_usbgadget = {
  191. .name = "s3c2410-usbgadget",
  192. .id = -1,
  193. .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
  194. .resource = s3c_usbgadget_resource,
  195. };
  196. EXPORT_SYMBOL(s3c_device_usbgadget);
  197. void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
  198. {
  199. struct s3c2410_udc_mach_info *npd;
  200. npd = kmalloc(sizeof(*npd), GFP_KERNEL);
  201. if (npd) {
  202. memcpy(npd, pd, sizeof(*npd));
  203. s3c_device_usbgadget.dev.platform_data = npd;
  204. } else {
  205. printk(KERN_ERR "no memory for udc platform data\n");
  206. }
  207. }
  208. /* Watchdog */
  209. static struct resource s3c_wdt_resource[] = {
  210. [0] = {
  211. .start = S3C24XX_PA_WATCHDOG,
  212. .end = S3C24XX_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1,
  213. .flags = IORESOURCE_MEM,
  214. },
  215. [1] = {
  216. .start = IRQ_WDT,
  217. .end = IRQ_WDT,
  218. .flags = IORESOURCE_IRQ,
  219. }
  220. };
  221. struct platform_device s3c_device_wdt = {
  222. .name = "s3c2410-wdt",
  223. .id = -1,
  224. .num_resources = ARRAY_SIZE(s3c_wdt_resource),
  225. .resource = s3c_wdt_resource,
  226. };
  227. EXPORT_SYMBOL(s3c_device_wdt);
  228. /* I2C */
  229. static struct resource s3c_i2c_resource[] = {
  230. [0] = {
  231. .start = S3C24XX_PA_IIC,
  232. .end = S3C24XX_PA_IIC + S3C24XX_SZ_IIC - 1,
  233. .flags = IORESOURCE_MEM,
  234. },
  235. [1] = {
  236. .start = IRQ_IIC,
  237. .end = IRQ_IIC,
  238. .flags = IORESOURCE_IRQ,
  239. }
  240. };
  241. struct platform_device s3c_device_i2c = {
  242. .name = "s3c2410-i2c",
  243. .id = -1,
  244. .num_resources = ARRAY_SIZE(s3c_i2c_resource),
  245. .resource = s3c_i2c_resource,
  246. };
  247. EXPORT_SYMBOL(s3c_device_i2c);
  248. /* IIS */
  249. static struct resource s3c_iis_resource[] = {
  250. [0] = {
  251. .start = S3C24XX_PA_IIS,
  252. .end = S3C24XX_PA_IIS + S3C24XX_SZ_IIS -1,
  253. .flags = IORESOURCE_MEM,
  254. }
  255. };
  256. static u64 s3c_device_iis_dmamask = 0xffffffffUL;
  257. struct platform_device s3c_device_iis = {
  258. .name = "s3c2410-iis",
  259. .id = -1,
  260. .num_resources = ARRAY_SIZE(s3c_iis_resource),
  261. .resource = s3c_iis_resource,
  262. .dev = {
  263. .dma_mask = &s3c_device_iis_dmamask,
  264. .coherent_dma_mask = 0xffffffffUL
  265. }
  266. };
  267. EXPORT_SYMBOL(s3c_device_iis);
  268. /* RTC */
  269. static struct resource s3c_rtc_resource[] = {
  270. [0] = {
  271. .start = S3C24XX_PA_RTC,
  272. .end = S3C24XX_PA_RTC + 0xff,
  273. .flags = IORESOURCE_MEM,
  274. },
  275. [1] = {
  276. .start = IRQ_RTC,
  277. .end = IRQ_RTC,
  278. .flags = IORESOURCE_IRQ,
  279. },
  280. [2] = {
  281. .start = IRQ_TICK,
  282. .end = IRQ_TICK,
  283. .flags = IORESOURCE_IRQ
  284. }
  285. };
  286. struct platform_device s3c_device_rtc = {
  287. .name = "s3c2410-rtc",
  288. .id = -1,
  289. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  290. .resource = s3c_rtc_resource,
  291. };
  292. EXPORT_SYMBOL(s3c_device_rtc);
  293. /* ADC */
  294. static struct resource s3c_adc_resource[] = {
  295. [0] = {
  296. .start = S3C24XX_PA_ADC,
  297. .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
  298. .flags = IORESOURCE_MEM,
  299. },
  300. [1] = {
  301. .start = IRQ_TC,
  302. .end = IRQ_TC,
  303. .flags = IORESOURCE_IRQ,
  304. },
  305. [2] = {
  306. .start = IRQ_ADC,
  307. .end = IRQ_ADC,
  308. .flags = IORESOURCE_IRQ,
  309. }
  310. };
  311. struct platform_device s3c_device_adc = {
  312. .name = "s3c2410-adc",
  313. .id = -1,
  314. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  315. .resource = s3c_adc_resource,
  316. };
  317. /* SDI */
  318. static struct resource s3c_sdi_resource[] = {
  319. [0] = {
  320. .start = S3C2410_PA_SDI,
  321. .end = S3C2410_PA_SDI + S3C24XX_SZ_SDI - 1,
  322. .flags = IORESOURCE_MEM,
  323. },
  324. [1] = {
  325. .start = IRQ_SDI,
  326. .end = IRQ_SDI,
  327. .flags = IORESOURCE_IRQ,
  328. }
  329. };
  330. struct platform_device s3c_device_sdi = {
  331. .name = "s3c2410-sdi",
  332. .id = -1,
  333. .num_resources = ARRAY_SIZE(s3c_sdi_resource),
  334. .resource = s3c_sdi_resource,
  335. };
  336. EXPORT_SYMBOL(s3c_device_sdi);
  337. /* High-speed MMC/SD */
  338. static struct resource s3c_hsmmc_resource[] = {
  339. [0] = {
  340. .start = S3C2443_PA_HSMMC,
  341. .end = S3C2443_PA_HSMMC + S3C2443_SZ_HSMMC - 1,
  342. .flags = IORESOURCE_MEM,
  343. },
  344. [1] = {
  345. .start = IRQ_S3C2443_HSMMC,
  346. .end = IRQ_S3C2443_HSMMC,
  347. .flags = IORESOURCE_IRQ,
  348. }
  349. };
  350. static u64 s3c_device_hsmmc_dmamask = 0xffffffffUL;
  351. struct platform_device s3c_device_hsmmc = {
  352. .name = "s3c-sdhci",
  353. .id = -1,
  354. .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
  355. .resource = s3c_hsmmc_resource,
  356. .dev = {
  357. .dma_mask = &s3c_device_hsmmc_dmamask,
  358. .coherent_dma_mask = 0xffffffffUL
  359. }
  360. };
  361. /* SPI (0) */
  362. static struct resource s3c_spi0_resource[] = {
  363. [0] = {
  364. .start = S3C24XX_PA_SPI,
  365. .end = S3C24XX_PA_SPI + 0x1f,
  366. .flags = IORESOURCE_MEM,
  367. },
  368. [1] = {
  369. .start = IRQ_SPI0,
  370. .end = IRQ_SPI0,
  371. .flags = IORESOURCE_IRQ,
  372. }
  373. };
  374. static u64 s3c_device_spi0_dmamask = 0xffffffffUL;
  375. struct platform_device s3c_device_spi0 = {
  376. .name = "s3c2410-spi",
  377. .id = 0,
  378. .num_resources = ARRAY_SIZE(s3c_spi0_resource),
  379. .resource = s3c_spi0_resource,
  380. .dev = {
  381. .dma_mask = &s3c_device_spi0_dmamask,
  382. .coherent_dma_mask = 0xffffffffUL
  383. }
  384. };
  385. EXPORT_SYMBOL(s3c_device_spi0);
  386. /* SPI (1) */
  387. static struct resource s3c_spi1_resource[] = {
  388. [0] = {
  389. .start = S3C24XX_PA_SPI + S3C2410_SPI1,
  390. .end = S3C24XX_PA_SPI + S3C2410_SPI1 + 0x1f,
  391. .flags = IORESOURCE_MEM,
  392. },
  393. [1] = {
  394. .start = IRQ_SPI1,
  395. .end = IRQ_SPI1,
  396. .flags = IORESOURCE_IRQ,
  397. }
  398. };
  399. static u64 s3c_device_spi1_dmamask = 0xffffffffUL;
  400. struct platform_device s3c_device_spi1 = {
  401. .name = "s3c2410-spi",
  402. .id = 1,
  403. .num_resources = ARRAY_SIZE(s3c_spi1_resource),
  404. .resource = s3c_spi1_resource,
  405. .dev = {
  406. .dma_mask = &s3c_device_spi1_dmamask,
  407. .coherent_dma_mask = 0xffffffffUL
  408. }
  409. };
  410. EXPORT_SYMBOL(s3c_device_spi1);
  411. /* pwm timer blocks */
  412. static struct resource s3c_timer0_resource[] = {
  413. [0] = {
  414. .start = S3C24XX_PA_TIMER + 0x0C,
  415. .end = S3C24XX_PA_TIMER + 0x0C + 0xB,
  416. .flags = IORESOURCE_MEM,
  417. },
  418. [1] = {
  419. .start = IRQ_TIMER0,
  420. .end = IRQ_TIMER0,
  421. .flags = IORESOURCE_IRQ,
  422. }
  423. };
  424. struct platform_device s3c_device_timer0 = {
  425. .name = "s3c2410-timer",
  426. .id = 0,
  427. .num_resources = ARRAY_SIZE(s3c_timer0_resource),
  428. .resource = s3c_timer0_resource,
  429. };
  430. EXPORT_SYMBOL(s3c_device_timer0);
  431. /* timer 1 */
  432. static struct resource s3c_timer1_resource[] = {
  433. [0] = {
  434. .start = S3C24XX_PA_TIMER + 0x18,
  435. .end = S3C24XX_PA_TIMER + 0x23,
  436. .flags = IORESOURCE_MEM,
  437. },
  438. [1] = {
  439. .start = IRQ_TIMER1,
  440. .end = IRQ_TIMER1,
  441. .flags = IORESOURCE_IRQ,
  442. }
  443. };
  444. struct platform_device s3c_device_timer1 = {
  445. .name = "s3c2410-timer",
  446. .id = 1,
  447. .num_resources = ARRAY_SIZE(s3c_timer1_resource),
  448. .resource = s3c_timer1_resource,
  449. };
  450. EXPORT_SYMBOL(s3c_device_timer1);
  451. /* timer 2 */
  452. static struct resource s3c_timer2_resource[] = {
  453. [0] = {
  454. .start = S3C24XX_PA_TIMER + 0x24,
  455. .end = S3C24XX_PA_TIMER + 0x2F,
  456. .flags = IORESOURCE_MEM,
  457. },
  458. [1] = {
  459. .start = IRQ_TIMER2,
  460. .end = IRQ_TIMER2,
  461. .flags = IORESOURCE_IRQ,
  462. }
  463. };
  464. struct platform_device s3c_device_timer2 = {
  465. .name = "s3c2410-timer",
  466. .id = 2,
  467. .num_resources = ARRAY_SIZE(s3c_timer2_resource),
  468. .resource = s3c_timer2_resource,
  469. };
  470. EXPORT_SYMBOL(s3c_device_timer2);
  471. /* timer 3 */
  472. static struct resource s3c_timer3_resource[] = {
  473. [0] = {
  474. .start = S3C24XX_PA_TIMER + 0x30,
  475. .end = S3C24XX_PA_TIMER + 0x3B,
  476. .flags = IORESOURCE_MEM,
  477. },
  478. [1] = {
  479. .start = IRQ_TIMER3,
  480. .end = IRQ_TIMER3,
  481. .flags = IORESOURCE_IRQ,
  482. }
  483. };
  484. struct platform_device s3c_device_timer3 = {
  485. .name = "s3c2410-timer",
  486. .id = 3,
  487. .num_resources = ARRAY_SIZE(s3c_timer3_resource),
  488. .resource = s3c_timer3_resource,
  489. };
  490. EXPORT_SYMBOL(s3c_device_timer3);
  491. #ifdef CONFIG_CPU_S3C2440
  492. /* Camif Controller */
  493. static struct resource s3c_camif_resource[] = {
  494. [0] = {
  495. .start = S3C2440_PA_CAMIF,
  496. .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF - 1,
  497. .flags = IORESOURCE_MEM,
  498. },
  499. [1] = {
  500. .start = IRQ_CAM,
  501. .end = IRQ_CAM,
  502. .flags = IORESOURCE_IRQ,
  503. }
  504. };
  505. static u64 s3c_device_camif_dmamask = 0xffffffffUL;
  506. struct platform_device s3c_device_camif = {
  507. .name = "s3c2440-camif",
  508. .id = -1,
  509. .num_resources = ARRAY_SIZE(s3c_camif_resource),
  510. .resource = s3c_camif_resource,
  511. .dev = {
  512. .dma_mask = &s3c_device_camif_dmamask,
  513. .coherent_dma_mask = 0xffffffffUL
  514. }
  515. };
  516. EXPORT_SYMBOL(s3c_device_camif);
  517. #endif // CONFIG_CPU_S32440