gpio.c 4.3 KB

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  1. /*
  2. * arch/arm/mach-ns9xxx/gpio.c
  3. *
  4. * Copyright (C) 2006 by Digi International Inc.
  5. * All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation.
  10. */
  11. #include <linux/compiler.h>
  12. #include <linux/init.h>
  13. #include <linux/spinlock.h>
  14. #include <linux/module.h>
  15. #include <asm/arch-ns9xxx/gpio.h>
  16. #include <asm/arch-ns9xxx/processor.h>
  17. #include <asm/arch-ns9xxx/regs-bbu.h>
  18. #include <asm/io.h>
  19. #include <asm/bug.h>
  20. #include <asm/types.h>
  21. #include <asm/bitops.h>
  22. #if defined(CONFIG_PROCESSOR_NS9360)
  23. #define GPIO_MAX 72
  24. #elif defined(CONFIG_PROCESSOR_NS9750)
  25. #define GPIO_MAX 49
  26. #endif
  27. /* protects BBU_GCONFx and BBU_GCTRLx */
  28. static spinlock_t gpio_lock = __SPIN_LOCK_UNLOCKED(gpio_lock);
  29. /* only access gpiores with atomic ops */
  30. static DECLARE_BITMAP(gpiores, GPIO_MAX);
  31. static inline int ns9xxx_valid_gpio(unsigned gpio)
  32. {
  33. #if defined(CONFIG_PROCESSOR_NS9360)
  34. if (processor_is_ns9360())
  35. return gpio <= 72;
  36. else
  37. #endif
  38. #if defined(CONFIG_PROCESSOR_NS9750)
  39. if (processor_is_ns9750())
  40. return gpio <= 49;
  41. else
  42. #endif
  43. BUG();
  44. }
  45. static inline void __iomem *ns9xxx_gpio_get_gconfaddr(unsigned gpio)
  46. {
  47. if (gpio < 56)
  48. return BBU_GCONFb1(gpio / 8);
  49. else
  50. /*
  51. * this could be optimised away on
  52. * ns9750 only builds, but it isn't ...
  53. */
  54. return BBU_GCONFb2((gpio - 56) / 8);
  55. }
  56. static inline void __iomem *ns9xxx_gpio_get_gctrladdr(unsigned gpio)
  57. {
  58. if (gpio < 32)
  59. return BBU_GCTRL1;
  60. else if (gpio < 64)
  61. return BBU_GCTRL2;
  62. else
  63. /* this could be optimised away on ns9750 only builds */
  64. return BBU_GCTRL3;
  65. }
  66. static inline void __iomem *ns9xxx_gpio_get_gstataddr(unsigned gpio)
  67. {
  68. if (gpio < 32)
  69. return BBU_GSTAT1;
  70. else if (gpio < 64)
  71. return BBU_GSTAT2;
  72. else
  73. /* this could be optimised away on ns9750 only builds */
  74. return BBU_GSTAT3;
  75. }
  76. int gpio_request(unsigned gpio, const char *label)
  77. {
  78. if (likely(ns9xxx_valid_gpio(gpio)))
  79. return test_and_set_bit(gpio, gpiores) ? -EBUSY : 0;
  80. else
  81. return -EINVAL;
  82. }
  83. EXPORT_SYMBOL(gpio_request);
  84. void gpio_free(unsigned gpio)
  85. {
  86. clear_bit(gpio, gpiores);
  87. return;
  88. }
  89. EXPORT_SYMBOL(gpio_free);
  90. /*
  91. * each gpio can serve for 4 different purposes [0..3]. These are called
  92. * "functions" and passed in the parameter func. Functions 0-2 are always some
  93. * special things, function 3 is GPIO. If func == 3 dir specifies input or
  94. * output, and with inv you can enable an inverter (independent of func).
  95. */
  96. static int __ns9xxx_gpio_configure(unsigned gpio, int dir, int inv, int func)
  97. {
  98. void __iomem *conf = ns9xxx_gpio_get_gconfaddr(gpio);
  99. u32 confval;
  100. unsigned long flags;
  101. spin_lock_irqsave(&gpio_lock, flags);
  102. confval = __raw_readl(conf);
  103. REGSETIM_IDX(confval, BBU_GCONFx, DIR, gpio & 7, dir);
  104. REGSETIM_IDX(confval, BBU_GCONFx, INV, gpio & 7, inv);
  105. REGSETIM_IDX(confval, BBU_GCONFx, FUNC, gpio & 7, func);
  106. __raw_writel(confval, conf);
  107. spin_unlock_irqrestore(&gpio_lock, flags);
  108. return 0;
  109. }
  110. int ns9xxx_gpio_configure(unsigned gpio, int inv, int func)
  111. {
  112. if (likely(ns9xxx_valid_gpio(gpio))) {
  113. if (func == 3) {
  114. printk(KERN_WARNING "use gpio_direction_input "
  115. "or gpio_direction_output\n");
  116. return -EINVAL;
  117. } else
  118. return __ns9xxx_gpio_configure(gpio, 0, inv, func);
  119. } else
  120. return -EINVAL;
  121. }
  122. EXPORT_SYMBOL(ns9xxx_gpio_configure);
  123. int gpio_direction_input(unsigned gpio)
  124. {
  125. if (likely(ns9xxx_valid_gpio(gpio))) {
  126. return __ns9xxx_gpio_configure(gpio, 0, 0, 3);
  127. } else
  128. return -EINVAL;
  129. }
  130. EXPORT_SYMBOL(gpio_direction_input);
  131. int gpio_direction_output(unsigned gpio, int value)
  132. {
  133. if (likely(ns9xxx_valid_gpio(gpio))) {
  134. gpio_set_value(gpio, value);
  135. return __ns9xxx_gpio_configure(gpio, 1, 0, 3);
  136. } else
  137. return -EINVAL;
  138. }
  139. EXPORT_SYMBOL(gpio_direction_output);
  140. int gpio_get_value(unsigned gpio)
  141. {
  142. void __iomem *stat = ns9xxx_gpio_get_gstataddr(gpio);
  143. int ret;
  144. ret = 1 & (__raw_readl(stat) >> (gpio & 31));
  145. return ret;
  146. }
  147. EXPORT_SYMBOL(gpio_get_value);
  148. void gpio_set_value(unsigned gpio, int value)
  149. {
  150. void __iomem *ctrl = ns9xxx_gpio_get_gctrladdr(gpio);
  151. u32 ctrlval;
  152. unsigned long flags;
  153. spin_lock_irqsave(&gpio_lock, flags);
  154. ctrlval = __raw_readl(ctrl);
  155. if (value)
  156. ctrlval |= 1 << (gpio & 31);
  157. else
  158. ctrlval &= ~(1 << (gpio & 31));
  159. __raw_writel(ctrlval, ctrl);
  160. spin_unlock_irqrestore(&gpio_lock, flags);
  161. }
  162. EXPORT_SYMBOL(gpio_set_value);